Vojta
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0778177106
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tools folder; shuffle circuit
BUILD / build (push) Failing after 28s
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2025-01-30 14:17:08 +01:00 |
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Vojta
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bc4e191e8a
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workflow python version
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2025-01-30 14:01:58 +01:00 |
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Vojta
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7db1276d8f
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setup cfg
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v1.3
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2024-12-13 13:10:10 +01:00 |
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Vojta
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240320200b
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pypi version
v1.1.3
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2024-12-13 13:06:34 +01:00 |
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Vojta Mrazek
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741a5ceab1
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Merge pull request #28 from ehw-fit/main
PyPi
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2024-12-13 12:55:53 +01:00 |
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Vojta Mrazek
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a6060fa2a8
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Update setup.cfg
CodeQL / Analyze (python) (push) Failing after 49s
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2024-12-13 12:51:46 +01:00 |
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Vojta Mrazek
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7f17461d73
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Update setup.cfg
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2024-12-13 12:44:51 +01:00 |
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Vojta Mrazek
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adfcfc51d0
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Create python-publish.yml
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2024-12-13 12:33:27 +01:00 |
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Jan Klhůfek
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63a11f244c
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Merge pull request #27 from ehw-fit/devel
Devel
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2024-10-03 12:39:02 +02:00 |
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Vojta
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616efb25db
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workflow documentation
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2024-10-03 08:20:24 +02:00 |
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Vojta
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813f111df7
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Merge branch 'devel' of github.com:ehw-fit/ariths-gen into devel
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2024-10-03 08:19:27 +02:00 |
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Vojta
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c1e8680e83
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CGP with more than 26 inputs naming
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2024-10-03 08:18:49 +02:00 |
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Vojta Mrazek
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397876b265
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Merge pull request #26 from ehw-fit/devel
Merge Devel into Main
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2024-10-02 21:30:58 +02:00 |
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honzastor
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e804265a7b
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Updated git actions.
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2024-10-02 14:56:52 +02:00 |
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honzastor
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03212a62f5
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Actions fix
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2024-10-01 18:47:24 +02:00 |
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honzastor
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b87f8350fc
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Added ripple borrow subtractor circuit and updated automated testing.
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2024-10-01 18:42:11 +02:00 |
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Vojta Mrazek
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bc95444995
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reconnected wire was not identified as a bus
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2024-07-22 15:10:21 +02:00 |
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Vojta Mrazek
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04cd3e44d3
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bug in cgp indexes with constant wires, they were encouted
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2024-07-22 15:09:50 +02:00 |
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Vojta Mrazek
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f34471bfe3
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signed version of python code
|
2024-07-18 13:16:15 +02:00 |
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Vojta Mrazek
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4cd1189d4a
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CGP circuit accepts BUS inputs
|
2024-07-18 13:15:56 +02:00 |
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Vojta Mrazek
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bc0104de12
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ripple cary subtractor
|
2024-07-09 09:22:11 +02:00 |
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Vojta Mrazek
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e41b4a2f2c
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Merge branch 'devel' of github.com:ehw-fit/ariths-gen into devel
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2024-07-08 11:31:30 +02:00 |
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Vojta Mrazek
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c480eeacf9
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popcount parent component
|
2024-07-08 11:29:25 +02:00 |
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honzastor
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ce36ebf77b
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Fixed hierarchical BLIF generation for popcount_compare.
|
2024-04-17 18:47:41 +02:00 |
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honzastor
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f4b816fc09
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Fix for workflow tests
|
2024-04-14 16:36:45 +02:00 |
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honzastor
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6003886eb7
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Fixed hierarchical Verilog generation of popcount compare. BLIF probably needs a similar treatment, TBD later
|
2024-04-14 16:29:10 +02:00 |
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honzastor
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97e79b93da
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Big code cleanup and some fixes. Hierarchical generation for popcount seems problematic. It seems bus connections are the issue.
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2024-04-13 17:04:03 +02:00 |
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honzastor
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739d5fafce
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Added documentation to Recursive multiplier and hopefully fixed some issues with popcount output generation.
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2024-04-08 21:37:34 +02:00 |
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Vojta Mrazek
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4e331f0525
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popcount with variable sizes
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2024-04-08 13:48:25 +02:00 |
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Jan Klhůfek
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211dd49fb5
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Merge pull request #25 from ehw-fit/popcount
Popcount
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2024-04-05 12:40:39 +02:00 |
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Vojta Mrazek
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0180735dd5
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workflow to node.js 20
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2024-04-05 11:27:41 +02:00 |
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Vojta Mrazek
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84a41ad93c
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test unique #21
|
2024-04-05 11:25:37 +02:00 |
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Vojta Mrazek
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77724ad115
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workflow update
|
2024-04-05 11:21:42 +02:00 |
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Vojta Mrazek
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128b1309a1
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popcount fixes
|
2024-04-05 09:24:03 +02:00 |
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Vojta Mrazek
|
8468c5b8fd
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Merge pull request #24 from ehw-fit/devel
Devel merge to popcount
|
2024-04-05 09:19:26 +02:00 |
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Vojta Mrazek
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1219d7bec5
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Merge branch 'popcount' into devel
|
2024-04-05 09:19:04 +02:00 |
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Vojta Mrazek
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2cf7b921ea
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Popcount implementation
|
2024-04-05 08:46:02 +02:00 |
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honzastor
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da733cf44e
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Added instantiation of wires and buses from inputs. Hopefully fixed now.
|
2024-03-28 00:06:53 +01:00 |
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honzastor
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cd3441ff00
|
Removed error tests from overall testing.
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2024-03-27 23:44:34 +01:00 |
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honzastor
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21a6437eb8
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Additional type hint fix.
|
2024-03-27 23:19:40 +01:00 |
|
honzastor
|
73101eb055
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Type hint bugfix for pytest.
|
2024-03-27 23:10:06 +01:00 |
|
honzastor
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d013a40145
|
Added unsigned recursive multiplier and made some bugfixes.
|
2024-03-27 23:00:13 +01:00 |
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Vojta Mrazek
|
2e1694ccd5
|
popcount and compare
|
2024-03-22 14:19:23 +01:00 |
|
honzastor
|
7e1112cf81
|
Added individual input bus attributes to CGP Circuit objects to allow for the generation of output CGP representation.
|
2024-03-06 00:42:12 +01:00 |
|
Vojta Mrazek
|
f853a46703
|
CGP circuit checks
|
2023-04-13 12:09:07 +02:00 |
|
Vojta Mrazek
|
a44b0638a1
|
Implementation of QuAd approximate adder
|
2023-03-28 13:55:58 +02:00 |
|
Vojta Mrazek
|
a4741db191
|
connection checks (asserts)
|
2023-03-28 11:16:55 +02:00 |
|
Vojta Mrazek
|
44e0a920d1
|
MUX support of constant values
|
2023-03-24 12:11:42 +01:00 |
|
Vojta Mrazek
|
49bbc86a0f
|
accepts a wire as a bus
|
2023-03-23 13:39:32 +01:00 |
|
Vojta Mrazek
|
363e402e16
|
workflow: docs
|
2023-03-23 08:00:37 +01:00 |
|