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d0501238f8
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GCP PGA ADDER
BUILD / test (push) Failing after 25s
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2025-01-06 13:03:21 +01:00 |
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c476479827
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Fix mux with wrong gate ordering
BUILD / test (push) Blocked by required conditions
CodeQL / Analyze (python) (push) Failing after 39s
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2024-11-14 15:15:17 +01:00 |
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Lukas Plevac
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09a12f3df7
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Fully working xorGateComponent
CodeQL / Analyze (python) (push) Has been cancelled
BUILD / build (push) Has been cancelled
BUILD / test (push) Has been cancelled
BUILD / Python ${{ matrix.python-version }} test (3.10) (push) Has been cancelled
BUILD / Python ${{ matrix.python-version }} test (3.11) (push) Has been cancelled
BUILD / Python ${{ matrix.python-version }} test (3.7) (push) Has been cancelled
BUILD / Python ${{ matrix.python-version }} test (3.8) (push) Has been cancelled
BUILD / Python ${{ matrix.python-version }} test (3.9) (push) Has been cancelled
BUILD / documentation (push) Has been cancelled
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2024-10-10 13:33:09 +02:00 |
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Lukas Plevac
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ad9f62e3de
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Added support for MIG excluded xor and xnor gate
CodeQL / Analyze (python) (push) Waiting to run
BUILD / build (push) Waiting to run
BUILD / test (push) Blocked by required conditions
BUILD / Python ${{ matrix.python-version }} test (3.10) (push) Blocked by required conditions
BUILD / Python ${{ matrix.python-version }} test (3.11) (push) Blocked by required conditions
BUILD / Python ${{ matrix.python-version }} test (3.7) (push) Blocked by required conditions
BUILD / Python ${{ matrix.python-version }} test (3.8) (push) Blocked by required conditions
BUILD / Python ${{ matrix.python-version }} test (3.9) (push) Blocked by required conditions
BUILD / documentation (push) Blocked by required conditions
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2024-10-07 15:19:55 +02:00 |
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honzastor
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b87f8350fc
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Added ripple borrow subtractor circuit and updated automated testing.
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2024-10-01 18:42:11 +02:00 |
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Vojta Mrazek
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bc0104de12
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ripple cary subtractor
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2024-07-09 09:22:11 +02:00 |
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Vojta Mrazek
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e41b4a2f2c
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Merge branch 'devel' of github.com:ehw-fit/ariths-gen into devel
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2024-07-08 11:31:30 +02:00 |
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Vojta Mrazek
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c480eeacf9
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popcount parent component
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2024-07-08 11:29:25 +02:00 |
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honzastor
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6003886eb7
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Fixed hierarchical Verilog generation of popcount compare. BLIF probably needs a similar treatment, TBD later
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2024-04-14 16:29:10 +02:00 |
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honzastor
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97e79b93da
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Big code cleanup and some fixes. Hierarchical generation for popcount seems problematic. It seems bus connections are the issue.
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2024-04-13 17:04:03 +02:00 |
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honzastor
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739d5fafce
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Added documentation to Recursive multiplier and hopefully fixed some issues with popcount output generation.
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2024-04-08 21:37:34 +02:00 |
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Vojta Mrazek
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4e331f0525
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popcount with variable sizes
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2024-04-08 13:48:25 +02:00 |
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Vojta Mrazek
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128b1309a1
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popcount fixes
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2024-04-05 09:24:03 +02:00 |
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Vojta Mrazek
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1219d7bec5
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Merge branch 'popcount' into devel
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2024-04-05 09:19:04 +02:00 |
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Vojta Mrazek
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2cf7b921ea
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Popcount implementation
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2024-04-05 08:46:02 +02:00 |
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honzastor
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21a6437eb8
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Additional type hint fix.
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2024-03-27 23:19:40 +01:00 |
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honzastor
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73101eb055
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Type hint bugfix for pytest.
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2024-03-27 23:10:06 +01:00 |
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honzastor
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d013a40145
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Added unsigned recursive multiplier and made some bugfixes.
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2024-03-27 23:00:13 +01:00 |
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Vojta Mrazek
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2e1694ccd5
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popcount and compare
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2024-03-22 14:19:23 +01:00 |
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Vojta Mrazek
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a44b0638a1
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Implementation of QuAd approximate adder
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2023-03-28 13:55:58 +02:00 |
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honzastor
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d52e67bb25
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Implemented new parallel prefix adders and added the possibility for better configuration of partial product accumulators (adders) used in multipliers.
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2023-02-24 11:13:46 +01:00 |
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Honza
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c0dcf42499
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Added new (approximate) multiplier architectures and did some minor changes regarding sign extension for c output formats.
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2022-04-17 13:04:17 +02:00 |
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Honza
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9e186d10ed
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Typos fix and code cleanup.
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2022-02-18 17:24:09 +01:00 |
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Honza
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6f05db002e
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Implemented CSA and Wallace tree multiplier composing of CSAs. Also did some code cleanup.
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2022-02-18 17:00:31 +01:00 |
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Vojta Mrazek
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3c47407f80
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output rename
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2022-02-07 11:29:12 +01:00 |
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Vojta Mrazek
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dc705106b4
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input as output works
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2022-02-02 11:19:32 +01:00 |
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Vojta Mrazek
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1e44c2e3dc
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#10 CGP Circuits as inputs (#11)
* CGP Circuits as inputs
* #10 support of signed output in general circuit
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2022-02-01 13:23:26 +01:00 |
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Honza
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18b44226d8
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Small bugfixes and removal of redundant code.
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2022-01-07 20:36:51 +01:00 |
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Honza
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d9b56e8a00
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Fixed generation of unsigned variants of BAM and TM multipliers. Signed versions don't guarantee correct funcionality atm.
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2022-01-06 19:23:56 +01:00 |
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Honza
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9aa0fb1858
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Added broken array multiplier and truncated multiplier implementations. Tried testing them, but seems buggy. Needs further work.
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2022-01-06 06:39:58 +01:00 |
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Honza
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f830029c54
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Added truncated multiplier circuit implementation. Needs testing.
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2022-01-04 03:13:21 +01:00 |
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Honza
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2083ed35a1
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Returned inner circuit's input buses extension feature back to its original form.
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2021-11-15 22:58:34 +01:00 |
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honzastor
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5d41997560
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Added assertion checks for the same input bus lengths when initializing arithmetic circuits.
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2021-10-24 18:48:00 +02:00 |
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honzastor
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16c1757bc3
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Added signedness support for the output C code representation. Also modified the testing scripts and the chr2c.py converter accordingly and did some documentation changes (even made a small change in readme.md). Signedness support for the output python representation is TBD.
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2021-10-09 23:45:54 +02:00 |
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honzastor
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eba0a7a938
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Made some minor changes concerning proper exportation of multiplier circuits.
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2021-09-09 13:57:36 +02:00 |
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honzastor
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e16de78c2b
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Updated logic behind generating export representations, mainly focused around circuit and its buses and subcomponents namings.
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2021-09-07 17:39:39 +02:00 |
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Vojta Mrazek
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8c0f24cd2d
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General MAC circuit
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2021-09-06 12:52:13 +02:00 |
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Vojta Mrazek
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cfe0ca6b4b
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Automated testing, preparing the package for publishing (#1)
* automated pandoc deploy
* automated pandoc deploy (v2)
* automated pandoc deploy (v2)
* automated pdoc deploy (v3)
* automated pdoc deploy (v4)
* automated pdoc deploy (v5)
* automated pdoc deploy (v5)
* prepare for python project
* 8-bit testing
* 8-bit testing
* 8-bit testing (v2)
* 8-bit testing (v3)
* update of sign
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2021-06-18 12:38:11 +02:00 |
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honzastor
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e5f2dd893a
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Fixed proper generated circuits names (mistakenly named cska as csa).
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2021-04-28 21:39:58 +02:00 |
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honzastor
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670ba45ee5
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Generated sample circuits for various representations. Updated C code circuits testing simulations and did some cleanup.
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2021-04-23 02:44:14 +02:00 |
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honzastor
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ad1c6ec557
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Updated circuits documentation.
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2021-04-21 13:42:07 +02:00 |
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honzastor
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8e950fc51f
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Optimized circuits generation, refactored code, fixed cla, added new csa, array divider circuits and create yosys equivalence check script. TBD: Documentation and sample generated circuits.
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2021-04-21 11:33:07 +02:00 |
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honzastor
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068def0226
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Added documentation of classes methods.
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2021-04-06 01:39:11 +02:00 |
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honzastor
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a336a683e7
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Added some code documentation and updated git action to generate it.
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2021-03-31 04:40:54 +02:00 |
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Jan Klhůfek
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9a4c2c4dd7
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Delete ariths_gen/multi_bit_circuits/multipliers/__pycache__ directory
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2021-03-30 03:12:43 +02:00 |
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Jan Klhůfek
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d27fbf7088
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Delete ariths_gen/multi_bit_circuits/adders/__pycache__ directory
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2021-03-30 03:12:31 +02:00 |
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Jan Klhůfek
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e28574a7c9
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Delete ariths_gen/multi_bit_circuits/__pycache__ directory
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2021-03-30 03:11:38 +02:00 |
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honzastor
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69e2514852
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Updated project's structure. Renamed class names to properly fit Python naming convention. TBD: proper documentation.
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2021-03-30 03:04:48 +02:00 |
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