Updated project's structure. Renamed class names to properly fit Python naming convention. TBD: proper documentation.

README.md

@@ -1,2 +1,16 @@
-# bc_arithmetic_circuits_generator
-FIT BUT bachelor's degree project
+# ArithsGen – tool for arithmetic circuits generation
+### FIT BUT bachelor's degree project
+
+## Description
+ArithsGen presents an open source tool that enables generation of various arithmetic circuits along with the possibility to export them to various representations which all serve their specific purpose. C language for easy simulation, Verilog for logic synthesis, BLIF for formal verification possibilities and CGP to enable further global automatization.
+
+### Usage
+    python3 ariths_gen.py
+
+### Example of generation
+    #Example of 8-bit unsigned dadda multiplier that uses rca to provide the final product
+	a = Bus(N=8, prefix="a_bus")
+	b = Bus(N=8, prefix="b_bus")
+
+	u_dadda = UnsignedDaddaMultiplier(a=a, b=b, prefix="h_u_dadda_rca8", unsigned_adder_class_name=UnsignedRippleCarryAdder)
+	u_dadda.get_v_code_hier(open("h_u_dadda_rca8.v", "w"))

Tests/README.md

@@ -0,0 +1,11 @@
+# Testing of arithmetic circuits generated to C code using ArithsGen
+
+## Description
+Script checks correct functionality of various architectures of unsigned/signed adders and multipliers located in 'c_circuits' folder. Folder contains circuits in flattened as well as in hierarchical representation to ensure proper testing. Script automatically compiles and runs all tests and echoes the results back to console.
+
+**Note** that these circuits were manually modified to allow such a testing (added main with nested loops and asserts)! 
+
+## Execute permission
+    chmod +x c_tests.sh
+## Usage
+    ./c_tests.sh