first commit

2023-12-03 19:31:49 +01:00 · 2023-12-03 19:31:49 +01:00 · c6a162fe59
commit c6a162fe59
122 changed files with 37982 additions and 0 deletions
--- a/7
+++ b/7
@ -0,0 +1,7 @@
+build:
+	cd synth && \
+	/tools/Xilinx/Vivado/2023.2/bin/vivado -mode batch -source filter.tcl
+
+test:
+	cd ver && \
+	vsim -c -do filter.tcl
--- a/comp/block_memory.vhd
+++ b/comp/block_memory.vhd
@ -0,0 +1,99 @@
+-- block_memory.vhd: General storage memory build from BlockRAMs or M20Ks with one read and one write port
+-- Copyright (C) 2019 FIT BUT
+-- Author(s): Lukas Kekely <ikekely@fit.vutbr.cz>
+--
+-- SPDX-License-Identifier: BSD-3-Clause
+
+
+
+library IEEE;
+use IEEE.std_logic_1164.all;
+use IEEE.numeric_std.all;
+use IEEE.std_logic_unsigned.all;
+use work.functions_package.clog2;
+
+
+
+entity block_memory is
+  generic(
+    -- Size of the memory.
+    -- ITEMS individual records addressed from 0 to ITEMS-1, each ITEM_WIDTH bits wide.
+    ITEM_WIDTH        : natural := 32;
+    ITEMS             : natural := 1024;
+    -- Enables output data register on read port for better frequency.
+    -- Latency of reading data from the memory is 1 clock cycle when false, and 2 clock cycles when true.
+    OUTPUT_REGISTER   : boolean := true
+  );
+  port (
+    -- Main clock signal and its synchronous reset.
+    CLK             : in std_logic;
+    RESET           : in std_logic;
+    -- Read interface ----------------------------------------------------------
+    READ_ADDRESS    : in std_logic_vector(clog2(ITEMS)-1 downto 0); -- item address to read
+    READ_VALID      : in std_logic;                                 -- read is valid
+    READ_DATA       : out std_logic_vector(ITEM_WIDTH-1 downto 0);  -- read data (note: read latency!)
+    READ_DATA_VALID : out std_logic;                                -- delayed read valid flag
+    -- Write interface ---------------------------------------------------------
+    WRITE_DATA      : in std_logic_vector(ITEM_WIDTH-1 downto 0);   -- data to write
+    WRITE_ADDRESS   : in std_logic_vector(clog2(ITEMS)-1 downto 0); -- item address to write
+    WRITE_VALID     : in std_logic                                  -- perform write operation
+  );
+end entity;
+
+
+
+architecture behavioral of block_memory is
+
+  type memory_type is array(0 to ITEMS-1) of std_logic_vector(ITEM_WIDTH-1 downto 0);
+  signal memory : memory_type;
+  signal memory_data : std_logic_vector(ITEM_WIDTH-1 downto 0);
+  signal memory_data_valid : std_logic;
+
+begin
+
+  -- Unsupported configurations checks -----------------------------------------
+  assert ITEMS > 1 report "FAILURE: Block Memory must have at least two items!" severity failure;
+  assert ITEM_WIDTH > 0 report "FAILURE: Block Memory item must be at least 1 bit wide!" severity failure;
+
+  -- Runtime error checks ------------------------------------------------------
+  assert conv_integer(READ_ADDRESS) < ITEMS or RESET/= '0' report "ERROR: Block Memory read out of bounds!" severity error;
+  assert conv_integer(WRITE_ADDRESS) < ITEMS or RESET/= '0' report "ERROR: Block Memory write out of bounds!" severity error;
+
+  -- Memory core implementation ------------------------------------------------
+  storage_core: process(CLK)
+  begin
+    if rising_edge(CLK) then
+      -- Write port
+      if WRITE_VALID = '1' then
+        memory(conv_integer(WRITE_ADDRESS)) <= WRITE_DATA;
+      end if;
+      -- Read port
+      memory_data <= memory(conv_integer(READ_ADDRESS));
+      if RESET = '1' then
+        memory_data_valid <= '0';
+      else
+        memory_data_valid <= READ_VALID;
+      end if;
+    end if;
+  end process;
+
+  -- Optional output register on read port -------------------------------------
+  registered_read: if OUTPUT_REGISTER generate
+    read_register: process(CLK)
+    begin
+      if rising_edge(CLK) then
+        READ_DATA <= memory_data;
+        if RESET = '1' then
+          READ_DATA_VALID <= '0';
+        else
+          READ_DATA_VALID <= memory_data_valid;
+        end if;
+      end if;
+    end process;
+  end generate;
+  direct_read: if not OUTPUT_REGISTER generate
+    READ_DATA <= memory_data;
+    READ_DATA_VALID <= memory_data_valid;
+  end generate;
+
+end architecture;
--- a/comp/functions.vhd
+++ b/comp/functions.vhd
@ -0,0 +1,46 @@
+-- functions.vhd: Useful functions not present in the vanilla VHDL libraries
+-- Copyright (C) 2019 FIT BUT
+-- Author(s): Lukas Kekely <ikekely@fit.vutbr.cz>
+--
+-- SPDX-License-Identifier: BSD-3-Clause
+
+
+
+library IEEE;
+use IEEE.std_logic_1164.all;
+use IEEE.numeric_std.all;
+
+
+
+package functions_package is
+
+  -- Ceil 2-logarithm of a given number N, i.e. returns smallest value X for which 2^X >= N holds.
+  function clog2(n : natural) return natural;
+
+  -- Ceil division of a given number N by K, i.e. returns smallest value X for which X*K >= N holds.
+  function cdiv(n : natural; k : natural) return natural;
+
+end functions_package;
+
+
+
+package body functions_package is
+
+  function clog2(n : natural) return natural is
+    variable x, m : natural;
+  begin
+    x := 0;
+    m := 1;
+    while m < n loop
+      x := x + 1;
+      m := m * 2;
+    end loop;
+    return x;
+  end function;
+
+  function cdiv(n : natural; k : natural) return natural is
+  begin
+    return (n-1) / k + 1;
+  end function;
+
+end functions_package;
--- a/comp/jenkins_final.vhd
+++ b/comp/jenkins_final.vhd
@ -0,0 +1,128 @@
+-- jenkins_final.vhd: Part of Jenkins hashing function based on https://burtleburtle.net/bob/c/lookup3.c
+-- Copyright (C) 2019 FIT BUT
+-- Author(s): Lukas Kekely <ikekely@fit.vutbr.cz>
+--
+-- SPDX-License-Identifier: BSD-3-Clause
+
+
+
+library IEEE;
+use IEEE.std_logic_1164.all;
+use IEEE.numeric_std.all;
+use IEEE.std_logic_unsigned.all;
+
+
+
+entity jenkins_final is
+  generic(
+    -- Width of hashed key in 32-bit words.
+    LENGTH          : natural := 1
+  );
+  port (
+    -- Main clock signal and its synchronous reset.
+    CLK             : in std_logic;
+    RESET           : in std_logic;
+    -- Input interface ---------------------------------------------------------
+    INPUT_A         : in std_logic_vector(32-1 downto 0);
+    INPUT_B         : in std_logic_vector(32-1 downto 0);
+    INPUT_C         : in std_logic_vector(32-1 downto 0);
+    INPUT_KEY       : in std_logic_vector(LENGTH*32-1 downto 0);
+    INPUT_VALID     : in std_logic;
+    -- Output interface --------------------------------------------------------
+    OUTPUT_A        : out std_logic_vector(32-1 downto 0);
+    OUTPUT_B        : out std_logic_vector(32-1 downto 0);
+    OUTPUT_C        : out std_logic_vector(32-1 downto 0);
+    OUTPUT_KEY      : out std_logic_vector(LENGTH*32-1 downto 0);
+    OUTPUT_VALID    : out std_logic
+  );
+end entity;
+
+
+
+architecture behavioral of jenkins_final is
+
+  constant STAGES : integer := 7;
+
+  function rot(x : std_logic_vector(32-1 downto 0); k : natural) return std_logic_vector is
+  begin
+    return x(32-k-1 downto 0) & x(32-1 downto 32-k);
+  end function;
+
+  type computation_stage is record
+    a : std_logic_vector(32-1 downto 0);
+    b : std_logic_vector(32-1 downto 0);
+    c : std_logic_vector(32-1 downto 0);
+    key : std_logic_vector(LENGTH*32-1 downto 0);
+    valid : std_logic;
+  end record;
+  type computation_stage_array is array(natural range <>) of computation_stage;
+
+  signal s : computation_stage_array(0 to STAGES);
+
+begin
+
+  -- Input connections
+  s(0).a <= INPUT_A;
+  s(0).b <= INPUT_B;
+  s(0).c <= INPUT_C;
+  s(0).key <= INPUT_KEY;
+  s(0).valid <= INPUT_VALID;
+
+  -- Stage 1: c ^= b; c -= rot(b,14);
+  s(1).a <= s(0).a;
+  s(1).b <= s(0).b;
+  s(1).c <= (s(0).c xor s(0).b) - rot(s(0).b, 14);
+  s(1).key <= s(0).key;
+  s(1).valid <= s(0).valid;
+
+  -- Stage 2: a ^= c; a -= rot(c,11);
+  s(2).a <= (s(1).a xor s(1).c) - rot(s(1).c, 11);
+  s(2).b <= s(1).b;
+  s(2).c <= s(1).c;
+  s(2).key <= s(1).key;
+  s(2).valid <= s(1).valid;
+
+
+  -- Stage 3: b ^= a; b -= rot(a,25);
+  s(3).a <= s(2).a;
+  s(3).b <= (s(2).b xor s(2).a) - rot(s(2).a, 25);
+  s(3).c <= s(2).c;
+  s(3).key <= s(2).key;
+  s(3).valid <= s(2).valid;
+
+  -- Stage 4: c ^= b; c -= rot(b,16);
+  s(4).a <= s(3).a;
+  s(4).b <= s(3).b;
+  s(4).c <= (s(3).c xor s(3).b) - rot(s(3).b, 16);
+  s(4).key <= s(3).key;
+  s(4).valid <= s(3).valid;
+
+  -- Stage 5: a ^= c; a -= rot(c,4);
+  s(5).a <= (s(4).a xor s(4).c) - rot(s(4).c, 4);
+  s(5).b <= s(4).b;
+  s(5).c <= s(4).c;
+  s(5).key <= s(4).key;
+  s(5).valid <= s(4).valid;
+
+  -- Stage 6: b ^= a; b -= rot(a,14);
+  s(6).a <= s(5).a;
+  s(6).b <= (s(5).b xor s(5).a) - rot(s(5).a, 14);
+  s(6).c <= s(5).c;
+  s(6).key <= s(5).key;
+  s(6).valid <= s(5).valid;
+
+  -- Stage 7: c ^= b; c -= rot(b,24);
+  s(7).a <= s(6).a;
+  s(7).b <= s(6).b;
+  s(7).c <= (s(6).c xor s(6).b) - rot(s(6).b, 24);
+  s(7).key <= s(6).key;
+  s(7).valid <= s(6).valid;
+
+  -- Output connections
+  OUTPUT_A <= s(STAGES).a;
+  OUTPUT_B <= s(STAGES).b;
+  OUTPUT_C <= s(STAGES).c;
+  OUTPUT_KEY <= s(STAGES).key;
+  OUTPUT_VALID <= s(STAGES).valid;
+
+end architecture;
--- a/comp/jenkins_hash.vhd
+++ b/comp/jenkins_hash.vhd
@ -0,0 +1,149 @@
+-- jenkins_hash.vhd: Jenkins hashing function VHDL implementation based on https://burtleburtle.net/bob/c/lookup3.c
+-- Copyright (C) 2019 FIT BUT
+-- Author(s): Lukas Kekely <ikekely@fit.vutbr.cz>
+--
+-- SPDX-License-Identifier: BSD-3-Clause
+
+
+
+library IEEE;
+use IEEE.std_logic_1164.all;
+use IEEE.numeric_std.all;
+use IEEE.std_logic_unsigned.all;
+use IEEE.std_logic_arith.all;
+
+
+
+entity jenkins_hash is
+  generic(
+    -- Width of hashed key in 32-bit words.
+    LENGTH          : natural := 1;
+    -- Initialization seed value.
+    INITVAL         : std_logic_vector(32-1 downto 0) := X"DEADBABE"
+  );
+  port (
+    -- Main clock signal and its synchronous reset.
+    CLK             : in std_logic;
+    RESET           : in std_logic;
+    -- Input interface ---------------------------------------------------------
+    INPUT_KEY       : in std_logic_vector(LENGTH*32-1 downto 0); -- value to be hashed
+    INPUT_VALID     : in std_logic;                              -- key valid
+    -- Output interface --------------------------------------------------------
+    OUTPUT_HASH     : out std_logic_vector(32-1 downto 0);        -- computed hash value
+    OUTPUT_KEY      : out std_logic_vector(LENGTH*32-1 downto 0); -- delayed input key
+    OUTPUT_VALID    : out std_logic                               -- delayed input valid
+  );
+end entity;
+
+
+
+architecture behavioral of jenkins_hash is
+
+  constant MIX_STAGES : integer := (LENGTH-1) / 3;
+  constant FINAL_LENGTH : integer := LENGTH - MIX_STAGES*3;
+  constant INITIAL_VALUE : std_logic_vector(32-1 downto 0) := X"deadbeef" + conv_std_logic_vector(LENGTH*4, 32) + INITVAL;
+
+  type computation_stage is record
+    a : std_logic_vector(32-1 downto 0);
+    b : std_logic_vector(32-1 downto 0);
+    c : std_logic_vector(32-1 downto 0);
+    key : std_logic_vector(LENGTH*32-1 downto 0);
+    valid : std_logic;
+  end record;
+  type computation_stage_array is array(natural range <>) of computation_stage;
+
+  signal mix_stage : computation_stage_array(0 to MIX_STAGES);
+  signal mix_to_final : computation_stage;
+
+  signal final_adders : computation_stage;
+  signal final_key_part : std_logic_vector(FINAL_LENGTH*32-1 downto 0);
+
+begin
+
+  -- Unsupported configurations checks -----------------------------------------
+  assert LENGTH > 0 report "FAILURE: Jenkins Hash key must be at least one word wide!" severity failure;
+
+  -- Set up the internal state -------------------------------------------------
+  mix_stage(0).a <= INITIAL_VALUE;
+  mix_stage(0).b <= INITIAL_VALUE;
+  mix_stage(0).c <= INITIAL_VALUE;
+  mix_stage(0).key <= INPUT_KEY;
+  mix_stage(0).valid <= INPUT_VALID;
+
+  -- Handle most of the key ----------------------------------------------------
+  mix_pipeline: for s in 0 to MIX_STAGES-1 generate
+    signal local_key_part : std_logic_vector(3*32-1 downto 0);
+    signal adders : computation_stage;
+  begin
+    -- initial adding with key words
+    local_key_part <= mix_stage(s).key(3*32*(s+1)-1 downto 3*32*s);
+    adders.a <= mix_stage(s).a + local_key_part(32-1 downto 0);
+    adders.b <= mix_stage(s).b + local_key_part(64-1 downto 32);
+    adders.c <= mix_stage(s).c + local_key_part(96-1 downto 64);
+    adders.key <= mix_stage(s).key;
+    adders.valid <= mix_stage(s).valid;
+    -- mixing operation itself
+    mix: entity work.jenkins_mix
+    generic map (
+      LENGTH       => LENGTH
+    ) port map (
+      CLK          => CLK,
+      RESET        => RESET,
+      INPUT_A      => adders.a,
+      INPUT_B      => adders.b,
+      INPUT_C      => adders.c,
+      INPUT_KEY    => adders.key,
+      INPUT_VALID  => adders.valid,
+      OUTPUT_A     => mix_stage(s+1).a, -- output dirrectly to the next stage
+      OUTPUT_B     => mix_stage(s+1).b,
+      OUTPUT_C     => mix_stage(s+1).c,
+      OUTPUT_KEY   => mix_stage(s+1).key,
+      OUTPUT_VALID => mix_stage(s+1).valid
+    );
+  end generate;
+  mix_to_final <= mix_stage(MIX_STAGES); -- output from the last mix stage is input for final
+
+
+  -- Handle the last 3 words ---------------------------------------------------
+  -- initial adding with key words for given length
+  final_key_part <= mix_to_final.key(LENGTH*32-1 downto LENGTH*32-FINAL_LENGTH*32);
+  final_length3: if FINAL_LENGTH = 3 generate
+    final_adders.c <= mix_to_final.c + final_key_part(96-1 downto 64);
+    final_adders.b <= mix_to_final.b + final_key_part(64-1 downto 32);
+    final_adders.a <= mix_to_final.a + final_key_part(32-1 downto 0);
+  end generate;
+  final_length2: if FINAL_LENGTH = 2 generate
+    final_adders.c <= mix_to_final.c;
+    final_adders.b <= mix_to_final.b + final_key_part(64-1 downto 32);
+    final_adders.a <= mix_to_final.a + final_key_part(32-1 downto 0);
+  end generate;
+  final_length1: if FINAL_LENGTH = 1 generate
+    final_adders.c <= mix_to_final.c;
+    final_adders.b <= mix_to_final.b;
+    final_adders.a <= mix_to_final.a + final_key_part(32-1 downto 0);
+  end generate;
+  final_length0: if FINAL_LENGTH = 0 generate
+    assert false report "FAILURE: Jenkins Hash impossible generate state reached in final stage!" severity failure;
+  end generate;
+  final_adders.key <= mix_to_final.key;
+  final_adders.valid <= mix_to_final.valid;
+  -- final operation itself
+  final: entity work.jenkins_final
+  generic map (
+    LENGTH       => LENGTH
+  ) port map (
+    CLK          => CLK,
+    RESET        => RESET,
+    INPUT_A      => final_adders.a,
+    INPUT_B      => final_adders.b,
+    INPUT_C      => final_adders.c,
+    INPUT_KEY    => final_adders.key,
+    INPUT_VALID  => final_adders.valid,
+    OUTPUT_A     => open,        -- output dirrectly into hash output
+    OUTPUT_B     => open,
+    OUTPUT_C     => OUTPUT_HASH, -- C is returned as hash
+    OUTPUT_KEY   => OUTPUT_KEY,
+    OUTPUT_VALID => OUTPUT_VALID
+  );
+
+end architecture;
--- a/comp/jenkins_mix.vhd
+++ b/comp/jenkins_mix.vhd
@ -0,0 +1,120 @@
+-- jenkins_mix.vhd: Part of Jenkins hashing function based on https://burtleburtle.net/bob/c/lookup3.c
+-- Copyright (C) 2019 FIT BUT
+-- Author(s): Lukas Kekely <ikekely@fit.vutbr.cz>
+--
+-- SPDX-License-Identifier: BSD-3-Clause
+
+
+
+library IEEE;
+use IEEE.std_logic_1164.all;
+use IEEE.numeric_std.all;
+use IEEE.std_logic_unsigned.all;
+
+
+
+entity jenkins_mix is
+  generic(
+    -- Width of hashed key in 32-bit words.
+    LENGTH          : natural := 1
+  );
+  port (
+    -- Main clock signal and its synchronous reset.
+    CLK             : in std_logic;
+    RESET           : in std_logic;
+    -- Input interface ---------------------------------------------------------
+    INPUT_A         : in std_logic_vector(32-1 downto 0);
+    INPUT_B         : in std_logic_vector(32-1 downto 0);
+    INPUT_C         : in std_logic_vector(32-1 downto 0);
+    INPUT_KEY       : in std_logic_vector(LENGTH*32-1 downto 0);
+    INPUT_VALID     : in std_logic;
+    -- Output interface --------------------------------------------------------
+    OUTPUT_A        : out std_logic_vector(32-1 downto 0);
+    OUTPUT_B        : out std_logic_vector(32-1 downto 0);
+    OUTPUT_C        : out std_logic_vector(32-1 downto 0);
+    OUTPUT_KEY      : out std_logic_vector(LENGTH*32-1 downto 0);
+    OUTPUT_VALID    : out std_logic
+  );
+end entity;
+
+
+
+architecture behavioral of jenkins_mix is
+
+  constant STAGES : integer := 6;
+
+  function rot(x : std_logic_vector(32-1 downto 0); k : natural) return std_logic_vector is
+  begin
+    return x(32-k-1 downto 0) & x(32-1 downto 32-k);
+  end function;
+
+  type computation_stage is record
+    a : std_logic_vector(32-1 downto 0);
+    b : std_logic_vector(32-1 downto 0);
+    c : std_logic_vector(32-1 downto 0);
+    key : std_logic_vector(LENGTH*32-1 downto 0);
+    valid : std_logic;
+  end record;
+  type computation_stage_array is array(natural range <>) of computation_stage;
+
+  signal s : computation_stage_array(0 to STAGES);
+
+begin
+
+  -- Input connections
+  s(0).a <= INPUT_A;
+  s(0).b <= INPUT_B;
+  s(0).c <= INPUT_C;
+  s(0).key <= INPUT_KEY;
+  s(0).valid <= INPUT_VALID;
+
+  -- Stage 1: a -= c;  a ^= rot(c, 4);  c += b;
+  s(1).a <= (s(0).a - s(0).c) xor rot(s(0).c, 4);
+  s(1).b <= s(0).b;
+  s(1).c <= s(0).c + s(0).b;
+  s(1).key <= s(0).key;
+  s(1).valid <= s(0).valid;
+
+  -- Stage 2: b -= a;  b ^= rot(a, 6);  a += c;
+  s(2).a <= s(1).a + s(1).c;
+  s(2).b <= (s(1).b - s(1).a) xor rot(s(1).a, 6);
+  s(2).c <= s(1).c;
+  s(2).key <= s(1).key;
+  s(2).valid <= s(1).valid;
+
+  -- Stage 3: c -= b;  c ^= rot(b, 8);  b += a;
+  s(3).a <= s(2).a;
+  s(3).b <= s(2).b + s(2).a;
+  s(3).c <= (s(2).c - s(2).b) xor rot(s(2).b, 8);
+  s(3).key <= s(2).key;
+  s(3).valid <= s(2).valid;
+
+  -- Stage 4: a -= c;  a ^= rot(c,16);  c += b;
+  s(4).a <= (s(3).a - s(3).c) xor rot(s(3).c, 16);
+  s(4).b <= s(3).b;
+  s(4).c <= s(3).c + s(3).b;
+  s(4).key <= s(3).key;
+  s(4).valid <= s(3).valid;
+
+  -- Stage 5: b -= a;  b ^= rot(a,19);  a += c;
+  s(5).a <= s(4).a + s(4).c;
+  s(5).b <= (s(4).b - s(4).a) xor rot(s(4).a, 19);
+  s(5).c <= s(4).c;
+  s(5).key <= s(4).key;
+  s(5).valid <= s(4).valid;
+
+  -- Stage 6: c -= b;  c ^= rot(b, 4);  b += a;
+  s(6).a <= s(5).a;
+  s(6).b <= s(5).b + s(5).a;
+  s(6).c <= (s(5).c - s(5).b) xor rot(s(5).b, 4);
+  s(6).key <= s(5).key;
+  s(6).valid <= s(5).valid;
+
+  -- Output connections
+  OUTPUT_A <= s(STAGES).a;
+  OUTPUT_B <= s(STAGES).b;
+  OUTPUT_C <= s(STAGES).c;
+  OUTPUT_KEY <= s(STAGES).key;
+  OUTPUT_VALID <= s(STAGES).valid;
+
+end architecture;
--- a/filter.vhd
+++ b/filter.vhd
@ -0,0 +1,204 @@
+-- filter.vhd: Exact match filter for IP addresses using multiple parallel hash tables (architecture)
+-- Copyright (C) 2019 FIT BUT
+-- Author(s): Lukas Kekely <ikekely@fit.vutbr.cz>
+--
+-- SPDX-License-Identifier: BSD-3-Clause
+
+
+
+library IEEE;
+use IEEE.std_logic_1164.all;
+use IEEE.numeric_std.all;
+use IEEE.std_logic_arith.all;
+use work.functions_package.all;
+
+
+
+architecture structural of filter is
+
+  constant RULE_WIDTH : natural := KEY_WIDTH + DATA_WIDTH + 1; -- each rule record consists of key, data, and empty flag
+    subtype   RULE_KEY    is natural range  KEY_WIDTH+DATA_WIDTH downto DATA_WIDTH+1;
+    subtype   RULE_DATA   is natural range  DATA_WIDTH downto 1;
+    constant  RULE_EMPTY   : natural :=     0;
+  constant KEY_WORDS : natural := cdiv(KEY_WIDTH, 32); -- hash component operates with 32-bit words
+
+  type uint32_array is array (natural range<>) of std_logic_vector(32-1 downto 0);
+  type rule_array is array (natural range <>) of std_logic_vector(RULE_WIDTH-1 downto 0);
+
+  signal in_key : std_logic_vector(KEY_WORDS*32-1 downto 0) := (others => '0');
+  signal in_valid : std_logic;
+
+  signal out_key : std_logic_vector(KEY_WIDTH-1 downto 0);
+  signal out_key_found : std_logic;
+  signal out_data : std_logic_vector(DATA_WIDTH-1 downto 0);
+  signal out_valid : std_logic;
+
+  signal cfg_record : std_logic_vector(RULE_WIDTH-1 downto 0);
+  signal cfg_table : std_logic_vector(clog2(TABLES)-1 downto 0);
+  signal cfg_item : std_logic_vector(clog2(TABLE_SIZE)-1 downto 0);
+  signal cfg_write : std_logic;
+
+  signal hash_values : uint32_array(0 to TABLES-1);
+  signal hash_key : std_logic_vector(KEY_WIDTH-1 downto 0);
+  signal hash_valid : std_logic_vector(TABLES-1 downto 0);
+
+  signal memory_rule : rule_array(0 to TABLES-1);
+  signal memory_key, memory_key_reg : std_logic_vector(KEY_WIDTH-1 downto 0);
+  signal memory_valid : std_logic_vector(TABLES-1 downto 0);
+
+  signal match_flags : std_logic_vector(TABLES-1 downto 0);
+
+begin
+
+  -- Unsupported configurations checks -----------------------------------------
+  assert KEY_WIDTH > 0 report "FAILURE: Filter key must be at least one bit wide!" severity failure;
+  assert DATA_WIDTH > 0 report "FAILURE: Filter data must be at least one bit wide!" severity failure;
+  assert TABLES >= 2 report "FAILURE: Filter must have at least two tables to support effective hashing scheme!" severity failure;
+  assert TABLE_SIZE > 1 report "FAILURE: Filter table must have multiple items!" severity failure;
+  assert 2**clog2(TABLE_SIZE) = TABLE_SIZE report "FAILURE: Filter table must have size that is a power of 2!" severity failure;
+
+
+  -- Registering of entity interfaces ------------------------------------------
+  -- Input interface
+  registered_input: if INPUT_REGISTER generate
+    input_register: process(CLK)
+    begin
+      if rising_edge(CLK) then
+        in_key(KEY_WIDTH-1 downto 0) <= INPUT_KEY;
+        if RESET = '1' then
+          in_valid <= '0';
+        else
+          in_valid <= INPUT_VALID;
+        end if;
+      end if;
+    end process;
+  end generate;
+  dirrect_input: if not INPUT_REGISTER generate
+    in_key(KEY_WIDTH-1 downto 0) <= INPUT_KEY;
+    in_valid <= INPUT_VALID;
+  end generate;
+  -- Output interface
+  registered_output: if OUTPUT_REGISTER generate
+    output_register: process(CLK)
+    begin
+      if rising_edge(CLK) then
+        OUTPUT_KEY <= out_key;
+        OUTPUT_KEY_FOUND <= out_key_found;
+        OUTPUT_DATA <= out_data;
+        if RESET = '1' then
+          OUTPUT_VALID <= '0';
+        else
+          OUTPUT_VALID <= out_valid;
+        end if;
+      end if;
+    end process;
+  end generate;
+  dirrect_output: if not OUTPUT_REGISTER generate
+    OUTPUT_KEY_FOUND <= out_key_found;
+    OUTPUT_DATA <= out_data;
+    OUTPUT_VALID <= out_valid;
+  end generate;
+  -- Configuration interface
+  registered_config: if CONFIG_REGISTER generate
+    config_register: process(CLK)
+    begin
+      if rising_edge(CLK) then
+        cfg_record(RULE_KEY) <= CONFIG_KEY;
+        cfg_record(RULE_DATA) <= CONFIG_DATA;
+        cfg_record(RULE_EMPTY) <= CONFIG_EMPTY;
+        cfg_table <= CONFIG_ADDRESS_TABLE;
+        cfg_item <= CONFIG_ADDRESS_ITEM;
+        if RESET = '1' then
+          cfg_write <= '0';
+        else
+          cfg_write <= CONFIG_WRITE;
+        end if;
+      end if;
+    end process;
+  end generate;
+  dirrect_config: if not CONFIG_REGISTER generate
+    cfg_record(RULE_KEY) <= CONFIG_KEY;
+    cfg_record(RULE_DATA) <= CONFIG_DATA;
+    cfg_record(RULE_EMPTY) <= CONFIG_EMPTY;
+    cfg_table <= CONFIG_ADDRESS_TABLE;
+    cfg_item <= CONFIG_ADDRESS_ITEM;
+    cfg_write <= CONFIG_WRITE;
+  end generate;
+
+
+  -- Hashing stage -------------------------------------------------------------
+  hash_generate: for t in 0 to TABLES-1 generate
+    signal local_key : std_logic_vector(KEY_WORDS*32-1 downto 0);
+    signal local_valid : std_logic;
+  begin
+    hash: entity work.jenkins_hash
+    generic map (
+      LENGTH          => KEY_WORDS,
+      INITVAL         => conv_std_logic_vector(t+1,32)
+    ) port map (
+      CLK             => CLK,
+      RESET           => RESET,
+      INPUT_KEY       => in_key,
+      INPUT_VALID     => in_valid,
+      OUTPUT_HASH     => hash_values(t),
+      OUTPUT_KEY      => local_key,
+      OUTPUT_VALID    => hash_valid(t)
+    );
+    key_valid_connection: if t = 0 generate -- key is pipelined inside the hash for table #0
+      hash_key <= local_key(KEY_WIDTH-1 downto 0);
+    end generate;
+  end generate;
+
+
+  -- Storage stage -------------------------------------------------------------
+  storage_generate: for t in 0 to TABLES-1 generate
+    signal table_select : std_logic;
+    signal write_here : std_logic;
+  begin
+    storage: entity work.block_memory
+    generic map (
+      ITEM_WIDTH        => RULE_WIDTH,
+      ITEMS             => TABLE_SIZE,
+      OUTPUT_REGISTER   => false
+    ) port map (
+      CLK             => CLK,
+      RESET           => RESET,
+      READ_ADDRESS    => hash_values(t)(clog2(TABLE_SIZE)-1 downto 0), -- lowest hash bits are used as address
+      READ_VALID      => hash_valid(t),
+      READ_DATA       => memory_rule(t),
+      READ_DATA_VALID => memory_valid(t),
+      WRITE_DATA      => cfg_record,
+      WRITE_ADDRESS   => cfg_item,
+      WRITE_VALID     => write_here
+    );
+    table_select <= '1' when cfg_table = conv_std_logic_vector(t,clog2(TABLES)) else '0'; -- table write enable selection
+    write_here <= cfg_write and table_select;
+  end generate;
+  key_memory_register: process(CLK) -- key pipeline to match memory latency
+  begin
+    if rising_edge(CLK) then
+      memory_key <= hash_key; -- memory is configured to have one cycle read latecy
+      -- memory_key_reg <= hash_key;
+      -- memory_key <= memory_key_reg;
+    end if;
+  end process;
+
+
+  -- Match decoding stage ------------------------------------------------------
+  compare_and_select: process(memory_key, memory_rule)
+  begin
+    out_key_found <= '0';
+    out_data <= (others => 'X');
+    for t in 0 to TABLES-1 loop
+      if memory_key = memory_rule(t)(RULE_KEY) then -- main key compares
+        if memory_rule(t)(RULE_EMPTY) = '0' then    -- do not forget to ignore empty rules
+          out_key_found <= '1';
+          out_data <= memory_rule(t)(RULE_DATA);
+        end if;
+      end if;
+    end loop;
+  end process;
+  out_valid <= memory_valid(0); -- select pipelined valid flag from table #0
+  out_key <= memory_key;
+
+end architecture;
--- a/filter_ent.vhd
+++ b/filter_ent.vhd
@ -0,0 +1,52 @@
+-- filter_ent.vhd: Exact match filter for IP addresses using multiple parallel hash tables (entity)
+-- Copyright (C) 2019 FIT BUT
+-- Author(s): Lukas Kekely <ikekely@fit.vutbr.cz>
+--
+-- SPDX-License-Identifier: BSD-3-Clause
+
+
+
+library IEEE;
+use IEEE.std_logic_1164.all;
+use IEEE.numeric_std.all;
+use IEEE.std_logic_arith.all;
+use work.functions_package.all;
+
+
+
+entity filter is
+  generic(
+    -- Width of hashed key (IP address) in bits.
+    KEY_WIDTH       : natural := 128;
+    -- Width of data value associated with each key in bits.
+    DATA_WIDTH      : natural := 16;
+    -- Number of parallel hash tables or hash functions used.
+    TABLES          : natural := 4;
+    -- Number of items in each hash table. Must be a power of 2.
+    TABLE_SIZE      : natural := 2048;
+    -- Enables registers on selected interfaces for better frequency.
+    INPUT_REGISTER  : boolean := true;
+    OUTPUT_REGISTER : boolean := true;
+    CONFIG_REGISTER : boolean := true
+  );
+  port (
+    -- Main clock signal and its synchronous reset.
+    CLK             : in std_logic;
+    RESET           : in std_logic;
+    -- Input interface ---------------------------------------------------------
+    INPUT_KEY       : in std_logic_vector(KEY_WIDTH-1 downto 0); -- searched key
+    INPUT_VALID     : in std_logic;                              -- key valid flag
+    -- Output interface --------------------------------------------------------
+    OUTPUT_KEY       : out std_logic_vector(KEY_WIDTH-1 downto 0);  -- delayed searched key
+    OUTPUT_KEY_FOUND : out std_logic;                               -- key was found successfully
+    OUTPUT_DATA      : out std_logic_vector(DATA_WIDTH-1 downto 0); -- data associated with the found key
+    OUTPUT_VALID     : out std_logic;                               -- delayed input valid
+    -- Configuration interface (insertion of rules) ----------------------------
+    CONFIG_KEY           : in std_logic_vector(KEY_WIDTH-1 downto 0);         -- key value of a rule
+    CONFIG_DATA          : in std_logic_vector(DATA_WIDTH-1 downto 0);        -- data value of a rule
+    CONFIG_EMPTY         : in std_logic;                                      -- rule is empty flag (data+key are ignored and rule cannot be matched)
+    CONFIG_ADDRESS_TABLE : in std_logic_vector(clog2(TABLES)-1 downto 0);     -- address where to write the rule - table selection
+    CONFIG_ADDRESS_ITEM  : in std_logic_vector(clog2(TABLE_SIZE)-1 downto 0); -- address where to write the rule - item selection in the table
+    CONFIG_WRITE         : in std_logic                                       -- write enable flag
+  );
+end entity;
--- a/synth/filter.tcl
+++ b/synth/filter.tcl
@ -0,0 +1,39 @@
+# filter.tcl: Verification execution script for ModelSim
+# Copyright (C) 2019 FIT BUT
+# Author(s): Lukas Kekely <ikekely@fit.vutbr.cz>
+#
+# SPDX-License-Identifier: BSD-3-Clause
+
+
+
+# Create Vivado Project
+#create_project -part xc7vx330tffg1157-1 -force filter_vivado
+create_project -part xc7k160tffv676-1 -force filter_vivado
+set_param project.enableVHDL2008 1
+set_property target_language VHDL [current_project]
+set_property enable_vhdl_2008 1 [current_project]
+
+# Add source files
+add_files -norecurse \
+  ../comp/functions.vhd \
+  ../comp/block_memory.vhd \
+  ../comp/jenkins_mix.vhd \
+  ../comp/jenkins_final.vhd \
+  ../comp/jenkins_hash.vhd \
+  ../filter_ent.vhd \
+  ../filter.vhd
+set_property file_type {VHDL 2008} [get_files]
+set_property top filter [current_fileset]
+
+# Add contraints file
+add_files -fileset constrs_1 filter.xdc
+
+# Run synthesis
+set_property -name {STEPS.SYNTH_DESIGN.ARGS.MORE OPTIONS} -value "-mode out_of_context" -objects [get_runs synth_1]
+launch_runs synth_1
+wait_on_run synth_1
+open_run synth_1
+
+# Generate reports
+report_timing_summary -delay_type min_max -report_unconstrained -max_paths 64 -input_pins -name timing_1 -file filter_synthesis_timing.log
+report_utilization -file filter_synthesis_utilization.log
--- a/synth/filter.xdc
+++ b/synth/filter.xdc
@ -0,0 +1,14 @@
+# filter.tcl: Verification execution script for ModelSim
+# Copyright (C) 2019 FIT BUT
+# Author(s): Lukas Kekely <ikekely@fit.vutbr.cz>
+#
+# SPDX-License-Identifier: BSD-3-Clause
+
+
+
+# Configure clock frequencies
+create_clock -period 4 [get_ports CLK]
+
+# Configure delays for synthesis
+set_input_delay -clock [get_clocks CLK] 1 [all_inputs]
+set_output_delay -clock [get_clocks CLK] 1 [all_outputs]
--- a/synth/filter_synthesis_timing.log
+++ b/synth/filter_synthesis_timing.log
--- a/synth/filter_synthesis_utilization.log
+++ b/synth/filter_synthesis_utilization.log
@ -0,0 +1,186 @@
+Copyright 1986-2022 Xilinx, Inc. All Rights Reserved. Copyright 2022-2023 Advanced Micro Devices, Inc. All Rights Reserved.
+---------------------------------------------------------------------------------------------------------------------------------------------
+| Tool Version : Vivado v.2023.2 (lin64) Build 4029153 Fri Oct 13 20:13:54 MDT 2023
+| Date         : Sun Dec  3 18:34:48 2023
+| Host         : veronika-swiftsf11433 running 64-bit EndeavourOS Linux
+| Command      : report_utilization -file filter_synthesis_utilization.log
+| Design       : filter
+| Device       : xc7k160tffv676-1
+| Speed File   : -1
+| Design State : Synthesized
+---------------------------------------------------------------------------------------------------------------------------------------------
+
+Utilization Design Information
+
+Table of Contents
+-----------------
+1. Slice Logic
+1.1 Summary of Registers by Type
+2. Memory
+3. DSP
+4. IO and GT Specific
+5. Clocking
+6. Specific Feature
+7. Primitives
+8. Black Boxes
+9. Instantiated Netlists
+
+1. Slice Logic
+--------------
+
+-------------------------+------+-------+------------+-----------+-------+
+|        Site Type        | Used | Fixed | Prohibited | Available | Util% |
+-------------------------+------+-------+------------+-----------+-------+
+| Slice LUTs*             | 3498 |     0 |          0 |    101400 |  3.45 |
+|   LUT as Logic          | 3498 |     0 |          0 |    101400 |  3.45 |
+|   LUT as Memory         |    0 |     0 |          0 |     35000 |  0.00 |
+| Slice Registers         |  563 |     0 |          0 |    202800 |  0.28 |
+|   Register as Flip Flop |  563 |     0 |          0 |    202800 |  0.28 |
+|   Register as Latch     |    0 |     0 |          0 |    202800 |  0.00 |
+| F7 Muxes                |    0 |     0 |          0 |     50700 |  0.00 |
+| F8 Muxes                |    0 |     0 |          0 |     25350 |  0.00 |
+-------------------------+------+-------+------------+-----------+-------+
+* Warning! The Final LUT count, after physical optimizations and full implementation, is typically lower. Run opt_design after synthesis, if not already completed, for a more realistic count.
+Warning! LUT value is adjusted to account for LUT combining.
+
+
+1.1 Summary of Registers by Type
+--------------------------------
+
+-------+--------------+-------------+--------------+
+| Total | Clock Enable | Synchronous | Asynchronous |
+-------+--------------+-------------+--------------+
+| 0     |            _ |           - |            - |
+| 0     |            _ |           - |          Set |
+| 0     |            _ |           - |        Reset |
+| 0     |            _ |         Set |            - |
+| 0     |            _ |       Reset |            - |
+| 0     |          Yes |           - |            - |
+| 0     |          Yes |           - |          Set |
+| 0     |          Yes |           - |        Reset |
+| 0     |          Yes |         Set |            - |
+| 563   |          Yes |       Reset |            - |
+-------+--------------+-------------+--------------+
+
+
+2. Memory
+---------
+
+-------------------+------+-------+------------+-----------+-------+
+|     Site Type     | Used | Fixed | Prohibited | Available | Util% |
+-------------------+------+-------+------------+-----------+-------+
+| Block RAM Tile    |   34 |     0 |          0 |       325 | 10.46 |
+|   RAMB36/FIFO*    |   32 |     0 |          0 |       325 |  9.85 |
+|     RAMB36E1 only |   32 |       |            |           |       |
+|   RAMB18          |    4 |     0 |          0 |       650 |  0.62 |
+|     RAMB18E1 only |    4 |       |            |           |       |
+-------------------+------+-------+------------+-----------+-------+
+* Note: Each Block RAM Tile only has one FIFO logic available and therefore can accommodate only one FIFO36E1 or one FIFO18E1. However, if a FIFO18E1 occupies a Block RAM Tile, that tile can still accommodate a RAMB18E1
+
+
+3. DSP
+------
+
+-----------+------+-------+------------+-----------+-------+
+| Site Type | Used | Fixed | Prohibited | Available | Util% |
+-----------+------+-------+------------+-----------+-------+
+| DSPs      |    0 |     0 |          0 |       600 |  0.00 |
+-----------+------+-------+------------+-----------+-------+
+
+
+4. IO and GT Specific
+---------------------
+
+-----------------------------+------+-------+------------+-----------+-------+
+|          Site Type          | Used | Fixed | Prohibited | Available | Util% |
+-----------------------------+------+-------+------------+-----------+-------+
+| Bonded IOB                  |    0 |     0 |          0 |       400 |  0.00 |
+| Bonded IPADs                |    0 |     0 |          0 |        26 |  0.00 |
+| Bonded OPADs                |    0 |     0 |          0 |        16 |  0.00 |
+| PHY_CONTROL                 |    0 |     0 |          0 |         8 |  0.00 |
+| PHASER_REF                  |    0 |     0 |          0 |         8 |  0.00 |
+| OUT_FIFO                    |    0 |     0 |          0 |        32 |  0.00 |
+| IN_FIFO                     |    0 |     0 |          0 |        32 |  0.00 |
+| IDELAYCTRL                  |    0 |     0 |          0 |         8 |  0.00 |
+| IBUFDS                      |    0 |     0 |          0 |       384 |  0.00 |
+| GTXE2_COMMON                |    0 |     0 |          0 |         2 |  0.00 |
+| GTXE2_CHANNEL               |    0 |     0 |          0 |         8 |  0.00 |
+| PHASER_OUT/PHASER_OUT_PHY   |    0 |     0 |          0 |        32 |  0.00 |
+| PHASER_IN/PHASER_IN_PHY     |    0 |     0 |          0 |        32 |  0.00 |
+| IDELAYE2/IDELAYE2_FINEDELAY |    0 |     0 |          0 |       400 |  0.00 |
+| ODELAYE2/ODELAYE2_FINEDELAY |    0 |     0 |          0 |       150 |  0.00 |
+| IBUFDS_GTE2                 |    0 |     0 |          0 |         4 |  0.00 |
+| ILOGIC                      |    0 |     0 |          0 |       400 |  0.00 |
+| OLOGIC                      |    0 |     0 |          0 |       400 |  0.00 |
+-----------------------------+------+-------+------------+-----------+-------+
+
+
+5. Clocking
+-----------
+
+------------+------+-------+------------+-----------+-------+
+|  Site Type | Used | Fixed | Prohibited | Available | Util% |
+------------+------+-------+------------+-----------+-------+
+| BUFGCTRL   |    0 |     0 |          0 |        32 |  0.00 |
+| BUFIO      |    0 |     0 |          0 |        32 |  0.00 |
+| MMCME2_ADV |    0 |     0 |          0 |         8 |  0.00 |
+| PLLE2_ADV  |    0 |     0 |          0 |         8 |  0.00 |
+| BUFMRCE    |    0 |     0 |          0 |        16 |  0.00 |
+| BUFHCE     |    0 |     0 |          0 |       120 |  0.00 |
+| BUFR       |    0 |     0 |          0 |        32 |  0.00 |
+------------+------+-------+------------+-----------+-------+
+
+
+6. Specific Feature
+-------------------
+
+-------------+------+-------+------------+-----------+-------+
+|  Site Type  | Used | Fixed | Prohibited | Available | Util% |
+-------------+------+-------+------------+-----------+-------+
+| BSCANE2     |    0 |     0 |          0 |         4 |  0.00 |
+| CAPTUREE2   |    0 |     0 |          0 |         1 |  0.00 |
+| DNA_PORT    |    0 |     0 |          0 |         1 |  0.00 |
+| EFUSE_USR   |    0 |     0 |          0 |         1 |  0.00 |
+| FRAME_ECCE2 |    0 |     0 |          0 |         1 |  0.00 |
+| ICAPE2      |    0 |     0 |          0 |         2 |  0.00 |
+| PCIE_2_1    |    0 |     0 |          0 |         1 |  0.00 |
+| STARTUPE2   |    0 |     0 |          0 |         1 |  0.00 |
+| XADC        |    0 |     0 |          0 |         1 |  0.00 |
+-------------+------+-------+------------+-----------+-------+
+
+
+7. Primitives
+-------------
+
+----------+------+---------------------+
+| Ref Name | Used | Functional Category |
+----------+------+---------------------+
+| LUT5     |  995 |                 LUT |
+| LUT6     |  950 |                 LUT |
+| LUT3     |  900 |                 LUT |
+| LUT2     |  874 |                 LUT |
+| CARRY4   |  681 |          CarryLogic |
+| FDRE     |  563 |        Flop & Latch |
+| LUT4     |  260 |                 LUT |
+| LUT1     |  228 |                 LUT |
+| RAMB36E1 |   32 |        Block Memory |
+| RAMB18E1 |    4 |        Block Memory |
+----------+------+---------------------+
+
+
+8. Black Boxes
+--------------
+
+----------+------+
+| Ref Name | Used |
+----------+------+
+
+
+9. Instantiated Netlists
+------------------------
+
+----------+------+
+| Ref Name | Used |
+----------+------+
+
+
--- a/synth/filter_vivado.cache/wt/project.wpc
+++ b/synth/filter_vivado.cache/wt/project.wpc
@ -0,0 +1,4 @@
+version:1
+6d6f64655f636f756e7465727c42617463684d6f6465:1
+6d6f64655f636f756e7465727c4755494d6f6465:1
+eof:
--- a/synth/filter_vivado.cache/wt/synthesis.wdf
+++ b/synth/filter_vivado.cache/wt/synthesis.wdf
@ -0,0 +1,51 @@
+version:1
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+eof:55709678
--- a/synth/filter_vivado.cache/wt/webtalk_pa.xml
+++ b/synth/filter_vivado.cache/wt/webtalk_pa.xml
@ -0,0 +1,21 @@
+<?xml version="1.0" encoding="UTF-8" ?>
+<document>
+<!--The data in this file is primarily intended for consumption by Xilinx tools.
+The structure and the elements are likely to change over the next few releases.
+This means code written to parse this file will need to be revisited each subsequent release.-->
+<application name="pa" timeStamp="Sun Dec  3 18:51:31 2023">
+<section name="Project Information" visible="false">
+<property name="ProjectID" value="c9dd3875e3334360b2616c96fbb25f60" type="ProjectID"/>
+<property name="ProjectIteration" value="1" type="ProjectIteration"/>
+</section>
+<section name="PlanAhead Usage" visible="true">
+<item name="Project Data">
+<property name="SrcSetCount" value="1" type="SrcSetCount"/>
+<property name="ConstraintSetCount" value="1" type="ConstraintSetCount"/>
+<property name="DesignMode" value="RTL" type="DesignMode"/>
+<property name="SynthesisStrategy" value="Vivado Synthesis Defaults" type="SynthesisStrategy"/>
+<property name="ImplStrategy" value="Vivado Implementation Defaults" type="ImplStrategy"/>
+</item>
+</section>
+</application>
+</document>
--- a/synth/filter_vivado.hw/filter_vivado.lpr
+++ b/synth/filter_vivado.hw/filter_vivado.lpr
@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!-- Product Version: Vivado v2023.2 (64-bit)                                     -->
+<!--                                                                              -->
+<!-- Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.                        -->
+<!-- Copyright 2022-2023 Advanced Micro Devices, Inc. All Rights Reserved.        -->
+
+<labtools version="1" minor="0"/>
--- a/synth/filter_vivado.runs/.jobs/vrs_config_1.xml
+++ b/synth/filter_vivado.runs/.jobs/vrs_config_1.xml
@ -0,0 +1,12 @@
+<?xml version="1.0"?>
+<Runs Version="1" Minor="0">
+	<Run Id="synth_1" LaunchDir="/home/veronikaplevacova/Plocha/PCS2/synth/filter_vivado.runs/synth_1" FlowId="Vivado_Synthesis" FromStepId="vivado" ToStepId="vivado"/>
+	<Parameters>
+		<Parameter Name="runs.monitorLSFJobs" Val="true" Type="bool"/>
+		<Parameter Name="runs.enableClusterConf" Val="true" Type="bool"/>
+		<Parameter Name="general.ignorePathLengthChecks" Val="true" Type="bool"/>
+		<Parameter Name="general.shortenLongPath" Val="true" Type="bool"/>
+	</Parameters>
+	<ProductInfo Name="vivado"/>
+</Runs>
+
--- a/synth/filter_vivado.runs/.jobs/vrs_config_2.xml
+++ b/synth/filter_vivado.runs/.jobs/vrs_config_2.xml
@ -0,0 +1,12 @@
+<?xml version="1.0"?>
+<Runs Version="1" Minor="0">
+	<Run Id="synth_1" LaunchDir="/home/veronikaplevacova/Plocha/PCS2/synth/filter_vivado.runs/synth_1" FlowId="Vivado_Synthesis" FromStepId="vivado" ToStepId="vivado"/>
+	<Parameters>
+		<Parameter Name="runs.monitorLSFJobs" Val="true" Type="bool"/>
+		<Parameter Name="runs.enableClusterConf" Val="true" Type="bool"/>
+		<Parameter Name="general.ignorePathLengthChecks" Val="true" Type="bool"/>
+		<Parameter Name="general.shortenLongPath" Val="true" Type="bool"/>
+	</Parameters>
+	<ProductInfo Name="vivado"/>
+</Runs>
+
--- a/synth/filter_vivado.runs/.jobs/vrs_config_3.xml
+++ b/synth/filter_vivado.runs/.jobs/vrs_config_3.xml
@ -0,0 +1,12 @@
+<?xml version="1.0"?>
+<Runs Version="1" Minor="0">
+	<Run Id="impl_1" LaunchDir="/home/veronikaplevacova/Plocha/PCS2/synth/filter_vivado.runs/impl_1" FlowId="Vivado_Implementation" FromStepId="init_design" ToStepId="route_design"/>
+	<Parameters>
+		<Parameter Name="runs.monitorLSFJobs" Val="true" Type="bool"/>
+		<Parameter Name="runs.enableClusterConf" Val="true" Type="bool"/>
+		<Parameter Name="general.ignorePathLengthChecks" Val="true" Type="bool"/>
+		<Parameter Name="general.shortenLongPath" Val="true" Type="bool"/>
+	</Parameters>
+	<ProductInfo Name="vivado"/>
+</Runs>
+
--- a/synth/filter_vivado.runs/impl_1/.Vivado_Implementation.queue.rst
+++ b/synth/filter_vivado.runs/impl_1/.Vivado_Implementation.queue.rst
--- a/synth/filter_vivado.runs/impl_1/.init_design.begin.rst
+++ b/synth/filter_vivado.runs/impl_1/.init_design.begin.rst
@ -0,0 +1,5 @@
+<?xml version="1.0"?>
+<ProcessHandle Version="1" Minor="0">
+    <Process Command=".planAhead." Owner="veronikaplevacova" Host="" Pid="19329">
+    </Process>
+</ProcessHandle>
--- a/synth/filter_vivado.runs/impl_1/.init_design.end.rst
+++ b/synth/filter_vivado.runs/impl_1/.init_design.end.rst
--- a/synth/filter_vivado.runs/impl_1/.opt_design.begin.rst
+++ b/synth/filter_vivado.runs/impl_1/.opt_design.begin.rst
@ -0,0 +1,5 @@
+<?xml version="1.0"?>
+<ProcessHandle Version="1" Minor="0">
+    <Process Command=".planAhead." Owner="veronikaplevacova" Host="" Pid="19329">
+    </Process>
+</ProcessHandle>
--- a/synth/filter_vivado.runs/impl_1/.opt_design.end.rst
+++ b/synth/filter_vivado.runs/impl_1/.opt_design.end.rst
--- a/synth/filter_vivado.runs/impl_1/.phys_opt_design.begin.rst
+++ b/synth/filter_vivado.runs/impl_1/.phys_opt_design.begin.rst
@ -0,0 +1,5 @@
+<?xml version="1.0"?>
+<ProcessHandle Version="1" Minor="0">
+    <Process Command=".planAhead." Owner="veronikaplevacova" Host="" Pid="19329">
+    </Process>
+</ProcessHandle>
--- a/synth/filter_vivado.runs/impl_1/.phys_opt_design.end.rst
+++ b/synth/filter_vivado.runs/impl_1/.phys_opt_design.end.rst
--- a/synth/filter_vivado.runs/impl_1/.place_design.begin.rst
+++ b/synth/filter_vivado.runs/impl_1/.place_design.begin.rst
@ -0,0 +1,5 @@
+<?xml version="1.0"?>
+<ProcessHandle Version="1" Minor="0">
+    <Process Command=".planAhead." Owner="veronikaplevacova" Host="" Pid="19329">
+    </Process>
+</ProcessHandle>
--- a/synth/filter_vivado.runs/impl_1/.place_design.end.rst
+++ b/synth/filter_vivado.runs/impl_1/.place_design.end.rst
--- a/synth/filter_vivado.runs/impl_1/.route_design.begin.rst
+++ b/synth/filter_vivado.runs/impl_1/.route_design.begin.rst
@ -0,0 +1,5 @@
+<?xml version="1.0"?>
+<ProcessHandle Version="1" Minor="0">
+    <Process Command=".planAhead." Owner="veronikaplevacova" Host="" Pid="19329">
+    </Process>
+</ProcessHandle>
--- a/synth/filter_vivado.runs/impl_1/.route_design.end.rst
+++ b/synth/filter_vivado.runs/impl_1/.route_design.end.rst
--- a/synth/filter_vivado.runs/impl_1/.vivado.begin.rst
+++ b/synth/filter_vivado.runs/impl_1/.vivado.begin.rst
@ -0,0 +1,5 @@
+<?xml version="1.0"?>
+<ProcessHandle Version="1" Minor="0">
+    <Process Command="vivado" Owner="veronikaplevacova" Host="veronika-swiftsf11433" Pid="19271" HostCore="4" HostMemory="3812172">
+    </Process>
+</ProcessHandle>
--- a/synth/filter_vivado.runs/impl_1/.vivado.end.rst
+++ b/synth/filter_vivado.runs/impl_1/.vivado.end.rst
--- a/synth/filter_vivado.runs/impl_1/ISEWrap.js
+++ b/synth/filter_vivado.runs/impl_1/ISEWrap.js
@ -0,0 +1,270 @@
+//
+//  Vivado(TM)
+//  ISEWrap.js: Vivado Runs Script for WSH 5.1/5.6
+//  Copyright 1986-2022 Xilinx, Inc. All Rights Reserved. 
+//  Copyright 2022-2023 Advanced Micro Devices, Inc. All Rights Reserved. 
+//
+
+// GLOBAL VARIABLES
+var ISEShell = new ActiveXObject( "WScript.Shell" );
+var ISEFileSys = new ActiveXObject( "Scripting.FileSystemObject" );
+var ISERunDir = "";
+var ISELogFile = "runme.log";
+var ISELogFileStr = null;
+var ISELogEcho = true;
+var ISEOldVersionWSH = false;
+
+
+
+// BOOTSTRAP
+ISEInit();
+
+
+
+//
+// ISE FUNCTIONS
+//
+function ISEInit() {
+
+  // 1. RUN DIR setup
+  var ISEScrFP = WScript.ScriptFullName;
+  var ISEScrN = WScript.ScriptName;
+  ISERunDir = 
+    ISEScrFP.substr( 0, ISEScrFP.length - ISEScrN.length - 1 );
+
+  // 2. LOG file setup
+  ISELogFileStr = ISEOpenFile( ISELogFile );
+
+  // 3. LOG echo?
+  var ISEScriptArgs = WScript.Arguments;
+  for ( var loopi=0; loopi<ISEScriptArgs.length; loopi++ ) {
+    if ( ISEScriptArgs(loopi) == "-quiet" ) {
+      ISELogEcho = false;
+      break;
+    }
+  }
+
+  // 4. WSH version check
+  var ISEOptimalVersionWSH = 5.6;
+  var ISECurrentVersionWSH = WScript.Version;
+  if ( ISECurrentVersionWSH < ISEOptimalVersionWSH ) {
+
+    ISEStdErr( "" );
+    ISEStdErr( "Warning: ExploreAhead works best with Microsoft WSH " +
+	       ISEOptimalVersionWSH + " or higher. Downloads" );
+    ISEStdErr( "         for upgrading your Windows Scripting Host can be found here: " );
+    ISEStdErr( "             http://msdn.microsoft.com/downloads/list/webdev.asp" );
+    ISEStdErr( "" );
+
+    ISEOldVersionWSH = true;
+  }
+
+}
+
+function ISEStep( ISEProg, ISEArgs ) {
+
+  // CHECK for a STOP FILE
+  if ( ISEFileSys.FileExists(ISERunDir + "/.stop.rst") ) {
+    ISEStdErr( "" );
+    ISEStdErr( "*** Halting run - EA reset detected ***" );
+    ISEStdErr( "" );
+    WScript.Quit( 1 );
+  }
+
+  // WRITE STEP HEADER to LOG
+  ISEStdOut( "" );
+  ISEStdOut( "*** Running " + ISEProg );
+  ISEStdOut( "    with args " + ISEArgs );
+  ISEStdOut( "" );
+
+  // LAUNCH!
+  var ISEExitCode = ISEExec( ISEProg, ISEArgs );  
+  if ( ISEExitCode != 0 ) {
+    WScript.Quit( ISEExitCode );
+  }
+
+}
+
+function ISEExec( ISEProg, ISEArgs ) {
+
+  var ISEStep = ISEProg;
+  if (ISEProg == "realTimeFpga" || ISEProg == "planAhead" || ISEProg == "vivado") {
+    ISEProg += ".bat";
+  }
+
+  var ISECmdLine = ISEProg + " " + ISEArgs;
+  var ISEExitCode = 1;
+
+  if ( ISEOldVersionWSH ) { // WSH 5.1
+
+    // BEGIN file creation
+    ISETouchFile( ISEStep, "begin" );
+
+    // LAUNCH!
+    ISELogFileStr.Close();
+    ISECmdLine = 
+      "%comspec% /c " + ISECmdLine + " >> " + ISELogFile + " 2>&1";
+    ISEExitCode = ISEShell.Run( ISECmdLine, 0, true );
+    ISELogFileStr = ISEOpenFile( ISELogFile );
+
+  } else {  // WSH 5.6
+
+    // LAUNCH!
+    ISEShell.CurrentDirectory = ISERunDir;
+
+    // Redirect STDERR to STDOUT
+    ISECmdLine = "%comspec% /c " + ISECmdLine + " 2>&1";
+    var ISEProcess = ISEShell.Exec( ISECmdLine );
+    
+    // BEGIN file creation
+    var wbemFlagReturnImmediately = 0x10;
+    var wbemFlagForwardOnly = 0x20;
+    var objWMIService = GetObject ("winmgmts:{impersonationLevel=impersonate, (Systemtime)}!//./root/cimv2");
+    var processor = objWMIService.ExecQuery("SELECT * FROM Win32_Processor", "WQL",wbemFlagReturnImmediately | wbemFlagForwardOnly);
+    var computerSystem = objWMIService.ExecQuery("SELECT * FROM Win32_ComputerSystem", "WQL", wbemFlagReturnImmediately | wbemFlagForwardOnly);
+    var NOC = 0;
+    var NOLP = 0;
+    var TPM = 0;
+    var cpuInfos = new Enumerator(processor);
+    for(;!cpuInfos.atEnd(); cpuInfos.moveNext()) {
+        var cpuInfo = cpuInfos.item();
+        NOC += cpuInfo.NumberOfCores;
+        NOLP += cpuInfo.NumberOfLogicalProcessors;
+    }
+    var csInfos = new Enumerator(computerSystem);
+    for(;!csInfos.atEnd(); csInfos.moveNext()) {
+        var csInfo = csInfos.item();
+        TPM += csInfo.TotalPhysicalMemory;
+    }
+
+    var ISEHOSTCORE = NOLP
+    var ISEMEMTOTAL = TPM
+
+    var ISENetwork = WScript.CreateObject( "WScript.Network" );
+    var ISEHost = ISENetwork.ComputerName;
+    var ISEUser = ISENetwork.UserName;
+    var ISEPid = ISEProcess.ProcessID;
+    var ISEBeginFile = ISEOpenFile( "." + ISEStep + ".begin.rst" );
+    ISEBeginFile.WriteLine( "<?xml version=\"1.0\"?>" );
+    ISEBeginFile.WriteLine( "<ProcessHandle Version=\"1\" Minor=\"0\">" );
+    ISEBeginFile.WriteLine( "    <Process Command=\"" + ISEProg + 
+			    "\" Owner=\"" + ISEUser + 
+			    "\" Host=\"" + ISEHost + 
+			    "\" Pid=\"" + ISEPid +
+			    "\" HostCore=\"" + ISEHOSTCORE +
+			    "\" HostMemory=\"" + ISEMEMTOTAL +
+			    "\">" );
+    ISEBeginFile.WriteLine( "    </Process>" );
+    ISEBeginFile.WriteLine( "</ProcessHandle>" );
+    ISEBeginFile.Close();
+    
+    var ISEOutStr = ISEProcess.StdOut;
+    var ISEErrStr = ISEProcess.StdErr;
+    
+    // WAIT for ISEStep to finish
+    while ( ISEProcess.Status == 0 ) {
+      
+      // dump stdout then stderr - feels a little arbitrary
+      while ( !ISEOutStr.AtEndOfStream ) {
+        ISEStdOut( ISEOutStr.ReadLine() );
+      }  
+      
+      WScript.Sleep( 100 );
+    }
+
+    ISEExitCode = ISEProcess.ExitCode;
+  }
+
+  ISELogFileStr.Close();
+
+  // END/ERROR file creation
+  if ( ISEExitCode != 0 ) {    
+    ISETouchFile( ISEStep, "error" );
+    
+  } else {
+    ISETouchFile( ISEStep, "end" );
+  }
+
+  return ISEExitCode;
+}
+
+
+//
+// UTILITIES
+//
+function ISEStdOut( ISELine ) {
+
+  ISELogFileStr.WriteLine( ISELine );
+  
+  if ( ISELogEcho ) {
+    WScript.StdOut.WriteLine( ISELine );
+  }
+}
+
+function ISEStdErr( ISELine ) {
+  
+  ISELogFileStr.WriteLine( ISELine );
+
+  if ( ISELogEcho ) {
+    WScript.StdErr.WriteLine( ISELine );
+  }
+}
+
+function ISETouchFile( ISERoot, ISEStatus ) {
+
+  var ISETFile = 
+    ISEOpenFile( "." + ISERoot + "." + ISEStatus + ".rst" );
+  ISETFile.Close();
+}
+
+function ISEOpenFile( ISEFilename ) {
+
+  // This function has been updated to deal with a problem seen in CR #870871.
+  // In that case the user runs a script that runs impl_1, and then turns around
+  // and runs impl_1 -to_step write_bitstream. That second run takes place in
+  // the same directory, which means we may hit some of the same files, and in
+  // particular, we will open the runme.log file. Even though this script closes
+  // the file (now), we see cases where a subsequent attempt to open the file
+  // fails. Perhaps the OS is slow to release the lock, or the disk comes into
+  // play? In any case, we try to work around this by first waiting if the file
+  // is already there for an arbitrary 5 seconds. Then we use a try-catch block
+  // and try to open the file 10 times with a one second delay after each attempt.
+  // Again, 10 is arbitrary. But these seem to stop the hang in CR #870871.
+  // If there is an unrecognized exception when trying to open the file, we output
+  // an error message and write details to an exception.log file.
+  var ISEFullPath = ISERunDir + "/" + ISEFilename;
+  if (ISEFileSys.FileExists(ISEFullPath)) {
+    // File is already there. This could be a problem. Wait in case it is still in use.
+    WScript.Sleep(5000);
+  }
+  var i;
+  for (i = 0; i < 10; ++i) {
+    try {
+      return ISEFileSys.OpenTextFile(ISEFullPath, 8, true);
+    } catch (exception) {
+      var error_code = exception.number & 0xFFFF; // The other bits are a facility code.
+      if (error_code == 52) { // 52 is bad file name or number.
+        // Wait a second and try again.
+        WScript.Sleep(1000);
+        continue;
+      } else {
+        WScript.StdErr.WriteLine("ERROR: Exception caught trying to open file " + ISEFullPath);
+        var exceptionFilePath = ISERunDir + "/exception.log";
+        if (!ISEFileSys.FileExists(exceptionFilePath)) {
+          WScript.StdErr.WriteLine("See file " + exceptionFilePath + " for details.");
+          var exceptionFile = ISEFileSys.OpenTextFile(exceptionFilePath, 8, true);
+          exceptionFile.WriteLine("ERROR: Exception caught trying to open file " + ISEFullPath);
+          exceptionFile.WriteLine("\tException name: " + exception.name);
+          exceptionFile.WriteLine("\tException error code: " + error_code);
+          exceptionFile.WriteLine("\tException message: " + exception.message);
+          exceptionFile.Close();
+        }
+        throw exception;
+      }
+    }
+  }
+  // If we reached this point, we failed to open the file after 10 attempts.
+  // We need to error out.
+  WScript.StdErr.WriteLine("ERROR: Failed to open file " + ISEFullPath);
+  WScript.Quit(1);
+}
--- a/synth/filter_vivado.runs/impl_1/ISEWrap.sh
+++ b/synth/filter_vivado.runs/impl_1/ISEWrap.sh
@ -0,0 +1,85 @@
+#!/bin/sh
+
+#
+#  Vivado(TM)
+#  ISEWrap.sh: Vivado Runs Script for UNIX
+#  Copyright 1986-2022 Xilinx, Inc. All Rights Reserved. 
+#  Copyright 2022-2023 Advanced Micro Devices, Inc. All Rights Reserved. 
+#
+
+cmd_exists()
+{
+  command -v "$1" >/dev/null 2>&1
+}
+
+HD_LOG=$1
+shift
+
+# CHECK for a STOP FILE
+if [ -f .stop.rst ]
+then
+echo ""                                        >> $HD_LOG
+echo "*** Halting run - EA reset detected ***" >> $HD_LOG
+echo ""                                        >> $HD_LOG
+exit 1
+fi
+
+ISE_STEP=$1
+shift
+
+# WRITE STEP HEADER to LOG
+echo ""                      >> $HD_LOG
+echo "*** Running $ISE_STEP" >> $HD_LOG
+echo "    with args $@"      >> $HD_LOG
+echo ""                      >> $HD_LOG
+
+# LAUNCH!
+$ISE_STEP "$@" >> $HD_LOG 2>&1 &
+
+# BEGIN file creation
+ISE_PID=$!
+
+HostNameFile=/proc/sys/kernel/hostname
+if cmd_exists hostname
+then
+ISE_HOST=$(hostname)
+elif cmd_exists uname
+then
+ISE_HOST=$(uname -n)
+elif [ -f "$HostNameFile" ] && [ -r $HostNameFile ] && [ -s $HostNameFile ] 
+then
+ISE_HOST=$(cat $HostNameFile)
+elif [ X != X$HOSTNAME ]
+then
+ISE_HOST=$HOSTNAME #bash
+else
+ISE_HOST=$HOST     #csh
+fi
+
+ISE_USER=$USER
+
+ISE_HOSTCORE=$(awk '/^processor/{print $3}' /proc/cpuinfo | wc -l)
+ISE_MEMTOTAL=$(awk '/MemTotal/ {print $2}' /proc/meminfo)
+
+ISE_BEGINFILE=.$ISE_STEP.begin.rst
+/bin/touch $ISE_BEGINFILE
+echo "<?xml version=\"1.0\"?>"                                                                     >> $ISE_BEGINFILE
+echo "<ProcessHandle Version=\"1\" Minor=\"0\">"                                                   >> $ISE_BEGINFILE
+echo "    <Process Command=\"$ISE_STEP\" Owner=\"$ISE_USER\" Host=\"$ISE_HOST\" Pid=\"$ISE_PID\" HostCore=\"$ISE_HOSTCORE\" HostMemory=\"$ISE_MEMTOTAL\">" >> $ISE_BEGINFILE
+echo "    </Process>"                                                                              >> $ISE_BEGINFILE
+echo "</ProcessHandle>"                                                                            >> $ISE_BEGINFILE
+
+# WAIT for ISEStep to finish
+wait $ISE_PID
+
+# END/ERROR file creation
+RETVAL=$?
+if [ $RETVAL -eq 0 ]
+then
+    /bin/touch .$ISE_STEP.end.rst
+else
+    /bin/touch .$ISE_STEP.error.rst
+fi
+
+exit $RETVAL
+
--- a/synth/filter_vivado.runs/impl_1/clockInfo.txt
+++ b/synth/filter_vivado.runs/impl_1/clockInfo.txt
@ -0,0 +1,10 @@
+-------------------------------------
+| Tool Version : Vivado v.2023.2
+| Date         : Sun Dec  3 18:52:50 2023
+| Host         : veronika-swiftsf11433
+| Design       : design_1
+| Device       : xc7k160t-ffv676-1--
+-------------------------------------
+
+For more information on clockInfo.txt clock routing debug file see https://support.xilinx.com/s/article/000035660?language=en_US
+
--- a/synth/filter_vivado.runs/impl_1/filter.tcl
+++ b/synth/filter_vivado.runs/impl_1/filter.tcl
@ -0,0 +1,304 @@
+# 
+# Report generation script generated by Vivado
+# 
+
+proc create_report { reportName command } {
+  set status "."
+  append status $reportName ".fail"
+  if { [file exists $status] } {
+    eval file delete [glob $status]
+  }
+  send_msg_id runtcl-4 info "Executing : $command"
+  set retval [eval catch { $command } msg]
+  if { $retval != 0 } {
+    set fp [open $status w]
+    close $fp
+    send_msg_id runtcl-5 warning "$msg"
+  }
+}
+namespace eval ::optrace {
+  variable script "/home/veronikaplevacova/Plocha/PCS2/synth/filter_vivado.runs/impl_1/filter.tcl"
+  variable category "vivado_impl"
+}
+
+# Try to connect to running dispatch if we haven't done so already.
+# This code assumes that the Tcl interpreter is not using threads,
+# since the ::dispatch::connected variable isn't mutex protected.
+if {![info exists ::dispatch::connected]} {
+  namespace eval ::dispatch {
+    variable connected false
+    if {[llength [array get env XILINX_CD_CONNECT_ID]] > 0} {
+      set result "true"
+      if {[catch {
+        if {[lsearch -exact [package names] DispatchTcl] < 0} {
+          set result [load librdi_cd_clienttcl[info sharedlibextension]] 
+        }
+        if {$result eq "false"} {
+          puts "WARNING: Could not load dispatch client library"
+        }
+        set connect_id [ ::dispatch::init_client -mode EXISTING_SERVER ]
+        if { $connect_id eq "" } {
+          puts "WARNING: Could not initialize dispatch client"
+        } else {
+          puts "INFO: Dispatch client connection id - $connect_id"
+          set connected true
+        }
+      } catch_res]} {
+        puts "WARNING: failed to connect to dispatch server - $catch_res"
+      }
+    }
+  }
+}
+if {$::dispatch::connected} {
+  # Remove the dummy proc if it exists.
+  if { [expr {[llength [info procs ::OPTRACE]] > 0}] } {
+    rename ::OPTRACE ""
+  }
+  proc ::OPTRACE { task action {tags {} } } {
+    ::vitis_log::op_trace "$task" $action -tags $tags -script $::optrace::script -category $::optrace::category
+  }
+  # dispatch is generic. We specifically want to attach logging.
+  ::vitis_log::connect_client
+} else {
+  # Add dummy proc if it doesn't exist.
+  if { [expr {[llength [info procs ::OPTRACE]] == 0}] } {
+    proc ::OPTRACE {{arg1 \"\" } {arg2 \"\"} {arg3 \"\" } {arg4 \"\"} {arg5 \"\" } {arg6 \"\"}} {
+        # Do nothing
+    }
+  }
+}
+
+proc start_step { step } {
+  set stopFile ".stop.rst"
+  if {[file isfile .stop.rst]} {
+    puts ""
+    puts "*** Halting run - EA reset detected ***"
+    puts ""
+    puts ""
+    return -code error
+  }
+  set beginFile ".$step.begin.rst"
+  set platform "$::tcl_platform(platform)"
+  set user "$::tcl_platform(user)"
+  set pid [pid]
+  set host ""
+  if { [string equal $platform unix] } {
+    if { [info exist ::env(HOSTNAME)] } {
+      set host $::env(HOSTNAME)
+    } elseif { [info exist ::env(HOST)] } {
+      set host $::env(HOST)
+    }
+  } else {
+    if { [info exist ::env(COMPUTERNAME)] } {
+      set host $::env(COMPUTERNAME)
+    }
+  }
+  set ch [open $beginFile w]
+  puts $ch "<?xml version=\"1.0\"?>"
+  puts $ch "<ProcessHandle Version=\"1\" Minor=\"0\">"
+  puts $ch "    <Process Command=\".planAhead.\" Owner=\"$user\" Host=\"$host\" Pid=\"$pid\">"
+  puts $ch "    </Process>"
+  puts $ch "</ProcessHandle>"
+  close $ch
+}
+
+proc end_step { step } {
+  set endFile ".$step.end.rst"
+  set ch [open $endFile w]
+  close $ch
+}
+
+proc step_failed { step } {
+  set endFile ".$step.error.rst"
+  set ch [open $endFile w]
+  close $ch
+OPTRACE "impl_1" END { }
+}
+
+set_msg_config -id {Synth 8-256} -limit 10000
+set_msg_config -id {Synth 8-638} -limit 10000
+
+OPTRACE "impl_1" START { ROLLUP_1 }
+OPTRACE "Phase: Init Design" START { ROLLUP_AUTO }
+start_step init_design
+set ACTIVE_STEP init_design
+set rc [catch {
+  create_msg_db init_design.pb
+  set_param chipscope.maxJobs 1
+  set_param checkpoint.writeSynthRtdsInDcp 1
+  set_param synth.incrementalSynthesisCache /tmp/.Xil_veronikaplevacova/Vivado-18297-veronika-swiftsf11433/incrSyn
+  set_param runs.launchOptions { -jobs 2  }
+OPTRACE "create in-memory project" START { }
+  create_project -in_memory -part xc7k160tffv676-1
+  set_property design_mode GateLvl [current_fileset]
+  set_param project.singleFileAddWarning.threshold 0
+OPTRACE "create in-memory project" END { }
+OPTRACE "set parameters" START { }
+  set_property webtalk.parent_dir /home/veronikaplevacova/Plocha/PCS2/synth/filter_vivado.cache/wt [current_project]
+  set_property parent.project_path /home/veronikaplevacova/Plocha/PCS2/synth/filter_vivado.xpr [current_project]
+  set_property ip_output_repo /home/veronikaplevacova/Plocha/PCS2/synth/filter_vivado.cache/ip [current_project]
+  set_property ip_cache_permissions {read write} [current_project]
+OPTRACE "set parameters" END { }
+OPTRACE "add files" START { }
+  add_files -quiet /home/veronikaplevacova/Plocha/PCS2/synth/filter_vivado.runs/synth_1/filter.dcp
+OPTRACE "read constraints: implementation" START { }
+  read_xdc /home/veronikaplevacova/Plocha/PCS2/synth/filter.xdc
+OPTRACE "read constraints: implementation" END { }
+OPTRACE "read constraints: implementation_pre" START { }
+OPTRACE "read constraints: implementation_pre" END { }
+OPTRACE "add files" END { }
+OPTRACE "link_design" START { }
+  link_design -top filter -part xc7k160tffv676-1 -mode out_of_context 
+OPTRACE "link_design" END { }
+OPTRACE "gray box cells" START { }
+OPTRACE "gray box cells" END { }
+OPTRACE "init_design_reports" START { REPORT }
+OPTRACE "init_design_reports" END { }
+OPTRACE "init_design_write_hwdef" START { }
+OPTRACE "init_design_write_hwdef" END { }
+  close_msg_db -file init_design.pb
+} RESULT]
+if {$rc} {
+  step_failed init_design
+  return -code error $RESULT
+} else {
+  end_step init_design
+  unset ACTIVE_STEP 
+}
+
+OPTRACE "Phase: Init Design" END { }
+OPTRACE "Phase: Opt Design" START { ROLLUP_AUTO }
+start_step opt_design
+set ACTIVE_STEP opt_design
+set rc [catch {
+  create_msg_db opt_design.pb
+OPTRACE "read constraints: opt_design" START { }
+OPTRACE "read constraints: opt_design" END { }
+OPTRACE "opt_design" START { }
+  opt_design 
+OPTRACE "opt_design" END { }
+OPTRACE "read constraints: opt_design_post" START { }
+OPTRACE "read constraints: opt_design_post" END { }
+OPTRACE "opt_design reports" START { REPORT }
+  create_report "impl_1_opt_report_drc_0" "report_drc -file filter_drc_opted.rpt -pb filter_drc_opted.pb -rpx filter_drc_opted.rpx"
+OPTRACE "opt_design reports" END { }
+OPTRACE "Opt Design: write_checkpoint" START { CHECKPOINT }
+  write_checkpoint -force filter_opt.dcp
+OPTRACE "Opt Design: write_checkpoint" END { }
+  close_msg_db -file opt_design.pb
+} RESULT]
+if {$rc} {
+  step_failed opt_design
+  return -code error $RESULT
+} else {
+  end_step opt_design
+  unset ACTIVE_STEP 
+}
+
+OPTRACE "Phase: Opt Design" END { }
+OPTRACE "Phase: Place Design" START { ROLLUP_AUTO }
+start_step place_design
+set ACTIVE_STEP place_design
+set rc [catch {
+  create_msg_db place_design.pb
+OPTRACE "read constraints: place_design" START { }
+OPTRACE "read constraints: place_design" END { }
+  if { [llength [get_debug_cores -quiet] ] > 0 }  { 
+OPTRACE "implement_debug_core" START { }
+    implement_debug_core 
+OPTRACE "implement_debug_core" END { }
+  } 
+OPTRACE "place_design" START { }
+  place_design 
+OPTRACE "place_design" END { }
+OPTRACE "read constraints: place_design_post" START { }
+OPTRACE "read constraints: place_design_post" END { }
+OPTRACE "place_design reports" START { REPORT }
+  create_report "impl_1_place_report_io_0" "report_io -file filter_io_placed.rpt"
+  create_report "impl_1_place_report_utilization_0" "report_utilization -file filter_utilization_placed.rpt -pb filter_utilization_placed.pb"
+  create_report "impl_1_place_report_control_sets_0" "report_control_sets -verbose -file filter_control_sets_placed.rpt"
+OPTRACE "place_design reports" END { }
+OPTRACE "Place Design: write_checkpoint" START { CHECKPOINT }
+  write_checkpoint -force filter_placed.dcp
+OPTRACE "Place Design: write_checkpoint" END { }
+  close_msg_db -file place_design.pb
+} RESULT]
+if {$rc} {
+  step_failed place_design
+  return -code error $RESULT
+} else {
+  end_step place_design
+  unset ACTIVE_STEP 
+}
+
+OPTRACE "Phase: Place Design" END { }
+OPTRACE "Phase: Physical Opt Design" START { ROLLUP_AUTO }
+start_step phys_opt_design
+set ACTIVE_STEP phys_opt_design
+set rc [catch {
+  create_msg_db phys_opt_design.pb
+OPTRACE "read constraints: phys_opt_design" START { }
+OPTRACE "read constraints: phys_opt_design" END { }
+OPTRACE "phys_opt_design" START { }
+  phys_opt_design 
+OPTRACE "phys_opt_design" END { }
+OPTRACE "read constraints: phys_opt_design_post" START { }
+OPTRACE "read constraints: phys_opt_design_post" END { }
+OPTRACE "phys_opt_design report" START { REPORT }
+OPTRACE "phys_opt_design report" END { }
+OPTRACE "Post-Place Phys Opt Design: write_checkpoint" START { CHECKPOINT }
+  write_checkpoint -force filter_physopt.dcp
+OPTRACE "Post-Place Phys Opt Design: write_checkpoint" END { }
+  close_msg_db -file phys_opt_design.pb
+} RESULT]
+if {$rc} {
+  step_failed phys_opt_design
+  return -code error $RESULT
+} else {
+  end_step phys_opt_design
+  unset ACTIVE_STEP 
+}
+
+OPTRACE "Phase: Physical Opt Design" END { }
+OPTRACE "Phase: Route Design" START { ROLLUP_AUTO }
+start_step route_design
+set ACTIVE_STEP route_design
+set rc [catch {
+  create_msg_db route_design.pb
+OPTRACE "read constraints: route_design" START { }
+OPTRACE "read constraints: route_design" END { }
+OPTRACE "route_design" START { }
+  route_design 
+OPTRACE "route_design" END { }
+OPTRACE "read constraints: route_design_post" START { }
+OPTRACE "read constraints: route_design_post" END { }
+OPTRACE "route_design reports" START { REPORT }
+  create_report "impl_1_route_report_drc_0" "report_drc -file filter_drc_routed.rpt -pb filter_drc_routed.pb -rpx filter_drc_routed.rpx"
+  create_report "impl_1_route_report_methodology_0" "report_methodology -file filter_methodology_drc_routed.rpt -pb filter_methodology_drc_routed.pb -rpx filter_methodology_drc_routed.rpx"
+  create_report "impl_1_route_report_power_0" "report_power -file filter_power_routed.rpt -pb filter_power_summary_routed.pb -rpx filter_power_routed.rpx"
+  create_report "impl_1_route_report_route_status_0" "report_route_status -file filter_route_status.rpt -pb filter_route_status.pb"
+  create_report "impl_1_route_report_timing_summary_0" "report_timing_summary -max_paths 10 -report_unconstrained -file filter_timing_summary_routed.rpt -pb filter_timing_summary_routed.pb -rpx filter_timing_summary_routed.rpx -warn_on_violation "
+  create_report "impl_1_route_report_incremental_reuse_0" "report_incremental_reuse -file filter_incremental_reuse_routed.rpt"
+  create_report "impl_1_route_report_clock_utilization_0" "report_clock_utilization -file filter_clock_utilization_routed.rpt"
+  create_report "impl_1_route_report_bus_skew_0" "report_bus_skew -warn_on_violation -file filter_bus_skew_routed.rpt -pb filter_bus_skew_routed.pb -rpx filter_bus_skew_routed.rpx"
+OPTRACE "route_design reports" END { }
+OPTRACE "Route Design: write_checkpoint" START { CHECKPOINT }
+  write_checkpoint -force filter_routed.dcp
+OPTRACE "Route Design: write_checkpoint" END { }
+OPTRACE "route_design misc" START { }
+  close_msg_db -file route_design.pb
+} RESULT]
+if {$rc} {
+OPTRACE "route_design write_checkpoint" START { CHECKPOINT }
+OPTRACE "route_design write_checkpoint" END { }
+  write_checkpoint -force filter_routed_error.dcp
+  step_failed route_design
+  return -code error $RESULT
+} else {
+  end_step route_design
+  unset ACTIVE_STEP 
+}
+
+OPTRACE "route_design misc" END { }
+OPTRACE "Phase: Route Design" END { }
+OPTRACE "impl_1" END { }
--- a/synth/filter_vivado.runs/impl_1/filter.vdi
+++ b/synth/filter_vivado.runs/impl_1/filter.vdi
--- a/synth/filter_vivado.runs/impl_1/filter_bus_skew_routed.pb
+++ b/synth/filter_vivado.runs/impl_1/filter_bus_skew_routed.pb
--- a/synth/filter_vivado.runs/impl_1/filter_bus_skew_routed.rpt
+++ b/synth/filter_vivado.runs/impl_1/filter_bus_skew_routed.rpt
@ -0,0 +1,16 @@
+Copyright 1986-2022 Xilinx, Inc. All Rights Reserved. Copyright 2022-2023 Advanced Micro Devices, Inc. All Rights Reserved.
+---------------------------------------------------------------------------------------------------------------------------------------------------
+| Tool Version : Vivado v.2023.2 (lin64) Build 4029153 Fri Oct 13 20:13:54 MDT 2023
+| Date         : Sun Dec  3 18:58:41 2023
+| Host         : veronika-swiftsf11433 running 64-bit EndeavourOS Linux
+| Command      : report_bus_skew -warn_on_violation -file filter_bus_skew_routed.rpt -pb filter_bus_skew_routed.pb -rpx filter_bus_skew_routed.rpx
+| Design       : filter
+| Device       : 7k160t-ffv676
+| Speed File   : -1  PRODUCTION 1.12 2017-02-17
+| Design State : Routed
+---------------------------------------------------------------------------------------------------------------------------------------------------
+
+Bus Skew Report
+
+No bus skew constraints
+
--- a/synth/filter_vivado.runs/impl_1/filter_bus_skew_routed.rpx
+++ b/synth/filter_vivado.runs/impl_1/filter_bus_skew_routed.rpx
--- a/synth/filter_vivado.runs/impl_1/filter_clock_utilization_routed.rpt
+++ b/synth/filter_vivado.runs/impl_1/filter_clock_utilization_routed.rpt
@ -0,0 +1,99 @@
+Copyright 1986-2022 Xilinx, Inc. All Rights Reserved. Copyright 2022-2023 Advanced Micro Devices, Inc. All Rights Reserved.
+---------------------------------------------------------------------------------------------------------------------------------------------
+| Tool Version : Vivado v.2023.2 (lin64) Build 4029153 Fri Oct 13 20:13:54 MDT 2023
+| Date         : Sun Dec  3 18:58:41 2023
+| Host         : veronika-swiftsf11433 running 64-bit EndeavourOS Linux
+| Command      : report_clock_utilization -file filter_clock_utilization_routed.rpt
+| Design       : filter
+| Device       : 7k160t-ffv676
+| Speed File   : -1  PRODUCTION 1.12 2017-02-17
+| Design State : Routed
+---------------------------------------------------------------------------------------------------------------------------------------------
+
+Clock Utilization Report
+
+Table of Contents
+-----------------
+1. Clock Primitive Utilization
+2. Global Clock Resources
+3. Global Clock Source Details
+4. Clock Regions: Key Resource Utilization
+5. Clock Regions : Global Clock Summary
+
+1. Clock Primitive Utilization
+------------------------------
+
+----------+------+-----------+-----+--------------+--------+
+| Type     | Used | Available | LOC | Clock Region | Pblock |
+----------+------+-----------+-----+--------------+--------+
+| BUFGCTRL |    0 |        32 |   0 |            0 |      0 |
+| BUFH     |    0 |       120 |   0 |            0 |      0 |
+| BUFIO    |    0 |        32 |   0 |            0 |      0 |
+| BUFMR    |    0 |        16 |   0 |            0 |      0 |
+| BUFR     |    0 |        32 |   0 |            0 |      0 |
+| MMCM     |    0 |         8 |   0 |            0 |      0 |
+| PLL      |    0 |         8 |   0 |            0 |      0 |
+----------+------+-----------+-----+--------------+--------+
+
+
+2. Global Clock Resources
+-------------------------
+
+-----------+-----------+-----------------+------------+------+--------------+-------------------+-------------+-----------------+--------------+-------+------------+-----+
+| Global Id | Source Id | Driver Type/Pin | Constraint | Site | Clock Region | Load Clock Region | Clock Loads | Non-Clock Loads | Clock Period | Clock | Driver Pin | Net |
+-----------+-----------+-----------------+------------+------+--------------+-------------------+-------------+-----------------+--------------+-------+------------+-----+
+* Clock Loads column represents cell count of net connects that connect to a clock pin. Internal cell leaf pins are not considered
+** Non-Clock Loads column represents cell count of non-clock pin loads
+
+
+3. Global Clock Source Details
+------------------------------
+
+-----------+-----------+-----------------+------------+------+--------------+-------------+-----------------+---------------------+--------------+------------+-----+
+| Source Id | Global Id | Driver Type/Pin | Constraint | Site | Clock Region | Clock Loads | Non-Clock Loads | Source Clock Period | Source Clock | Driver Pin | Net |
+-----------+-----------+-----------------+------------+------+--------------+-------------+-----------------+---------------------+--------------+------------+-----+
+* Clock Loads column represents cell count of net connects that connect to a clock pin. Internal cell leaf pins are not considered
+** Non-Clock Loads column represents cell count of non-clock pin loads
+
+
+4. Clock Regions: Key Resource Utilization
+------------------------------------------
+
+-------------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+
+|                   | Global Clock |     BUFRs    |    BUFMRs    |    BUFIOs    |     MMCM     |      PLL     |      GT      |      PCI     |    ILOGIC    |    OLOGIC    |      FF      |     LUTM     |    RAMB18    |    RAMB36    |    DSP48E2   |
+-------------------+------+-------+------+-------+------+-------+------+-------+------+-------+------+-------+------+-------+------+-------+------+-------+------+-------+------+-------+------+-------+------+-------+------+-------+------+-------+
+| Clock Region Name | Used | Avail | Used | Avail | Used | Avail | Used | Avail | Used | Avail | Used | Avail | Used | Avail | Used | Avail | Used | Avail | Used | Avail | Used | Avail | Used | Avail | Used | Avail | Used | Avail | Used | Avail |
+-------------------+------+-------+------+-------+------+-------+------+-------+------+-------+------+-------+------+-------+------+-------+------+-------+------+-------+------+-------+------+-------+------+-------+------+-------+------+-------+
+| X0Y0              |    0 |    12 |    0 |     4 |    0 |     2 |    0 |     4 |    0 |     1 |    0 |     1 |    0 |     0 |    0 |     0 |    0 |    50 |    0 |    50 |    0 |  2800 |    0 |   850 |    0 |    60 |    0 |    30 |    0 |    60 |
+| X1Y0              |    0 |    12 |    0 |     4 |    0 |     2 |    0 |     4 |    0 |     1 |    0 |     1 |    0 |     0 |    0 |     0 |    0 |    50 |    0 |    50 |    0 |  2700 |    0 |   950 |    0 |    80 |    0 |    40 |    0 |    60 |
+| X0Y1              |    0 |    12 |    0 |     4 |    0 |     2 |    0 |     4 |    0 |     1 |    0 |     1 |    0 |     0 |    0 |     0 |    0 |    50 |    0 |    50 |    0 |  2800 |    0 |   850 |    0 |    60 |    0 |    30 |    0 |    60 |
+| X1Y1              |    0 |    12 |    0 |     4 |    0 |     2 |    0 |     4 |    0 |     1 |    0 |     1 |    0 |     0 |    0 |     0 |    0 |    50 |    0 |    50 |    0 |  2700 |    0 |   950 |    0 |    80 |    0 |    40 |    0 |    60 |
+| X0Y2              |    0 |    12 |    0 |     4 |    0 |     2 |    0 |     4 |    0 |     1 |    0 |     1 |    0 |     0 |    0 |     0 |    0 |    50 |    0 |    50 |    0 |  2200 |    0 |   850 |    0 |    60 |    0 |    30 |    0 |    60 |
+| X1Y2              |    0 |    12 |    0 |     4 |    0 |     2 |    0 |     4 |    0 |     1 |    0 |     1 |    0 |     0 |    0 |     0 |    0 |    50 |    0 |    50 |    0 |  2700 |    0 |   950 |    0 |    80 |    0 |    40 |    0 |    60 |
+| X0Y3              |    0 |    12 |    0 |     4 |    0 |     2 |    0 |     4 |    0 |     1 |    0 |     1 |    0 |     0 |    0 |     0 |    0 |    50 |    0 |    50 |    0 |  2200 |    0 |   850 |    0 |    60 |    0 |    30 |    0 |    60 |
+| X1Y3              |    0 |    12 |    0 |     0 |    0 |     0 |    0 |     0 |    0 |     0 |    0 |     0 |    0 |     4 |    0 |     1 |    0 |     0 |    0 |     0 |    0 |  2150 |    0 |   800 |    0 |    50 |    0 |    25 |    0 |    60 |
+| X0Y4              |    0 |    12 |    0 |     4 |    0 |     2 |    0 |     4 |    0 |     1 |    0 |     1 |    0 |     0 |    0 |     0 |    0 |    50 |    0 |    50 |    0 |  2800 |    0 |   850 |    0 |    60 |    0 |    30 |    0 |    60 |
+| X1Y4              |    0 |    12 |    0 |     0 |    0 |     0 |    0 |     0 |    0 |     0 |    0 |     0 |    0 |     4 |    0 |     0 |    0 |     0 |    0 |     0 |    0 |  2300 |    0 |   850 |    0 |    60 |    0 |    30 |    0 |    60 |
+-------------------+------+-------+------+-------+------+-------+------+-------+------+-------+------+-------+------+-------+------+-------+------+-------+------+-------+------+-------+------+-------+------+-------+------+-------+------+-------+
+* Global Clock column represents track count; while other columns represents cell counts
+
+
+5. Clock Regions : Global Clock Summary
+---------------------------------------
+
+All Modules
+----+----+----+
+|    | X0 | X1 |
+----+----+----+
+| Y4 |  0 |  0 |
+| Y3 |  0 |  0 |
+| Y2 |  0 |  0 |
+| Y1 |  0 |  0 |
+| Y0 |  0 |  0 |
+----+----+----+
+
+
+
+# Location of IO Primitives which is load of clock spine
+
+# Location of clock ports
--- a/synth/filter_vivado.runs/impl_1/filter_control_sets_placed.rpt
+++ b/synth/filter_vivado.runs/impl_1/filter_control_sets_placed.rpt
@ -0,0 +1,80 @@
+Copyright 1986-2022 Xilinx, Inc. All Rights Reserved. Copyright 2022-2023 Advanced Micro Devices, Inc. All Rights Reserved.
+---------------------------------------------------------------------------------------------------------------------------------------------
+| Tool Version : Vivado v.2023.2 (lin64) Build 4029153 Fri Oct 13 20:13:54 MDT 2023
+| Date         : Sun Dec  3 18:54:00 2023
+| Host         : veronika-swiftsf11433 running 64-bit EndeavourOS Linux
+| Command      : report_control_sets -verbose -file filter_control_sets_placed.rpt
+| Design       : filter
+| Device       : xc7k160t
+---------------------------------------------------------------------------------------------------------------------------------------------
+
+Control Set Information
+
+Table of Contents
+-----------------
+1. Summary
+2. Histogram
+3. Flip-Flop Distribution
+4. Detailed Control Set Information
+
+1. Summary
+----------
+
+----------------------------------------------------------+-------+
+|                          Status                          | Count |
+----------------------------------------------------------+-------+
+| Total control sets                                       |     2 |
+|    Minimum number of control sets                        |     2 |
+|    Addition due to synthesis replication                 |     0 |
+|    Addition due to physical synthesis replication        |     0 |
+| Unused register locations in slices containing registers |     5 |
+----------------------------------------------------------+-------+
+* Control sets can be merged at opt_design using control_set_merge or merge_equivalent_drivers
+** Run report_qor_suggestions for automated merging and remapping suggestions
+
+
+2. Histogram
+------------
+
+--------------------+-------+
+|       Fanout       | Count |
+--------------------+-------+
+| Total control sets |     2 |
+| >= 0 to < 4        |     0 |
+| >= 4 to < 6        |     1 |
+| >= 6 to < 8        |     0 |
+| >= 8 to < 10       |     0 |
+| >= 10 to < 12      |     0 |
+| >= 12 to < 14      |     0 |
+| >= 14 to < 16      |     0 |
+| >= 16              |     1 |
+--------------------+-------+
+* Control sets can be remapped at either synth_design or opt_design
+
+
+3. Flip-Flop Distribution
+-------------------------
+
+--------------+-----------------------+------------------------+-----------------+--------------+
+| Clock Enable | Synchronous Set/Reset | Asynchronous Set/Reset | Total Registers | Total Slices |
+--------------+-----------------------+------------------------+-----------------+--------------+
+| No           | No                    | No                     |             559 |          206 |
+| No           | No                    | Yes                    |               0 |            0 |
+| No           | Yes                   | No                     |               4 |            2 |
+| Yes          | No                    | No                     |               0 |            0 |
+| Yes          | No                    | Yes                    |               0 |            0 |
+| Yes          | Yes                   | No                     |               0 |            0 |
+--------------+-----------------------+------------------------+-----------------+--------------+
+
+
+4. Detailed Control Set Information
+-----------------------------------
+
+--------------+---------------+------------------+------------------+----------------+--------------+
+| Clock Signal | Enable Signal | Set/Reset Signal | Slice Load Count | Bel Load Count | Bels / Slice |
+--------------+---------------+------------------+------------------+----------------+--------------+
+|  CLK         |               | RESET            |                2 |              4 |         2.00 |
+|  CLK         |               |                  |              206 |            559 |         2.71 |
+--------------+---------------+------------------+------------------+----------------+--------------+
+
+
--- a/synth/filter_vivado.runs/impl_1/filter_drc_opted.pb
+++ b/synth/filter_vivado.runs/impl_1/filter_drc_opted.pb
--- a/synth/filter_vivado.runs/impl_1/filter_drc_opted.rpt
+++ b/synth/filter_vivado.runs/impl_1/filter_drc_opted.rpt
@ -0,0 +1,49 @@
+Copyright 1986-2022 Xilinx, Inc. All Rights Reserved. Copyright 2022-2023 Advanced Micro Devices, Inc. All Rights Reserved.
+---------------------------------------------------------------------------------------------------------------------------------------------
+| Tool Version : Vivado v.2023.2 (lin64) Build 4029153 Fri Oct 13 20:13:54 MDT 2023
+| Date         : Sun Dec  3 18:52:45 2023
+| Host         : veronika-swiftsf11433 running 64-bit EndeavourOS Linux
+| Command      : report_drc -file filter_drc_opted.rpt -pb filter_drc_opted.pb -rpx filter_drc_opted.rpx
+| Design       : filter
+| Device       : xc7k160tffv676-1
+| Speed File   : -1
+| Design State : Synthesized
+---------------------------------------------------------------------------------------------------------------------------------------------
+
+Report DRC
+
+Table of Contents
+-----------------
+1. REPORT SUMMARY
+2. REPORT DETAILS
+
+1. REPORT SUMMARY
+-----------------
+            Netlist: netlist
+          Floorplan: design_1
+      Design limits: <entire design considered>
+           Ruledeck: default
+             Max violations: <unlimited>
+             Violations found: 1
+----------+----------+-----------------------------------------------------+------------+
+| Rule     | Severity | Description                                         | Violations |
+----------+----------+-----------------------------------------------------+------------+
+| CFGBVS-1 | Warning  | Missing CFGBVS and CONFIG_VOLTAGE Design Properties | 1          |
+----------+----------+-----------------------------------------------------+------------+
+
+2. REPORT DETAILS
+-----------------
+CFGBVS-1#1 Warning
+Missing CFGBVS and CONFIG_VOLTAGE Design Properties  
+Neither the CFGBVS nor CONFIG_VOLTAGE voltage property is set in the current_design.  Configuration bank voltage select (CFGBVS) must be set to VCCO or GND, and CONFIG_VOLTAGE must be set to the correct configuration voltage, in order to determine the I/O voltage support for the pins in bank 0.  It is suggested to specify these either using the 'Edit Device Properties' function in the GUI or directly in the XDC file using the following syntax:
+
+ set_property CFGBVS value1 [current_design]
+ #where value1 is either VCCO or GND
+
+ set_property CONFIG_VOLTAGE value2 [current_design]
+ #where value2 is the voltage provided to configuration bank 0
+
+Refer to the device configuration user guide for more information.
+Related violations: <none>
+
+
--- a/synth/filter_vivado.runs/impl_1/filter_drc_opted.rpx
+++ b/synth/filter_vivado.runs/impl_1/filter_drc_opted.rpx
--- a/synth/filter_vivado.runs/impl_1/filter_drc_routed.pb
+++ b/synth/filter_vivado.runs/impl_1/filter_drc_routed.pb
--- a/synth/filter_vivado.runs/impl_1/filter_drc_routed.rpt
+++ b/synth/filter_vivado.runs/impl_1/filter_drc_routed.rpt
@ -0,0 +1,49 @@
+Copyright 1986-2022 Xilinx, Inc. All Rights Reserved. Copyright 2022-2023 Advanced Micro Devices, Inc. All Rights Reserved.
+---------------------------------------------------------------------------------------------------------------------------------------------
+| Tool Version : Vivado v.2023.2 (lin64) Build 4029153 Fri Oct 13 20:13:54 MDT 2023
+| Date         : Sun Dec  3 18:58:32 2023
+| Host         : veronika-swiftsf11433 running 64-bit EndeavourOS Linux
+| Command      : report_drc -file filter_drc_routed.rpt -pb filter_drc_routed.pb -rpx filter_drc_routed.rpx
+| Design       : filter
+| Device       : xc7k160tffv676-1
+| Speed File   : -1
+| Design State : Fully Routed
+---------------------------------------------------------------------------------------------------------------------------------------------
+
+Report DRC
+
+Table of Contents
+-----------------
+1. REPORT SUMMARY
+2. REPORT DETAILS
+
+1. REPORT SUMMARY
+-----------------
+            Netlist: netlist
+          Floorplan: design_1
+      Design limits: <entire design considered>
+           Ruledeck: default
+             Max violations: <unlimited>
+             Violations found: 1
+----------+----------+-----------------------------------------------------+------------+
+| Rule     | Severity | Description                                         | Violations |
+----------+----------+-----------------------------------------------------+------------+
+| CFGBVS-1 | Warning  | Missing CFGBVS and CONFIG_VOLTAGE Design Properties | 1          |
+----------+----------+-----------------------------------------------------+------------+
+
+2. REPORT DETAILS
+-----------------
+CFGBVS-1#1 Warning
+Missing CFGBVS and CONFIG_VOLTAGE Design Properties  
+Neither the CFGBVS nor CONFIG_VOLTAGE voltage property is set in the current_design.  Configuration bank voltage select (CFGBVS) must be set to VCCO or GND, and CONFIG_VOLTAGE must be set to the correct configuration voltage, in order to determine the I/O voltage support for the pins in bank 0.  It is suggested to specify these either using the 'Edit Device Properties' function in the GUI or directly in the XDC file using the following syntax:
+
+ set_property CFGBVS value1 [current_design]
+ #where value1 is either VCCO or GND
+
+ set_property CONFIG_VOLTAGE value2 [current_design]
+ #where value2 is the voltage provided to configuration bank 0
+
+Refer to the device configuration user guide for more information.
+Related violations: <none>
+
+
--- a/synth/filter_vivado.runs/impl_1/filter_drc_routed.rpx
+++ b/synth/filter_vivado.runs/impl_1/filter_drc_routed.rpx
--- a/synth/filter_vivado.runs/impl_1/filter_io_placed.rpt
+++ b/synth/filter_vivado.runs/impl_1/filter_io_placed.rpt
@ -0,0 +1,718 @@
+Copyright 1986-2022 Xilinx, Inc. All Rights Reserved. Copyright 2022-2023 Advanced Micro Devices, Inc. All Rights Reserved.
+----------------------------------------------------------------------------------------------------------------------------------------------------------
+| Tool Version              : Vivado v.2023.2 (lin64) Build 4029153 Fri Oct 13 20:13:54 MDT 2023
+| Date                      : Sun Dec  3 18:53:59 2023
+| Host                      : veronika-swiftsf11433 running 64-bit EndeavourOS Linux
+| Command                   : report_io -file filter_io_placed.rpt
+| Design                    : filter
+| Device                    : xc7k160t
+| Speed File                : -1
+| Package                   : ffv676
+| Package Version           : FINAL 2012-06-26
+| Package Pin Delay Version : VERS. 2.0 2012-06-26
+----------------------------------------------------------------------------------------------------------------------------------------------------------
+
+IO Information
+
+Table of Contents
+-----------------
+1. Summary
+2. IO Assignments by Package Pin
+
+1. Summary
+----------
+
+---------------+
+| Total User IO |
+---------------+
+|           436 |
+---------------+
+
+
+2. IO Assignments by Package Pin
+--------------------------------
+
+------------+-------------+------------------+------------------------------+---------------+-------------+---------+------------+------+---------------------+----------------------+-----------+------------+-----------+----------+------+------------------+--------------+-------------------+--------------+
+| Pin Number | Signal Name | Bank Type        | Pin Name                     | Use           | IO Standard | IO Bank | Drive (mA) | Slew | On-Chip Termination | Off-Chip Termination |   Voltage | Constraint | Pull Type | DQS Bias | Vref | Signal Integrity | Pre Emphasis | Lvds Pre Emphasis | Equalization |
+------------+-------------+------------------+------------------------------+---------------+-------------+---------+------------+------+---------------------+----------------------+-----------+------------+-----------+----------+------+------------------+--------------+-------------------+--------------+
+| A1         |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| A2         |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| A3         |             |                  | MGTXTXN3_116                 | Gigabit       |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| A4         |             |                  | MGTXTXP3_116                 | Gigabit       |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| A5         |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| A6         |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| A7         |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| A8         |             | High Range       | IO_L9N_T1_DQS_16             | User IO       |             |      16 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| A9         |             | High Range       | IO_L9P_T1_DQS_16             | User IO       |             |      16 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| A10        |             | High Range       | IO_L22N_T3_16                | User IO       |             |      16 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| A11        |             | High Range       | VCCO_16                      | VCCO          |             |      16 |            |      |                     |                      |     any** |            |           |          |      |                  |              |                   |              |
+| A12        |             | High Range       | IO_L24N_T3_16                | User IO       |             |      16 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| A13        |             | High Range       | IO_L24P_T3_16                | User IO       |             |      16 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| A14        |             | High Range       | IO_L21N_T3_DQS_16            | User IO       |             |      16 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| A15        |             | High Range       | IO_L23N_T3_16                | User IO       |             |      16 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| A16        |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| A17        |             | High Range       | IO_L3N_T0_DQS_AD1N_15        | User IO       |             |      15 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| A18        |             | High Range       | IO_L2P_T0_AD8P_15            | User IO       |             |      15 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| A19        |             | High Range       | IO_L2N_T0_AD8N_15            | User IO       |             |      15 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| A20        |             | High Range       | IO_L8N_T1_D12_14             | User IO       |             |      14 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| A21        |             | High Range       | VCCO_14                      | VCCO          |             |      14 |            |      |                     |                      |     any** |            |           |          |      |                  |              |                   |              |
+| A22        |             | High Range       | IO_L2N_T0_D03_14             | User IO       |             |      14 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| A23        |             | High Range       | IO_L4P_T0_D04_14             | User IO       |             |      14 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| A24        |             | High Range       | IO_L4N_T0_D05_14             | User IO       |             |      14 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| A25        |             | High Range       | IO_L1N_T0_D01_DIN_14         | User IO       |             |      14 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| A26        |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| AA1        |             | High Performance | VCCO_34                      | VCCO          |             |      34 |            |      |                     |                      | 0.00-1.80 |            |           |          |      |                  |              |                   |              |
+| AA2        |             | High Performance | IO_L12N_T1_MRCC_34           | User IO       |             |      34 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AA3        |             | High Performance | IO_L12P_T1_MRCC_34           | User IO       |             |      34 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AA4        |             | High Performance | IO_L13P_T2_MRCC_34           | User IO       |             |      34 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AA5        |             | High Performance | IO_L15P_T2_DQS_34            | User IO       |             |      34 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AA6        |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| AA7        |             | High Performance | IO_L8N_T1_33                 | User IO       |             |      33 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AA8        |             | High Performance | IO_L8P_T1_33                 | User IO       |             |      33 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AA9        |             | High Performance | IO_L11P_T1_SRCC_33           | User IO       |             |      33 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AA10       |             | High Performance | IO_L14P_T2_SRCC_33           | User IO       |             |      33 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AA11       |             | High Performance | VCCO_33                      | VCCO          |             |      33 |            |      |                     |                      | 0.00-1.80 |            |           |          |      |                  |              |                   |              |
+| AA12       |             | High Performance | IO_L16N_T2_33                | User IO       |             |      33 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AA13       |             | High Performance | IO_L16P_T2_33                | User IO       |             |      33 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AA14       |             | High Performance | IO_L7P_T1_32                 | User IO       |             |      32 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AA15       |             | High Performance | IO_L7N_T1_32                 | User IO       |             |      32 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AA16       |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| AA17       |             | High Performance | IO_L11P_T1_SRCC_32           | User IO       |             |      32 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AA18       |             | High Performance | IO_L11N_T1_SRCC_32           | User IO       |             |      32 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AA19       |             | High Performance | IO_L16P_T2_32                | User IO       |             |      32 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AA20       |             | High Performance | IO_L16N_T2_32                | User IO       |             |      32 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AA21       |             | High Range       | VCCO_12                      | VCCO          |             |      12 |            |      |                     |                      |     any** |            |           |          |      |                  |              |                   |              |
+| AA22       |             | High Range       | IO_L13N_T2_MRCC_12           | User IO       |             |      12 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AA23       |             | High Range       | IO_L11P_T1_SRCC_12           | User IO       |             |      12 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AA24       |             | High Range       | IO_L12N_T1_MRCC_12           | User IO       |             |      12 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AA25       |             | High Range       | IO_L7P_T1_12                 | User IO       |             |      12 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AA26       |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| AB1        |             | High Performance | IO_L9P_T1_DQS_34             | User IO       |             |      34 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AB2        |             | High Performance | IO_L11P_T1_SRCC_34           | User IO       |             |      34 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AB3        |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| AB4        |             | High Performance | IO_L13N_T2_MRCC_34           | User IO       |             |      34 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AB5        |             | High Performance | IO_L15N_T2_DQS_34            | User IO       |             |      34 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AB6        |             | High Performance | IO_L16P_T2_34                | User IO       |             |      34 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AB7        |             | High Performance | IO_L10P_T1_33                | User IO       |             |      33 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AB8        |             | High Performance | VCCO_33                      | VCCO          |             |      33 |            |      |                     |                      | 0.00-1.80 |            |           |          |      |                  |              |                   |              |
+| AB9        |             | High Performance | IO_L11N_T1_SRCC_33           | User IO       |             |      33 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AB10       |             | High Performance | IO_L14N_T2_SRCC_33           | User IO       |             |      33 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AB11       |             | High Performance | IO_L13P_T2_MRCC_33           | User IO       |             |      33 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AB12       |             | High Performance | IO_L15P_T2_DQS_33            | User IO       |             |      33 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AB13       |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| AB14       |             | High Performance | IO_L10P_T1_32                | User IO       |             |      32 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AB15       |             | High Performance | IO_L10N_T1_32                | User IO       |             |      32 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AB16       |             | High Performance | IO_L12P_T1_MRCC_32           | User IO       |             |      32 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AB17       |             | High Performance | IO_L14P_T2_SRCC_32           | User IO       |             |      32 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AB18       |             | High Performance | VCCO_32                      | VCCO          |             |      32 |            |      |                     |                      | 0.00-1.80 |            |           |          |      |                  |              |                   |              |
+| AB19       |             | High Performance | IO_L18P_T2_32                | User IO       |             |      32 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AB20       |             | High Performance | IO_L18N_T2_32                | User IO       |             |      32 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AB21       |             | High Range       | IO_L18P_T2_12                | User IO       |             |      12 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AB22       |             | High Range       | IO_L17P_T2_12                | User IO       |             |      12 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AB23       |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| AB24       |             | High Range       | IO_L11N_T1_SRCC_12           | User IO       |             |      12 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AB25       |             | High Range       | IO_L7N_T1_12                 | User IO       |             |      12 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AB26       |             | High Range       | IO_L9P_T1_DQS_12             | User IO       |             |      12 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AC1        |             | High Performance | IO_L9N_T1_DQS_34             | User IO       |             |      34 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AC2        |             | High Performance | IO_L11N_T1_SRCC_34           | User IO       |             |      34 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AC3        |             | High Performance | IO_L14N_T2_SRCC_34           | User IO       |             |      34 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AC4        |             | High Performance | IO_L14P_T2_SRCC_34           | User IO       |             |      34 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AC5        |             | High Performance | VCCO_34                      | VCCO          |             |      34 |            |      |                     |                      | 0.00-1.80 |            |           |          |      |                  |              |                   |              |
+| AC6        |             | High Performance | IO_L16N_T2_34                | User IO       |             |      34 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AC7        |             | High Performance | IO_L10N_T1_33                | User IO       |             |      33 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AC8        |             | High Performance | IO_L9P_T1_DQS_33             | User IO       |             |      33 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AC9        |             | High Performance | IO_L12P_T1_MRCC_33           | User IO       |             |      33 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AC10       |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| AC11       |             | High Performance | IO_L13N_T2_MRCC_33           | User IO       |             |      33 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AC12       |             | High Performance | IO_L15N_T2_DQS_33            | User IO       |             |      33 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AC13       |             | High Performance | IO_L17P_T2_33                | User IO       |             |      33 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AC14       |             | High Performance | IO_L8P_T1_32                 | User IO       |             |      32 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AC15       |             | High Performance | VCCO_32                      | VCCO          |             |      32 |            |      |                     |                      | 0.00-1.80 |            |           |          |      |                  |              |                   |              |
+| AC16       |             | High Performance | IO_L12N_T1_MRCC_32           | User IO       |             |      32 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AC17       |             | High Performance | IO_L14N_T2_SRCC_32           | User IO       |             |      32 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AC18       |             | High Performance | IO_L13P_T2_MRCC_32           | User IO       |             |      32 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AC19       |             | High Performance | IO_L17P_T2_32                | User IO       |             |      32 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AC20       |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| AC21       |             | High Range       | IO_L18N_T2_12                | User IO       |             |      12 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AC22       |             | High Range       | IO_L17N_T2_12                | User IO       |             |      12 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AC23       |             | High Range       | IO_L14P_T2_SRCC_12           | User IO       |             |      12 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AC24       |             | High Range       | IO_L14N_T2_SRCC_12           | User IO       |             |      12 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AC25       |             | High Range       | VCCO_12                      | VCCO          |             |      12 |            |      |                     |                      |     any** |            |           |          |      |                  |              |                   |              |
+| AC26       |             | High Range       | IO_L9N_T1_DQS_12             | User IO       |             |      12 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AD1        |             | High Performance | IO_L20P_T3_34                | User IO       |             |      34 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AD2        |             | High Performance | VCCO_34                      | VCCO          |             |      34 |            |      |                     |                      | 0.00-1.80 |            |           |          |      |                  |              |                   |              |
+| AD3        |             | High Performance | IO_L19N_T3_VREF_34           | User IO       |             |      34 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AD4        |             | High Performance | IO_L19P_T3_34                | User IO       |             |      34 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AD5        |             | High Performance | IO_L18N_T2_34                | User IO       |             |      34 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AD6        |             | High Performance | IO_L18P_T2_34                | User IO       |             |      34 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AD7        |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| AD8        |             | High Performance | IO_L9N_T1_DQS_33             | User IO       |             |      33 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AD9        |             | High Performance | IO_L12N_T1_MRCC_33           | User IO       |             |      33 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AD10       |             | High Performance | IO_L20P_T3_33                | User IO       |             |      33 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AD11       |             | High Performance | IO_L19P_T3_33                | User IO       |             |      33 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AD12       |             | High Performance | VCCO_33                      | VCCO          |             |      33 |            |      |                     |                      | 0.00-1.80 |            |           |          |      |                  |              |                   |              |
+| AD13       |             | High Performance | IO_L17N_T2_33                | User IO       |             |      33 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AD14       |             | High Performance | IO_L8N_T1_32                 | User IO       |             |      32 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AD15       |             | High Performance | IO_L4P_T0_32                 | User IO       |             |      32 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AD16       |             | High Performance | IO_L6P_T0_32                 | User IO       |             |      32 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AD17       |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| AD18       |             | High Performance | IO_L13N_T2_MRCC_32           | User IO       |             |      32 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AD19       |             | High Performance | IO_L17N_T2_32                | User IO       |             |      32 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AD20       |             | High Performance | IO_L15P_T2_DQS_32            | User IO       |             |      32 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AD21       |             | High Range       | IO_L19P_T3_12                | User IO       |             |      12 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AD22       |             | High Range       | VCCO_12                      | VCCO          |             |      12 |            |      |                     |                      |     any** |            |           |          |      |                  |              |                   |              |
+| AD23       |             | High Range       | IO_L16P_T2_12                | User IO       |             |      12 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AD24       |             | High Range       | IO_L16N_T2_12                | User IO       |             |      12 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AD25       |             | High Range       | IO_L23P_T3_12                | User IO       |             |      12 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AD26       |             | High Range       | IO_L21P_T3_DQS_12            | User IO       |             |      12 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AE1        |             | High Performance | IO_L20N_T3_34                | User IO       |             |      34 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AE2        |             | High Performance | IO_L22N_T3_34                | User IO       |             |      34 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AE3        |             | High Performance | IO_L22P_T3_34                | User IO       |             |      34 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AE4        |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| AE5        |             | High Performance | IO_L23N_T3_34                | User IO       |             |      34 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AE6        |             | High Performance | IO_L23P_T3_34                | User IO       |             |      34 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AE7        |             | High Performance | IO_L7P_T1_33                 | User IO       |             |      33 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AE8        |             | High Performance | IO_L22P_T3_33                | User IO       |             |      33 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AE9        |             | High Performance | VCCO_33                      | VCCO          |             |      33 |            |      |                     |                      | 0.00-1.80 |            |           |          |      |                  |              |                   |              |
+| AE10       |             | High Performance | IO_L20N_T3_33                | User IO       |             |      33 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AE11       |             | High Performance | IO_L19N_T3_VREF_33           | User IO       |             |      33 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AE12       |             | High Performance | IO_L21P_T3_DQS_33            | User IO       |             |      33 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AE13       |             | High Performance | IO_L23P_T3_33                | User IO       |             |      33 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AE14       |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| AE15       |             | High Performance | IO_L4N_T0_32                 | User IO       |             |      32 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AE16       |             | High Performance | IO_L6N_T0_VREF_32            | User IO       |             |      32 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AE17       |             | High Performance | IO_L1P_T0_32                 | User IO       |             |      32 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AE18       |             | High Performance | IO_L3P_T0_DQS_32             | User IO       |             |      32 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AE19       |             | High Performance | VCCO_32                      | VCCO          |             |      32 |            |      |                     |                      | 0.00-1.80 |            |           |          |      |                  |              |                   |              |
+| AE20       |             | High Performance | IO_L15N_T2_DQS_32            | User IO       |             |      32 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AE21       |             | High Range       | IO_L19N_T3_VREF_12           | User IO       |             |      12 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AE22       |             | High Range       | IO_L24P_T3_12                | User IO       |             |      12 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AE23       |             | High Range       | IO_L22P_T3_12                | User IO       |             |      12 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AE24       |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| AE25       |             | High Range       | IO_L23N_T3_12                | User IO       |             |      12 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AE26       |             | High Range       | IO_L21N_T3_DQS_12            | User IO       |             |      12 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AF1        |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| AF2        |             | High Performance | IO_L24N_T3_34                | User IO       |             |      34 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AF3        |             | High Performance | IO_L24P_T3_34                | User IO       |             |      34 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AF4        |             | High Performance | IO_L21N_T3_DQS_34            | User IO       |             |      34 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AF5        |             | High Performance | IO_L21P_T3_DQS_34            | User IO       |             |      34 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AF6        |             | High Performance | VCCO_34                      | VCCO          |             |      34 |            |      |                     |                      | 0.00-1.80 |            |           |          |      |                  |              |                   |              |
+| AF7        |             | High Performance | IO_L7N_T1_33                 | User IO       |             |      33 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AF8        |             | High Performance | IO_L22N_T3_33                | User IO       |             |      33 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AF9        |             | High Performance | IO_L24N_T3_33                | User IO       |             |      33 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AF10       |             | High Performance | IO_L24P_T3_33                | User IO       |             |      33 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AF11       |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| AF12       |             | High Performance | IO_L21N_T3_DQS_33            | User IO       |             |      33 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AF13       |             | High Performance | IO_L23N_T3_33                | User IO       |             |      33 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AF14       |             | High Performance | IO_L2P_T0_32                 | User IO       |             |      32 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AF15       |             | High Performance | IO_L2N_T0_32                 | User IO       |             |      32 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AF16       |             | High Performance | VCCO_32                      | VCCO          |             |      32 |            |      |                     |                      | 0.00-1.80 |            |           |          |      |                  |              |                   |              |
+| AF17       |             | High Performance | IO_L1N_T0_32                 | User IO       |             |      32 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AF18       |             | High Performance | IO_L3N_T0_DQS_32             | User IO       |             |      32 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AF19       |             | High Performance | IO_L5P_T0_32                 | User IO       |             |      32 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AF20       |             | High Performance | IO_L5N_T0_32                 | User IO       |             |      32 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AF21       |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| AF22       |             | High Range       | IO_L24N_T3_12                | User IO       |             |      12 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AF23       |             | High Range       | IO_L22N_T3_12                | User IO       |             |      12 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AF24       |             | High Range       | IO_L20P_T3_12                | User IO       |             |      12 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AF25       |             | High Range       | IO_L20N_T3_12                | User IO       |             |      12 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| AF26       |             | High Range       | VCCO_12                      | VCCO          |             |      12 |            |      |                     |                      |     any** |            |           |          |      |                  |              |                   |              |
+| B1         |             |                  | MGTXTXN2_116                 | Gigabit       |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| B2         |             |                  | MGTXTXP2_116                 | Gigabit       |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| B3         |             |                  | MGTAVTT                      | Gigabit Power |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| B4         |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| B5         |             |                  | MGTXRXN3_116                 | Gigabit       |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| B6         |             |                  | MGTXRXP3_116                 | Gigabit       |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| B7         |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| B8         |             | High Range       | VCCO_16                      | VCCO          |             |      16 |            |      |                     |                      |     any** |            |           |          |      |                  |              |                   |              |
+| B9         |             | High Range       | IO_L10N_T1_16                | User IO       |             |      16 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| B10        |             | High Range       | IO_L22P_T3_16                | User IO       |             |      16 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| B11        |             | High Range       | IO_L20N_T3_16                | User IO       |             |      16 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| B12        |             | High Range       | IO_L20P_T3_16                | User IO       |             |      16 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| B13        |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| B14        |             | High Range       | IO_L21P_T3_DQS_16            | User IO       |             |      16 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| B15        |             | High Range       | IO_L23P_T3_16                | User IO       |             |      16 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| B16        |             | High Range       | IO_L1N_T0_AD0N_15            | User IO       |             |      15 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| B17        |             | High Range       | IO_L3P_T0_DQS_AD1P_15        | User IO       |             |      15 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| B18        |             | High Range       | VCCO_15                      | VCCO          |             |      15 |            |      |                     |                      |     any** |            |           |          |      |                  |              |                   |              |
+| B19        |             | High Range       | IO_L4N_T0_AD9N_15            | User IO       |             |      15 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| B20        |             | High Range       | IO_L8P_T1_D11_14             | User IO       |             |      14 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| B21        |             | High Range       | IO_L10N_T1_D15_14            | User IO       |             |      14 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| B22        |             | High Range       | IO_L2P_T0_D02_14             | User IO       |             |      14 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| B23        |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| B24        |             | High Range       | IO_L1P_T0_D00_MOSI_14        | User IO       |             |      14 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| B25        |             | High Range       | IO_L3P_T0_DQS_PUDC_B_14      | User IO       |             |      14 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| B26        |             | High Range       | IO_L3N_T0_DQS_EMCCLK_14      | User IO       |             |      14 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| C1         |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| C2         |             |                  | MGTAVTT                      | Gigabit Power |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| C3         |             |                  | MGTXRXN2_116                 | Gigabit       |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| C4         |             |                  | MGTXRXP2_116                 | Gigabit       |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| C5         |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| C6         |             |                  | MGTAVCC                      | Gigabit Power |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| C7         |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| C8         |             | Dedicated        | CCLK_0                       | Config        |             |       0 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| C9         |             | High Range       | IO_L10P_T1_16                | User IO       |             |      16 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| C10        |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| C11        |             | High Range       | IO_L13N_T2_MRCC_16           | User IO       |             |      16 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| C12        |             | High Range       | IO_L13P_T2_MRCC_16           | User IO       |             |      16 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| C13        |             | High Range       | IO_L19N_T3_VREF_16           | User IO       |             |      16 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| C14        |             | High Range       | IO_L19P_T3_16                | User IO       |             |      16 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| C15        |             | High Range       | VCCO_16                      | VCCO          |             |      16 |            |      |                     |                      |     any** |            |           |          |      |                  |              |                   |              |
+| C16        |             | High Range       | IO_L1P_T0_AD0P_15            | User IO       |             |      15 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| C17        |             | High Range       | IO_L5P_T0_AD2P_15            | User IO       |             |      15 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| C18        |             | High Range       | IO_L5N_T0_AD2N_15            | User IO       |             |      15 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| C19        |             | High Range       | IO_L4P_T0_AD9P_15            | User IO       |             |      15 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| C20        |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| C21        |             | High Range       | IO_L10P_T1_D14_14            | User IO       |             |      14 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| C22        |             | High Range       | IO_L7N_T1_D10_14             | User IO       |             |      14 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| C23        |             | High Range       | IO_L6P_T0_FCS_B_14           | User IO       |             |      14 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| C24        |             | High Range       | IO_L6N_T0_D08_VREF_14        | User IO       |             |      14 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| C25        |             | High Range       | VCCO_14                      | VCCO          |             |      14 |            |      |                     |                      |     any** |            |           |          |      |                  |              |                   |              |
+| C26        |             | High Range       | IO_L5N_T0_D07_14             | User IO       |             |      14 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| D1         |             |                  | MGTXTXN1_116                 | Gigabit       |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| D2         |             |                  | MGTXTXP1_116                 | Gigabit       |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| D3         |             |                  | MGTAVTT                      | Gigabit Power |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| D4         |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| D5         |             |                  | MGTREFCLK0N_116              | Gigabit       |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| D6         |             |                  | MGTREFCLK0P_116              | Gigabit       |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| D7         |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| D8         |             | High Range       | IO_L8N_T1_16                 | User IO       |             |      16 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| D9         |             | High Range       | IO_L8P_T1_16                 | User IO       |             |      16 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| D10        |             | High Range       | IO_L12N_T1_MRCC_16           | User IO       |             |      16 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| D11        |             | High Range       | IO_L14N_T2_SRCC_16           | User IO       |             |      16 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| D12        |             | High Range       | VCCO_16                      | VCCO          |             |      16 |            |      |                     |                      |     any** |            |           |          |      |                  |              |                   |              |
+| D13        |             | High Range       | IO_L17N_T2_16                | User IO       |             |      16 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| D14        |             | High Range       | IO_L17P_T2_16                | User IO       |             |      16 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| D15        |             | High Range       | IO_L6P_T0_15                 | User IO       |             |      15 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| D16        |             | High Range       | IO_L6N_T0_VREF_15            | User IO       |             |      15 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| D17        |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| D18        |             | High Range       | IO_L13N_T2_MRCC_15           | User IO       |             |      15 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| D19        |             | High Range       | IO_L15P_T2_DQS_15            | User IO       |             |      15 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| D20        |             | High Range       | IO_L15N_T2_DQS_ADV_B_15      | User IO       |             |      15 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| D21        |             | High Range       | IO_L7P_T1_D09_14             | User IO       |             |      14 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| D22        |             | High Range       | VCCO_14                      | VCCO          |             |      14 |            |      |                     |                      |     any** |            |           |          |      |                  |              |                   |              |
+| D23        |             | High Range       | IO_L11P_T1_SRCC_14           | User IO       |             |      14 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| D24        |             | High Range       | IO_L11N_T1_SRCC_14           | User IO       |             |      14 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| D25        |             | High Range       | IO_L15N_T2_DQS_DOUT_CSO_B_14 | User IO       |             |      14 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| D26        |             | High Range       | IO_L5P_T0_D06_14             | User IO       |             |      14 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| E1         |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| E2         |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| E3         |             |                  | MGTXRXN1_116                 | Gigabit       |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| E4         |             |                  | MGTXRXP1_116                 | Gigabit       |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| E5         |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| E6         |             |                  | MGTAVCC                      | Gigabit Power |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| E7         |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| E8         |             | Dedicated        | VCCBATT_0                    | Config        |             |       0 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| E9         |             | High Range       | VCCO_16                      | VCCO          |             |      16 |            |      |                     |                      |     any** |            |           |          |      |                  |              |                   |              |
+| E10        |             | High Range       | IO_L12P_T1_MRCC_16           | User IO       |             |      16 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| E11        |             | High Range       | IO_L14P_T2_SRCC_16           | User IO       |             |      16 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| E12        |             | High Range       | IO_L18N_T2_16                | User IO       |             |      16 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| E13        |             | High Range       | IO_L18P_T2_16                | User IO       |             |      16 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| E14        |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| E15        |             | High Range       | IO_L10P_T1_AD4P_15           | User IO       |             |      15 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| E16        |             | High Range       | IO_L10N_T1_AD4N_15           | User IO       |             |      15 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| E17        |             | High Range       | IO_L12N_T1_MRCC_AD5N_15      | User IO       |             |      15 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| E18        |             | High Range       | IO_L13P_T2_MRCC_15           | User IO       |             |      15 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| E19        |             | High Range       | VCCO_15                      | VCCO          |             |      15 |            |      |                     |                      |     any** |            |           |          |      |                  |              |                   |              |
+| E20        |             | High Range       | IO_L17N_T2_A25_15            | User IO       |             |      15 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| E21        |             | High Range       | IO_L9P_T1_DQS_14             | User IO       |             |      14 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| E22        |             | High Range       | IO_L9N_T1_DQS_D13_14         | User IO       |             |      14 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| E23        |             | High Range       | IO_L12N_T1_MRCC_14           | User IO       |             |      14 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| E24        |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| E25        |             | High Range       | IO_L15P_T2_DQS_RDWR_B_14     | User IO       |             |      14 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| E26        |             | High Range       | IO_L17N_T2_A13_D29_14        | User IO       |             |      14 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| F1         |             |                  | MGTXTXN0_116                 | Gigabit       |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| F2         |             |                  | MGTXTXP0_116                 | Gigabit       |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| F3         |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| F4         |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| F5         |             |                  | MGTREFCLK1N_116              | Gigabit       |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| F6         |             |                  | MGTREFCLK1P_116              | Gigabit       |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| F7         |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| F8         |             | High Range       | IO_L7N_T1_16                 | User IO       |             |      16 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| F9         |             | High Range       | IO_L7P_T1_16                 | User IO       |             |      16 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| F10        |             | High Range       | IO_L11N_T1_SRCC_16           | User IO       |             |      16 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| F11        |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| F12        |             | High Range       | IO_L16N_T2_16                | User IO       |             |      16 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| F13        |             | High Range       | IO_L15N_T2_DQS_16            | User IO       |             |      16 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| F14        |             | High Range       | IO_L15P_T2_DQS_16            | User IO       |             |      16 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| F15        |             | High Range       | IO_L8N_T1_AD3N_15            | User IO       |             |      15 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| F16        |             | High Range       | VCCO_15                      | VCCO          |             |      15 |            |      |                     |                      |     any** |            |           |          |      |                  |              |                   |              |
+| F17        |             | High Range       | IO_L12P_T1_MRCC_AD5P_15      | User IO       |             |      15 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| F18        |             | High Range       | IO_L11N_T1_SRCC_AD12N_15     | User IO       |             |      15 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| F19        |             | High Range       | IO_L17P_T2_A26_15            | User IO       |             |      15 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| F20        |             | High Range       | IO_L16N_T2_A27_15            | User IO       |             |      15 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| F21        |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| F22        |             | High Range       | IO_L12P_T1_MRCC_14           | User IO       |             |      14 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| F23        |             | High Range       | IO_L13N_T2_MRCC_14           | User IO       |             |      14 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| F24        |             | High Range       | IO_L14N_T2_SRCC_14           | User IO       |             |      14 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| F25        |             | High Range       | IO_L17P_T2_A14_D30_14        | User IO       |             |      14 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| F26        |             | High Range       | VCCO_14                      | VCCO          |             |      14 |            |      |                     |                      |     any** |            |           |          |      |                  |              |                   |              |
+| G1         |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| G2         |             |                  | MGTAVTT                      | Gigabit Power |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| G3         |             |                  | MGTXRXN0_116                 | Gigabit       |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| G4         |             |                  | MGTXRXP0_116                 | Gigabit       |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| G5         |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| G6         |             |                  | MGTAVCC                      | Gigabit Power |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| G7         |             | Dedicated        | INIT_B_0                     | Config        |             |       0 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| G8         |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| G9         |             | High Range       | IO_L2N_T0_16                 | User IO       |             |      16 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| G10        |             | High Range       | IO_L2P_T0_16                 | User IO       |             |      16 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| G11        |             | High Range       | IO_L11P_T1_SRCC_16           | User IO       |             |      16 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| G12        |             | High Range       | IO_L16P_T2_16                | User IO       |             |      16 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| G13        |             | High Range       | VCCO_16                      | VCCO          |             |      16 |            |      |                     |                      |     any** |            |           |          |      |                  |              |                   |              |
+| G14        |             | High Range       | IO_L5N_T0_16                 | User IO       |             |      16 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| G15        |             | High Range       | IO_L8P_T1_AD3P_15            | User IO       |             |      15 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| G16        |             | High Range       | IO_L7N_T1_AD10N_15           | User IO       |             |      15 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| G17        |             | High Range       | IO_L11P_T1_SRCC_AD12P_15     | User IO       |             |      15 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| G18        |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| G19        |             | High Range       | IO_L16P_T2_A28_15            | User IO       |             |      15 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| G20        |             | High Range       | IO_L18N_T2_A23_15            | User IO       |             |      15 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| G21        |             | High Range       | IO_L19N_T3_A09_D25_VREF_14   | User IO       |             |      14 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| G22        |             | High Range       | IO_L13P_T2_MRCC_14           | User IO       |             |      14 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| G23        |             | High Range       | VCCO_14                      | VCCO          |             |      14 |            |      |                     |                      |     any** |            |           |          |      |                  |              |                   |              |
+| G24        |             | High Range       | IO_L14P_T2_SRCC_14           | User IO       |             |      14 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| G25        |             | High Range       | IO_L16P_T2_CSI_B_14          | User IO       |             |      14 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| G26        |             | High Range       | IO_L16N_T2_A15_D31_14        | User IO       |             |      14 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| H1         |             |                  | MGTXTXN3_115                 | Gigabit       |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| H2         |             |                  | MGTXTXP3_115                 | Gigabit       |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| H3         |             |                  | MGTAVTT                      | Gigabit Power |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| H4         |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| H5         |             |                  | MGTREFCLK0N_115              | Gigabit       |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| H6         |             |                  | MGTREFCLK0P_115              | Gigabit       |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| H7         |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| H8         |             | High Range       | IO_L1N_T0_16                 | User IO       |             |      16 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| H9         |             | High Range       | IO_L1P_T0_16                 | User IO       |             |      16 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| H10        |             | High Range       | VCCO_16                      | VCCO          |             |      16 |            |      |                     |                      |     any** |            |           |          |      |                  |              |                   |              |
+| H11        |             | High Range       | IO_L6N_T0_VREF_16            | User IO       |             |      16 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| H12        |             | High Range       | IO_L6P_T0_16                 | User IO       |             |      16 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| H13        |             | High Range       | IO_L3N_T0_DQS_16             | User IO       |             |      16 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| H14        |             | High Range       | IO_L5P_T0_16                 | User IO       |             |      16 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| H15        |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| H16        |             | High Range       | IO_L7P_T1_AD10P_15           | User IO       |             |      15 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| H17        |             | High Range       | IO_L14P_T2_SRCC_15           | User IO       |             |      15 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| H18        |             | High Range       | IO_L14N_T2_SRCC_15           | User IO       |             |      15 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| H19        |             | High Range       | IO_L18P_T2_A24_15            | User IO       |             |      15 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| H20        |             | High Range       | VCCO_15                      | VCCO          |             |      15 |            |      |                     |                      |     any** |            |           |          |      |                  |              |                   |              |
+| H21        |             | High Range       | IO_L19P_T3_A10_D26_14        | User IO       |             |      14 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| H22        |             | High Range       | IO_L21N_T3_DQS_A06_D22_14    | User IO       |             |      14 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| H23        |             | High Range       | IO_L20P_T3_A08_D24_14        | User IO       |             |      14 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| H24        |             | High Range       | IO_L20N_T3_A07_D23_14        | User IO       |             |      14 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| H25        |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| H26        |             | High Range       | IO_L18N_T2_A11_D27_14        | User IO       |             |      14 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| J1         |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| J2         |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| J3         |             |                  | MGTXRXN3_115                 | Gigabit       |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| J4         |             |                  | MGTXRXP3_115                 | Gigabit       |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| J5         |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| J6         |             |                  | MGTAVCC                      | Gigabit Power |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| J7         |             | Dedicated        | DONE_0                       | Config        |             |       0 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| J8         |             | High Range       | IO_0_16                      | User IO       |             |      16 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| J9         |             |                  | VCCINT                       | VCCINT        |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| J10        |             | High Range       | IO_L4N_T0_16                 | User IO       |             |      16 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| J11        |             | High Range       | IO_L4P_T0_16                 | User IO       |             |      16 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| J12        |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| J13        |             | High Range       | IO_L3P_T0_DQS_16             | User IO       |             |      16 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| J14        |             | High Range       | IO_25_16                     | User IO       |             |      16 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| J15        |             | High Range       | IO_L9P_T1_DQS_AD11P_15       | User IO       |             |      15 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| J16        |             | High Range       | IO_L9N_T1_DQS_AD11N_15       | User IO       |             |      15 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| J17        |             | High Range       | VCCO_15                      | VCCO          |             |      15 |            |      |                     |                      |     any** |            |           |          |      |                  |              |                   |              |
+| J18        |             | High Range       | IO_L20P_T3_A20_15            | User IO       |             |      15 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| J19        |             | High Range       | IO_L20N_T3_A19_15            | User IO       |             |      15 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| J20        |             | High Range       | IO_L19N_T3_A21_VREF_15       | User IO       |             |      15 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| J21        |             | High Range       | IO_L21P_T3_DQS_14            | User IO       |             |      14 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| J22        |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| J23        |             | High Range       | IO_L24N_T3_A00_D16_14        | User IO       |             |      14 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| J24        |             | High Range       | IO_L22P_T3_A05_D21_14        | User IO       |             |      14 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| J25        |             | High Range       | IO_L22N_T3_A04_D20_14        | User IO       |             |      14 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| J26        |             | High Range       | IO_L18P_T2_A12_D28_14        | User IO       |             |      14 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| K1         |             |                  | MGTXTXN2_115                 | Gigabit       |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| K2         |             |                  | MGTXTXP2_115                 | Gigabit       |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| K3         |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| K4         |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| K5         |             |                  | MGTREFCLK1N_115              | Gigabit       |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| K6         |             |                  | MGTREFCLK1P_115              | Gigabit       |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| K7         |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| K8         |             |                  | VCCINT                       | VCCINT        |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| K9         |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| K10        |             |                  | VCCINT                       | VCCINT        |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| K11        |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| K12        |             |                  | VCCINT                       | VCCINT        |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| K13        |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| K14        |             |                  | VCCINT                       | VCCINT        |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| K15        |             | High Range       | IO_0_15                      | User IO       |             |      15 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| K16        |             | High Range       | IO_L22P_T3_A17_15            | User IO       |             |      15 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| K17        |             | High Range       | IO_L22N_T3_A16_15            | User IO       |             |      15 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| K18        |             | High Range       | IO_L24N_T3_RS0_15            | User IO       |             |      15 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| K19        |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| K20        |             | High Range       | IO_L19P_T3_A22_15            | User IO       |             |      15 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| K21        |             | High Range       | IO_0_14                      | User IO       |             |      14 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| K22        |             | High Range       | IO_L23N_T3_A02_D18_14        | User IO       |             |      14 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| K23        |             | High Range       | IO_L24P_T3_A01_D17_14        | User IO       |             |      14 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| K24        |             | High Range       | VCCO_13                      | VCCO          |             |      13 |            |      |                     |                      |     any** |            |           |          |      |                  |              |                   |              |
+| K25        |             | High Range       | IO_L1P_T0_13                 | User IO       |             |      13 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| K26        |             | High Range       | IO_L1N_T0_13                 | User IO       |             |      13 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| L1         |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| L2         |             |                  | MGTAVTT                      | Gigabit Power |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| L3         |             |                  | MGTXRXN2_115                 | Gigabit       |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| L4         |             |                  | MGTXRXP2_115                 | Gigabit       |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| L5         |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| L6         |             |                  | MGTAVCC                      | Gigabit Power |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| L7         |             | Dedicated        | VCCO_0                       | VCCO          |             |       0 |            |      |                     |                      |     any** |            |           |          |      |                  |              |                   |              |
+| L8         |             | Dedicated        | TCK_0                        | Config        |             |       0 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| L9         |             |                  | VCCINT                       | VCCINT        |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| L10        |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| L11        |             |                  | VCCAUX                       | VCCAUX        |             |         |            |      |                     |                      |      1.80 |            |           |          |      |                  |              |                   |              |
+| L12        |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| L13        |             |                  | VCCINT                       | VCCINT        |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| L14        |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| L15        |             |                  | VCCINT                       | VCCINT        |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| L16        |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| L17        |             | High Range       | IO_L24P_T3_RS1_15            | User IO       |             |      15 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| L18        |             | High Range       | IO_L23N_T3_FWE_B_15          | User IO       |             |      15 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| L19        |             | High Range       | IO_L21P_T3_DQS_15            | User IO       |             |      15 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| L20        |             | High Range       | IO_L21N_T3_DQS_A18_15        | User IO       |             |      15 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| L21        |             | High Range       | VCCO_14                      | VCCO          |             |      14 |            |      |                     |                      |     any** |            |           |          |      |                  |              |                   |              |
+| L22        |             | High Range       | IO_L23P_T3_A03_D19_14        | User IO       |             |      14 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| L23        |             | High Range       | IO_25_14                     | User IO       |             |      14 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| L24        |             | High Range       | IO_L8N_T1_13                 | User IO       |             |      13 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| L25        |             | High Range       | IO_L3N_T0_DQS_13             | User IO       |             |      13 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| L26        |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| M1         |             |                  | MGTXTXN1_115                 | Gigabit       |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| M2         |             |                  | MGTXTXP1_115                 | Gigabit       |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| M3         |             |                  | MGTAVTT                      | Gigabit Power |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| M4         |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| M5         |             |                  | MGTAVTTRCAL_115              | Gigabit       |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| M6         |             |                  | MGTRREF_115                  | Gigabit       |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| M7         |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| M8         |             |                  | VCCINT                       | VCCINT        |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| M9         |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| M10        |             |                  | VCCAUX                       | VCCAUX        |             |         |            |      |                     |                      |      1.80 |            |           |          |      |                  |              |                   |              |
+| M11        |             | Dedicated        | GNDADC_0                     | XADC          |             |       0 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| M12        |             | Dedicated        | VCCADC_0                     | XADC          |             |       0 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| M13        |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| M14        |             |                  | VCCINT                       | VCCINT        |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| M15        |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| M16        |             | High Range       | IO_25_15                     | User IO       |             |      15 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| M17        |             | High Range       | IO_L23P_T3_FOE_B_15          | User IO       |             |      15 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| M18        |             | High Range       | VCCO_15                      | VCCO          |             |      15 |            |      |                     |                      |     any** |            |           |          |      |                  |              |                   |              |
+| M19        |             | High Range       | IO_L22N_T3_13                | User IO       |             |      13 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| M20        |             | High Range       | IO_L7N_T1_13                 | User IO       |             |      13 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| M21        |             | High Range       | IO_L10P_T1_13                | User IO       |             |      13 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| M22        |             | High Range       | IO_L10N_T1_13                | User IO       |             |      13 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| M23        |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| M24        |             | High Range       | IO_L8P_T1_13                 | User IO       |             |      13 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| M25        |             | High Range       | IO_L3P_T0_DQS_13             | User IO       |             |      13 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| M26        |             | High Range       | IO_L5N_T0_13                 | User IO       |             |      13 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| N1         |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| N2         |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| N3         |             |                  | MGTXRXN1_115                 | Gigabit       |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| N4         |             |                  | MGTXRXP1_115                 | Gigabit       |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| N5         |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| N6         |             |                  | MGTVCCAUX                    | Gigabit Power |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| N7         |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| N8         |             | Dedicated        | TMS_0                        | Config        |             |       0 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| N9         |             |                  | VCCINT                       | VCCINT        |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| N10        |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| N11        |             | Dedicated        | VREFN_0                      | XADC          |             |       0 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| N12        |             | Dedicated        | VP_0                         | XADC          |             |       0 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| N13        |             |                  | VCCBRAM                      | VCCBRAM       |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| N14        |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| N15        |             |                  | VCCINT                       | VCCINT        |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| N16        |             | High Range       | IO_0_13                      | User IO       |             |      13 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| N17        |             | High Range       | IO_L20N_T3_13                | User IO       |             |      13 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| N18        |             | High Range       | IO_L22P_T3_13                | User IO       |             |      13 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| N19        |             | High Range       | IO_L7P_T1_13                 | User IO       |             |      13 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| N20        |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| N21        |             | High Range       | IO_L12P_T1_MRCC_13           | User IO       |             |      13 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| N22        |             | High Range       | IO_L12N_T1_MRCC_13           | User IO       |             |      13 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| N23        |             | High Range       | IO_L11N_T1_SRCC_13           | User IO       |             |      13 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| N24        |             | High Range       | IO_L4N_T0_13                 | User IO       |             |      13 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| N25        |             | High Range       | VCCO_13                      | VCCO          |             |      13 |            |      |                     |                      |     any** |            |           |          |      |                  |              |                   |              |
+| N26        |             | High Range       | IO_L5P_T0_13                 | User IO       |             |      13 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| P1         |             |                  | MGTXTXN0_115                 | Gigabit       |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| P2         |             |                  | MGTXTXP0_115                 | Gigabit       |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| P3         |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| P4         |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| P5         |             | Dedicated        | M2_0                         | Config        |             |       0 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| P6         |             | Dedicated        | PROGRAM_B_0                  | Config        |             |       0 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| P7         |             | Dedicated        | CFGBVS_0                     | Config        |             |       0 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| P8         |             |                  | VCCAUX_IO_G0                 | VCCAUX        |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| P9         |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| P10        |             |                  | VCCAUX                       | VCCAUX        |             |         |            |      |                     |                      |      1.80 |            |           |          |      |                  |              |                   |              |
+| P11        |             | Dedicated        | VN_0                         | XADC          |             |       0 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| P12        |             | Dedicated        | VREFP_0                      | XADC          |             |       0 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| P13        |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| P14        |             |                  | VCCINT                       | VCCINT        |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| P15        |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| P16        |             | High Range       | IO_L20P_T3_13                | User IO       |             |      13 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| P17        |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| P18        |             | High Range       | IO_L24N_T3_13                | User IO       |             |      13 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| P19        |             | High Range       | IO_L9P_T1_DQS_13             | User IO       |             |      13 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| P20        |             | High Range       | IO_L9N_T1_DQS_13             | User IO       |             |      13 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| P21        |             | High Range       | IO_L13N_T2_MRCC_13           | User IO       |             |      13 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| P22        |             | High Range       | VCCO_13                      | VCCO          |             |      13 |            |      |                     |                      |     any** |            |           |          |      |                  |              |                   |              |
+| P23        |             | High Range       | IO_L11P_T1_SRCC_13           | User IO       |             |      13 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| P24        |             | High Range       | IO_L4P_T0_13                 | User IO       |             |      13 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| P25        |             | High Range       | IO_L6N_T0_VREF_13            | User IO       |             |      13 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| P26        |             | High Range       | IO_L2N_T0_13                 | User IO       |             |      13 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| R1         |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| R2         |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| R3         |             |                  | MGTXRXN0_115                 | Gigabit       |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| R4         |             |                  | MGTXRXP0_115                 | Gigabit       |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| R5         |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| R6         |             | Dedicated        | TDI_0                        | Config        |             |       0 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| R7         |             | Dedicated        | TDO_0                        | Config        |             |       0 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| R8         |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| R9         |             |                  | VCCAUX_IO_G0                 | VCCAUX        |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| R10        |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| R11        |             | Dedicated        | DXN_0                        | Temp Sensor   |             |       0 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| R12        |             | Dedicated        | DXP_0                        | Temp Sensor   |             |       0 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| R13        |             |                  | VCCBRAM                      | VCCBRAM       |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| R14        |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| R15        |             |                  | VCCINT                       | VCCINT        |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| R16        |             | High Range       | IO_L21P_T3_DQS_13            | User IO       |             |      13 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| R17        |             | High Range       | IO_L21N_T3_DQS_13            | User IO       |             |      13 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| R18        |             | High Range       | IO_L24P_T3_13                | User IO       |             |      13 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| R19        |             | High Range       | VCCO_13                      | VCCO          |             |      13 |            |      |                     |                      |     any** |            |           |          |      |                  |              |                   |              |
+| R20        |             | High Range       | IO_L16N_T2_13                | User IO       |             |      13 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| R21        |             | High Range       | IO_L13P_T2_MRCC_13           | User IO       |             |      13 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| R22        |             | High Range       | IO_L14P_T2_SRCC_13           | User IO       |             |      13 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| R23        |             | High Range       | IO_L14N_T2_SRCC_13           | User IO       |             |      13 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| R24        |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| R25        |             | High Range       | IO_L6P_T0_13                 | User IO       |             |      13 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| R26        |             | High Range       | IO_L2P_T0_13                 | User IO       |             |      13 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| T1         |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| T2         |             | Dedicated        | M1_0                         | Config        |             |       0 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| T3         |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| T4         |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| T5         |             | Dedicated        | M0_0                         | Config        |             |       0 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| T6         |             | Dedicated        | VCCO_0                       | VCCO          |             |       0 |            |      |                     |                      |     any** |            |           |          |      |                  |              |                   |              |
+| T7         |             | High Performance | IO_25_VRP_34                 | User IO       |             |      34 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| T8         |             |                  | VCCAUX_IO_G0                 | VCCAUX        |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| T9         |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| T10        |             |                  | VCCAUX                       | VCCAUX        |             |         |            |      |                     |                      |      1.80 |            |           |          |      |                  |              |                   |              |
+| T11        |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| T12        |             |                  | VCCBRAM                      | VCCBRAM       |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| T13        |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| T14        |             |                  | VCCINT                       | VCCINT        |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| T15        |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| T16        |             | High Range       | VCCO_13                      | VCCO          |             |      13 |            |      |                     |                      |     any** |            |           |          |      |                  |              |                   |              |
+| T17        |             | High Range       | IO_L23N_T3_13                | User IO       |             |      13 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| T18        |             | High Range       | IO_L19P_T3_13                | User IO       |             |      13 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| T19        |             | High Range       | IO_L19N_T3_VREF_13           | User IO       |             |      13 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| T20        |             | High Range       | IO_L16P_T2_13                | User IO       |             |      13 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| T21        |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| T22        |             | High Range       | IO_L17P_T2_13                | User IO       |             |      13 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| T23        |             | High Range       | IO_L17N_T2_13                | User IO       |             |      13 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| T24        |             | High Range       | IO_L15P_T2_DQS_13            | User IO       |             |      13 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| T25        |             | High Range       | IO_L15N_T2_DQS_13            | User IO       |             |      13 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| T26        |             | High Range       | VCCO_13                      | VCCO          |             |      13 |            |      |                     |                      |     any** |            |           |          |      |                  |              |                   |              |
+| U1         |             | High Performance | IO_L2N_T0_34                 | User IO       |             |      34 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| U2         |             | High Performance | IO_L2P_T0_34                 | User IO       |             |      34 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| U3         |             | High Performance | VCCO_34                      | VCCO          |             |      34 |            |      |                     |                      | 0.00-1.80 |            |           |          |      |                  |              |                   |              |
+| U4         |             | High Performance | IO_0_VRN_34                  | User IO       |             |      34 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| U5         |             | High Performance | IO_L1N_T0_34                 | User IO       |             |      34 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| U6         |             | High Performance | IO_L1P_T0_34                 | User IO       |             |      34 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| U7         |             | High Performance | IO_L5P_T0_34                 | User IO       |             |      34 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| U8         |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| U9         |             | High Performance | IO_0_VRN_33                  | User IO       |             |      33 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| U10        |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| U11        |             |                  | VCCAUX                       | VCCAUX        |             |         |            |      |                     |                      |      1.80 |            |           |          |      |                  |              |                   |              |
+| U12        |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| U13        |             |                  | VCCBRAM                      | VCCBRAM       |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| U14        |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| U15        |             |                  | VCCINT                       | VCCINT        |             |         |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| U16        |             | High Range       | IO_25_13                     | User IO       |             |      13 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| U17        |             | High Range       | IO_L23P_T3_13                | User IO       |             |      13 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| U18        |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| U19        |             | High Range       | IO_L18P_T2_13                | User IO       |             |      13 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| U20        |             | High Range       | IO_L18N_T2_13                | User IO       |             |      13 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| U21        |             | High Range       | IO_0_12                      | User IO       |             |      12 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| U22        |             | High Range       | IO_L1P_T0_12                 | User IO       |             |      12 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| U23        |             | High Range       | VCCO_12                      | VCCO          |             |      12 |            |      |                     |                      |     any** |            |           |          |      |                  |              |                   |              |
+| U24        |             | High Range       | IO_L2P_T0_12                 | User IO       |             |      12 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| U25        |             | High Range       | IO_L2N_T0_12                 | User IO       |             |      12 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| U26        |             | High Range       | IO_L4P_T0_12                 | User IO       |             |      12 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| V1         |             | High Performance | IO_L8N_T1_34                 | User IO       |             |      34 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| V2         |             | High Performance | IO_L8P_T1_34                 | User IO       |             |      34 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| V3         |             | High Performance | IO_L4P_T0_34                 | User IO       |             |      34 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| V4         |             | High Performance | IO_L6P_T0_34                 | User IO       |             |      34 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| V5         |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| V6         |             | High Performance | IO_L5N_T0_34                 | User IO       |             |      34 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| V7         |             | High Performance | IO_L2N_T0_33                 | User IO       |             |      33 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| V8         |             | High Performance | IO_L2P_T0_33                 | User IO       |             |      33 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| V9         |             | High Performance | IO_L6P_T0_33                 | User IO       |             |      33 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| V10        |             | High Performance | VCCO_33                      | VCCO          |             |      33 |            |      |                     |                      | 0.00-1.80 |            |           |          |      |                  |              |                   |              |
+| V11        |             | High Performance | IO_L1P_T0_33                 | User IO       |             |      33 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| V12        |             | High Performance | IO_25_VRP_33                 | User IO       |             |      33 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| V13        |             | High Performance | IO_0_VRN_32                  | User IO       |             |      32 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| V14        |             | High Performance | IO_L24P_T3_32                | User IO       |             |      32 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| V15        |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| V16        |             | High Performance | IO_L20P_T3_32                | User IO       |             |      32 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| V17        |             | High Performance | IO_L20N_T3_32                | User IO       |             |      32 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| V18        |             | High Performance | IO_L23P_T3_32                | User IO       |             |      32 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| V19        |             | High Performance | IO_L23N_T3_32                | User IO       |             |      32 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| V20        |             | High Range       | VCCO_12                      | VCCO          |             |      12 |            |      |                     |                      |     any** |            |           |          |      |                  |              |                   |              |
+| V21        |             | High Range       | IO_L6P_T0_12                 | User IO       |             |      12 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| V22        |             | High Range       | IO_L1N_T0_12                 | User IO       |             |      12 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| V23        |             | High Range       | IO_L3P_T0_DQS_12             | User IO       |             |      12 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| V24        |             | High Range       | IO_L3N_T0_DQS_12             | User IO       |             |      12 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| V25        |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| V26        |             | High Range       | IO_L4N_T0_12                 | User IO       |             |      12 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| W1         |             | High Performance | IO_L10P_T1_34                | User IO       |             |      34 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| W2         |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| W3         |             | High Performance | IO_L4N_T0_34                 | User IO       |             |      34 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| W4         |             | High Performance | IO_L6N_T0_VREF_34            | User IO       |             |      34 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| W5         |             | High Performance | IO_L3N_T0_DQS_34             | User IO       |             |      34 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| W6         |             | High Performance | IO_L3P_T0_DQS_34             | User IO       |             |      34 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| W7         |             | High Performance | VCCO_33                      | VCCO          |             |      33 |            |      |                     |                      | 0.00-1.80 |            |           |          |      |                  |              |                   |              |
+| W8         |             | High Performance | IO_L6N_T0_VREF_33            | User IO       |             |      33 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| W9         |             | High Performance | IO_L3N_T0_DQS_33             | User IO       |             |      33 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| W10        |             | High Performance | IO_L3P_T0_DQS_33             | User IO       |             |      33 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| W11        |             | High Performance | IO_L1N_T0_33                 | User IO       |             |      33 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| W12        |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| W13        |             | High Performance | IO_25_VRP_32                 | User IO       |             |      32 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| W14        |             | High Performance | IO_L24N_T3_32                | User IO       |             |      32 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| W15        |             | High Performance | IO_L22P_T3_32                | User IO       |             |      32 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| W16        |             | High Performance | IO_L22N_T3_32                | User IO       |             |      32 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| W17        |             | High Performance | VCCO_32                      | VCCO          |             |      32 |            |      |                     |                      | 0.00-1.80 |            |           |          |      |                  |              |                   |              |
+| W18        |             | High Performance | IO_L21P_T3_DQS_32            | User IO       |             |      32 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| W19        |             | High Performance | IO_L21N_T3_DQS_32            | User IO       |             |      32 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| W20        |             | High Range       | IO_L15P_T2_DQS_12            | User IO       |             |      12 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| W21        |             | High Range       | IO_L6N_T0_VREF_12            | User IO       |             |      12 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| W22        |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| W23        |             | High Range       | IO_L8P_T1_12                 | User IO       |             |      12 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| W24        |             | High Range       | IO_L8N_T1_12                 | User IO       |             |      12 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| W25        |             | High Range       | IO_L5P_T0_12                 | User IO       |             |      12 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| W26        |             | High Range       | IO_L5N_T0_12                 | User IO       |             |      12 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| Y1         |             | High Performance | IO_L10N_T1_34                | User IO       |             |      34 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| Y2         |             | High Performance | IO_L7N_T1_34                 | User IO       |             |      34 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| Y3         |             | High Performance | IO_L7P_T1_34                 | User IO       |             |      34 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| Y4         |             | High Performance | VCCO_34                      | VCCO          |             |      34 |            |      |                     |                      | 0.00-1.80 |            |           |          |      |                  |              |                   |              |
+| Y5         |             | High Performance | IO_L17N_T2_34                | User IO       |             |      34 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| Y6         |             | High Performance | IO_L17P_T2_34                | User IO       |             |      34 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| Y7         |             | High Performance | IO_L4N_T0_33                 | User IO       |             |      33 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| Y8         |             | High Performance | IO_L4P_T0_33                 | User IO       |             |      33 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| Y9         |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| Y10        |             | High Performance | IO_L5N_T0_33                 | User IO       |             |      33 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| Y11        |             | High Performance | IO_L5P_T0_33                 | User IO       |             |      33 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| Y12        |             | High Performance | IO_L18N_T2_33                | User IO       |             |      33 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| Y13        |             | High Performance | IO_L18P_T2_33                | User IO       |             |      33 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| Y14        |             | High Performance | VCCO_32                      | VCCO          |             |      32 |            |      |                     |                      | 0.00-1.80 |            |           |          |      |                  |              |                   |              |
+| Y15        |             | High Performance | IO_L9P_T1_DQS_32             | User IO       |             |      32 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| Y16        |             | High Performance | IO_L9N_T1_DQS_32             | User IO       |             |      32 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| Y17        |             | High Performance | IO_L19P_T3_32                | User IO       |             |      32 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| Y18        |             | High Performance | IO_L19N_T3_VREF_32           | User IO       |             |      32 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| Y19        |             |                  | GND                          | GND           |             |         |            |      |                     |                      |       0.0 |            |           |          |      |                  |              |                   |              |
+| Y20        |             | High Range       | IO_25_12                     | User IO       |             |      12 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| Y21        |             | High Range       | IO_L15N_T2_DQS_12            | User IO       |             |      12 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| Y22        |             | High Range       | IO_L13P_T2_MRCC_12           | User IO       |             |      12 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| Y23        |             | High Range       | IO_L12P_T1_MRCC_12           | User IO       |             |      12 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| Y24        |             | High Range       | VCCO_12                      | VCCO          |             |      12 |            |      |                     |                      |     any** |            |           |          |      |                  |              |                   |              |
+| Y25        |             | High Range       | IO_L10P_T1_12                | User IO       |             |      12 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+| Y26        |             | High Range       | IO_L10N_T1_12                | User IO       |             |      12 |            |      |                     |                      |           |            |           |          |      |                  |              |                   |              |
+------------+-------------+------------------+------------------------------+---------------+-------------+---------+------------+------+---------------------+----------------------+-----------+------------+-----------+----------+------+------------------+--------------+-------------------+--------------+
+* Default value
+** Special VCCO requirements may apply. Please consult the device family datasheet for specific guideline on VCCO requirements.
+
+
--- a/synth/filter_vivado.runs/impl_1/filter_methodology_drc_routed.pb
+++ b/synth/filter_vivado.runs/impl_1/filter_methodology_drc_routed.pb
--- a/synth/filter_vivado.runs/impl_1/filter_methodology_drc_routed.rpt
+++ b/synth/filter_vivado.runs/impl_1/filter_methodology_drc_routed.rpt
--- a/synth/filter_vivado.runs/impl_1/filter_methodology_drc_routed.rpx
+++ b/synth/filter_vivado.runs/impl_1/filter_methodology_drc_routed.rpx
--- a/synth/filter_vivado.runs/impl_1/filter_opt.dcp
+++ b/synth/filter_vivado.runs/impl_1/filter_opt.dcp
--- a/synth/filter_vivado.runs/impl_1/filter_physopt.dcp
+++ b/synth/filter_vivado.runs/impl_1/filter_physopt.dcp
--- a/synth/filter_vivado.runs/impl_1/filter_placed.dcp
+++ b/synth/filter_vivado.runs/impl_1/filter_placed.dcp
--- a/synth/filter_vivado.runs/impl_1/filter_power_routed.rpt
+++ b/synth/filter_vivado.runs/impl_1/filter_power_routed.rpt
@ -0,0 +1,163 @@
+Copyright 1986-2022 Xilinx, Inc. All Rights Reserved. Copyright 2022-2023 Advanced Micro Devices, Inc. All Rights Reserved.
+-------------------------------------------------------------------------------------------------------------------------------------------------
+| Tool Version     : Vivado v.2023.2 (lin64) Build 4029153 Fri Oct 13 20:13:54 MDT 2023
+| Date             : Sun Dec  3 18:58:40 2023
+| Host             : veronika-swiftsf11433 running 64-bit EndeavourOS Linux
+| Command          : report_power -file filter_power_routed.rpt -pb filter_power_summary_routed.pb -rpx filter_power_routed.rpx
+| Design           : filter
+| Device           : xc7k160tffv676-1
+| Design State     : routed
+| Grade            : commercial
+| Process          : typical
+| Characterization : Production
+-------------------------------------------------------------------------------------------------------------------------------------------------
+
+Power Report
+
+Table of Contents
+-----------------
+1. Summary
+1.1 On-Chip Components
+1.2 Power Supply Summary
+1.3 Confidence Level
+2. Settings
+2.1 Environment
+2.2 Clock Constraints
+3. Detailed Reports
+3.1 By Hierarchy
+
+1. Summary
+----------
+
+--------------------------+--------------+
+| Total On-Chip Power (W)  | 0.790        |
+| Design Power Budget (W)  | Unspecified* |
+| Power Budget Margin (W)  | NA           |
+| Dynamic (W)              | 0.675        |
+| Device Static (W)        | 0.114        |
+| Effective TJA (C/W)      | 1.9          |
+| Max Ambient (C)          | 83.5         |
+| Junction Temperature (C) | 26.5         |
+| Confidence Level         | Medium       |
+| Setting File             | ---          |
+| Simulation Activity File | ---          |
+| Design Nets Matched      | NA           |
+--------------------------+--------------+
+* Specify Design Power Budget using, set_operating_conditions -design_power_budget <value in Watts>
+
+
+1.1 On-Chip Components
+----------------------
+
+----------------+-----------+----------+-----------+-----------------+
+| On-Chip        | Power (W) | Used     | Available | Utilization (%) |
+----------------+-----------+----------+-----------+-----------------+
+| Clocks         |     0.024 |        3 |       --- |             --- |
+| Slice Logic    |     0.175 |     5524 |       --- |             --- |
+|   LUT as Logic |     0.163 |     3508 |    101400 |            3.46 |
+|   CARRY4       |     0.012 |      681 |     25350 |            2.69 |
+|   Register     |    <0.001 |      597 |    202800 |            0.29 |
+|   Others       |     0.000 |       34 |       --- |             --- |
+| Signals        |     0.270 |     5168 |       --- |             --- |
+| Block RAM      |     0.206 |       34 |       325 |           10.46 |
+| Static Power   |     0.114 |          |           |                 |
+| Total          |     0.790 |          |           |                 |
+----------------+-----------+----------+-----------+-----------------+
+
+
+1.2 Power Supply Summary
+------------------------
+
+-----------+-------------+-----------+-------------+------------+-------------+-------------+------------+
+| Source    | Voltage (V) | Total (A) | Dynamic (A) | Static (A) | Powerup (A) | Budget (A)  | Margin (A) |
+-----------+-------------+-----------+-------------+------------+-------------+-------------+------------+
+| Vccint    |       1.000 |     0.703 |       0.660 |      0.043 |       NA    | Unspecified | NA         |
+| Vccaux    |       1.800 |     0.018 |       0.000 |      0.018 |       NA    | Unspecified | NA         |
+| Vcco33    |       3.300 |     0.000 |       0.000 |      0.000 |       NA    | Unspecified | NA         |
+| Vcco25    |       2.500 |     0.000 |       0.000 |      0.000 |       NA    | Unspecified | NA         |
+| Vcco18    |       1.800 |     0.000 |       0.000 |      0.000 |       NA    | Unspecified | NA         |
+| Vcco15    |       1.500 |     0.000 |       0.000 |      0.000 |       NA    | Unspecified | NA         |
+| Vcco135   |       1.350 |     0.000 |       0.000 |      0.000 |       NA    | Unspecified | NA         |
+| Vcco12    |       1.200 |     0.000 |       0.000 |      0.000 |       NA    | Unspecified | NA         |
+| Vccaux_io |       1.800 |     0.000 |       0.000 |      0.000 |       NA    | Unspecified | NA         |
+| Vccbram   |       1.000 |     0.018 |       0.016 |      0.002 |       NA    | Unspecified | NA         |
+| MGTAVcc   |       1.000 |     0.000 |       0.000 |      0.000 |       NA    | Unspecified | NA         |
+| MGTAVtt   |       1.200 |     0.000 |       0.000 |      0.000 |       NA    | Unspecified | NA         |
+| MGTVccaux |       1.800 |     0.000 |       0.000 |      0.000 |       NA    | Unspecified | NA         |
+| Vccadc    |       1.800 |     0.020 |       0.000 |      0.020 |       NA    | Unspecified | NA         |
+-----------+-------------+-----------+-------------+------------+-------------+-------------+------------+
+
+
+1.3 Confidence Level
+--------------------
+
+-----------------------------+------------+------------------------------------------------+------------------------------------------------------------------------------------------------------------+
+| User Input Data             | Confidence | Details                                        | Action                                                                                                     |
+-----------------------------+------------+------------------------------------------------+------------------------------------------------------------------------------------------------------------+
+| Design implementation state | High       | Design is routed                               |                                                                                                            |
+| Clock nodes activity        | High       | User specified more than 95% of clocks         |                                                                                                            |
+| I/O nodes activity          | High       | User specified more than 95% of inputs         |                                                                                                            |
+| Internal nodes activity     | Medium     | User specified less than 25% of internal nodes | Provide missing internal nodes activity with simulation results or by editing the "By Resource Type" views |
+| Device models               | High       | Device models are Production                   |                                                                                                            |
+|                             |            |                                                |                                                                                                            |
+| Overall confidence level    | Medium     |                                                |                                                                                                            |
+-----------------------------+------------+------------------------------------------------+------------------------------------------------------------------------------------------------------------+
+
+
+2. Settings
+-----------
+
+2.1 Environment
+---------------
+
+-----------------------+--------------------------+
+| Ambient Temp (C)      | 25.0                     |
+| ThetaJA (C/W)         | 1.9                      |
+| Airflow (LFM)         | 250                      |
+| Heat Sink             | medium (Medium Profile)  |
+| ThetaSA (C/W)         | 3.4                      |
+| Board Selection       | medium (10"x10")         |
+| # of Board Layers     | 12to15 (12 to 15 Layers) |
+| Board Temperature (C) | 25.0                     |
+-----------------------+--------------------------+
+
+
+2.2 Clock Constraints
+---------------------
+
+-------+--------+-----------------+
+| Clock | Domain | Constraint (ns) |
+-------+--------+-----------------+
+| CLK   | CLK    |             4.0 |
+-------+--------+-----------------+
+
+
+3. Detailed Reports
+-------------------
+
+3.1 By Hierarchy
+----------------
+
+-------------------------------+-----------+
+| Name                          | Power (W) |
+-------------------------------+-----------+
+| filter                        |     0.675 |
+|   hash_generate[0].hash       |     0.100 |
+|     final                     |     0.023 |
+|     mix_pipeline[0].mix       |     0.076 |
+|   hash_generate[1].hash       |     0.105 |
+|     final                     |     0.023 |
+|     mix_pipeline[0].mix       |     0.081 |
+|   hash_generate[2].hash       |     0.101 |
+|     final                     |     0.022 |
+|     mix_pipeline[0].mix       |     0.079 |
+|   hash_generate[3].hash       |     0.102 |
+|     final                     |     0.024 |
+|     mix_pipeline[0].mix       |     0.072 |
+|   storage_generate[0].storage |     0.057 |
+|   storage_generate[1].storage |     0.059 |
+|   storage_generate[2].storage |     0.057 |
+|   storage_generate[3].storage |     0.057 |
+-------------------------------+-----------+
+
+
--- a/synth/filter_vivado.runs/impl_1/filter_power_routed.rpx
+++ b/synth/filter_vivado.runs/impl_1/filter_power_routed.rpx
--- a/synth/filter_vivado.runs/impl_1/filter_power_summary_routed.pb
+++ b/synth/filter_vivado.runs/impl_1/filter_power_summary_routed.pb
--- a/synth/filter_vivado.runs/impl_1/filter_reports.tcl
+++ b/synth/filter_vivado.runs/impl_1/filter_reports.tcl
@ -0,0 +1,129 @@
+# 
+# Report generation script generated by Vivado
+# 
+
+proc create_report { reportName command } {
+  set status "."
+  append status $reportName ".fail"
+  if { [file exists $status] } {
+    eval file delete [glob $status]
+  }
+  send_msg_id runtcl-4 info "Executing : $command"
+  set retval [eval catch { $command } msg]
+  if { $retval != 0 } {
+    set fp [open $status w]
+    close $fp
+    send_msg_id runtcl-5 warning "$msg"
+  }
+}
+namespace eval ::optrace {
+  variable script "/home/veronikaplevacova/Plocha/PCS2/synth/filter_vivado.runs/impl_1/filter_reports.tcl"
+  variable category "vivado_impl"
+}
+
+# Try to connect to running dispatch if we haven't done so already.
+# This code assumes that the Tcl interpreter is not using threads,
+# since the ::dispatch::connected variable isn't mutex protected.
+if {![info exists ::dispatch::connected]} {
+  namespace eval ::dispatch {
+    variable connected false
+    if {[llength [array get env XILINX_CD_CONNECT_ID]] > 0} {
+      set result "true"
+      if {[catch {
+        if {[lsearch -exact [package names] DispatchTcl] < 0} {
+          set result [load librdi_cd_clienttcl[info sharedlibextension]] 
+        }
+        if {$result eq "false"} {
+          puts "WARNING: Could not load dispatch client library"
+        }
+        set connect_id [ ::dispatch::init_client -mode EXISTING_SERVER ]
+        if { $connect_id eq "" } {
+          puts "WARNING: Could not initialize dispatch client"
+        } else {
+          puts "INFO: Dispatch client connection id - $connect_id"
+          set connected true
+        }
+      } catch_res]} {
+        puts "WARNING: failed to connect to dispatch server - $catch_res"
+      }
+    }
+  }
+}
+if {$::dispatch::connected} {
+  # Remove the dummy proc if it exists.
+  if { [expr {[llength [info procs ::OPTRACE]] > 0}] } {
+    rename ::OPTRACE ""
+  }
+  proc ::OPTRACE { task action {tags {} } } {
+    ::vitis_log::op_trace "$task" $action -tags $tags -script $::optrace::script -category $::optrace::category
+  }
+  # dispatch is generic. We specifically want to attach logging.
+  ::vitis_log::connect_client
+} else {
+  # Add dummy proc if it doesn't exist.
+  if { [expr {[llength [info procs ::OPTRACE]] == 0}] } {
+    proc ::OPTRACE {{arg1 \"\" } {arg2 \"\"} {arg3 \"\" } {arg4 \"\"} {arg5 \"\" } {arg6 \"\"}} {
+        # Do nothing
+    }
+  }
+}
+
+proc start_step { step } {
+  set stopFile ".stop.rst"
+  if {[file isfile .stop.rst]} {
+    puts ""
+    puts "*** Halting run - EA reset detected ***"
+    puts ""
+    puts ""
+    return -code error
+  }
+  set beginFile ".$step.begin.rst"
+  set platform "$::tcl_platform(platform)"
+  set user "$::tcl_platform(user)"
+  set pid [pid]
+  set host ""
+  if { [string equal $platform unix] } {
+    if { [info exist ::env(HOSTNAME)] } {
+      set host $::env(HOSTNAME)
+    } elseif { [info exist ::env(HOST)] } {
+      set host $::env(HOST)
+    }
+  } else {
+    if { [info exist ::env(COMPUTERNAME)] } {
+      set host $::env(COMPUTERNAME)
+    }
+  }
+  set ch [open $beginFile w]
+  puts $ch "<?xml version=\"1.0\"?>"
+  puts $ch "<ProcessHandle Version=\"1\" Minor=\"0\">"
+  puts $ch "    <Process Command=\".planAhead.\" Owner=\"$user\" Host=\"$host\" Pid=\"$pid\">"
+  puts $ch "    </Process>"
+  puts $ch "</ProcessHandle>"
+  close $ch
+}
+
+proc end_step { step } {
+  set endFile ".$step.end.rst"
+  set ch [open $endFile w]
+  close $ch
+}
+
+proc step_failed { step } {
+  set endFile ".$step.error.rst"
+  set ch [open $endFile w]
+  close $ch
+OPTRACE "impl_1" END { }
+}
+
+set_msg_config -id {Synth 8-256} -limit 10000
+set_msg_config -id {Synth 8-638} -limit 10000
+
+if {$argv == "opt_design"} {
+  set retval [open_checkpoint filter_opt.dcp]
+  if { $retval == "checkpoint_filter_opt" } {
+  create_report "impl_1_opt_report_timing_summary_0" "report_timing_summary -max_paths 10 -report_unconstrained -file filter_timing_summary_opted.rpt -pb filter_timing_summary_opted.pb -rpx filter_timing_summary_opted.rpx"
+  
+  close_design
+  }
+}
+
--- a/synth/filter_vivado.runs/impl_1/filter_route_status.pb
+++ b/synth/filter_vivado.runs/impl_1/filter_route_status.pb
--- a/synth/filter_vivado.runs/impl_1/filter_route_status.rpt
+++ b/synth/filter_vivado.runs/impl_1/filter_route_status.rpt
@ -0,0 +1,12 @@
+Design Route Status
+                                               :      # nets :
+   ------------------------------------------- : ----------- :
+   # of logical nets.......................... :        8803 :
+       # of nets not needing routing.......... :        3633 :
+           # of internally routed nets........ :        3197 :
+           # of implicitly routed ports....... :         436 :
+       # of routable nets..................... :        5170 :
+           # of fully routed nets............. :        5170 :
+       # of nets with routing errors.......... :           0 :
+   ------------------------------------------- : ----------- :
+
--- a/synth/filter_vivado.runs/impl_1/filter_routed.dcp
+++ b/synth/filter_vivado.runs/impl_1/filter_routed.dcp
--- a/synth/filter_vivado.runs/impl_1/filter_timing_summary_opted.pb
+++ b/synth/filter_vivado.runs/impl_1/filter_timing_summary_opted.pb
--- a/synth/filter_vivado.runs/impl_1/filter_timing_summary_opted.rpt
+++ b/synth/filter_vivado.runs/impl_1/filter_timing_summary_opted.rpt
--- a/synth/filter_vivado.runs/impl_1/filter_timing_summary_opted.rpx
+++ b/synth/filter_vivado.runs/impl_1/filter_timing_summary_opted.rpx
--- a/synth/filter_vivado.runs/impl_1/filter_timing_summary_routed.pb
+++ b/synth/filter_vivado.runs/impl_1/filter_timing_summary_routed.pb
--- a/synth/filter_vivado.runs/impl_1/filter_timing_summary_routed.rpt
+++ b/synth/filter_vivado.runs/impl_1/filter_timing_summary_routed.rpt
--- a/synth/filter_vivado.runs/impl_1/filter_timing_summary_routed.rpx
+++ b/synth/filter_vivado.runs/impl_1/filter_timing_summary_routed.rpx
--- a/synth/filter_vivado.runs/impl_1/filter_utilization_placed.pb
+++ b/synth/filter_vivado.runs/impl_1/filter_utilization_placed.pb
--- a/synth/filter_vivado.runs/impl_1/filter_utilization_placed.rpt
+++ b/synth/filter_vivado.runs/impl_1/filter_utilization_placed.rpt
@ -0,0 +1,212 @@
+Copyright 1986-2022 Xilinx, Inc. All Rights Reserved. Copyright 2022-2023 Advanced Micro Devices, Inc. All Rights Reserved.
+---------------------------------------------------------------------------------------------------------------------------------------------
+| Tool Version : Vivado v.2023.2 (lin64) Build 4029153 Fri Oct 13 20:13:54 MDT 2023
+| Date         : Sun Dec  3 18:54:00 2023
+| Host         : veronika-swiftsf11433 running 64-bit EndeavourOS Linux
+| Command      : report_utilization -file filter_utilization_placed.rpt -pb filter_utilization_placed.pb
+| Design       : filter
+| Device       : xc7k160tffv676-1
+| Speed File   : -1
+| Design State : Fully Placed
+---------------------------------------------------------------------------------------------------------------------------------------------
+
+Utilization Design Information
+
+Table of Contents
+-----------------
+1. Slice Logic
+1.1 Summary of Registers by Type
+2. Slice Logic Distribution
+3. Memory
+4. DSP
+5. IO and GT Specific
+6. Clocking
+7. Specific Feature
+8. Primitives
+9. Black Boxes
+10. Instantiated Netlists
+
+1. Slice Logic
+--------------
+
+-------------------------+------+-------+------------+-----------+-------+
+|        Site Type        | Used | Fixed | Prohibited | Available | Util% |
+-------------------------+------+-------+------------+-----------+-------+
+| Slice LUTs              | 3503 |     0 |          0 |    101400 |  3.45 |
+|   LUT as Logic          | 3503 |     0 |          0 |    101400 |  3.45 |
+|   LUT as Memory         |    0 |     0 |          0 |     35000 |  0.00 |
+| Slice Registers         |  563 |     0 |          0 |    202800 |  0.28 |
+|   Register as Flip Flop |  563 |     0 |          0 |    202800 |  0.28 |
+|   Register as Latch     |    0 |     0 |          0 |    202800 |  0.00 |
+| F7 Muxes                |    0 |     0 |          0 |     50700 |  0.00 |
+| F8 Muxes                |    0 |     0 |          0 |     25350 |  0.00 |
+-------------------------+------+-------+------------+-----------+-------+
+* Warning! LUT value is adjusted to account for LUT combining.
+
+
+1.1 Summary of Registers by Type
+--------------------------------
+
+-------+--------------+-------------+--------------+
+| Total | Clock Enable | Synchronous | Asynchronous |
+-------+--------------+-------------+--------------+
+| 0     |            _ |           - |            - |
+| 0     |            _ |           - |          Set |
+| 0     |            _ |           - |        Reset |
+| 0     |            _ |         Set |            - |
+| 0     |            _ |       Reset |            - |
+| 0     |          Yes |           - |            - |
+| 0     |          Yes |           - |          Set |
+| 0     |          Yes |           - |        Reset |
+| 0     |          Yes |         Set |            - |
+| 563   |          Yes |       Reset |            - |
+-------+--------------+-------------+--------------+
+
+
+2. Slice Logic Distribution
+---------------------------
+
+--------------------------------------------+------+-------+------------+-----------+-------+
+|                  Site Type                 | Used | Fixed | Prohibited | Available | Util% |
+--------------------------------------------+------+-------+------------+-----------+-------+
+| Slice                                      | 1066 |     0 |          0 |     25350 |  4.21 |
+|   SLICEL                                   |  659 |     0 |            |           |       |
+|   SLICEM                                   |  407 |     0 |            |           |       |
+| LUT as Logic                               | 3503 |     0 |          0 |    101400 |  3.45 |
+|   using O5 output only                     |    0 |       |            |           |       |
+|   using O6 output only                     | 2799 |       |            |           |       |
+|   using O5 and O6                          |  704 |       |            |           |       |
+| LUT as Memory                              |    0 |     0 |          0 |     35000 |  0.00 |
+|   LUT as Distributed RAM                   |    0 |     0 |            |           |       |
+|   LUT as Shift Register                    |    0 |     0 |            |           |       |
+| Slice Registers                            |  563 |     0 |          0 |    202800 |  0.28 |
+|   Register driven from within the Slice    |   19 |       |            |           |       |
+|   Register driven from outside the Slice   |  544 |       |            |           |       |
+|     LUT in front of the register is unused |  298 |       |            |           |       |
+|     LUT in front of the register is used   |  246 |       |            |           |       |
+| Unique Control Sets                        |    2 |       |          0 |     25350 | <0.01 |
+--------------------------------------------+------+-------+------------+-----------+-------+
+* * Note: Available Control Sets calculated as Slice * 1, Review the Control Sets Report for more information regarding control sets.
+
+
+3. Memory
+---------
+
+-------------------+------+-------+------------+-----------+-------+
+|     Site Type     | Used | Fixed | Prohibited | Available | Util% |
+-------------------+------+-------+------------+-----------+-------+
+| Block RAM Tile    |   34 |     0 |          0 |       325 | 10.46 |
+|   RAMB36/FIFO*    |   32 |     0 |          0 |       325 |  9.85 |
+|     RAMB36E1 only |   32 |       |            |           |       |
+|   RAMB18          |    4 |     0 |          0 |       650 |  0.62 |
+|     RAMB18E1 only |    4 |       |            |           |       |
+-------------------+------+-------+------------+-----------+-------+
+* Note: Each Block RAM Tile only has one FIFO logic available and therefore can accommodate only one FIFO36E1 or one FIFO18E1. However, if a FIFO18E1 occupies a Block RAM Tile, that tile can still accommodate a RAMB18E1
+
+
+4. DSP
+------
+
+-----------+------+-------+------------+-----------+-------+
+| Site Type | Used | Fixed | Prohibited | Available | Util% |
+-----------+------+-------+------------+-----------+-------+
+| DSPs      |    0 |     0 |          0 |       600 |  0.00 |
+-----------+------+-------+------------+-----------+-------+
+
+
+5. IO and GT Specific
+---------------------
+
+-----------------------------+------+-------+------------+-----------+-------+
+|          Site Type          | Used | Fixed | Prohibited | Available | Util% |
+-----------------------------+------+-------+------------+-----------+-------+
+| Bonded IOB                  |    0 |     0 |          0 |       400 |  0.00 |
+| Bonded IPADs                |    0 |     0 |          0 |        26 |  0.00 |
+| Bonded OPADs                |    0 |     0 |          0 |        16 |  0.00 |
+| PHY_CONTROL                 |    0 |     0 |          0 |         8 |  0.00 |
+| PHASER_REF                  |    0 |     0 |          0 |         8 |  0.00 |
+| OUT_FIFO                    |    0 |     0 |          0 |        32 |  0.00 |
+| IN_FIFO                     |    0 |     0 |          0 |        32 |  0.00 |
+| IDELAYCTRL                  |    0 |     0 |          0 |         8 |  0.00 |
+| IBUFDS                      |    0 |     0 |          0 |       384 |  0.00 |
+| GTXE2_COMMON                |    0 |     0 |          0 |         2 |  0.00 |
+| GTXE2_CHANNEL               |    0 |     0 |          0 |         8 |  0.00 |
+| PHASER_OUT/PHASER_OUT_PHY   |    0 |     0 |          0 |        32 |  0.00 |
+| PHASER_IN/PHASER_IN_PHY     |    0 |     0 |          0 |        32 |  0.00 |
+| IDELAYE2/IDELAYE2_FINEDELAY |    0 |     0 |          0 |       400 |  0.00 |
+| ODELAYE2/ODELAYE2_FINEDELAY |    0 |     0 |          0 |       150 |  0.00 |
+| IBUFDS_GTE2                 |    0 |     0 |          0 |         4 |  0.00 |
+| ILOGIC                      |    0 |     0 |          0 |       400 |  0.00 |
+| OLOGIC                      |    0 |     0 |          0 |       400 |  0.00 |
+-----------------------------+------+-------+------------+-----------+-------+
+
+
+6. Clocking
+-----------
+
+------------+------+-------+------------+-----------+-------+
+|  Site Type | Used | Fixed | Prohibited | Available | Util% |
+------------+------+-------+------------+-----------+-------+
+| BUFGCTRL   |    0 |     0 |          0 |        32 |  0.00 |
+| BUFIO      |    0 |     0 |          0 |        32 |  0.00 |
+| MMCME2_ADV |    0 |     0 |          0 |         8 |  0.00 |
+| PLLE2_ADV  |    0 |     0 |          0 |         8 |  0.00 |
+| BUFMRCE    |    0 |     0 |          0 |        16 |  0.00 |
+| BUFHCE     |    0 |     0 |          0 |       120 |  0.00 |
+| BUFR       |    0 |     0 |          0 |        32 |  0.00 |
+------------+------+-------+------------+-----------+-------+
+
+
+7. Specific Feature
+-------------------
+
+-------------+------+-------+------------+-----------+-------+
+|  Site Type  | Used | Fixed | Prohibited | Available | Util% |
+-------------+------+-------+------------+-----------+-------+
+| BSCANE2     |    0 |     0 |          0 |         4 |  0.00 |
+| CAPTUREE2   |    0 |     0 |          0 |         1 |  0.00 |
+| DNA_PORT    |    0 |     0 |          0 |         1 |  0.00 |
+| EFUSE_USR   |    0 |     0 |          0 |         1 |  0.00 |
+| FRAME_ECCE2 |    0 |     0 |          0 |         1 |  0.00 |
+| ICAPE2      |    0 |     0 |          0 |         2 |  0.00 |
+| PCIE_2_1    |    0 |     0 |          0 |         1 |  0.00 |
+| STARTUPE2   |    0 |     0 |          0 |         1 |  0.00 |
+| XADC        |    0 |     0 |          0 |         1 |  0.00 |
+-------------+------+-------+------------+-----------+-------+
+
+
+8. Primitives
+-------------
+
+----------+------+---------------------+
+| Ref Name | Used | Functional Category |
+----------+------+---------------------+
+| LUT5     |  995 |                 LUT |
+| LUT6     |  950 |                 LUT |
+| LUT3     |  900 |                 LUT |
+| LUT2     |  874 |                 LUT |
+| CARRY4   |  681 |          CarryLogic |
+| FDRE     |  563 |        Flop & Latch |
+| LUT4     |  260 |                 LUT |
+| LUT1     |  228 |                 LUT |
+| RAMB36E1 |   32 |        Block Memory |
+| RAMB18E1 |    4 |        Block Memory |
+----------+------+---------------------+
+
+
+9. Black Boxes
+--------------
+
+----------+------+
+| Ref Name | Used |
+----------+------+
+
+
+10. Instantiated Netlists
+-------------------------
+
+----------+------+
+| Ref Name | Used |
+----------+------+
+
+
--- a/synth/filter_vivado.runs/impl_1/gen_run.xml
+++ b/synth/filter_vivado.runs/impl_1/gen_run.xml
@ -0,0 +1,166 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<GenRun Id="impl_1" LaunchPart="xc7k160tffv676-1" LaunchTime="1701625891">
+  <File Type="ROUTE-RQS-RPT" Name="route_report_qor_suggestions_0.rpt"/>
+  <File Type="POSTROUTE-PHYSOPT-RQS" Name="filter_postroute_physopted.rqs"/>
+  <File Type="ROUTE-RQS" Name="filter_routed.rqs"/>
+  <File Type="WBT-USG" Name="usage_statistics_webtalk.html"/>
+  <File Type="BG-BGN" Name="filter.bgn"/>
+  <File Type="BITSTR-SYSDEF" Name="filter.sysdef"/>
+  <File Type="BITSTR-LTX" Name="debug_nets.ltx"/>
+  <File Type="BITSTR-LTX" Name="filter.ltx"/>
+  <File Type="RBD_FILE" Name="filter.rbd"/>
+  <File Type="NPI_FILE" Name="filter.npi"/>
+  <File Type="RNPI_FILE" Name="filter.rnpi"/>
+  <File Type="CFI_FILE" Name="filter.cfi"/>
+  <File Type="RCFI_FILE" Name="filter.rcfi"/>
+  <File Type="PL-PDI-FILE" Name="filter_pld.pdi"/>
+  <File Type="BOOT-PDI-FILE" Name="filter_boot.pdi"/>
+  <File Type="RDI-RDI" Name="filter.vdi"/>
+  <File Type="PDI-FILE" Name="filter.pdi"/>
+  <File Type="BITSTR-MMI" Name="filter.mmi"/>
+  <File Type="BITSTR-BMM" Name="filter_bd.bmm"/>
+  <File Type="BITSTR-NKY" Name="filter.nky"/>
+  <File Type="BITSTR-RBT" Name="filter.rbt"/>
+  <File Type="BITSTR-MSK" Name="filter.msk"/>
+  <File Type="BG-BIN" Name="filter.bin"/>
+  <File Type="POSTROUTE-PHYSOPT-RQS-RPT" Name="postroute_physopt_report_qor_suggestions_0.rpt"/>
+  <File Type="BG-BIT" Name="filter.bit"/>
+  <File Type="POSTROUTE-PHYSOPT-BUS-SKEW-RPX" Name="filter_bus_skew_postroute_physopted.rpx"/>
+  <File Type="POSTROUTE-PHYSOPT-BUS-SKEW-PB" Name="filter_bus_skew_postroute_physopted.pb"/>
+  <File Type="POSTROUTE-PHYSOPT-BUS-SKEW" Name="filter_bus_skew_postroute_physopted.rpt"/>
+  <File Type="POSTROUTE-PHYSOPT-TIMING-RPX" Name="filter_timing_summary_postroute_physopted.rpx"/>
+  <File Type="POSTROUTE-PHYSOPT-TIMING-PB" Name="filter_timing_summary_postroute_physopted.pb"/>
+  <File Type="POSTROUTE-PHYSOPT-TIMING" Name="filter_timing_summary_postroute_physopted.rpt"/>
+  <File Type="POSTROUTE-PHYSOPT-BLACKBOX-DCP" Name="filter_postroute_physopt_bb.dcp"/>
+  <File Type="POSTROUTE-PHYSOPT-DCP" Name="filter_postroute_physopt.dcp"/>
+  <File Type="BG-DRC" Name="filter.drc"/>
+  <File Type="ROUTE-RQS-PB" Name="filter_rqs_routed.pb"/>
+  <File Type="ROUTE-BUS-SKEW-RPX" Name="filter_bus_skew_routed.rpx"/>
+  <File Type="ROUTE-BUS-SKEW-PB" Name="filter_bus_skew_routed.pb"/>
+  <File Type="ROUTE-BUS-SKEW" Name="filter_bus_skew_routed.rpt"/>
+  <File Type="ROUTE-CLK" Name="filter_clock_utilization_routed.rpt"/>
+  <File Type="ROUTE-SIMILARITY" Name="filter_incremental_reuse_routed.rpt"/>
+  <File Type="ROUTE-TIMING-RPX" Name="filter_timing_summary_routed.rpx"/>
+  <File Type="ROUTE-TIMING-PB" Name="filter_timing_summary_routed.pb"/>
+  <File Type="ROUTE-TIMINGSUMMARY" Name="filter_timing_summary_routed.rpt"/>
+  <File Type="ROUTE-STATUS-PB" Name="filter_route_status.pb"/>
+  <File Type="ROUTE-STATUS" Name="filter_route_status.rpt"/>
+  <File Type="ROUTE-PWR-RPX" Name="filter_power_routed.rpx"/>
+  <File Type="ROUTE-PWR-SUM" Name="filter_power_summary_routed.pb"/>
+  <File Type="ROUTE-PWR" Name="filter_power_routed.rpt"/>
+  <File Type="ROUTE-METHODOLOGY-DRC-PB" Name="filter_methodology_drc_routed.pb"/>
+  <File Type="ROUTE-METHODOLOGY-DRC-RPX" Name="filter_methodology_drc_routed.rpx"/>
+  <File Type="ROUTE-METHODOLOGY-DRC" Name="filter_methodology_drc_routed.rpt"/>
+  <File Type="ROUTE-DRC-RPX" Name="filter_drc_routed.rpx"/>
+  <File Type="ROUTE-DRC-PB" Name="filter_drc_routed.pb"/>
+  <File Type="ROUTE-DRC" Name="filter_drc_routed.rpt"/>
+  <File Type="ROUTE-BLACKBOX-DCP" Name="filter_routed_bb.dcp"/>
+  <File Type="ROUTE-DCP" Name="filter_routed.dcp"/>
+  <File Type="ROUTE-ERROR-DCP" Name="filter_routed_error.dcp"/>
+  <File Type="PHYSOPT-TIMING" Name="filter_timing_summary_physopted.rpt"/>
+  <File Type="PHYSOPT-DRC" Name="filter_drc_physopted.rpt"/>
+  <File Type="PHYSOPT-DCP" Name="filter_physopt.dcp"/>
+  <File Type="POSTPLACE-PWROPT-TIMING" Name="filter_timing_summary_postplace_pwropted.rpt"/>
+  <File Type="POSTPLACE-PWROPT-DCP" Name="filter_postplace_pwropt.dcp"/>
+  <File Type="PLACE-RQA-PB" Name="filter_rqa_placed.pb"/>
+  <File Type="PLACE-TIMING" Name="filter_timing_summary_placed.rpt"/>
+  <File Type="PLACE-PRE-SIMILARITY" Name="filter_incremental_reuse_pre_placed.rpt"/>
+  <File Type="PLACE-SIMILARITY" Name="filter_incremental_reuse_placed.rpt"/>
+  <File Type="PLACE-CTRL" Name="filter_control_sets_placed.rpt"/>
+  <File Type="PLACE-UTIL-PB" Name="filter_utilization_placed.pb"/>
+  <File Type="PLACE-UTIL" Name="filter_utilization_placed.rpt"/>
+  <File Type="PLACE-CLK" Name="filter_clock_utilization_placed.rpt"/>
+  <File Type="PLACE-IO" Name="filter_io_placed.rpt"/>
+  <File Type="PLACE-DCP" Name="filter_placed.dcp"/>
+  <File Type="PWROPT-TIMING" Name="filter_timing_summary_pwropted.rpt"/>
+  <File Type="PWROPT-DRC" Name="filter_drc_pwropted.rpt"/>
+  <File Type="PWROPT-DCP" Name="filter_pwropt.dcp"/>
+  <File Type="OPT-RQA-PB" Name="filter_rqa_opted.pb"/>
+  <File Type="OPT-HWDEF" Name="filter.hwdef"/>
+  <File Type="OPT-METHODOLOGY-DRC" Name="filter_methodology_drc_opted.rpt"/>
+  <File Type="OPT-DRC" Name="filter_drc_opted.rpt"/>
+  <File Type="OPT-DCP" Name="filter_opt.dcp"/>
+  <File Type="OPT-TIMING" Name="filter_timing_summary_opted.rpt"/>
+  <File Type="REPORTS-TCL" Name="filter_reports.tcl"/>
+  <File Type="INIT-TIMING" Name="filter_timing_summary_init.rpt"/>
+  <File Type="PA-TCL" Name="filter.tcl"/>
+  <FileSet Name="sources" Type="DesignSrcs" RelSrcDir="$PSRCDIR/sources_1" RelGenDir="$PGENDIR/sources_1">
+    <Filter Type="Srcs"/>
+    <File Path="$PPRDIR/../comp/functions.vhd">
+      <FileInfo SFType="VHDL2008">
+        <Attr Name="UsedIn" Val="synthesis"/>
+        <Attr Name="UsedIn" Val="simulation"/>
+      </FileInfo>
+    </File>
+    <File Path="$PPRDIR/../comp/block_memory.vhd">
+      <FileInfo SFType="VHDL2008">
+        <Attr Name="UsedIn" Val="synthesis"/>
+        <Attr Name="UsedIn" Val="simulation"/>
+      </FileInfo>
+    </File>
+    <File Path="$PPRDIR/../filter_ent.vhd">
+      <FileInfo SFType="VHDL2008">
+        <Attr Name="UsedIn" Val="synthesis"/>
+        <Attr Name="UsedIn" Val="simulation"/>
+      </FileInfo>
+    </File>
+    <File Path="$PPRDIR/../comp/jenkins_mix.vhd">
+      <FileInfo SFType="VHDL2008">
+        <Attr Name="UsedIn" Val="synthesis"/>
+        <Attr Name="UsedIn" Val="simulation"/>
+      </FileInfo>
+    </File>
+    <File Path="$PPRDIR/../comp/jenkins_final.vhd">
+      <FileInfo SFType="VHDL2008">
+        <Attr Name="UsedIn" Val="synthesis"/>
+        <Attr Name="UsedIn" Val="simulation"/>
+      </FileInfo>
+    </File>
+    <File Path="$PPRDIR/../comp/jenkins_hash.vhd">
+      <FileInfo SFType="VHDL2008">
+        <Attr Name="UsedIn" Val="synthesis"/>
+        <Attr Name="UsedIn" Val="simulation"/>
+      </FileInfo>
+    </File>
+    <File Path="$PPRDIR/../filter.vhd">
+      <FileInfo SFType="VHDL2008">
+        <Attr Name="UsedIn" Val="synthesis"/>
+        <Attr Name="UsedIn" Val="simulation"/>
+      </FileInfo>
+    </File>
+    <Config>
+      <Option Name="DesignMode" Val="RTL"/>
+      <Option Name="TopModule" Val="filter"/>
+    </Config>
+  </FileSet>
+  <FileSet Name="constrs_in" Type="Constrs" RelSrcDir="$PSRCDIR/constrs_1" RelGenDir="$PGENDIR/constrs_1">
+    <Filter Type="Constrs"/>
+    <File Path="$PPRDIR/filter.xdc">
+      <FileInfo>
+        <Attr Name="UsedIn" Val="synthesis"/>
+        <Attr Name="UsedIn" Val="implementation"/>
+      </FileInfo>
+    </File>
+    <Config>
+      <Option Name="ConstrsType" Val="XDC"/>
+    </Config>
+  </FileSet>
+  <FileSet Name="utils" Type="Utils" RelSrcDir="$PSRCDIR/utils_1" RelGenDir="$PGENDIR/utils_1">
+    <Filter Type="Utils"/>
+    <Config>
+      <Option Name="TopAutoSet" Val="TRUE"/>
+    </Config>
+  </FileSet>
+  <Strategy Version="1" Minor="2">
+    <StratHandle Name="Vivado Implementation Defaults" Flow="Vivado Implementation 2023"/>
+    <Step Id="init_design"/>
+    <Step Id="opt_design"/>
+    <Step Id="power_opt_design"/>
+    <Step Id="place_design"/>
+    <Step Id="post_place_power_opt_design"/>
+    <Step Id="phys_opt_design"/>
+    <Step Id="route_design"/>
+    <Step Id="post_route_phys_opt_design"/>
+    <Step Id="write_bitstream"/>
+  </Strategy>
+</GenRun>
--- a/synth/filter_vivado.runs/impl_1/htr.txt
+++ b/synth/filter_vivado.runs/impl_1/htr.txt
@ -0,0 +1,10 @@
+#
+# Vivado(TM)
+# htr.txt: a Vivado-generated description of how-to-repeat the
+#          the basic steps of a run.  Note that runme.bat/sh needs
+#          to be invoked for Vivado to track run status.
+# Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
+# Copyright 2022-2023 Advanced Micro Devices, Inc. All Rights Reserved.
+#
+
+vivado -log filter.vdi -applog -m64 -product Vivado -messageDb vivado.pb -mode batch -source filter.tcl -notrace
--- a/synth/filter_vivado.runs/impl_1/init_design.pb
+++ b/synth/filter_vivado.runs/impl_1/init_design.pb
--- a/synth/filter_vivado.runs/impl_1/opt_design.pb
+++ b/synth/filter_vivado.runs/impl_1/opt_design.pb
--- a/synth/filter_vivado.runs/impl_1/opt_design_reports.log
+++ b/synth/filter_vivado.runs/impl_1/opt_design_reports.log
@ -0,0 +1,41 @@
+
+*** Running vivado
+    with args -m64 -nolog -nojournal -notrace -mode batch -product Vivado -source filter_reports.tcl -tclargs opt_design
+
+
+****** Vivado v2023.2 (64-bit)
+  **** SW Build 4029153 on Fri Oct 13 20:13:54 MDT 2023
+  **** IP Build 4028589 on Sat Oct 14 00:45:43 MDT 2023
+  **** SharedData Build 4025554 on Tue Oct 10 17:18:54 MDT 2023
+    ** Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
+    ** Copyright 2022-2023 Advanced Micro Devices, Inc. All Rights Reserved.
+
+source filter_reports.tcl -notrace
+Command: open_checkpoint filter_opt.dcp
+
+Starting open_checkpoint Task
+
+Time (s): cpu = 00:00:00.06 ; elapsed = 00:00:00.06 . Memory (MB): peak = 1242.316 ; gain = 0.000 ; free physical = 206 ; free virtual = 6416
+INFO: [Device 21-403] Loading part xc7k160tffv676-1
+Netlist sorting complete. Time (s): cpu = 00:00:00.06 ; elapsed = 00:00:00.06 . Memory (MB): peak = 1629.965 ; gain = 0.000 ; free physical = 208 ; free virtual = 7125
+INFO: [Netlist 29-17] Analyzing 717 Unisim elements for replacement
+INFO: [Netlist 29-28] Unisim Transformation completed in 0 CPU seconds
+INFO: [Project 1-479] Netlist was created with Vivado 2023.2
+INFO: [Project 1-570] Preparing netlist for logic optimization
+Read ShapeDB Complete: Time (s): cpu = 00:00:00.01 ; elapsed = 00:00:00.03 . Memory (MB): peak = 1706.652 ; gain = 1.000 ; free physical = 224 ; free virtual = 7060
+INFO: [Timing 38-478] Restoring timing data from binary archive.
+INFO: [Timing 38-479] Binary timing data restore complete.
+INFO: [Project 1-856] Restoring constraints from binary archive.
+INFO: [Project 1-853] Binary constraint restore complete.
+Netlist sorting complete. Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 2311.262 ; gain = 0.000 ; free physical = 124 ; free virtual = 6613
+INFO: [Project 1-111] Unisim Transformation Summary:
+No Unisim elements were transformed.
+
+INFO: [Project 1-604] Checkpoint was created with Vivado v2023.2 (64-bit) build 4029153
+open_checkpoint: Time (s): cpu = 00:00:33 ; elapsed = 00:00:35 . Memory (MB): peak = 2311.297 ; gain = 1068.980 ; free physical = 119 ; free virtual = 6616
+INFO: [runtcl-4] Executing : report_timing_summary -max_paths 10 -report_unconstrained -file filter_timing_summary_opted.rpt -pb filter_timing_summary_opted.pb -rpx filter_timing_summary_opted.rpx
+INFO: [Timing 38-91] UpdateTimingParams: Speed grade: -1, Delay Type: min_max.
+INFO: [Timing 38-191] Multithreading enabled for timing update using a maximum of 4 CPUs
+WARNING: [Timing 38-242] The property HD.CLK_SRC of clock port "CLK" is not set. In out-of-context mode, this prevents timing estimation for clock delay/skew
+Resolution: Set the HD.CLK_SRC property of the out-of-context port to the location of the clock buffer instance in the top-level design
+INFO: [Common 17-206] Exiting Vivado at Sun Dec  3 19:06:34 2023...
--- a/synth/filter_vivado.runs/impl_1/phys_opt_design.pb
+++ b/synth/filter_vivado.runs/impl_1/phys_opt_design.pb
--- a/synth/filter_vivado.runs/impl_1/place_design.pb
+++ b/synth/filter_vivado.runs/impl_1/place_design.pb
--- a/synth/filter_vivado.runs/impl_1/project.wdf
+++ b/synth/filter_vivado.runs/impl_1/project.wdf
@ -0,0 +1,31 @@
+version:1
+70726f6a656374:76697661646f5f75736167655c70726f6a6563745f64617461:737263736574636f756e74:37:00:00
+70726f6a656374:76697661646f5f75736167655c70726f6a6563745f64617461:636f6e73747261696e74736574636f756e74:31:00:00
+70726f6a656374:76697661646f5f75736167655c70726f6a6563745f64617461:64657369676e6d6f6465:52544c:00:00
+70726f6a656374:76697661646f5f75736167655c70726f6a6563745f64617461:73796e7468657369737374726174656779:56697661646f2053796e7468657369732044656661756c7473:00:00
+70726f6a656374:76697661646f5f75736167655c70726f6a6563745f64617461:696d706c7374726174656779:56697661646f20496d706c656d656e746174696f6e2044656661756c7473:00:00
+70726f6a656374:76697661646f5f75736167655c70726f6a6563745f64617461:63757272656e7473796e74686573697372756e:73796e74685f31:00:00
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+70726f6a656374:76697661646f5f75736167655c70726f6a6563745f64617461:746f74616c73796e74686573697372756e73:31:00:00
+70726f6a656374:76697661646f5f75736167655c70726f6a6563745f64617461:746f74616c696d706c72756e73:31:00:00
+70726f6a656374:76697661646f5f75736167655c70726f6a6563745f64617461:636f72655f636f6e7461696e6572:66616c7365:00:00
+70726f6a656374:76697661646f5f75736167655c70726f6a6563745f64617461:73696d756c61746f725f6c616e6775616765:4d69786564:00:00
+70726f6a656374:76697661646f5f75736167655c70726f6a6563745f64617461:7461726765745f6c616e6775616765:5648444c:00:00
+70726f6a656374:76697661646f5f75736167655c70726f6a6563745f64617461:64656661756c745f6c696272617279:78696c5f64656661756c746c6962:00:00
+70726f6a656374:76697661646f5f75736167655c70726f6a6563745f64617461:7461726765745f73696d756c61746f72:5853696d:00:00
+70726f6a656374:76697661646f5f75736167655c70726f6a6563745f64617461:6c61756e63685f73696d756c6174696f6e5f7873696d:30:00:00
+70726f6a656374:76697661646f5f75736167655c70726f6a6563745f64617461:6c61756e63685f73696d756c6174696f6e5f6d6f64656c73696d:30:00:00
+70726f6a656374:76697661646f5f75736167655c70726f6a6563745f64617461:6c61756e63685f73696d756c6174696f6e5f717565737461:30:00:00
+70726f6a656374:76697661646f5f75736167655c70726f6a6563745f64617461:6c61756e63685f73696d756c6174696f6e5f696573:30:00:00
+70726f6a656374:76697661646f5f75736167655c70726f6a6563745f64617461:6c61756e63685f73696d756c6174696f6e5f766373:30:00:00
+70726f6a656374:76697661646f5f75736167655c70726f6a6563745f64617461:6c61756e63685f73696d756c6174696f6e5f72697669657261:30:00:00
+70726f6a656374:76697661646f5f75736167655c70726f6a6563745f64617461:6c61756e63685f73696d756c6174696f6e5f61637469766568646c:30:00:00
+70726f6a656374:76697661646f5f75736167655c70726f6a6563745f64617461:6578706f72745f73696d756c6174696f6e5f7873696d:30:00:00
+70726f6a656374:76697661646f5f75736167655c70726f6a6563745f64617461:6578706f72745f73696d756c6174696f6e5f6d6f64656c73696d:30:00:00
+70726f6a656374:76697661646f5f75736167655c70726f6a6563745f64617461:6578706f72745f73696d756c6174696f6e5f717565737461:30:00:00
+70726f6a656374:76697661646f5f75736167655c70726f6a6563745f64617461:6578706f72745f73696d756c6174696f6e5f696573:30:00:00
+70726f6a656374:76697661646f5f75736167655c70726f6a6563745f64617461:6578706f72745f73696d756c6174696f6e5f766373:30:00:00
+70726f6a656374:76697661646f5f75736167655c70726f6a6563745f64617461:6578706f72745f73696d756c6174696f6e5f72697669657261:30:00:00
+70726f6a656374:76697661646f5f75736167655c70726f6a6563745f64617461:6578706f72745f73696d756c6174696f6e5f61637469766568646c:30:00:00
+5f5f48494444454e5f5f:5f5f48494444454e5f5f:50726f6a65637455554944:3566643632386632633138353432663961623136653661643866623536373363:506172656e742050412070726f6a656374204944:00
+eof:3523505476
--- a/synth/filter_vivado.runs/impl_1/route_design.pb
+++ b/synth/filter_vivado.runs/impl_1/route_design.pb
--- a/synth/filter_vivado.runs/impl_1/route_design_reports.bat
+++ b/synth/filter_vivado.runs/impl_1/route_design_reports.bat
@ -0,0 +1,12 @@
+@echo off
+
+rem  Vivado (TM)
+rem  route_design_reports.bat: a Vivado-generated Script
+rem  Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
+rem  Copyright 2022-2023 Advanced Micro Devices, Inc. All Rights Reserved.
+
+
+set HD_SDIR=%~dp0
+cd /d "%HD_SDIR%"
+set PATH=%SYSTEMROOT%\system32;%PATH%
+cscript /nologo /E:JScript "%HD_SDIR%\route_design_reports.js" %*
--- a/synth/filter_vivado.runs/impl_1/route_design_reports.js
+++ b/synth/filter_vivado.runs/impl_1/route_design_reports.js
@ -0,0 +1,41 @@
+//
+// Vivado(TM)
+// route_design_reports.js: a Vivado-generated reports generation script for WSH 5.1/5.6
+// Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
+// Copyright 2022-2023 Advanced Micro Devices, Inc. All Rights Reserved.
+//
+
+echo "This script was generated under a different operating system."
+echo "Please update the PATH variable below, before executing this script"
+exit
+
+var WshShell = new ActiveXObject( "WScript.Shell" );
+var ProcEnv = WshShell.Environment( "Process" );
+var PathVal = ProcEnv("PATH");
+if ( PathVal.length == 0 ) {
+  PathVal = "/tools/Xilinx/Vivado/2023.2/ids_lite/ISE/bin/lin64;/tools/Xilinx/Vivado/2023.2/bin;";
+} else {
+  PathVal = "/tools/Xilinx/Vivado/2023.2/ids_lite/ISE/bin/lin64;/tools/Xilinx/Vivado/2023.2/bin;" + PathVal;
+}
+
+ProcEnv("PATH") = PathVal;
+
+var RDScrFP = WScript.ScriptFullName;
+var RDScrN = WScript.ScriptName;
+var RDScrDir = RDScrFP.substr( 0, RDScrFP.length - RDScrN.length - 1 );
+var ISEJScriptLib = RDScrDir + "/ISEWrapReports.js";
+eval( EAInclude(ISEJScriptLib) );
+
+
+ISEStep( "vivado",
+         " -m64 -nolog -nojournal -notrace -mode batch -product Vivado -source filter_reports.tcl -tclargs route_design" );
+
+
+
+function EAInclude( EAInclFilename ) {
+  var EAFso = new ActiveXObject( "Scripting.FileSystemObject" );
+  var EAInclFile = EAFso.OpenTextFile( EAInclFilename );
+  var EAIFContents = EAInclFile.ReadAll();
+  EAInclFile.Close();
+  return EAIFContents;
+}
--- a/synth/filter_vivado.runs/impl_1/route_design_reports.sh
+++ b/synth/filter_vivado.runs/impl_1/route_design_reports.sh
@ -0,0 +1,40 @@
+#!/bin/sh
+
+# 
+# Vivado(TM)
+# route_design_reports.sh: a Vivado-generated reports generation script for UNIX
+# Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
+# Copyright 2022-2023 Advanced Micro Devices, Inc. All Rights Reserved.
+# 
+
+if [ -z "$PATH" ]; then
+  PATH=/tools/Xilinx/Vivado/2023.2/ids_lite/ISE/bin/lin64:/tools/Xilinx/Vivado/2023.2/bin
+else
+  PATH=/tools/Xilinx/Vivado/2023.2/ids_lite/ISE/bin/lin64:/tools/Xilinx/Vivado/2023.2/bin:$PATH
+fi
+export PATH
+
+if [ -z "$LD_LIBRARY_PATH" ]; then
+  LD_LIBRARY_PATH=
+else
+  LD_LIBRARY_PATH=:$LD_LIBRARY_PATH
+fi
+export LD_LIBRARY_PATH
+
+HD_PWD='/home/veronikaplevacova/Plocha/PCS2/synth/filter_vivado.runs/impl_1'
+cd "$HD_PWD"
+
+HD_LOG=route_design_reports.log
+/bin/touch $HD_LOG
+
+ISEStep="./ISEWrapReports.sh"
+EAStep()
+{
+     $ISEStep $HD_LOG "$@" >> $HD_LOG 2>&1
+     if [ $? -ne 0 ]
+     then
+         exit
+     fi
+}
+
+EAStep vivado -m64 -nolog -nojournal -notrace -mode batch -product Vivado -source filter_reports.tcl -tclargs route_design
--- a/synth/filter_vivado.runs/impl_1/rundef.js
+++ b/synth/filter_vivado.runs/impl_1/rundef.js
@ -0,0 +1,45 @@
+//
+// Vivado(TM)
+// rundef.js: a Vivado-generated Runs Script for WSH 5.1/5.6
+// Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
+// Copyright 2022-2023 Advanced Micro Devices, Inc. All Rights Reserved.
+//
+
+echo "This script was generated under a different operating system."
+echo "Please update the PATH variable below, before executing this script"
+exit
+
+var WshShell = new ActiveXObject( "WScript.Shell" );
+var ProcEnv = WshShell.Environment( "Process" );
+var PathVal = ProcEnv("PATH");
+if ( PathVal.length == 0 ) {
+  PathVal = "/tools/Xilinx/Vivado/2023.2/ids_lite/ISE/bin/lin64;/tools/Xilinx/Vivado/2023.2/bin;";
+} else {
+  PathVal = "/tools/Xilinx/Vivado/2023.2/ids_lite/ISE/bin/lin64;/tools/Xilinx/Vivado/2023.2/bin;" + PathVal;
+}
+
+ProcEnv("PATH") = PathVal;
+
+var RDScrFP = WScript.ScriptFullName;
+var RDScrN = WScript.ScriptName;
+var RDScrDir = RDScrFP.substr( 0, RDScrFP.length - RDScrN.length - 1 );
+var ISEJScriptLib = RDScrDir + "/ISEWrap.js";
+eval( EAInclude(ISEJScriptLib) );
+
+
+// pre-commands:
+ISETouchFile( "init_design", "begin" );
+ISEStep( "vivado",
+         "-log filter.vdi -applog -m64 -product Vivado -messageDb vivado.pb -mode batch -source filter.tcl -notrace" );
+
+
+
+
+
+function EAInclude( EAInclFilename ) {
+  var EAFso = new ActiveXObject( "Scripting.FileSystemObject" );
+  var EAInclFile = EAFso.OpenTextFile( EAInclFilename );
+  var EAIFContents = EAInclFile.ReadAll();
+  EAInclFile.Close();
+  return EAIFContents;
+}
--- a/synth/filter_vivado.runs/impl_1/runme.bat
+++ b/synth/filter_vivado.runs/impl_1/runme.bat
@ -0,0 +1,12 @@
+@echo off
+
+rem  Vivado (TM)
+rem  runme.bat: a Vivado-generated Script
+rem  Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
+rem  Copyright 2022-2023 Advanced Micro Devices, Inc. All Rights Reserved.
+
+
+set HD_SDIR=%~dp0
+cd /d "%HD_SDIR%"
+set PATH=%SYSTEMROOT%\system32;%PATH%
+cscript /nologo /E:JScript "%HD_SDIR%\rundef.js" %*
--- a/synth/filter_vivado.runs/impl_1/runme.log
+++ b/synth/filter_vivado.runs/impl_1/runme.log
--- a/synth/filter_vivado.runs/impl_1/runme.sh
+++ b/synth/filter_vivado.runs/impl_1/runme.sh
@ -0,0 +1,44 @@
+#!/bin/sh
+
+# 
+# Vivado(TM)
+# runme.sh: a Vivado-generated Runs Script for UNIX
+# Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
+# Copyright 2022-2023 Advanced Micro Devices, Inc. All Rights Reserved.
+# 
+
+if [ -z "$PATH" ]; then
+  PATH=/tools/Xilinx/Vivado/2023.2/ids_lite/ISE/bin/lin64:/tools/Xilinx/Vivado/2023.2/bin
+else
+  PATH=/tools/Xilinx/Vivado/2023.2/ids_lite/ISE/bin/lin64:/tools/Xilinx/Vivado/2023.2/bin:$PATH
+fi
+export PATH
+
+if [ -z "$LD_LIBRARY_PATH" ]; then
+  LD_LIBRARY_PATH=
+else
+  LD_LIBRARY_PATH=:$LD_LIBRARY_PATH
+fi
+export LD_LIBRARY_PATH
+
+HD_PWD='/home/veronikaplevacova/Plocha/PCS2/synth/filter_vivado.runs/impl_1'
+cd "$HD_PWD"
+
+HD_LOG=runme.log
+/bin/touch $HD_LOG
+
+ISEStep="./ISEWrap.sh"
+EAStep()
+{
+     $ISEStep $HD_LOG "$@" >> $HD_LOG 2>&1
+     if [ $? -ne 0 ]
+     then
+         exit
+     fi
+}
+
+# pre-commands:
+/bin/touch .init_design.begin.rst
+EAStep vivado -log filter.vdi -applog -m64 -product Vivado -messageDb vivado.pb -mode batch -source filter.tcl -notrace
+
+
--- a/synth/filter_vivado.runs/impl_1/vivado.jou
+++ b/synth/filter_vivado.runs/impl_1/vivado.jou
@ -0,0 +1,14 @@
+#-----------------------------------------------------------
+# Vivado v2023.2 (64-bit)
+# SW Build 4029153 on Fri Oct 13 20:13:54 MDT 2023
+# IP Build 4028589 on Sat Oct 14 00:45:43 MDT 2023
+# SharedData Build 4025554 on Tue Oct 10 17:18:54 MDT 2023
+# Start of session at: Sun Dec  3 18:51:36 2023
+# Process ID: 19329
+# Current directory: /home/veronikaplevacova/Plocha/PCS2/synth/filter_vivado.runs/impl_1
+# Command line: vivado -log filter.vdi -applog -product Vivado -messageDb vivado.pb -mode batch -source filter.tcl -notrace
+# Log file: /home/veronikaplevacova/Plocha/PCS2/synth/filter_vivado.runs/impl_1/filter.vdi
+# Journal file: /home/veronikaplevacova/Plocha/PCS2/synth/filter_vivado.runs/impl_1/vivado.jou
+# Running On: veronika-swiftsf11433, OS: Linux, CPU Frequency: 2785.745 MHz, CPU Physical cores: 4, Host memory: 3903 MB
+#-----------------------------------------------------------
+source filter.tcl -notrace
--- a/synth/filter_vivado.runs/impl_1/vivado.pb
+++ b/synth/filter_vivado.runs/impl_1/vivado.pb
--- a/synth/filter_vivado.runs/synth_1/.Vivado_Synthesis.queue.rst
+++ b/synth/filter_vivado.runs/synth_1/.Vivado_Synthesis.queue.rst
--- a/synth/filter_vivado.runs/synth_1/.vivado.begin.rst
+++ b/synth/filter_vivado.runs/synth_1/.vivado.begin.rst
@ -0,0 +1,5 @@
+<?xml version="1.0"?>
+<ProcessHandle Version="1" Minor="0">
+    <Process Command="vivado" Owner="veronikaplevacova" Host="veronika-swiftsf11433" Pid="18691" HostCore="4" HostMemory="3812172">
+    </Process>
+</ProcessHandle>
--- a/synth/filter_vivado.runs/synth_1/.vivado.end.rst
+++ b/synth/filter_vivado.runs/synth_1/.vivado.end.rst
--- a/synth/filter_vivado.runs/synth_1/ISEWrap.js
+++ b/synth/filter_vivado.runs/synth_1/ISEWrap.js
@ -0,0 +1,270 @@
+//
+//  Vivado(TM)
+//  ISEWrap.js: Vivado Runs Script for WSH 5.1/5.6
+//  Copyright 1986-2022 Xilinx, Inc. All Rights Reserved. 
+//  Copyright 2022-2023 Advanced Micro Devices, Inc. All Rights Reserved. 
+//
+
+// GLOBAL VARIABLES
+var ISEShell = new ActiveXObject( "WScript.Shell" );
+var ISEFileSys = new ActiveXObject( "Scripting.FileSystemObject" );
+var ISERunDir = "";
+var ISELogFile = "runme.log";
+var ISELogFileStr = null;
+var ISELogEcho = true;
+var ISEOldVersionWSH = false;
+
+
+
+// BOOTSTRAP
+ISEInit();
+
+
+
+//
+// ISE FUNCTIONS
+//
+function ISEInit() {
+
+  // 1. RUN DIR setup
+  var ISEScrFP = WScript.ScriptFullName;
+  var ISEScrN = WScript.ScriptName;
+  ISERunDir = 
+    ISEScrFP.substr( 0, ISEScrFP.length - ISEScrN.length - 1 );
+
+  // 2. LOG file setup
+  ISELogFileStr = ISEOpenFile( ISELogFile );
+
+  // 3. LOG echo?
+  var ISEScriptArgs = WScript.Arguments;
+  for ( var loopi=0; loopi<ISEScriptArgs.length; loopi++ ) {
+    if ( ISEScriptArgs(loopi) == "-quiet" ) {
+      ISELogEcho = false;
+      break;
+    }
+  }
+
+  // 4. WSH version check
+  var ISEOptimalVersionWSH = 5.6;
+  var ISECurrentVersionWSH = WScript.Version;
+  if ( ISECurrentVersionWSH < ISEOptimalVersionWSH ) {
+
+    ISEStdErr( "" );
+    ISEStdErr( "Warning: ExploreAhead works best with Microsoft WSH " +
+	       ISEOptimalVersionWSH + " or higher. Downloads" );
+    ISEStdErr( "         for upgrading your Windows Scripting Host can be found here: " );
+    ISEStdErr( "             http://msdn.microsoft.com/downloads/list/webdev.asp" );
+    ISEStdErr( "" );
+
+    ISEOldVersionWSH = true;
+  }
+
+}
+
+function ISEStep( ISEProg, ISEArgs ) {
+
+  // CHECK for a STOP FILE
+  if ( ISEFileSys.FileExists(ISERunDir + "/.stop.rst") ) {
+    ISEStdErr( "" );
+    ISEStdErr( "*** Halting run - EA reset detected ***" );
+    ISEStdErr( "" );
+    WScript.Quit( 1 );
+  }
+
+  // WRITE STEP HEADER to LOG
+  ISEStdOut( "" );
+  ISEStdOut( "*** Running " + ISEProg );
+  ISEStdOut( "    with args " + ISEArgs );
+  ISEStdOut( "" );
+
+  // LAUNCH!
+  var ISEExitCode = ISEExec( ISEProg, ISEArgs );  
+  if ( ISEExitCode != 0 ) {
+    WScript.Quit( ISEExitCode );
+  }
+
+}
+
+function ISEExec( ISEProg, ISEArgs ) {
+
+  var ISEStep = ISEProg;
+  if (ISEProg == "realTimeFpga" || ISEProg == "planAhead" || ISEProg == "vivado") {
+    ISEProg += ".bat";
+  }
+
+  var ISECmdLine = ISEProg + " " + ISEArgs;
+  var ISEExitCode = 1;
+
+  if ( ISEOldVersionWSH ) { // WSH 5.1
+
+    // BEGIN file creation
+    ISETouchFile( ISEStep, "begin" );
+
+    // LAUNCH!
+    ISELogFileStr.Close();
+    ISECmdLine = 
+      "%comspec% /c " + ISECmdLine + " >> " + ISELogFile + " 2>&1";
+    ISEExitCode = ISEShell.Run( ISECmdLine, 0, true );
+    ISELogFileStr = ISEOpenFile( ISELogFile );
+
+  } else {  // WSH 5.6
+
+    // LAUNCH!
+    ISEShell.CurrentDirectory = ISERunDir;
+
+    // Redirect STDERR to STDOUT
+    ISECmdLine = "%comspec% /c " + ISECmdLine + " 2>&1";
+    var ISEProcess = ISEShell.Exec( ISECmdLine );
+    
+    // BEGIN file creation
+    var wbemFlagReturnImmediately = 0x10;
+    var wbemFlagForwardOnly = 0x20;
+    var objWMIService = GetObject ("winmgmts:{impersonationLevel=impersonate, (Systemtime)}!//./root/cimv2");
+    var processor = objWMIService.ExecQuery("SELECT * FROM Win32_Processor", "WQL",wbemFlagReturnImmediately | wbemFlagForwardOnly);
+    var computerSystem = objWMIService.ExecQuery("SELECT * FROM Win32_ComputerSystem", "WQL", wbemFlagReturnImmediately | wbemFlagForwardOnly);
+    var NOC = 0;
+    var NOLP = 0;
+    var TPM = 0;
+    var cpuInfos = new Enumerator(processor);
+    for(;!cpuInfos.atEnd(); cpuInfos.moveNext()) {
+        var cpuInfo = cpuInfos.item();
+        NOC += cpuInfo.NumberOfCores;
+        NOLP += cpuInfo.NumberOfLogicalProcessors;
+    }
+    var csInfos = new Enumerator(computerSystem);
+    for(;!csInfos.atEnd(); csInfos.moveNext()) {
+        var csInfo = csInfos.item();
+        TPM += csInfo.TotalPhysicalMemory;
+    }
+
+    var ISEHOSTCORE = NOLP
+    var ISEMEMTOTAL = TPM
+
+    var ISENetwork = WScript.CreateObject( "WScript.Network" );
+    var ISEHost = ISENetwork.ComputerName;
+    var ISEUser = ISENetwork.UserName;
+    var ISEPid = ISEProcess.ProcessID;
+    var ISEBeginFile = ISEOpenFile( "." + ISEStep + ".begin.rst" );
+    ISEBeginFile.WriteLine( "<?xml version=\"1.0\"?>" );
+    ISEBeginFile.WriteLine( "<ProcessHandle Version=\"1\" Minor=\"0\">" );
+    ISEBeginFile.WriteLine( "    <Process Command=\"" + ISEProg + 
+			    "\" Owner=\"" + ISEUser + 
+			    "\" Host=\"" + ISEHost + 
+			    "\" Pid=\"" + ISEPid +
+			    "\" HostCore=\"" + ISEHOSTCORE +
+			    "\" HostMemory=\"" + ISEMEMTOTAL +
+			    "\">" );
+    ISEBeginFile.WriteLine( "    </Process>" );
+    ISEBeginFile.WriteLine( "</ProcessHandle>" );
+    ISEBeginFile.Close();
+    
+    var ISEOutStr = ISEProcess.StdOut;
+    var ISEErrStr = ISEProcess.StdErr;
+    
+    // WAIT for ISEStep to finish
+    while ( ISEProcess.Status == 0 ) {
+      
+      // dump stdout then stderr - feels a little arbitrary
+      while ( !ISEOutStr.AtEndOfStream ) {
+        ISEStdOut( ISEOutStr.ReadLine() );
+      }  
+      
+      WScript.Sleep( 100 );
+    }
+
+    ISEExitCode = ISEProcess.ExitCode;
+  }
+
+  ISELogFileStr.Close();
+
+  // END/ERROR file creation
+  if ( ISEExitCode != 0 ) {    
+    ISETouchFile( ISEStep, "error" );
+    
+  } else {
+    ISETouchFile( ISEStep, "end" );
+  }
+
+  return ISEExitCode;
+}
+
+
+//
+// UTILITIES
+//
+function ISEStdOut( ISELine ) {
+
+  ISELogFileStr.WriteLine( ISELine );
+  
+  if ( ISELogEcho ) {
+    WScript.StdOut.WriteLine( ISELine );
+  }
+}
+
+function ISEStdErr( ISELine ) {
+  
+  ISELogFileStr.WriteLine( ISELine );
+
+  if ( ISELogEcho ) {
+    WScript.StdErr.WriteLine( ISELine );
+  }
+}
+
+function ISETouchFile( ISERoot, ISEStatus ) {
+
+  var ISETFile = 
+    ISEOpenFile( "." + ISERoot + "." + ISEStatus + ".rst" );
+  ISETFile.Close();
+}
+
+function ISEOpenFile( ISEFilename ) {
+
+  // This function has been updated to deal with a problem seen in CR #870871.
+  // In that case the user runs a script that runs impl_1, and then turns around
+  // and runs impl_1 -to_step write_bitstream. That second run takes place in
+  // the same directory, which means we may hit some of the same files, and in
+  // particular, we will open the runme.log file. Even though this script closes
+  // the file (now), we see cases where a subsequent attempt to open the file
+  // fails. Perhaps the OS is slow to release the lock, or the disk comes into
+  // play? In any case, we try to work around this by first waiting if the file
+  // is already there for an arbitrary 5 seconds. Then we use a try-catch block
+  // and try to open the file 10 times with a one second delay after each attempt.
+  // Again, 10 is arbitrary. But these seem to stop the hang in CR #870871.
+  // If there is an unrecognized exception when trying to open the file, we output
+  // an error message and write details to an exception.log file.
+  var ISEFullPath = ISERunDir + "/" + ISEFilename;
+  if (ISEFileSys.FileExists(ISEFullPath)) {
+    // File is already there. This could be a problem. Wait in case it is still in use.
+    WScript.Sleep(5000);
+  }
+  var i;
+  for (i = 0; i < 10; ++i) {
+    try {
+      return ISEFileSys.OpenTextFile(ISEFullPath, 8, true);
+    } catch (exception) {
+      var error_code = exception.number & 0xFFFF; // The other bits are a facility code.
+      if (error_code == 52) { // 52 is bad file name or number.
+        // Wait a second and try again.
+        WScript.Sleep(1000);
+        continue;
+      } else {
+        WScript.StdErr.WriteLine("ERROR: Exception caught trying to open file " + ISEFullPath);
+        var exceptionFilePath = ISERunDir + "/exception.log";
+        if (!ISEFileSys.FileExists(exceptionFilePath)) {
+          WScript.StdErr.WriteLine("See file " + exceptionFilePath + " for details.");
+          var exceptionFile = ISEFileSys.OpenTextFile(exceptionFilePath, 8, true);
+          exceptionFile.WriteLine("ERROR: Exception caught trying to open file " + ISEFullPath);
+          exceptionFile.WriteLine("\tException name: " + exception.name);
+          exceptionFile.WriteLine("\tException error code: " + error_code);
+          exceptionFile.WriteLine("\tException message: " + exception.message);
+          exceptionFile.Close();
+        }
+        throw exception;
+      }
+    }
+  }
+  // If we reached this point, we failed to open the file after 10 attempts.
+  // We need to error out.
+  WScript.StdErr.WriteLine("ERROR: Failed to open file " + ISEFullPath);
+  WScript.Quit(1);
+}
--- a/synth/filter_vivado.runs/synth_1/ISEWrap.sh
+++ b/synth/filter_vivado.runs/synth_1/ISEWrap.sh
@ -0,0 +1,85 @@
+#!/bin/sh
+
+#
+#  Vivado(TM)
+#  ISEWrap.sh: Vivado Runs Script for UNIX
+#  Copyright 1986-2022 Xilinx, Inc. All Rights Reserved. 
+#  Copyright 2022-2023 Advanced Micro Devices, Inc. All Rights Reserved. 
+#
+
+cmd_exists()
+{
+  command -v "$1" >/dev/null 2>&1
+}
+
+HD_LOG=$1
+shift
+
+# CHECK for a STOP FILE
+if [ -f .stop.rst ]
+then
+echo ""                                        >> $HD_LOG
+echo "*** Halting run - EA reset detected ***" >> $HD_LOG
+echo ""                                        >> $HD_LOG
+exit 1
+fi
+
+ISE_STEP=$1
+shift
+
+# WRITE STEP HEADER to LOG
+echo ""                      >> $HD_LOG
+echo "*** Running $ISE_STEP" >> $HD_LOG
+echo "    with args $@"      >> $HD_LOG
+echo ""                      >> $HD_LOG
+
+# LAUNCH!
+$ISE_STEP "$@" >> $HD_LOG 2>&1 &
+
+# BEGIN file creation
+ISE_PID=$!
+
+HostNameFile=/proc/sys/kernel/hostname
+if cmd_exists hostname
+then
+ISE_HOST=$(hostname)
+elif cmd_exists uname
+then
+ISE_HOST=$(uname -n)
+elif [ -f "$HostNameFile" ] && [ -r $HostNameFile ] && [ -s $HostNameFile ] 
+then
+ISE_HOST=$(cat $HostNameFile)
+elif [ X != X$HOSTNAME ]
+then
+ISE_HOST=$HOSTNAME #bash
+else
+ISE_HOST=$HOST     #csh
+fi
+
+ISE_USER=$USER
+
+ISE_HOSTCORE=$(awk '/^processor/{print $3}' /proc/cpuinfo | wc -l)
+ISE_MEMTOTAL=$(awk '/MemTotal/ {print $2}' /proc/meminfo)
+
+ISE_BEGINFILE=.$ISE_STEP.begin.rst
+/bin/touch $ISE_BEGINFILE
+echo "<?xml version=\"1.0\"?>"                                                                     >> $ISE_BEGINFILE
+echo "<ProcessHandle Version=\"1\" Minor=\"0\">"                                                   >> $ISE_BEGINFILE
+echo "    <Process Command=\"$ISE_STEP\" Owner=\"$ISE_USER\" Host=\"$ISE_HOST\" Pid=\"$ISE_PID\" HostCore=\"$ISE_HOSTCORE\" HostMemory=\"$ISE_MEMTOTAL\">" >> $ISE_BEGINFILE
+echo "    </Process>"                                                                              >> $ISE_BEGINFILE
+echo "</ProcessHandle>"                                                                            >> $ISE_BEGINFILE
+
+# WAIT for ISEStep to finish
+wait $ISE_PID
+
+# END/ERROR file creation
+RETVAL=$?
+if [ $RETVAL -eq 0 ]
+then
+    /bin/touch .$ISE_STEP.end.rst
+else
+    /bin/touch .$ISE_STEP.error.rst
+fi
+
+exit $RETVAL
+
--- a/synth/filter_vivado.runs/synth_1/__synthesis_is_complete__
+++ b/synth/filter_vivado.runs/synth_1/__synthesis_is_complete__
--- a/synth/filter_vivado.runs/synth_1/filter.dcp
+++ b/synth/filter_vivado.runs/synth_1/filter.dcp
--- a/synth/filter_vivado.runs/synth_1/filter.tcl
+++ b/synth/filter_vivado.runs/synth_1/filter.tcl
@ -0,0 +1,129 @@
+# 
+# Synthesis run script generated by Vivado
+# 
+
+set TIME_start [clock seconds] 
+namespace eval ::optrace {
+  variable script "/home/veronikaplevacova/Plocha/PCS2/synth/filter_vivado.runs/synth_1/filter.tcl"
+  variable category "vivado_synth"
+}
+
+# Try to connect to running dispatch if we haven't done so already.
+# This code assumes that the Tcl interpreter is not using threads,
+# since the ::dispatch::connected variable isn't mutex protected.
+if {![info exists ::dispatch::connected]} {
+  namespace eval ::dispatch {
+    variable connected false
+    if {[llength [array get env XILINX_CD_CONNECT_ID]] > 0} {
+      set result "true"
+      if {[catch {
+        if {[lsearch -exact [package names] DispatchTcl] < 0} {
+          set result [load librdi_cd_clienttcl[info sharedlibextension]] 
+        }
+        if {$result eq "false"} {
+          puts "WARNING: Could not load dispatch client library"
+        }
+        set connect_id [ ::dispatch::init_client -mode EXISTING_SERVER ]
+        if { $connect_id eq "" } {
+          puts "WARNING: Could not initialize dispatch client"
+        } else {
+          puts "INFO: Dispatch client connection id - $connect_id"
+          set connected true
+        }
+      } catch_res]} {
+        puts "WARNING: failed to connect to dispatch server - $catch_res"
+      }
+    }
+  }
+}
+if {$::dispatch::connected} {
+  # Remove the dummy proc if it exists.
+  if { [expr {[llength [info procs ::OPTRACE]] > 0}] } {
+    rename ::OPTRACE ""
+  }
+  proc ::OPTRACE { task action {tags {} } } {
+    ::vitis_log::op_trace "$task" $action -tags $tags -script $::optrace::script -category $::optrace::category
+  }
+  # dispatch is generic. We specifically want to attach logging.
+  ::vitis_log::connect_client
+} else {
+  # Add dummy proc if it doesn't exist.
+  if { [expr {[llength [info procs ::OPTRACE]] == 0}] } {
+    proc ::OPTRACE {{arg1 \"\" } {arg2 \"\"} {arg3 \"\" } {arg4 \"\"} {arg5 \"\" } {arg6 \"\"}} {
+        # Do nothing
+    }
+  }
+}
+
+proc create_report { reportName command } {
+  set status "."
+  append status $reportName ".fail"
+  if { [file exists $status] } {
+    eval file delete [glob $status]
+  }
+  send_msg_id runtcl-4 info "Executing : $command"
+  set retval [eval catch { $command } msg]
+  if { $retval != 0 } {
+    set fp [open $status w]
+    close $fp
+    send_msg_id runtcl-5 warning "$msg"
+  }
+}
+OPTRACE "synth_1" START { ROLLUP_AUTO }
+OPTRACE "Creating in-memory project" START { }
+create_project -in_memory -part xc7k160tffv676-1
+
+set_param project.singleFileAddWarning.threshold 0
+set_param project.compositeFile.enableAutoGeneration 0
+set_param synth.vivado.isSynthRun true
+set_property webtalk.parent_dir /home/veronikaplevacova/Plocha/PCS2/synth/filter_vivado.cache/wt [current_project]
+set_property parent.project_path /home/veronikaplevacova/Plocha/PCS2/synth/filter_vivado.xpr [current_project]
+set_property default_lib xil_defaultlib [current_project]
+set_property target_language VHDL [current_project]
+set_property ip_output_repo /home/veronikaplevacova/Plocha/PCS2/synth/filter_vivado.cache/ip [current_project]
+set_property ip_cache_permissions {read write} [current_project]
+OPTRACE "Creating in-memory project" END { }
+OPTRACE "Adding files" START { }
+read_vhdl -vhdl2008 -library xil_defaultlib {
+  /home/veronikaplevacova/Plocha/PCS2/comp/functions.vhd
+  /home/veronikaplevacova/Plocha/PCS2/comp/block_memory.vhd
+  /home/veronikaplevacova/Plocha/PCS2/filter_ent.vhd
+  /home/veronikaplevacova/Plocha/PCS2/comp/jenkins_mix.vhd
+  /home/veronikaplevacova/Plocha/PCS2/comp/jenkins_final.vhd
+  /home/veronikaplevacova/Plocha/PCS2/comp/jenkins_hash.vhd
+  /home/veronikaplevacova/Plocha/PCS2/filter.vhd
+}
+OPTRACE "Adding files" END { }
+# Mark all dcp files as not used in implementation to prevent them from being
+# stitched into the results of this synthesis run. Any black boxes in the
+# design are intentionally left as such for best results. Dcp files will be
+# stitched into the design at a later time, either when this synthesis run is
+# opened, or when it is stitched into a dependent implementation run.
+foreach dcp [get_files -quiet -all -filter file_type=="Design\ Checkpoint"] {
+  set_property used_in_implementation false $dcp
+}
+read_xdc /home/veronikaplevacova/Plocha/PCS2/synth/filter.xdc
+set_property used_in_implementation false [get_files /home/veronikaplevacova/Plocha/PCS2/synth/filter.xdc]
+
+set_param ips.enableIPCacheLiteLoad 1
+close [open __synthesis_is_running__ w]
+
+OPTRACE "synth_design" START { }
+synth_design -top filter -part xc7k160tffv676-1 -mode out_of_context
+OPTRACE "synth_design" END { }
+if { [get_msg_config -count -severity {CRITICAL WARNING}] > 0 } {
+ send_msg_id runtcl-6 info "Synthesis results are not added to the cache due to CRITICAL_WARNING"
+}
+
+
+OPTRACE "write_checkpoint" START { CHECKPOINT }
+# disable binary constraint mode for synth run checkpoints
+set_param constraints.enableBinaryConstraints false
+write_checkpoint -force -noxdef filter.dcp
+OPTRACE "write_checkpoint" END { }
+OPTRACE "synth reports" START { REPORT }
+create_report "synth_1_synth_report_utilization_0" "report_utilization -file filter_utilization_synth.rpt -pb filter_utilization_synth.pb"
+OPTRACE "synth reports" END { }
+file delete __synthesis_is_running__
+close [open __synthesis_is_complete__ w]
+OPTRACE "synth_1" END { }
--- a/synth/filter_vivado.runs/synth_1/filter.vds
+++ b/synth/filter_vivado.runs/synth_1/filter.vds
@ -0,0 +1,339 @@
+#-----------------------------------------------------------
+# Vivado v2023.2 (64-bit)
+# SW Build 4029153 on Fri Oct 13 20:13:54 MDT 2023
+# IP Build 4028589 on Sat Oct 14 00:45:43 MDT 2023
+# SharedData Build 4025554 on Tue Oct 10 17:18:54 MDT 2023
+# Start of session at: Sun Dec  3 18:47:59 2023
+# Process ID: 18749
+# Current directory: /home/veronikaplevacova/Plocha/PCS2/synth/filter_vivado.runs/synth_1
+# Command line: vivado -log filter.vds -product Vivado -mode batch -messageDb vivado.pb -notrace -source filter.tcl
+# Log file: /home/veronikaplevacova/Plocha/PCS2/synth/filter_vivado.runs/synth_1/filter.vds
+# Journal file: /home/veronikaplevacova/Plocha/PCS2/synth/filter_vivado.runs/synth_1/vivado.jou
+# Running On: veronika-swiftsf11433, OS: Linux, CPU Frequency: 3075.336 MHz, CPU Physical cores: 4, Host memory: 3903 MB
+#-----------------------------------------------------------
+source filter.tcl -notrace
+create_project: Time (s): cpu = 00:00:13 ; elapsed = 00:00:13 . Memory (MB): peak = 1275.312 ; gain = 39.836 ; free physical = 248 ; free virtual = 8095
+Command: synth_design -top filter -part xc7k160tffv676-1 -mode out_of_context
+Starting synth_design
+Attempting to get a license for feature 'Synthesis' and/or device 'xc7k160t'
+INFO: [Common 17-349] Got license for feature 'Synthesis' and/or device 'xc7k160t'
+INFO: [Device 21-403] Loading part xc7k160tffv676-1
+INFO: [Synth 8-7079] Multithreading enabled for synth_design using a maximum of 4 processes.
+INFO: [Synth 8-7078] Launching helper process for spawning children vivado processes
+INFO: [Synth 8-7075] Helper process launched with PID 18803
+---------------------------------------------------------------------------------
+Starting RTL Elaboration : Time (s): cpu = 00:00:10 ; elapsed = 00:00:11 . Memory (MB): peak = 2039.840 ; gain = 404.684 ; free physical = 155 ; free virtual = 6867
+---------------------------------------------------------------------------------
+INFO: [Synth 8-638] synthesizing module 'filter' [/home/veronikaplevacova/Plocha/PCS2/filter.vhd:17]
+INFO: [Synth 8-638] synthesizing module 'jenkins_hash' [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_hash.vhd:40]
+	Parameter LENGTH bound to: 4 - type: integer 
+	Parameter INITVAL bound to: 32'b00000000000000000000000000000001 
+INFO: [Synth 8-638] synthesizing module 'jenkins_mix' [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_mix.vhd:42]
+	Parameter LENGTH bound to: 4 - type: integer 
+INFO: [Synth 8-256] done synthesizing module 'jenkins_mix' (0#1) [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_mix.vhd:42]
+INFO: [Synth 8-638] synthesizing module 'jenkins_final' [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_final.vhd:42]
+	Parameter LENGTH bound to: 4 - type: integer 
+INFO: [Synth 8-256] done synthesizing module 'jenkins_final' (0#1) [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_final.vhd:42]
+INFO: [Synth 8-256] done synthesizing module 'jenkins_hash' (0#1) [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_hash.vhd:40]
+INFO: [Synth 8-638] synthesizing module 'jenkins_hash__parameterized0' [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_hash.vhd:40]
+	Parameter LENGTH bound to: 4 - type: integer 
+	Parameter INITVAL bound to: 32'b00000000000000000000000000000010 
+INFO: [Synth 8-256] done synthesizing module 'jenkins_hash__parameterized0' (0#1) [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_hash.vhd:40]
+INFO: [Synth 8-638] synthesizing module 'jenkins_hash__parameterized1' [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_hash.vhd:40]
+	Parameter LENGTH bound to: 4 - type: integer 
+	Parameter INITVAL bound to: 32'b00000000000000000000000000000011 
+INFO: [Synth 8-256] done synthesizing module 'jenkins_hash__parameterized1' (0#1) [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_hash.vhd:40]
+INFO: [Synth 8-638] synthesizing module 'jenkins_hash__parameterized2' [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_hash.vhd:40]
+	Parameter LENGTH bound to: 4 - type: integer 
+	Parameter INITVAL bound to: 32'b00000000000000000000000000000100 
+INFO: [Synth 8-256] done synthesizing module 'jenkins_hash__parameterized2' (0#1) [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_hash.vhd:40]
+INFO: [Synth 8-638] synthesizing module 'block_memory' [/home/veronikaplevacova/Plocha/PCS2/comp/block_memory.vhd:45]
+	Parameter ITEM_WIDTH bound to: 145 - type: integer 
+	Parameter ITEMS bound to: 2048 - type: integer 
+	Parameter OUTPUT_REGISTER bound to: 0 - type: bool 
+INFO: [Synth 8-256] done synthesizing module 'block_memory' (0#1) [/home/veronikaplevacova/Plocha/PCS2/comp/block_memory.vhd:45]
+INFO: [Synth 8-256] done synthesizing module 'filter' (0#1) [/home/veronikaplevacova/Plocha/PCS2/filter.vhd:17]
+WARNING: [Synth 8-7129] Port CLK in module jenkins_final is either unconnected or has no load
+WARNING: [Synth 8-7129] Port RESET in module jenkins_final is either unconnected or has no load
+WARNING: [Synth 8-7129] Port CLK in module jenkins_mix is either unconnected or has no load
+WARNING: [Synth 8-7129] Port RESET in module jenkins_mix is either unconnected or has no load
+---------------------------------------------------------------------------------
+Finished RTL Elaboration : Time (s): cpu = 00:00:13 ; elapsed = 00:00:15 . Memory (MB): peak = 2119.777 ; gain = 484.621 ; free physical = 119 ; free virtual = 6746
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Start Handling Custom Attributes
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Finished Handling Custom Attributes : Time (s): cpu = 00:00:14 ; elapsed = 00:00:15 . Memory (MB): peak = 2137.590 ; gain = 502.434 ; free physical = 119 ; free virtual = 6727
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Finished RTL Optimization Phase 1 : Time (s): cpu = 00:00:14 ; elapsed = 00:00:15 . Memory (MB): peak = 2137.590 ; gain = 502.434 ; free physical = 119 ; free virtual = 6727
+---------------------------------------------------------------------------------
+Netlist sorting complete. Time (s): cpu = 00:00:00.06 ; elapsed = 00:00:00.06 . Memory (MB): peak = 2137.590 ; gain = 0.000 ; free physical = 94 ; free virtual = 6678
+INFO: [Project 1-570] Preparing netlist for logic optimization
+
+Processing XDC Constraints
+Initializing timing engine
+Parsing XDC File [/home/veronikaplevacova/Plocha/PCS2/synth/filter.xdc]
+WARNING: [Constraints 18-6211] Setting input delay on a clock pin 'CLK' relative to clock 'CLK' defined on the same pin is not supported, ignoring it [/home/veronikaplevacova/Plocha/PCS2/synth/filter.xdc:13]
+Finished Parsing XDC File [/home/veronikaplevacova/Plocha/PCS2/synth/filter.xdc]
+Completed Processing XDC Constraints
+
+Netlist sorting complete. Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 2252.324 ; gain = 0.000 ; free physical = 115 ; free virtual = 6314
+INFO: [Project 1-111] Unisim Transformation Summary:
+No Unisim elements were transformed.
+
+Constraint Validation Runtime : Time (s): cpu = 00:00:00.11 ; elapsed = 00:00:00.93 . Memory (MB): peak = 2252.359 ; gain = 0.000 ; free physical = 108 ; free virtual = 6278
+---------------------------------------------------------------------------------
+Finished Constraint Validation : Time (s): cpu = 00:00:32 ; elapsed = 00:00:40 . Memory (MB): peak = 2252.359 ; gain = 617.203 ; free physical = 106 ; free virtual = 5475
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Start Loading Part and Timing Information
+---------------------------------------------------------------------------------
+Loading part: xc7k160tffv676-1
+---------------------------------------------------------------------------------
+Finished Loading Part and Timing Information : Time (s): cpu = 00:00:32 ; elapsed = 00:00:40 . Memory (MB): peak = 2252.359 ; gain = 617.203 ; free physical = 162 ; free virtual = 5460
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Start Applying 'set_property' XDC Constraints
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Finished applying 'set_property' XDC Constraints : Time (s): cpu = 00:00:32 ; elapsed = 00:00:40 . Memory (MB): peak = 2252.359 ; gain = 617.203 ; free physical = 125 ; free virtual = 5450
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Finished RTL Optimization Phase 2 : Time (s): cpu = 00:00:33 ; elapsed = 00:00:42 . Memory (MB): peak = 2252.359 ; gain = 617.203 ; free physical = 120 ; free virtual = 5337
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Start RTL Component Statistics 
+---------------------------------------------------------------------------------
+Detailed RTL Component Info : 
+---Adders : 
+	   3 Input   32 Bit       Adders := 52    
+	   4 Input   32 Bit       Adders := 8     
+	   2 Input   32 Bit       Adders := 24    
+---XORs : 
+	   2 Input     32 Bit         XORs := 52    
+---Registers : 
+	              145 Bit    Registers := 5     
+	              128 Bit    Registers := 3     
+	               16 Bit    Registers := 1     
+	               11 Bit    Registers := 1     
+	                2 Bit    Registers := 1     
+	                1 Bit    Registers := 8     
+---RAMs : 
+	             290K Bit	(2048 X 145 bit)          RAMs := 4     
+---Muxes : 
+	   2 Input   16 Bit        Muxes := 6     
+	   2 Input    1 Bit        Muxes := 8     
+---------------------------------------------------------------------------------
+Finished RTL Component Statistics 
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Start Part Resource Summary
+---------------------------------------------------------------------------------
+Part Resources:
+DSPs: 600 (col length:100)
+BRAMs: 650 (col length: RAMB18 100 RAMB36 50)
+---------------------------------------------------------------------------------
+Finished Part Resource Summary
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Start Cross Boundary and Area Optimization
+---------------------------------------------------------------------------------
+WARNING: [Synth 8-7080] Parallel synthesis criteria is not met
+WARNING: [Synth 8-7129] Port CLK in module jenkins_final is either unconnected or has no load
+WARNING: [Synth 8-7129] Port RESET in module jenkins_final is either unconnected or has no load
+WARNING: [Synth 8-7129] Port CLK in module jenkins_mix is either unconnected or has no load
+WARNING: [Synth 8-7129] Port RESET in module jenkins_mix is either unconnected or has no load
+---------------------------------------------------------------------------------
+Finished Cross Boundary and Area Optimization : Time (s): cpu = 00:00:47 ; elapsed = 00:00:59 . Memory (MB): peak = 2252.359 ; gain = 617.203 ; free physical = 131 ; free virtual = 5310
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Start ROM, RAM, DSP, Shift Register and Retiming Reporting
+---------------------------------------------------------------------------------
+
+Block RAM: Preliminary Mapping Report (see note below)
+------------+----------------------------------------+------------------------+---+---+------------------------+---+---+------------------+--------+--------+
+|Module Name | RTL Object                             | PORT A (Depth x Width) | W | R | PORT B (Depth x Width) | W | R | Ports driving FF | RAMB18 | RAMB36 | 
+------------+----------------------------------------+------------------------+---+---+------------------------+---+---+------------------+--------+--------+
+|filter      | storage_generate[0].storage/memory_reg | 2 K x 145(READ_FIRST)  | W |   | 2 K x 145(WRITE_FIRST) |   | R | Port A and B     | 1      | 8      | 
+|filter      | storage_generate[1].storage/memory_reg | 2 K x 145(READ_FIRST)  | W |   | 2 K x 145(WRITE_FIRST) |   | R | Port A and B     | 1      | 8      | 
+|filter      | storage_generate[2].storage/memory_reg | 2 K x 145(READ_FIRST)  | W |   | 2 K x 145(WRITE_FIRST) |   | R | Port A and B     | 1      | 8      | 
+|filter      | storage_generate[3].storage/memory_reg | 2 K x 145(READ_FIRST)  | W |   | 2 K x 145(WRITE_FIRST) |   | R | Port A and B     | 1      | 8      | 
+------------+----------------------------------------+------------------------+---+---+------------------------+---+---+------------------+--------+--------+
+
+Note: The table above is a preliminary report that shows the Block RAMs at the current stage of the synthesis flow. Some Block RAMs may be reimplemented as non Block RAM primitives later in the synthesis flow. Multiple instantiated Block RAMs are reported only once. 
+---------------------------------------------------------------------------------
+Finished ROM, RAM, DSP, Shift Register and Retiming Reporting
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Start Applying XDC Timing Constraints
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Finished Applying XDC Timing Constraints : Time (s): cpu = 00:00:56 ; elapsed = 00:01:09 . Memory (MB): peak = 2252.359 ; gain = 617.203 ; free physical = 175 ; free virtual = 5367
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Start Timing Optimization
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Finished Timing Optimization : Time (s): cpu = 00:01:03 ; elapsed = 00:01:17 . Memory (MB): peak = 2252.359 ; gain = 617.203 ; free physical = 243 ; free virtual = 5327
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Start ROM, RAM, DSP, Shift Register and Retiming Reporting
+---------------------------------------------------------------------------------
+
+Block RAM: Final Mapping Report
+------------+----------------------------------------+------------------------+---+---+------------------------+---+---+------------------+--------+--------+
+|Module Name | RTL Object                             | PORT A (Depth x Width) | W | R | PORT B (Depth x Width) | W | R | Ports driving FF | RAMB18 | RAMB36 | 
+------------+----------------------------------------+------------------------+---+---+------------------------+---+---+------------------+--------+--------+
+|filter      | storage_generate[0].storage/memory_reg | 2 K x 145(READ_FIRST)  | W |   | 2 K x 145(WRITE_FIRST) |   | R | Port A and B     | 1      | 8      | 
+|filter      | storage_generate[1].storage/memory_reg | 2 K x 145(READ_FIRST)  | W |   | 2 K x 145(WRITE_FIRST) |   | R | Port A and B     | 1      | 8      | 
+|filter      | storage_generate[2].storage/memory_reg | 2 K x 145(READ_FIRST)  | W |   | 2 K x 145(WRITE_FIRST) |   | R | Port A and B     | 1      | 8      | 
+|filter      | storage_generate[3].storage/memory_reg | 2 K x 145(READ_FIRST)  | W |   | 2 K x 145(WRITE_FIRST) |   | R | Port A and B     | 1      | 8      | 
+------------+----------------------------------------+------------------------+---+---+------------------------+---+---+------------------+--------+--------+
+
+---------------------------------------------------------------------------------
+Finished ROM, RAM, DSP, Shift Register and Retiming Reporting
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Start Technology Mapping
+---------------------------------------------------------------------------------
+INFO: [Synth 8-7052] The timing for the instance storage_generate[0].storage/memory_reg_0 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
+INFO: [Synth 8-7052] The timing for the instance storage_generate[0].storage/memory_reg_1 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
+INFO: [Synth 8-7052] The timing for the instance storage_generate[0].storage/memory_reg_2 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
+INFO: [Synth 8-7052] The timing for the instance storage_generate[0].storage/memory_reg_3 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
+INFO: [Synth 8-7052] The timing for the instance storage_generate[0].storage/memory_reg_4 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
+INFO: [Synth 8-7052] The timing for the instance storage_generate[0].storage/memory_reg_5 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
+INFO: [Synth 8-7052] The timing for the instance storage_generate[0].storage/memory_reg_6 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
+INFO: [Synth 8-7052] The timing for the instance storage_generate[0].storage/memory_reg_7 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
+INFO: [Synth 8-7052] The timing for the instance storage_generate[0].storage/memory_reg_8 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
+INFO: [Synth 8-7052] The timing for the instance storage_generate[1].storage/memory_reg_0 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
+INFO: [Synth 8-7052] The timing for the instance storage_generate[1].storage/memory_reg_1 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
+INFO: [Synth 8-7052] The timing for the instance storage_generate[1].storage/memory_reg_2 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
+INFO: [Synth 8-7052] The timing for the instance storage_generate[1].storage/memory_reg_3 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
+INFO: [Synth 8-7052] The timing for the instance storage_generate[1].storage/memory_reg_4 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
+INFO: [Synth 8-7052] The timing for the instance storage_generate[1].storage/memory_reg_5 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
+INFO: [Synth 8-7052] The timing for the instance storage_generate[1].storage/memory_reg_6 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
+INFO: [Synth 8-7052] The timing for the instance storage_generate[1].storage/memory_reg_7 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
+INFO: [Synth 8-7052] The timing for the instance storage_generate[1].storage/memory_reg_8 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
+INFO: [Synth 8-7052] The timing for the instance storage_generate[2].storage/memory_reg_0 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
+INFO: [Synth 8-7052] The timing for the instance storage_generate[2].storage/memory_reg_1 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
+INFO: [Synth 8-7052] The timing for the instance storage_generate[2].storage/memory_reg_2 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
+INFO: [Synth 8-7052] The timing for the instance storage_generate[2].storage/memory_reg_3 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
+INFO: [Synth 8-7052] The timing for the instance storage_generate[2].storage/memory_reg_4 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
+INFO: [Synth 8-7052] The timing for the instance storage_generate[2].storage/memory_reg_5 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
+INFO: [Synth 8-7052] The timing for the instance storage_generate[2].storage/memory_reg_6 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
+INFO: [Synth 8-7052] The timing for the instance storage_generate[2].storage/memory_reg_7 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
+INFO: [Synth 8-7052] The timing for the instance storage_generate[2].storage/memory_reg_8 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
+INFO: [Synth 8-7052] The timing for the instance storage_generate[3].storage/memory_reg_0 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
+INFO: [Synth 8-7052] The timing for the instance storage_generate[3].storage/memory_reg_1 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
+INFO: [Synth 8-7052] The timing for the instance storage_generate[3].storage/memory_reg_2 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
+INFO: [Synth 8-7052] The timing for the instance storage_generate[3].storage/memory_reg_3 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
+INFO: [Synth 8-7052] The timing for the instance storage_generate[3].storage/memory_reg_4 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
+INFO: [Synth 8-7052] The timing for the instance storage_generate[3].storage/memory_reg_5 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
+INFO: [Synth 8-7052] The timing for the instance storage_generate[3].storage/memory_reg_6 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
+INFO: [Synth 8-7052] The timing for the instance storage_generate[3].storage/memory_reg_7 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
+INFO: [Synth 8-7052] The timing for the instance storage_generate[3].storage/memory_reg_8 (implemented as a Block RAM) might be sub-optimal as no optional output register could be merged into the ram block. Providing additional output register may help in improving timing.
+---------------------------------------------------------------------------------
+Finished Technology Mapping : Time (s): cpu = 00:01:07 ; elapsed = 00:01:21 . Memory (MB): peak = 2252.359 ; gain = 617.203 ; free physical = 381 ; free virtual = 5319
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Start IO Insertion
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Start Flattening Before IO Insertion
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Finished Flattening Before IO Insertion
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Start Final Netlist Cleanup
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Finished Final Netlist Cleanup
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Finished IO Insertion : Time (s): cpu = 00:01:16 ; elapsed = 00:01:33 . Memory (MB): peak = 2252.359 ; gain = 617.203 ; free physical = 168 ; free virtual = 5189
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Start Renaming Generated Instances
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Finished Renaming Generated Instances : Time (s): cpu = 00:01:16 ; elapsed = 00:01:33 . Memory (MB): peak = 2252.359 ; gain = 617.203 ; free physical = 168 ; free virtual = 5189
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Start Rebuilding User Hierarchy
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Finished Rebuilding User Hierarchy : Time (s): cpu = 00:01:17 ; elapsed = 00:01:33 . Memory (MB): peak = 2252.359 ; gain = 617.203 ; free physical = 168 ; free virtual = 5189
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Start Renaming Generated Ports
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Finished Renaming Generated Ports : Time (s): cpu = 00:01:17 ; elapsed = 00:01:33 . Memory (MB): peak = 2252.359 ; gain = 617.203 ; free physical = 168 ; free virtual = 5189
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Start Handling Custom Attributes
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Finished Handling Custom Attributes : Time (s): cpu = 00:01:17 ; elapsed = 00:01:33 . Memory (MB): peak = 2252.359 ; gain = 617.203 ; free physical = 168 ; free virtual = 5189
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Start Renaming Generated Nets
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Finished Renaming Generated Nets : Time (s): cpu = 00:01:17 ; elapsed = 00:01:34 . Memory (MB): peak = 2252.359 ; gain = 617.203 ; free physical = 168 ; free virtual = 5189
+---------------------------------------------------------------------------------
+---------------------------------------------------------------------------------
+Start Writing Synthesis Report
+---------------------------------------------------------------------------------
+
+Report BlackBoxes: 
+-+--------------+----------+
+| |BlackBox name |Instances |
+-+--------------+----------+
+-+--------------+----------+
+
+Report Cell Usage: 
+------+---------+------+
+|      |Cell     |Count |
+------+---------+------+
+|1     |CARRY4   |   681|
+|2     |LUT1     |   228|
+|3     |LUT2     |   874|
+|4     |LUT3     |   900|
+|5     |LUT4     |   260|
+|6     |LUT5     |   995|
+|7     |LUT6     |   950|
+|8     |RAMB18E1 |     4|
+|9     |RAMB36E1 |    32|
+|10    |FDRE     |   563|
+------+---------+------+
+---------------------------------------------------------------------------------
+Finished Writing Synthesis Report : Time (s): cpu = 00:01:17 ; elapsed = 00:01:34 . Memory (MB): peak = 2252.359 ; gain = 617.203 ; free physical = 164 ; free virtual = 5187
+---------------------------------------------------------------------------------
+Synthesis finished with 0 errors, 0 critical warnings and 5 warnings.
+Synthesis Optimization Runtime : Time (s): cpu = 00:01:11 ; elapsed = 00:01:26 . Memory (MB): peak = 2252.359 ; gain = 502.434 ; free physical = 148 ; free virtual = 5185
+Synthesis Optimization Complete : Time (s): cpu = 00:01:17 ; elapsed = 00:01:34 . Memory (MB): peak = 2252.359 ; gain = 617.203 ; free physical = 145 ; free virtual = 5184
+INFO: [Project 1-571] Translating synthesized netlist
+Netlist sorting complete. Time (s): cpu = 00:00:00.09 ; elapsed = 00:00:00.09 . Memory (MB): peak = 2252.359 ; gain = 0.000 ; free physical = 115 ; free virtual = 5167
+INFO: [Netlist 29-17] Analyzing 717 Unisim elements for replacement
+INFO: [Netlist 29-28] Unisim Transformation completed in 0 CPU seconds
+INFO: [Project 1-570] Preparing netlist for logic optimization
+INFO: [Opt 31-138] Pushed 0 inverter(s) to 0 load pin(s).
+Netlist sorting complete. Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 2252.359 ; gain = 0.000 ; free physical = 313 ; free virtual = 5535
+INFO: [Project 1-111] Unisim Transformation Summary:
+No Unisim elements were transformed.
+
+Synth Design complete | Checksum: d74e1ad3
+INFO: [Common 17-83] Releasing license: Synthesis
+66 Infos, 10 Warnings, 0 Critical Warnings and 0 Errors encountered.
+synth_design completed successfully
+synth_design: Time (s): cpu = 00:01:33 ; elapsed = 00:01:44 . Memory (MB): peak = 2252.359 ; gain = 977.047 ; free physical = 232 ; free virtual = 5481
+INFO: [Common 17-2834] synth_design peak Physical Memory [PSS] (MB): overall = 1724.537; main = 1326.676; forked = 397.861
+INFO: [Common 17-2834] synth_design peak Virtual Memory [VSS] (MB): overall = 3235.051; main = 2252.328; forked = 982.723
+Write ShapeDB Complete: Time (s): cpu = 00:00:00.04 ; elapsed = 00:00:00.02 . Memory (MB): peak = 2276.336 ; gain = 0.000 ; free physical = 226 ; free virtual = 5482
+INFO: [Common 17-1381] The checkpoint '/home/veronikaplevacova/Plocha/PCS2/synth/filter_vivado.runs/synth_1/filter.dcp' has been generated.
+INFO: [runtcl-4] Executing : report_utilization -file filter_utilization_synth.rpt -pb filter_utilization_synth.pb
+INFO: [Common 17-206] Exiting Vivado at Sun Dec  3 18:50:06 2023...
--- a/synth/filter_vivado.runs/synth_1/filter_utilization_synth.pb
+++ b/synth/filter_vivado.runs/synth_1/filter_utilization_synth.pb
--- a/synth/filter_vivado.runs/synth_1/filter_utilization_synth.rpt
+++ b/synth/filter_vivado.runs/synth_1/filter_utilization_synth.rpt
@ -0,0 +1,186 @@
+Copyright 1986-2022 Xilinx, Inc. All Rights Reserved. Copyright 2022-2023 Advanced Micro Devices, Inc. All Rights Reserved.
+---------------------------------------------------------------------------------------------------------------------------------------------
+| Tool Version : Vivado v.2023.2 (lin64) Build 4029153 Fri Oct 13 20:13:54 MDT 2023
+| Date         : Sun Dec  3 18:50:06 2023
+| Host         : veronika-swiftsf11433 running 64-bit EndeavourOS Linux
+| Command      : report_utilization -file filter_utilization_synth.rpt -pb filter_utilization_synth.pb
+| Design       : filter
+| Device       : xc7k160tffv676-1
+| Speed File   : -1
+| Design State : Synthesized
+---------------------------------------------------------------------------------------------------------------------------------------------
+
+Utilization Design Information
+
+Table of Contents
+-----------------
+1. Slice Logic
+1.1 Summary of Registers by Type
+2. Memory
+3. DSP
+4. IO and GT Specific
+5. Clocking
+6. Specific Feature
+7. Primitives
+8. Black Boxes
+9. Instantiated Netlists
+
+1. Slice Logic
+--------------
+
+-------------------------+------+-------+------------+-----------+-------+
+|        Site Type        | Used | Fixed | Prohibited | Available | Util% |
+-------------------------+------+-------+------------+-----------+-------+
+| Slice LUTs*             | 3498 |     0 |          0 |    101400 |  3.45 |
+|   LUT as Logic          | 3498 |     0 |          0 |    101400 |  3.45 |
+|   LUT as Memory         |    0 |     0 |          0 |     35000 |  0.00 |
+| Slice Registers         |  563 |     0 |          0 |    202800 |  0.28 |
+|   Register as Flip Flop |  563 |     0 |          0 |    202800 |  0.28 |
+|   Register as Latch     |    0 |     0 |          0 |    202800 |  0.00 |
+| F7 Muxes                |    0 |     0 |          0 |     50700 |  0.00 |
+| F8 Muxes                |    0 |     0 |          0 |     25350 |  0.00 |
+-------------------------+------+-------+------------+-----------+-------+
+* Warning! The Final LUT count, after physical optimizations and full implementation, is typically lower. Run opt_design after synthesis, if not already completed, for a more realistic count.
+Warning! LUT value is adjusted to account for LUT combining.
+
+
+1.1 Summary of Registers by Type
+--------------------------------
+
+-------+--------------+-------------+--------------+
+| Total | Clock Enable | Synchronous | Asynchronous |
+-------+--------------+-------------+--------------+
+| 0     |            _ |           - |            - |
+| 0     |            _ |           - |          Set |
+| 0     |            _ |           - |        Reset |
+| 0     |            _ |         Set |            - |
+| 0     |            _ |       Reset |            - |
+| 0     |          Yes |           - |            - |
+| 0     |          Yes |           - |          Set |
+| 0     |          Yes |           - |        Reset |
+| 0     |          Yes |         Set |            - |
+| 563   |          Yes |       Reset |            - |
+-------+--------------+-------------+--------------+
+
+
+2. Memory
+---------
+
+-------------------+------+-------+------------+-----------+-------+
+|     Site Type     | Used | Fixed | Prohibited | Available | Util% |
+-------------------+------+-------+------------+-----------+-------+
+| Block RAM Tile    |   34 |     0 |          0 |       325 | 10.46 |
+|   RAMB36/FIFO*    |   32 |     0 |          0 |       325 |  9.85 |
+|     RAMB36E1 only |   32 |       |            |           |       |
+|   RAMB18          |    4 |     0 |          0 |       650 |  0.62 |
+|     RAMB18E1 only |    4 |       |            |           |       |
+-------------------+------+-------+------------+-----------+-------+
+* Note: Each Block RAM Tile only has one FIFO logic available and therefore can accommodate only one FIFO36E1 or one FIFO18E1. However, if a FIFO18E1 occupies a Block RAM Tile, that tile can still accommodate a RAMB18E1
+
+
+3. DSP
+------
+
+-----------+------+-------+------------+-----------+-------+
+| Site Type | Used | Fixed | Prohibited | Available | Util% |
+-----------+------+-------+------------+-----------+-------+
+| DSPs      |    0 |     0 |          0 |       600 |  0.00 |
+-----------+------+-------+------------+-----------+-------+
+
+
+4. IO and GT Specific
+---------------------
+
+-----------------------------+------+-------+------------+-----------+-------+
+|          Site Type          | Used | Fixed | Prohibited | Available | Util% |
+-----------------------------+------+-------+------------+-----------+-------+
+| Bonded IOB                  |    0 |     0 |          0 |       400 |  0.00 |
+| Bonded IPADs                |    0 |     0 |          0 |        26 |  0.00 |
+| Bonded OPADs                |    0 |     0 |          0 |        16 |  0.00 |
+| PHY_CONTROL                 |    0 |     0 |          0 |         8 |  0.00 |
+| PHASER_REF                  |    0 |     0 |          0 |         8 |  0.00 |
+| OUT_FIFO                    |    0 |     0 |          0 |        32 |  0.00 |
+| IN_FIFO                     |    0 |     0 |          0 |        32 |  0.00 |
+| IDELAYCTRL                  |    0 |     0 |          0 |         8 |  0.00 |
+| IBUFDS                      |    0 |     0 |          0 |       384 |  0.00 |
+| GTXE2_COMMON                |    0 |     0 |          0 |         2 |  0.00 |
+| GTXE2_CHANNEL               |    0 |     0 |          0 |         8 |  0.00 |
+| PHASER_OUT/PHASER_OUT_PHY   |    0 |     0 |          0 |        32 |  0.00 |
+| PHASER_IN/PHASER_IN_PHY     |    0 |     0 |          0 |        32 |  0.00 |
+| IDELAYE2/IDELAYE2_FINEDELAY |    0 |     0 |          0 |       400 |  0.00 |
+| ODELAYE2/ODELAYE2_FINEDELAY |    0 |     0 |          0 |       150 |  0.00 |
+| IBUFDS_GTE2                 |    0 |     0 |          0 |         4 |  0.00 |
+| ILOGIC                      |    0 |     0 |          0 |       400 |  0.00 |
+| OLOGIC                      |    0 |     0 |          0 |       400 |  0.00 |
+-----------------------------+------+-------+------------+-----------+-------+
+
+
+5. Clocking
+-----------
+
+------------+------+-------+------------+-----------+-------+
+|  Site Type | Used | Fixed | Prohibited | Available | Util% |
+------------+------+-------+------------+-----------+-------+
+| BUFGCTRL   |    0 |     0 |          0 |        32 |  0.00 |
+| BUFIO      |    0 |     0 |          0 |        32 |  0.00 |
+| MMCME2_ADV |    0 |     0 |          0 |         8 |  0.00 |
+| PLLE2_ADV  |    0 |     0 |          0 |         8 |  0.00 |
+| BUFMRCE    |    0 |     0 |          0 |        16 |  0.00 |
+| BUFHCE     |    0 |     0 |          0 |       120 |  0.00 |
+| BUFR       |    0 |     0 |          0 |        32 |  0.00 |
+------------+------+-------+------------+-----------+-------+
+
+
+6. Specific Feature
+-------------------
+
+-------------+------+-------+------------+-----------+-------+
+|  Site Type  | Used | Fixed | Prohibited | Available | Util% |
+-------------+------+-------+------------+-----------+-------+
+| BSCANE2     |    0 |     0 |          0 |         4 |  0.00 |
+| CAPTUREE2   |    0 |     0 |          0 |         1 |  0.00 |
+| DNA_PORT    |    0 |     0 |          0 |         1 |  0.00 |
+| EFUSE_USR   |    0 |     0 |          0 |         1 |  0.00 |
+| FRAME_ECCE2 |    0 |     0 |          0 |         1 |  0.00 |
+| ICAPE2      |    0 |     0 |          0 |         2 |  0.00 |
+| PCIE_2_1    |    0 |     0 |          0 |         1 |  0.00 |
+| STARTUPE2   |    0 |     0 |          0 |         1 |  0.00 |
+| XADC        |    0 |     0 |          0 |         1 |  0.00 |
+-------------+------+-------+------------+-----------+-------+
+
+
+7. Primitives
+-------------
+
+----------+------+---------------------+
+| Ref Name | Used | Functional Category |
+----------+------+---------------------+
+| LUT5     |  995 |                 LUT |
+| LUT6     |  950 |                 LUT |
+| LUT3     |  900 |                 LUT |
+| LUT2     |  874 |                 LUT |
+| CARRY4   |  681 |          CarryLogic |
+| FDRE     |  563 |        Flop & Latch |
+| LUT4     |  260 |                 LUT |
+| LUT1     |  228 |                 LUT |
+| RAMB36E1 |   32 |        Block Memory |
+| RAMB18E1 |    4 |        Block Memory |
+----------+------+---------------------+
+
+
+8. Black Boxes
+--------------
+
+----------+------+
+| Ref Name | Used |
+----------+------+
+
+
+9. Instantiated Netlists
+------------------------
+
+----------+------+
+| Ref Name | Used |
+----------+------+
+
+
--- a/synth/filter_vivado.runs/synth_1/gen_run.xml
+++ b/synth/filter_vivado.runs/synth_1/gen_run.xml
@ -0,0 +1,85 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<GenRun Id="synth_1" LaunchPart="xc7k160tffv676-1" LaunchTime="1701625674">
+  <File Type="VDS-TIMINGSUMMARY" Name="filter_timing_summary_synth.rpt"/>
+  <File Type="RDS-DCP" Name="filter.dcp"/>
+  <File Type="RDS-UTIL-PB" Name="filter_utilization_synth.pb"/>
+  <File Type="RDS-UTIL" Name="filter_utilization_synth.rpt"/>
+  <File Type="RDS-PROPCONSTRS" Name="filter_drc_synth.rpt"/>
+  <File Type="RDS-RDS" Name="filter.vds"/>
+  <File Type="REPORTS-TCL" Name="filter_reports.tcl"/>
+  <File Type="VDS-TIMING-PB" Name="filter_timing_summary_synth.pb"/>
+  <File Type="PA-TCL" Name="filter.tcl"/>
+  <FileSet Name="sources" Type="DesignSrcs" RelSrcDir="$PSRCDIR/sources_1" RelGenDir="$PGENDIR/sources_1">
+    <Filter Type="Srcs"/>
+    <File Path="$PPRDIR/../comp/functions.vhd">
+      <FileInfo SFType="VHDL2008">
+        <Attr Name="UsedIn" Val="synthesis"/>
+        <Attr Name="UsedIn" Val="simulation"/>
+      </FileInfo>
+    </File>
+    <File Path="$PPRDIR/../comp/block_memory.vhd">
+      <FileInfo SFType="VHDL2008">
+        <Attr Name="UsedIn" Val="synthesis"/>
+        <Attr Name="UsedIn" Val="simulation"/>
+      </FileInfo>
+    </File>
+    <File Path="$PPRDIR/../filter_ent.vhd">
+      <FileInfo SFType="VHDL2008">
+        <Attr Name="UsedIn" Val="synthesis"/>
+        <Attr Name="UsedIn" Val="simulation"/>
+      </FileInfo>
+    </File>
+    <File Path="$PPRDIR/../comp/jenkins_mix.vhd">
+      <FileInfo SFType="VHDL2008">
+        <Attr Name="UsedIn" Val="synthesis"/>
+        <Attr Name="UsedIn" Val="simulation"/>
+      </FileInfo>
+    </File>
+    <File Path="$PPRDIR/../comp/jenkins_final.vhd">
+      <FileInfo SFType="VHDL2008">
+        <Attr Name="UsedIn" Val="synthesis"/>
+        <Attr Name="UsedIn" Val="simulation"/>
+      </FileInfo>
+    </File>
+    <File Path="$PPRDIR/../comp/jenkins_hash.vhd">
+      <FileInfo SFType="VHDL2008">
+        <Attr Name="UsedIn" Val="synthesis"/>
+        <Attr Name="UsedIn" Val="simulation"/>
+      </FileInfo>
+    </File>
+    <File Path="$PPRDIR/../filter.vhd">
+      <FileInfo SFType="VHDL2008">
+        <Attr Name="UsedIn" Val="synthesis"/>
+        <Attr Name="UsedIn" Val="simulation"/>
+      </FileInfo>
+    </File>
+    <Config>
+      <Option Name="DesignMode" Val="RTL"/>
+      <Option Name="TopModule" Val="filter"/>
+    </Config>
+  </FileSet>
+  <FileSet Name="constrs_in" Type="Constrs" RelSrcDir="$PSRCDIR/constrs_1" RelGenDir="$PGENDIR/constrs_1">
+    <Filter Type="Constrs"/>
+    <File Path="$PPRDIR/filter.xdc">
+      <FileInfo>
+        <Attr Name="UsedIn" Val="synthesis"/>
+        <Attr Name="UsedIn" Val="implementation"/>
+      </FileInfo>
+    </File>
+    <Config>
+      <Option Name="ConstrsType" Val="XDC"/>
+    </Config>
+  </FileSet>
+  <FileSet Name="utils" Type="Utils" RelSrcDir="$PSRCDIR/utils_1" RelGenDir="$PGENDIR/utils_1">
+    <Filter Type="Utils"/>
+    <Config>
+      <Option Name="TopAutoSet" Val="TRUE"/>
+    </Config>
+  </FileSet>
+  <Strategy Version="1" Minor="2">
+    <StratHandle Name="Vivado Synthesis Defaults" Flow="Vivado Synthesis 2023"/>
+    <Step Id="synth_design">
+      <Option Id="MoreOptsStr"><![CDATA[-mode out_of_context]]></Option>
+    </Step>
+  </Strategy>
+</GenRun>
--- a/Show More
+++ b/Show More