honzastor
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ef5dc80382
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Implemented generation to flat Verilog format and improved some other minor bits of code.
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2021-02-16 10:41:29 +01:00 |
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honzastor
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397d3bc658
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Added generation of hierarchical C code for implemented circuits.
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2021-02-12 01:43:44 +01:00 |
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honzastor
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de127e8c46
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Added signed rca circuit.
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2021-02-09 20:53:53 +01:00 |
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honzastor
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4f8de30911
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Implementation organized into multiple scripts. Added basic generation example call. Adjusting code to PEP8 standard (except long lines).)
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2021-01-18 19:29:31 +01:00 |
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