All Workflows generate.yml

Actor

All actors lukasplevac

Status

All status success failure waiting running

Incorect FA instance create

#25:Commit cf4a6ccc52 pushed by lukasplevac

main

2025-01-15 18:31:32 +00:00

16s

Full adder missing import

#24:Commit aefc20693a pushed by lukasplevac

main

2025-01-15 18:28:49 +00:00

17s

Imprt missing full adder

#23:Commit 395750eac5 pushed by lukasplevac

main

2025-01-15 18:24:08 +00:00

17s

GCP PGA ADDER

#22:Commit d0501238f8 pushed by lukasplevac

main

2025-01-06 12:04:25 +00:00

27s

Remove iverilog from pipe

#17:Commit 5bb50a325f pushed by lukasplevac

main

2024-11-14 14:22:01 +00:00

1m35s

Fixing pipeline

#16:Commit 975ab01a1c pushed by lukasplevac

main

2024-11-14 14:19:26 +00:00

18s

Fix mux with wrong gate ordering

#15:Commit c476479827 pushed by lukasplevac

main

2024-11-14 14:19:06 +00:00

0s

All working muls and adders

#9:Commit 4eb65e10da pushed by lukasplevac

main

2024-10-19 14:32:36 +01:00

26m57s

Fully working xorGateComponent

#6:Commit 09a12f3df7 pushed by lukasplevac

main

2024-10-11 15:40:01 +01:00

3s

Fixed RCA by test

#4:Commit c61244c966 pushed by lukasplevac

main

2024-10-09 15:40:00 +01:00

2s

Added support for MIG excluded xor and xnor gate

#2:Commit ad9f62e3de pushed by lukasplevac

main

2024-10-08 13:29:08 +01:00

3s