honzastor
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6003886eb7
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Fixed hierarchical Verilog generation of popcount compare. BLIF probably needs a similar treatment, TBD later
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2024-04-14 16:29:10 +02:00 |
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honzastor
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97e79b93da
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Big code cleanup and some fixes. Hierarchical generation for popcount seems problematic. It seems bus connections are the issue.
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2024-04-13 17:04:03 +02:00 |
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honzastor
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d52e67bb25
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Implemented new parallel prefix adders and added the possibility for better configuration of partial product accumulators (adders) used in multipliers.
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2023-02-24 11:13:46 +01:00 |
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Vojta Mrazek
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3c47407f80
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output rename
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2022-02-07 11:29:12 +01:00 |
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Honza
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9aa0fb1858
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Added broken array multiplier and truncated multiplier implementations. Tried testing them, but seems buggy. Needs further work.
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2022-01-06 06:39:58 +01:00 |
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honzastor
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eba0a7a938
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Made some minor changes concerning proper exportation of multiplier circuits.
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2021-09-09 13:57:36 +02:00 |
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honzastor
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bfc806081e
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Made some minor changes and updated creation of MAC circuit.
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2021-09-07 17:35:41 +02:00 |
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Vojta Mrazek
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fffb928875
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auto test MAC
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2021-09-07 08:32:52 +02:00 |
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