17 Commits

Author SHA1 Message Date
honzastor
ce36ebf77b Fixed hierarchical BLIF generation for popcount_compare. 2024-04-17 18:47:41 +02:00
Vojta Mrazek
2cf7b921ea Popcount implementation 2024-04-05 08:46:02 +02:00
Vojta Mrazek
a4741db191 connection checks (asserts) 2023-03-28 11:16:55 +02:00
Vojta Mrazek
44e0a920d1 MUX support of constant values 2023-03-24 12:11:42 +01:00
honzastor
b88c502343 Addition of MUX2x1 PDK support and optimization of hierarchical Verilog code generation when using PDK modules (the gates and wires associated with native ArithsGen implementation are not generated). 2023-03-22 17:57:51 +01:00
honzastor
d52e67bb25 Implemented new parallel prefix adders and added the possibility for better configuration of partial product accumulators (adders) used in multipliers. 2023-02-24 11:13:46 +01:00
Honza
13c085f169 Fixed a small bug – missing ending semicolon in generation of library desired HA/FA to Verilog. Added script for generation of AX multipliers. 2022-01-13 13:11:24 +01:00
Vojta Mrazek
d641595c3e Support of PDK in HA and FA 2022-01-13 12:37:09 +01:00
honzastor
670ba45ee5 Generated sample circuits for various representations. Updated C code circuits testing simulations and did some cleanup. 2021-04-23 02:44:14 +02:00
honzastor
ad1c6ec557 Updated circuits documentation. 2021-04-21 13:42:07 +02:00
honzastor
8e950fc51f Optimized circuits generation, refactored code, fixed cla, added new csa, array divider circuits and create yosys equivalence check script. TBD: Documentation and sample generated circuits. 2021-04-21 11:33:07 +02:00
honzastor
068def0226 Added documentation of classes methods. 2021-04-06 01:39:11 +02:00
honzastor
a336a683e7 Added some code documentation and updated git action to generate it. 2021-03-31 04:40:54 +02:00
Jan Klhůfek
82d2d02ef5
Delete ariths_gen/one_bit_circuits/logic_gates/__pycache__ directory 2021-03-30 03:13:15 +02:00
Jan Klhůfek
debef13087
Delete ariths_gen/one_bit_circuits/one_bit_components/__pycache__ directory 2021-03-30 03:13:04 +02:00
Jan Klhůfek
1e2ae53df5
Delete ariths_gen/one_bit_circuits/__pycache__ directory 2021-03-30 03:11:57 +02:00
honzastor
69e2514852 Updated project's structure. Renamed class names to properly fit Python naming convention. TBD: proper documentation. 2021-03-30 03:04:48 +02:00