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dissertation_thesis
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ariths-gen-mig
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ariths-gen-mig
/
ariths_gen
/
core
/
arithmetic_circuits
History
honzastor
da733cf44e
Added instantiation of wires and buses from inputs. Hopefully fixed now.
2024-03-28 00:06:53 +01:00
..
__init__.py
Implemented new parallel prefix adders and added the possibility for better configuration of partial product accumulators (adders) used in multipliers.
2023-02-24 11:13:46 +01:00
arithmetic_circuit.py
Added unsigned recursive multiplier and made some bugfixes.
2024-03-27 23:00:13 +01:00
general_circuit.py
Added instantiation of wires and buses from inputs. Hopefully fixed now.
2024-03-28 00:06:53 +01:00
multiplier_circuit.py
Added new (approximate) multiplier architectures and did some minor changes regarding sign extension for c output formats.
2022-04-17 13:04:17 +02:00