PCS-2/vivado.jou
2023-12-12 16:08:43 +01:00

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#-----------------------------------------------------------
# Vivado v2023.2 (64-bit)
# SW Build 4029153 on Fri Oct 13 20:13:54 MDT 2023
# IP Build 4028589 on Sat Oct 14 00:45:43 MDT 2023
# SharedData Build 4025554 on Tue Oct 10 17:18:54 MDT 2023
# Start of session at: Tue Dec 12 14:48:40 2023
# Process ID: 14373
# Current directory: /home/veronikaplevacova/Plocha/PCS2
# Command line: vivado
# Log file: /home/veronikaplevacova/Plocha/PCS2/vivado.log
# Journal file: /home/veronikaplevacova/Plocha/PCS2/vivado.jou
# Running On: veronika-swiftsf11433, OS: Linux, CPU Frequency: 2938.967 MHz, CPU Physical cores: 4, Host memory: 3903 MB
#-----------------------------------------------------------
start_gui
open_project /home/veronikaplevacova/Plocha/PCS2/synth/filter_vivado.xpr
update_compile_order -fileset sources_1
reset_run synth_1
launch_runs synth_1 -jobs 2
wait_on_run synth_1
open_run synth_1 -name synth_1
report_timing_summary -delay_type min_max -report_unconstrained -check_timing_verbose -max_paths 10 -input_pins -routable_nets -name timing_1
reset_run synth_1
launch_runs synth_1 -jobs 2
wait_on_run synth_1
close_design
open_run synth_1 -name synth_1
report_timing_summary -delay_type min_max -report_unconstrained -check_timing_verbose -max_paths 10 -input_pins -routable_nets -name timing_1
reset_run synth_1
launch_runs synth_1 -jobs 2
wait_on_run synth_1
close_design
open_run synth_1 -name synth_1
report_timing_summary -delay_type min_max -report_unconstrained -check_timing_verbose -max_paths 10 -input_pins -routable_nets -name timing_1
reset_run synth_1
launch_runs synth_1 -jobs 2
wait_on_run synth_1
close_design
open_run synth_1 -name synth_1
report_timing_summary -delay_type min_max -report_unconstrained -check_timing_verbose -max_paths 10 -input_pins -routable_nets -name timing_1
launch_runs impl_1 -jobs 2
wait_on_run impl_1
open_run impl_1
report_timing_summary -delay_type min_max -report_unconstrained -check_timing_verbose -max_paths 10 -input_pins -routable_nets -name timing_1
current_design synth_1
reset_run synth_1
launch_runs synth_1 -jobs 2
wait_on_run synth_1
close_design
close_design
open_run synth_1 -name synth_1
report_utilization -name utilization_1
report_clock_networks -name {network_1}
report_timing_summary -delay_type min_max -report_unconstrained -check_timing_verbose -max_paths 10 -input_pins -routable_nets -name timing_1
report_clock_interaction -delay_type min_max -significant_digits 3 -name timing_2