53 lines
2.6 KiB
VHDL
53 lines
2.6 KiB
VHDL
-- filter_ent.vhd: Exact match filter for IP addresses using multiple parallel hash tables (entity)
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-- Copyright (C) 2019 FIT BUT
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-- Author(s): Lukas Kekely <ikekely@fit.vutbr.cz>
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--
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-- SPDX-License-Identifier: BSD-3-Clause
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library IEEE;
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use IEEE.std_logic_1164.all;
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use IEEE.numeric_std.all;
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use IEEE.std_logic_arith.all;
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use work.functions_package.all;
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entity filter is
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generic(
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-- Width of hashed key (IP address) in bits.
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KEY_WIDTH : natural := 128;
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-- Width of data value associated with each key in bits.
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DATA_WIDTH : natural := 16;
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-- Number of parallel hash tables or hash functions used.
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TABLES : natural := 4;
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-- Number of items in each hash table. Must be a power of 2.
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TABLE_SIZE : natural := 2048;
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-- Enables registers on selected interfaces for better frequency.
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INPUT_REGISTER : boolean := true;
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OUTPUT_REGISTER : boolean := true;
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CONFIG_REGISTER : boolean := true
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);
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port (
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-- Main clock signal and its synchronous reset.
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CLK : in std_logic;
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RESET : in std_logic;
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-- Input interface ---------------------------------------------------------
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INPUT_KEY : in std_logic_vector(KEY_WIDTH-1 downto 0); -- searched key
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INPUT_VALID : in std_logic; -- key valid flag
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-- Output interface --------------------------------------------------------
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OUTPUT_KEY : out std_logic_vector(KEY_WIDTH-1 downto 0); -- delayed searched key
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OUTPUT_KEY_FOUND : out std_logic; -- key was found successfully
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OUTPUT_DATA : out std_logic_vector(DATA_WIDTH-1 downto 0); -- data associated with the found key
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OUTPUT_VALID : out std_logic; -- delayed input valid
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-- Configuration interface (insertion of rules) ----------------------------
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CONFIG_KEY : in std_logic_vector(KEY_WIDTH-1 downto 0); -- key value of a rule
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CONFIG_DATA : in std_logic_vector(DATA_WIDTH-1 downto 0); -- data value of a rule
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CONFIG_EMPTY : in std_logic; -- rule is empty flag (data+key are ignored and rule cannot be matched)
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CONFIG_ADDRESS_TABLE : in std_logic_vector(clog2(TABLES)-1 downto 0); -- address where to write the rule - table selection
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CONFIG_ADDRESS_ITEM : in std_logic_vector(clog2(TABLE_SIZE)-1 downto 0); -- address where to write the rule - item selection in the table
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CONFIG_WRITE : in std_logic -- write enable flag
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);
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end entity;
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