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* #10 CGP Circuits as inputs (#11) * CGP Circuits as inputs * #10 support of signed output in general circuit * input as output works * output connected to input (c) * automated verilog testing * output rename * Implemented CSA and Wallace tree multiplier composing of CSAs. Also did some code cleanup. * Typos fix and code cleanup. * Added new (approximate) multiplier architectures and did some minor changes regarding sign extension for c output formats. * Updated automated testing scripts. * Small bugfix in python code generation (I initially thought this line is useless). * Updated generated circuits folder. Co-authored-by: Vojta Mrazek <mrazek@fit.vutbr.cz>
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{8,8,1,80,2,1,0}([10]4,6,2)([11]3,7,2)([12]10,11,4)([13]10,11,2)([14]5,6,2)([15]4,7,2)([16]13,14,4)([17]13,14,2)([18]16,15,4)([19]16,15,2)([20]17,19,3)([21]5,7,2)([22]4,8,2)([23]20,21,4)([24]20,21,2)([25]23,22,4)([26]23,22,2)([27]24,26,3)([28]3,8,2)([29]2,9,2)([30]28,29,4)([31]28,29,2)([32]3,9,2)([33]31,32,4)([34]31,32,2)([35]5,8,2)([36]34,27,4)([37]34,27,2)([38]36,35,4)([39]36,35,2)([40]37,39,3)([41]2,6,2)([42]3,6,2)([43]2,8,2)([44]4,9,2)([45]2,7,2)([46]5,9,2)([47]42,45,4)([48]42,45,4)([49]42,45,2)([50]43,12,4)([51]43,12,4)([52]43,12,2)([53]51,49,4)([54]51,49,2)([55]52,54,3)([56]18,30,4)([57]18,30,4)([58]18,30,2)([59]57,55,4)([60]57,55,2)([61]58,60,3)([62]25,33,4)([63]25,33,4)([64]25,33,2)([65]63,61,4)([66]63,61,2)([67]64,66,3)([68]47,56,2)([69]50,62,2)([70]68,69,2)([71]70,70,1)([72]67,71,2)([73]44,38,4)([74]44,38,4)([75]44,38,2)([76]74,72,4)([77]74,72,2)([78]75,77,3)([79]40,46,4)([80]40,46,4)([81]40,46,2)([82]80,78,4)([83]80,78,2)([84]81,83,3)([85]73,79,2)([86]72,85,2)([87]85,85,1)([88]84,87,2)([89]86,88,4)(41,48,53,59,65,76,82,89) |