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* #10 CGP Circuits as inputs (#11) * CGP Circuits as inputs * #10 support of signed output in general circuit * input as output works * output connected to input (c) * automated verilog testing * output rename * Implemented CSA and Wallace tree multiplier composing of CSAs. Also did some code cleanup. * Typos fix and code cleanup. * Added new (approximate) multiplier architectures and did some minor changes regarding sign extension for c output formats. * Updated automated testing scripts. * Small bugfix in python code generation (I initially thought this line is useless). * Updated generated circuits folder. Co-authored-by: Vojta Mrazek <mrazek@fit.vutbr.cz>
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{8,8,1,85,2,1,0}([10]4,6,2)([11]3,7,2)([12]10,11,4)([13]10,11,2)([14]5,6,2)([15]4,7,2)([16]13,14,4)([17]13,14,2)([18]16,15,4)([19]16,15,2)([20]17,19,3)([21]5,7,2)([22]4,8,2)([23]20,21,4)([24]20,21,2)([25]23,22,4)([26]23,22,2)([27]24,26,3)([28]3,8,2)([29]2,9,2)([30]28,29,4)([31]28,29,2)([32]3,9,2)([33]31,32,4)([34]31,32,2)([35]5,8,2)([36]34,27,4)([37]34,27,2)([38]36,35,4)([39]36,35,2)([40]37,39,3)([41]2,6,2)([42]3,6,2)([43]2,8,2)([44]4,9,2)([45]2,7,2)([46]5,9,2)([47]42,45,3)([48]42,45,2)([49]42,45,4)([50]43,12,3)([51]43,12,2)([52]43,12,4)([53]52,48,4)([54]48,50,2)([55]51,54,3)([56]18,30,3)([57]18,30,2)([58]18,30,4)([59]58,55,4)([60]56,47,2)([61]48,56,2)([62]61,50,2)([63]51,56,2)([64]62,63,3)([65]57,64,3)([66]25,33,3)([67]25,33,2)([68]25,33,4)([69]68,65,4)([70]66,50,2)([71]48,56,2)([72]66,50,2)([73]71,72,2)([74]51,66,2)([75]74,56,2)([76]57,66,2)([77]73,76,3)([78]75,77,3)([79]67,78,3)([80]44,38,3)([81]44,38,2)([82]44,38,4)([83]82,79,4)([84]79,80,2)([85]81,84,3)([86]40,46,3)([87]40,46,2)([88]40,46,4)([89]88,85,4)([90]79,86,2)([91]90,80,2)([92]81,86,2)([93]91,92,3)([94]87,93,3)(41,49,53,59,69,83,89,94) |