mirror of
https://github.com/ehw-fit/ariths-gen.git
synced 2025-04-10 09:12:11 +01:00
56c86c13ca
* #10 CGP Circuits as inputs (#11) * CGP Circuits as inputs * #10 support of signed output in general circuit * input as output works * output connected to input (c) * automated verilog testing * output rename * Implemented CSA and Wallace tree multiplier composing of CSAs. Also did some code cleanup. * Typos fix and code cleanup. * Added new (approximate) multiplier architectures and did some minor changes regarding sign extension for c output formats. * Updated automated testing scripts. * Small bugfix in python code generation (I initially thought this line is useless). * Updated generated circuits folder. Co-authored-by: Vojta Mrazek <mrazek@fit.vutbr.cz>
1 line
841 B
Plaintext
1 line
841 B
Plaintext
{8,8,1,64,2,1,0}([10]5,6,2)([11]4,7,2)([12]10,11,4)([13]10,11,2)([14]5,7,2)([15]13,14,4)([16]13,14,2)([17]4,6,2)([18]3,7,2)([19]17,18,4)([20]17,18,2)([21]3,8,2)([22]2,9,2)([23]20,21,4)([24]20,21,2)([25]23,22,4)([26]23,22,2)([27]24,26,3)([28]4,8,2)([29]3,9,2)([30]27,28,4)([31]27,28,2)([32]30,29,4)([33]30,29,2)([34]31,33,3)([35]5,8,2)([36]34,16,4)([37]34,16,2)([38]36,35,4)([39]36,35,2)([40]37,39,3)([41]2,6,2)([42]3,6,2)([43]2,8,2)([44]4,9,2)([45]2,7,2)([46]5,9,2)([47]42,45,4)([48]42,45,2)([49]43,19,4)([50]43,19,2)([51]49,48,4)([52]49,48,2)([53]50,52,3)([54]12,25,4)([55]12,25,2)([56]54,53,4)([57]54,53,2)([58]55,57,3)([59]15,32,4)([60]15,32,2)([61]59,58,4)([62]59,58,2)([63]60,62,3)([64]44,38,4)([65]44,38,2)([66]64,63,4)([67]64,63,2)([68]65,67,3)([69]40,46,4)([70]40,46,2)([71]69,68,4)([72]69,68,2)([73]70,72,3)(41,47,51,56,61,66,71,73) |