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* #10 CGP Circuits as inputs (#11) * CGP Circuits as inputs * #10 support of signed output in general circuit * input as output works * output connected to input (c) * automated verilog testing * output rename * Implemented CSA and Wallace tree multiplier composing of CSAs. Also did some code cleanup. * Typos fix and code cleanup. * Added new (approximate) multiplier architectures and did some minor changes regarding sign extension for c output formats. * Updated automated testing scripts. * Small bugfix in python code generation (I initially thought this line is useless). * Updated generated circuits folder. Co-authored-by: Vojta Mrazek <mrazek@fit.vutbr.cz>
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{8,8,1,72,2,1,0}([10]2,6,2)([11]3,6,2)([12]4,6,2)([13]5,6,2)([14]2,7,2)([15]14,11,4)([16]14,11,2)([17]3,7,2)([18]17,12,4)([19]17,12,2)([20]4,7,2)([21]20,13,4)([22]20,13,2)([23]5,7,2)([24]2,8,2)([25]24,18,4)([26]24,18,2)([27]25,16,4)([28]25,16,2)([29]26,28,3)([30]3,8,2)([31]30,21,4)([32]30,21,2)([33]31,19,4)([34]31,19,2)([35]32,34,3)([36]4,8,2)([37]36,23,4)([38]36,23,2)([39]37,22,4)([40]37,22,2)([41]38,40,3)([42]5,8,2)([43]2,9,2)([44]43,33,4)([45]43,33,2)([46]44,29,4)([47]44,29,2)([48]45,47,3)([49]3,9,2)([50]49,39,4)([51]49,39,2)([52]50,35,4)([53]50,35,2)([54]51,53,3)([55]4,9,2)([56]55,42,4)([57]55,42,2)([58]56,41,4)([59]56,41,2)([60]57,59,3)([61]5,9,2)([62]52,48,3)([63]52,48,2)([64]52,48,4)([65]58,54,3)([66]58,54,2)([67]58,54,4)([68]67,63,4)([69]63,65,2)([70]66,69,3)([71]61,60,3)([72]61,60,2)([73]61,60,4)([74]73,70,4)([75]71,62,2)([76]63,71,2)([77]76,65,2)([78]66,71,2)([79]77,78,3)([80]72,79,3)([81]63,71,2)(10,15,27,46,64,68,74,80) |