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* #10 CGP Circuits as inputs (#11) * CGP Circuits as inputs * #10 support of signed output in general circuit * input as output works * output connected to input (c) * automated verilog testing * output rename * Implemented CSA and Wallace tree multiplier composing of CSAs. Also did some code cleanup. * Typos fix and code cleanup. * Added new (approximate) multiplier architectures and did some minor changes regarding sign extension for c output formats. * Updated automated testing scripts. * Small bugfix in python code generation (I initially thought this line is useless). * Updated generated circuits folder. Co-authored-by: Vojta Mrazek <mrazek@fit.vutbr.cz>
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{8,8,1,64,2,1,0}([10]2,6,2)([11]3,6,2)([12]4,6,2)([13]5,6,2)([14]2,7,2)([15]14,11,4)([16]14,11,2)([17]3,7,2)([18]17,12,4)([19]17,12,2)([20]18,16,4)([21]18,16,2)([22]19,21,3)([23]4,7,2)([24]23,13,4)([25]23,13,2)([26]24,22,4)([27]24,22,2)([28]25,27,3)([29]5,7,2)([30]29,28,4)([31]29,28,2)([32]2,8,2)([33]32,20,4)([34]32,20,2)([35]3,8,2)([36]35,26,4)([37]35,26,2)([38]36,34,4)([39]36,34,2)([40]37,39,3)([41]4,8,2)([42]41,30,4)([43]41,30,2)([44]42,40,4)([45]42,40,2)([46]43,45,3)([47]5,8,2)([48]47,31,4)([49]47,31,2)([50]48,46,4)([51]48,46,2)([52]49,51,3)([53]2,9,2)([54]53,38,4)([55]53,38,2)([56]3,9,2)([57]56,44,4)([58]56,44,2)([59]57,55,4)([60]57,55,2)([61]58,60,3)([62]4,9,2)([63]62,50,4)([64]62,50,2)([65]63,61,4)([66]63,61,2)([67]64,66,3)([68]5,9,2)([69]68,52,4)([70]68,52,2)([71]69,67,4)([72]69,67,2)([73]70,72,3)(10,15,33,54,59,65,71,73) |