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* #10 CGP Circuits as inputs (#11) * CGP Circuits as inputs * #10 support of signed output in general circuit * input as output works * output connected to input (c) * automated verilog testing * output rename * Implemented CSA and Wallace tree multiplier composing of CSAs. Also did some code cleanup. * Typos fix and code cleanup. * Added new (approximate) multiplier architectures and did some minor changes regarding sign extension for c output formats. * Updated automated testing scripts. * Small bugfix in python code generation (I initially thought this line is useless). * Updated generated circuits folder. Co-authored-by: Vojta Mrazek <mrazek@fit.vutbr.cz>
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{8,8,1,83,2,1,0}([10]4,6,2)([11]3,7,2)([12]10,11,4)([13]10,11,2)([14]5,6,5)([15]4,7,2)([16]13,14,4)([17]13,14,2)([18]16,15,4)([19]16,15,2)([20]17,19,3)([21]5,7,5)([22]20,20,1)([23]22,21,4)([24]22,21,2)([25]20,24,3)([26]3,8,2)([27]2,9,5)([28]26,27,4)([29]26,27,2)([30]4,8,2)([31]3,9,5)([32]29,30,4)([33]29,30,2)([34]32,31,4)([35]32,31,2)([36]33,35,3)([37]5,8,5)([38]36,25,4)([39]36,25,2)([40]38,37,4)([41]38,37,2)([42]39,41,3)([43]2,6,2)([44]3,6,2)([45]2,8,2)([46]4,9,5)([47]2,7,2)([48]5,9,2)([49]44,47,4)([50]44,47,4)([51]44,47,2)([52]45,12,4)([53]45,12,4)([54]45,12,2)([55]53,51,4)([56]53,51,2)([57]54,56,3)([58]18,28,4)([59]18,28,4)([60]18,28,2)([61]59,57,4)([62]59,57,2)([63]60,62,3)([64]23,34,4)([65]23,34,4)([66]23,34,2)([67]65,63,4)([68]65,63,2)([69]66,68,3)([70]49,58,2)([71]52,64,2)([72]70,71,2)([73]72,72,1)([74]69,73,2)([75]46,40,4)([76]46,40,4)([77]46,40,2)([78]76,74,4)([79]76,74,2)([80]77,79,3)([81]42,48,4)([82]42,48,4)([83]42,48,2)([84]82,80,4)([85]82,80,2)([86]83,85,3)([87]75,81,2)([88]74,87,2)([89]87,87,1)([90]86,89,2)([91]88,90,4)([92]91,91,1)(43,50,55,61,67,78,84,92) |