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* #10 CGP Circuits as inputs (#11) * CGP Circuits as inputs * #10 support of signed output in general circuit * input as output works * output connected to input (c) * automated verilog testing * output rename * Implemented CSA and Wallace tree multiplier composing of CSAs. Also did some code cleanup. * Typos fix and code cleanup. * Added new (approximate) multiplier architectures and did some minor changes regarding sign extension for c output formats. * Updated automated testing scripts. * Small bugfix in python code generation (I initially thought this line is useless). * Updated generated circuits folder. Co-authored-by: Vojta Mrazek <mrazek@fit.vutbr.cz>
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{24,13,1,59,2,1,0}([26]2,14,4)([27]2,14,2)([28]3,15,4)([29]3,15,2)([30]28,27,4)([31]28,27,2)([32]29,31,3)([33]4,16,4)([34]4,16,2)([35]33,32,4)([36]33,32,2)([37]34,36,3)([38]5,17,4)([39]5,17,2)([40]38,37,4)([41]38,37,2)([42]39,41,3)([43]6,18,4)([44]6,18,2)([45]43,42,4)([46]43,42,2)([47]44,46,3)([48]7,19,4)([49]7,19,2)([50]48,47,4)([51]48,47,2)([52]49,51,3)([53]8,20,4)([54]8,20,2)([55]53,52,4)([56]53,52,2)([57]54,56,3)([58]9,21,4)([59]9,21,2)([60]58,57,4)([61]58,57,2)([62]59,61,3)([63]10,22,4)([64]10,22,2)([65]63,62,4)([66]63,62,2)([67]64,66,3)([68]11,23,4)([69]11,23,2)([70]68,67,4)([71]68,67,2)([72]69,71,3)([73]12,24,4)([74]12,24,2)([75]73,72,4)([76]73,72,2)([77]74,76,3)([78]13,25,4)([79]13,25,2)([80]78,77,4)([81]78,77,2)([82]79,81,3)([83]13,25,4)([84]83,82,4)(26,30,35,40,45,50,55,60,65,70,75,80,84) |