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* #10 CGP Circuits as inputs (#11) * CGP Circuits as inputs * #10 support of signed output in general circuit * input as output works * output connected to input (c) * automated verilog testing * output rename * Implemented CSA and Wallace tree multiplier composing of CSAs. Also did some code cleanup. * Typos fix and code cleanup. * Added new (approximate) multiplier architectures and did some minor changes regarding sign extension for c output formats. * Updated automated testing scripts. * Small bugfix in python code generation (I initially thought this line is useless). * Updated generated circuits folder. Co-authored-by: Vojta Mrazek <mrazek@fit.vutbr.cz>
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{8,5,1,19,2,1,0}([10]2,6,4)([11]2,6,2)([12]3,7,4)([13]3,7,2)([14]12,11,4)([15]11,12,2)([16]15,13,3)([17]4,8,4)([18]4,8,2)([19]17,16,4)([20]16,17,2)([21]20,18,3)([22]5,9,4)([23]5,9,2)([24]22,21,4)([25]21,22,2)([26]25,23,3)([27]5,9,4)([28]27,26,4)(10,14,19,24,28) |