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* #10 CGP Circuits as inputs (#11) * CGP Circuits as inputs * #10 support of signed output in general circuit * input as output works * output connected to input (c) * automated verilog testing * output rename * Implemented CSA and Wallace tree multiplier composing of CSAs. Also did some code cleanup. * Typos fix and code cleanup. * Added new (approximate) multiplier architectures and did some minor changes regarding sign extension for c output formats. * Updated automated testing scripts. * Small bugfix in python code generation (I initially thought this line is useless). * Updated generated circuits folder. Co-authored-by: Vojta Mrazek <mrazek@fit.vutbr.cz>
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{8,8,1,88,2,1,0}([10]5,6,5)([11]4,7,2)([12]10,11,4)([13]10,11,2)([14]5,7,5)([15]13,13,1)([16]15,14,4)([17]15,14,2)([18]13,17,3)([19]4,6,2)([20]3,7,2)([21]19,20,4)([22]19,20,2)([23]3,8,2)([24]2,9,5)([25]22,23,4)([26]22,23,2)([27]25,24,4)([28]25,24,2)([29]26,28,3)([30]4,8,2)([31]3,9,5)([32]29,30,4)([33]29,30,2)([34]32,31,4)([35]32,31,2)([36]33,35,3)([37]5,8,5)([38]36,18,4)([39]36,18,2)([40]38,37,4)([41]38,37,2)([42]39,41,3)([43]2,6,2)([44]3,6,2)([45]2,8,2)([46]4,9,5)([47]2,7,2)([48]5,9,2)([49]44,47,3)([50]44,47,2)([51]44,47,4)([52]45,21,3)([53]45,21,2)([54]45,21,4)([55]54,50,4)([56]50,52,2)([57]53,56,3)([58]12,27,3)([59]12,27,2)([60]12,27,4)([61]60,57,4)([62]58,49,2)([63]50,58,2)([64]63,52,2)([65]53,58,2)([66]64,65,3)([67]59,66,3)([68]16,34,3)([69]16,34,2)([70]16,34,4)([71]70,67,4)([72]68,52,2)([73]50,58,2)([74]68,52,2)([75]73,74,2)([76]53,68,2)([77]76,58,2)([78]59,68,2)([79]75,78,3)([80]77,79,3)([81]69,80,3)([82]46,40,3)([83]46,40,2)([84]46,40,4)([85]84,81,4)([86]81,82,2)([87]83,86,3)([88]42,48,3)([89]42,48,2)([90]42,48,4)([91]90,87,4)([92]81,88,2)([93]92,82,2)([94]83,88,2)([95]93,94,3)([96]89,95,3)([97]96,96,1)(43,51,55,61,71,85,91,97) |