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* #10 CGP Circuits as inputs (#11) * CGP Circuits as inputs * #10 support of signed output in general circuit * input as output works * output connected to input (c) * automated verilog testing * output rename * Implemented CSA and Wallace tree multiplier composing of CSAs. Also did some code cleanup. * Typos fix and code cleanup. * Added new (approximate) multiplier architectures and did some minor changes regarding sign extension for c output formats. * Updated automated testing scripts. * Small bugfix in python code generation (I initially thought this line is useless). * Updated generated circuits folder. Co-authored-by: Vojta Mrazek <mrazek@fit.vutbr.cz>
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{16,9,1,59,2,1,0}([18]2,10,4)([19]2,10,4)([20]2,10,2)([21]3,11,4)([22]3,11,4)([23]3,11,2)([24]22,20,4)([25]22,20,2)([26]23,25,3)([27]4,12,4)([28]4,12,4)([29]4,12,2)([30]28,26,4)([31]28,26,2)([32]29,31,3)([33]5,13,4)([34]5,13,4)([35]5,13,2)([36]34,32,4)([37]34,32,2)([38]35,37,3)([39]18,27,2)([40]21,33,2)([41]39,40,2)([42]41,41,1)([43]38,42,2)([44]6,14,4)([45]6,14,4)([46]6,14,2)([47]45,43,4)([48]45,43,2)([49]46,48,3)([50]7,15,4)([51]7,15,4)([52]7,15,2)([53]51,49,4)([54]51,49,2)([55]52,54,3)([56]8,16,4)([57]8,16,4)([58]8,16,2)([59]57,55,4)([60]57,55,2)([61]58,60,3)([62]9,17,4)([63]9,17,4)([64]9,17,2)([65]63,61,4)([66]63,61,2)([67]64,66,3)([68]44,56,2)([69]50,62,2)([70]68,69,2)([71]43,70,2)([72]70,70,1)([73]67,72,2)([74]71,73,4)([75]9,17,4)([76]75,74,4)(19,24,30,36,47,53,59,65,76) |