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* #10 CGP Circuits as inputs (#11) * CGP Circuits as inputs * #10 support of signed output in general circuit * input as output works * output connected to input (c) * automated verilog testing * output rename * Implemented CSA and Wallace tree multiplier composing of CSAs. Also did some code cleanup. * Typos fix and code cleanup. * Added new (approximate) multiplier architectures and did some minor changes regarding sign extension for c output formats. * Updated automated testing scripts. * Small bugfix in python code generation (I initially thought this line is useless). * Updated generated circuits folder. Co-authored-by: Vojta Mrazek <mrazek@fit.vutbr.cz>
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{24,13,1,90,2,1,0}([26]2,14,4)([27]2,14,4)([28]2,14,2)([29]3,15,4)([30]3,15,4)([31]3,15,2)([32]30,28,4)([33]30,28,2)([34]31,33,3)([35]4,16,4)([36]4,16,4)([37]4,16,2)([38]36,34,4)([39]36,34,2)([40]37,39,3)([41]5,17,4)([42]5,17,4)([43]5,17,2)([44]42,40,4)([45]42,40,2)([46]43,45,3)([47]26,35,2)([48]29,41,2)([49]47,48,2)([50]49,49,1)([51]46,50,2)([52]6,18,4)([53]6,18,4)([54]6,18,2)([55]53,51,4)([56]53,51,2)([57]54,56,3)([58]7,19,4)([59]7,19,4)([60]7,19,2)([61]59,57,4)([62]59,57,2)([63]60,62,3)([64]8,20,4)([65]8,20,4)([66]8,20,2)([67]65,63,4)([68]65,63,2)([69]66,68,3)([70]9,21,4)([71]9,21,4)([72]9,21,2)([73]71,69,4)([74]71,69,2)([75]72,74,3)([76]52,64,2)([77]58,70,2)([78]76,77,2)([79]51,78,2)([80]78,78,1)([81]75,80,2)([82]79,81,4)([83]10,22,4)([84]10,22,4)([85]10,22,2)([86]84,82,4)([87]84,82,2)([88]85,87,3)([89]11,23,4)([90]11,23,4)([91]11,23,2)([92]90,88,4)([93]90,88,2)([94]91,93,3)([95]12,24,4)([96]12,24,4)([97]12,24,2)([98]96,94,4)([99]96,94,2)([100]97,99,3)([101]13,25,4)([102]13,25,4)([103]13,25,2)([104]102,100,4)([105]102,100,2)([106]103,105,3)([107]83,95,2)([108]89,101,2)([109]107,108,2)([110]82,109,2)([111]109,109,1)([112]106,111,2)([113]110,112,4)([114]13,25,4)([115]114,113,4)(27,32,38,44,55,61,67,73,86,92,98,104,115) |