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* #10 CGP Circuits as inputs (#11) * CGP Circuits as inputs * #10 support of signed output in general circuit * input as output works * output connected to input (c) * automated verilog testing * output rename * Implemented CSA and Wallace tree multiplier composing of CSAs. Also did some code cleanup. * Typos fix and code cleanup. * Added new (approximate) multiplier architectures and did some minor changes regarding sign extension for c output formats. * Updated automated testing scripts. * Small bugfix in python code generation (I initially thought this line is useless). * Updated generated circuits folder. Co-authored-by: Vojta Mrazek <mrazek@fit.vutbr.cz>
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{8,8,1,73,2,1,0}([10]2,6,2)([11]3,6,2)([12]4,6,2)([13]5,6,5)([14]2,7,2)([15]14,11,4)([16]14,11,2)([17]3,7,2)([18]17,12,4)([19]17,12,2)([20]4,7,2)([21]20,13,4)([22]20,13,2)([23]5,7,5)([24]23,23,1)([25]2,8,2)([26]25,18,4)([27]25,18,2)([28]26,16,4)([29]26,16,2)([30]27,29,3)([31]3,8,2)([32]31,21,4)([33]31,21,2)([34]32,19,4)([35]32,19,2)([36]33,35,3)([37]4,8,2)([38]37,24,4)([39]37,24,2)([40]38,22,4)([41]38,22,2)([42]39,41,3)([43]5,8,5)([44]43,23,4)([45]43,23,2)([46]2,9,5)([47]46,34,4)([48]46,34,2)([49]47,30,4)([50]47,30,2)([51]48,50,3)([52]3,9,5)([53]52,40,4)([54]52,40,2)([55]53,36,4)([56]53,36,2)([57]54,56,3)([58]4,9,5)([59]58,44,4)([60]58,44,2)([61]59,42,4)([62]59,42,2)([63]60,62,3)([64]5,9,2)([65]64,45,4)([66]64,45,2)([67]55,51,4)([68]55,51,2)([69]61,57,4)([70]61,57,2)([71]69,68,4)([72]69,68,2)([73]70,72,3)([74]65,63,4)([75]65,63,2)([76]74,73,4)([77]74,73,2)([78]75,77,3)([79]66,66,1)([80]79,78,4)([81]79,78,2)([82]66,81,3)(10,15,28,49,67,71,76,80) |