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* #10 CGP Circuits as inputs (#11) * CGP Circuits as inputs * #10 support of signed output in general circuit * input as output works * output connected to input (c) * automated verilog testing * output rename * Implemented CSA and Wallace tree multiplier composing of CSAs. Also did some code cleanup. * Typos fix and code cleanup. * Added new (approximate) multiplier architectures and did some minor changes regarding sign extension for c output formats. * Updated automated testing scripts. * Small bugfix in python code generation (I initially thought this line is useless). * Updated generated circuits folder. Co-authored-by: Vojta Mrazek <mrazek@fit.vutbr.cz>
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{8,8,1,67,2,1,0}([10]2,6,2)([11]3,6,2)([12]4,6,2)([13]5,6,5)([14]2,7,2)([15]14,11,4)([16]14,11,2)([17]3,7,2)([18]17,12,4)([19]17,12,2)([20]18,16,4)([21]18,16,2)([22]19,21,3)([23]4,7,2)([24]23,13,4)([25]23,13,2)([26]24,22,4)([27]24,22,2)([28]25,27,3)([29]5,7,5)([30]29,29,1)([31]30,28,4)([32]30,28,2)([33]29,32,3)([34]2,8,2)([35]34,20,4)([36]34,20,2)([37]3,8,2)([38]37,26,4)([39]37,26,2)([40]38,36,4)([41]38,36,2)([42]39,41,3)([43]4,8,2)([44]43,31,4)([45]43,31,2)([46]44,42,4)([47]44,42,2)([48]45,47,3)([49]5,8,5)([50]49,33,4)([51]49,33,2)([52]50,48,4)([53]50,48,2)([54]51,53,3)([55]2,9,5)([56]55,40,4)([57]55,40,2)([58]3,9,5)([59]58,46,4)([60]58,46,2)([61]59,57,4)([62]59,57,2)([63]60,62,3)([64]4,9,5)([65]64,52,4)([66]64,52,2)([67]65,63,4)([68]65,63,2)([69]66,68,3)([70]5,9,2)([71]70,54,4)([72]70,54,2)([73]71,69,4)([74]71,69,2)([75]72,74,3)([76]75,75,1)(10,15,35,56,61,67,73,76) |