honzastor
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97e79b93da
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Big code cleanup and some fixes. Hierarchical generation for popcount seems problematic. It seems bus connections are the issue.
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2024-04-13 17:04:03 +02:00 |
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honzastor
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d52e67bb25
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Implemented new parallel prefix adders and added the possibility for better configuration of partial product accumulators (adders) used in multipliers.
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2023-02-24 11:13:46 +01:00 |
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Honza
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9e186d10ed
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Typos fix and code cleanup.
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2022-02-18 17:24:09 +01:00 |
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Honza
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2083ed35a1
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Returned inner circuit's input buses extension feature back to its original form.
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2021-11-15 22:58:34 +01:00 |
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honzastor
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5d41997560
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Added assertion checks for the same input bus lengths when initializing arithmetic circuits.
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2021-10-24 18:48:00 +02:00 |
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honzastor
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16c1757bc3
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Added signedness support for the output C code representation. Also modified the testing scripts and the chr2c.py converter accordingly and did some documentation changes (even made a small change in readme.md). Signedness support for the output python representation is TBD.
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2021-10-09 23:45:54 +02:00 |
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honzastor
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e16de78c2b
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Updated logic behind generating export representations, mainly focused around circuit and its buses and subcomponents namings.
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2021-09-07 17:39:39 +02:00 |
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Vojta Mrazek
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8c0f24cd2d
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General MAC circuit
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2021-09-06 12:52:13 +02:00 |
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honzastor
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ad1c6ec557
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Updated circuits documentation.
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2021-04-21 13:42:07 +02:00 |
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honzastor
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8e950fc51f
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Optimized circuits generation, refactored code, fixed cla, added new csa, array divider circuits and create yosys equivalence check script. TBD: Documentation and sample generated circuits.
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2021-04-21 11:33:07 +02:00 |
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honzastor
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a336a683e7
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Added some code documentation and updated git action to generate it.
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2021-03-31 04:40:54 +02:00 |
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honzastor
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69e2514852
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Updated project's structure. Renamed class names to properly fit Python naming convention. TBD: proper documentation.
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2021-03-30 03:04:48 +02:00 |
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