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CGP circuit checks

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This commit is contained in:
Vojta Mrazek 2023-04-13 12:09:07 +02:00
parent a44b0638a1
commit f853a46703
2 changed files with 10 additions and 3 deletions
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11
ariths_gen/core/cgp_circuit.py
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@ -60,8 +60,12 @@ class UnsignedCGPCircuit(GeneralCircuit):
i, in_a, in_b, fn = map(int, re.match( i, in_a, in_b, fn = map(int, re.match(
r"\(?\[(\d+)\](\d+),(\d+),(\d+)\)?", definition).groups()) r"\(?\[(\d+)\](\d+),(\d+),(\d+)\)?", definition).groups())
assert in_a < i if in_a > i or in_b > i:
assert in_b < i raise ValueError(f"Backward connection in CGP gene \"{definition}\", maxid = {i}")
if in_a == i or in_b == i:
raise ValueError(f"Loop connection in CGP gene: \"{definition}\", maxid = {i}")
comp_set = dict(prefix=f"{self.prefix}_core_{i:03d}", parent_component=self) comp_set = dict(prefix=f"{self.prefix}_core_{i:03d}", parent_component=self)
a, b = self._get_wire(in_a), self._get_wire(in_b) a, b = self._get_wire(in_a), self._get_wire(in_b)
@ -91,6 +95,9 @@ class UnsignedCGPCircuit(GeneralCircuit):
# Output connection # Output connection
for i, o in enumerate(map(int, cgp_outputs.split(","))): for i, o in enumerate(map(int, cgp_outputs.split(","))):
if o >= c_in + c_rows * c_cols + 2:
raise ValueError(
f"Output {i} is connected to wire {o} which is not in the range of CGP wires ({c_in + c_rows * c_cols + 2})")
w = self._get_wire(o) w = self._get_wire(o)
self.out.connect(i, w) self.out.connect(i, w)

2
ariths_gen/wire_components/wires.py
View File

@ -99,7 +99,7 @@ class Wire():
if self.is_const(): if self.is_const():
return f"({self.c_const}) << {offset};\n" return f"({self.c_const}) << {offset};\n"
else: else:
return f"(({self.name} >> 0) & 0x01ull) << {offset};\n" return f"(({self.prefix} >> {self.index}) & 0x01ull) << {offset};\n"
def return_wire_value_c_hier(self, offset: int = 0): def return_wire_value_c_hier(self, offset: int = 0):
"""Retrieves desired bit value from wire represented in C code variable and bitwise shifts it to desired position for storing it within a bus for hierarchical generation. """Retrieves desired bit value from wire represented in C code variable and bitwise shifts it to desired position for storing it within a bus for hierarchical generation.