228 lines
9.5 KiB
Python
228 lines
9.5 KiB
Python
from wire_components import wire, bus
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from logic_gates_generator import and_gate, xor_gate, or_gate
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import sys
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# ARITMETICKE OBVODY
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class arithmetic_circuit():
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def __init__(self):
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self.components = []
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self.circuit_wires = []
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self.c_data_type = "uint64_t"
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self.input_N = 0
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self.carry_out_gate = None
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self.sum_out_gates = []
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def add_component(self, component):
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self.components.append(component)
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def get_previous_component(self):
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return self.components[-1]
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def get_sum_wire(self):
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return self.out.get_wire(0)
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def get_carry_wire(self):
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return self.out.get_wire(1)
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@staticmethod
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def get_includes_c():
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return f"#include <stdio.h>\n#include <stdint.h>\n\n"
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def get_prototype_c(self):
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return f"{self.c_data_type} {self.prefix}({self.c_data_type} {self.a.prefix}, {self.c_data_type} {self.b.prefix})" + "{" + '\n'
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def get_declaration_c(self):
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return f"".join([c.get_declaration_c() for c in self.components])
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def get_initialization_c(self):
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return "".join([c.get_initialization_c() for c in self.components])
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def get_function_sum_c(self):
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return "".join([c.get_function_sum_c(self.components.index(c)) for c in self.components])
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def get_function_carry_c(self):
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return f"{self.get_previous_component().get_function_carry_c(offset=self.out.N-1)}"
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# Generovani aritmetickeho obvodu do jazyka C
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def get_c_code(self, file_object):
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file_object.write(self.get_includes_c())
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file_object.write(self.get_prototype_c())
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file_object.write(self.out.get_declaration_c())
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file_object.write(self.get_declaration_c())
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file_object.write(self.get_initialization_c())
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file_object.write(self.get_function_sum_c())
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file_object.write(self.get_function_carry_c())
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file_object.write(f" return {self.out.prefix}"+";\n}")
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file_object.close()
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class half_adder(arithmetic_circuit):
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def __init__(self, a: wire, b: wire, prefix: str = "ha"):
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super().__init__()
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self.c_data_type = "uint8_t"
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self.prefix = prefix
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self.a = a
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self.b = b
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# 2 draty pro vystupy komponenty (sum, cout)
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self.out = bus("out", 2)
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# Sum
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# XOR hradlo pro vypocet jednobitového souctu (sum)
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obj_xor_gate = xor_gate(a, b, prefix, outid=0)
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self.add_component(obj_xor_gate)
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self.out.connect(0, obj_xor_gate.output)
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# Cout
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# AND hradlo pro vypocet jednobitoveho priznaku prenosu do vyssiho radu (cout)jednobitového souctu (sum)
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obj_and_gate = and_gate(a, b, prefix, outid=1)
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self.add_component(obj_and_gate)
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self.out.connect(1, obj_and_gate.output)
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def get_prototype_c(self):
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return f"{self.c_data_type} {self.prefix}({self.c_data_type} {self.a.name}, {self.c_data_type} {self.b.name})" + "{" + '\n'
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# Ziskani vsech unikatnich vodicu obvodu ze vsech hradel k zajisteni neopakujicich se deklaraci stejnych vodicu
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def get_declaration_c(self):
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for component in self.components:
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if not [item for item in self.circuit_wires if item[1] == component.a.name]:
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self.circuit_wires.append((component.a, component.a.name))
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if not [item for item in self.circuit_wires if item[1] == component.b.name]:
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self.circuit_wires.append((component.b, component.b.name))
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if not [item for item in self.circuit_wires if item[1] == component.output.name]:
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self.circuit_wires.append((component.output, component.output.name))
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# Unikatni deklarace vsech propoju obvodu
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return "".join([c[0].get_declaration_c() for c in self.circuit_wires])
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# Inicializace hodnot vodicu polovicni scitacky
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def get_initialization_c(self):
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return f" {self.components[0].a.name} = {self.a.get_wire_value_c(offset=self.a.index)};\n" + \
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f" {self.components[0].b.name} = {self.b.get_wire_value_c(offset=self.b.index)};\n" + \
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f" {self.components[0].output.name} = {self.components[0].get_initialization_c()};\n" + \
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f" {self.components[1].output.name} = {self.components[1].get_initialization_c()};\n"
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def get_function_sum_c(self, offset: int = 0):
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return f" {self.out.prefix} |= {self.components[0].output.return_wire_value_c(offset = offset)};\n"
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def get_function_carry_c(self, offset: int = 1):
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return f" {self.out.prefix} |= {self.components[1].output.return_wire_value_c(offset = offset)};\n"
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class full_adder(arithmetic_circuit):
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def __init__(self, a: wire, b: wire, c: wire, prefix: str = "fa"):
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super().__init__()
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self.c_data_type = "uint8_t"
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self.prefix = prefix
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self.a = a
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self.b = b
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self.c = c
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# 2 draty pro vystupy komponenty (sum, cout)
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self.out = bus("out", 2)
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# PG logika
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propagate_xor_gate1 = xor_gate(a, b, prefix, outid=0)
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self.add_component(propagate_xor_gate1)
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generate_and_gate1 = and_gate(a, b, prefix, outid=1)
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self.add_component(generate_and_gate1)
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# Sum
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# XOR hradlo pro vypocet jednobitového souctu (sum)
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obj_xor_gate2 = xor_gate(propagate_xor_gate1.output, c, prefix, outid=2)
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self.add_component(obj_xor_gate2)
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self.out.connect(0, obj_xor_gate2.output)
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# Cout
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# AND hradlo pro vypocet jednobitoveho priznaku prenosu do vyssiho radu (cout)jednobitového souctu (sum)
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obj_and_gate2 = and_gate(propagate_xor_gate1.output, c, prefix, outid=3)
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self.add_component(obj_and_gate2)
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obj_or_gate = or_gate(generate_and_gate1.output, obj_and_gate2.output, prefix, outid=4)
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self.add_component(obj_or_gate)
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self.out.connect(1, obj_or_gate.output)
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# TODO nechat do budoucna?
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self.propagate = propagate_xor_gate1.output
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self.generate = generate_and_gate1.output
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# 3 vstupy spolu s carry in
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def get_prototype_c(self):
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return f"{self.c_data_type} {self.prefix}({self.c_data_type} {self.a.name}, {self.c_data_type} {self.b.name}, {self.c_data_type} {self.c.name})" + "{" + '\n'
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def get_declaration_c(self):
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for component in self.components:
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if not [item for item in self.circuit_wires if item[1] == component.a.name]:
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self.circuit_wires.append((component.a, component.a.name))
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if not [item for item in self.circuit_wires if item[1] == component.b.name]:
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self.circuit_wires.append((component.b, component.b.name))
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if not [item for item in self.circuit_wires if item[1] == component.output.name]:
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self.circuit_wires.append((component.output, component.output.name))
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# Unikatni deklarace vsech propoju obvodu
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return "".join([c[0].get_declaration_c() for c in self.circuit_wires])
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# Inicializace hodnot vodicu uplne scitacky
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def get_initialization_c(self):
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return f" {self.components[0].a.name} = {self.a.get_wire_value_c(offset=self.a.index)};\n" + \
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f" {self.components[0].b.name} = {self.b.get_wire_value_c(offset=self.b.index)};\n" + \
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f" {self.components[2].b.name} = {self.c.get_wire_value_c()};\n" + \
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f" {self.components[0].output.name} = {self.components[0].get_initialization_c()};\n" + \
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f" {self.components[1].output.name} = {self.components[1].get_initialization_c()};\n" + \
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f" {self.components[2].output.name} = {self.components[2].get_initialization_c()};\n" + \
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f" {self.components[3].output.name} = {self.components[3].get_initialization_c()};\n" + \
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f" {self.components[4].output.name} = {self.components[4].get_initialization_c()};\n"
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def get_function_sum_c(self, offset: int = 0):
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return f" {self.out.prefix} |= {self.components[2].output.return_wire_value_c(offset = offset)};\n"
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def get_function_carry_c(self, offset: int = 1):
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return f" {self.out.prefix} |= {self.components[4].output.return_wire_value_c(offset = offset)};\n"
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class ripple_carry_adder(arithmetic_circuit):
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def __init__(self, a: bus, b: bus, prefix: str = "rca"):
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super().__init__()
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N = max(a.N, b.N)
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self.prefix = prefix+str(N)
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self.a = a
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self.b = b
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# Vystupni draty pro N souctu a vystupni priznak prenosu do vyssiho radu (cout)
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self.out = bus("out", N+1)
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# Postupne pridani jednobitovych scitacek
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for input_index in range(N):
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# Prvni je polovicni scitacka
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if input_index == 0:
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obj_ha = half_adder(a.get_wire(input_index), b.get_wire(input_index), prefix=self.prefix+"_ha")
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self.add_component(obj_ha)
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self.out.connect(input_index, obj_ha)
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else:
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obj_fa = full_adder(a.get_wire(input_index), b.get_wire(input_index), self.get_previous_component().get_carry_wire(), prefix=self.prefix+"_fa"+str(input_index))
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self.add_component(obj_fa)
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self.out.connect(input_index, obj_fa.get_sum_wire())
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if input_index == (N-1):
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self.out.connect(N, obj_fa.get_carry_wire())
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if __name__ == "__main__":
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# Vytvoreni obvodu 8 bitove postupne scitacky
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a = bus(N=8, prefix="a")
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b = bus(N=8, prefix="b")
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rca = ripple_carry_adder(a, b)
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# Export do jazyka C (flat)
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rca.get_c_code(open("rca_8.c", "w"))
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# Vytvoreni logickeho hradla OR
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a1 = wire("a", 1)
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b1 = wire("b", 0)
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xor_gate = xor_gate(a1, b1)
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# Export do jazyka C (flat)
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xor_gate.get_c_code(sys.stdout)
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