Vojta Mrazek 0a487ee699 CGP format

2021-06-23 14:08:49 +02:00

..

__init__.py

Generated sample circuits for various representations. Updated C code circuits testing simulations and did some cleanup.

2021-04-23 02:44:14 +02:00

arithmetic_circuit.py

CGP format

2021-06-23 14:08:49 +02:00

multiplier_circuit.py

Optimized circuits generation, refactored code, fixed cla, added new csa, array divider circuits and create yosys equivalence check script. TBD: Documentation and sample generated circuits.

2021-04-21 11:33:07 +02:00