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242 lines
16 KiB
Python
242 lines
16 KiB
Python
from ariths_gen.wire_components import (
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ConstantWireValue0,
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ConstantWireValue1,
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Bus
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)
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from ariths_gen.core.arithmetic_circuits import (
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MultiplierCircuit
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)
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from ariths_gen.one_bit_circuits.one_bit_components import (
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HalfAdder,
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FullAdder,
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XorGateComponent
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)
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from ariths_gen.one_bit_circuits.logic_gates import (
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AndGate,
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NandGate,
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NorGate
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)
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class UnsignedArrayMultiplier(MultiplierCircuit):
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"""Class representing unsigned array multiplier.
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Unsigned array multiplier represents N-bit multiplier composed of
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many AND gates and half/full adders to calculate partial products and
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gradually sum them.
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Downside is its rather big area because it is composed of many logic gates.
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```
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A3B0 A2B0 A1B0 A0B0
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│ │ │ │ │ │ │ │
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┌▼─▼┐ ┌▼─▼┐ ┌▼─▼┐ ┌▼─▼┐
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│AND│ │AND│ │AND│ │AND│
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└┬──┘ └┬──┘ └┬──┘ └─┬─┘
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A3B1 │ A2B1 │ A1B1 │ A0B1 │
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┌▼─▼┐ │ ┌▼─▼┐ │ ┌▼─▼┐ │ ┌▼─▼┐ │
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│AND│ │ │AND│ │ │AND│ │ │AND│ │
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└┬──┘ │ └┬──┘ │ └┬──┘ │ └┬──┘ │
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│ │ │ │ │ │ │ │
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┌───▼┐ ┌▼──▼┐ ┌▼──▼┐ ┌▼──▼┐ │
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│ │ │ │ │ │ │ │ │
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┌───────┤ HA │◄──┤ FA │◄──┤ FA │◄──┤ HA │ │
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│ │ │ │ │ │ │ │ │ │
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│ └┬───┘ └┬───┘ └┬───┘ └─┬──┘ │
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│ A3B2 │ A2B2 │ A1B2 │ A0B2 │ │
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│ ┌▼─▼┐ │ ┌▼─▼┐ │ ┌▼─▼┐ │ ┌▼─▼┐ │ │
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│ │AND│ │ │AND│ │ │AND│ │ │AND│ │ │
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│ └┬──┘ │ └┬──┘ │ └┬──┘ │ └┬──┘ │ │
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│ │ │ │ │ │ │ │ │ │
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┌▼──▼┐ ┌▼──▼┐ ┌▼──▼┐ ┌▼──▼┐ │ │
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│ │ │ │ │ │ │ │ │ │
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┌───────┤ FA │◄──┤ FA │◄──┤ FA │◄──┤ HA │ │ │
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│ │ │ │ │ │ │ │ │ │ │
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│ └┬───┘ └┬───┘ └┬───┘ └─┬──┘ │ │
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│ A3B3 │ A2B3 │ A1B3 │ A0B3 │ │ │
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│ ┌▼─▼┐ │ ┌▼─▼┐ │ ┌▼─▼┐ │ ┌▼─▼┐ │ │ │
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│ │AND│ │ │AND│ │ │AND│ │ │AND│ │ │ │
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│ └┬──┘ │ └┬──┘ │ └┬──┘ │ └┬──┘ │ │ │
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│ │ │ │ │ │ │ │ │ │ │
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┌▼──▼┐ ┌▼──▼┐ ┌▼──▼┐ ┌▼──▼┐ │ │ │
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│ │ │ │ │ │ │ │ │ │ │
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┌──────┤ FA │◄──┤ FA │◄──┤ FA │◄──┤ HA │ │ │ │
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│ │ │ │ │ │ │ │ │ │ │ │
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│ └─┬──┘ └─┬──┘ └─┬──┘ └─┬──┘ │ │ │
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│ │ │ │ │ │ │ │
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▼ ▼ ▼ ▼ ▼ ▼ ▼ ▼
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P7 P6 P5 P4 P3 P2 P1 P0
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```
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Description of the __init__ method.
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Args:
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a (Bus): First input bus.
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b (Bus): Second input bus.
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prefix (str, optional): Prefix name of unsigned array multiplier. Defaults to "".
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name (str, optional): Name of unsigned array multiplier. Defaults to "u_arrmul".
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"""
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def __init__(self, a: Bus, b: Bus, prefix: str = "", name: str = "u_arrmul", **kwargs):
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self.N = max(a.N, b.N)
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super().__init__(inputs=[a, b], prefix=prefix, name=name, out_N=self.N*2, **kwargs)
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# Bus sign extension in case buses have different lengths
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self.a.bus_extend(N=self.N, prefix=a.prefix)
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self.b.bus_extend(N=self.N, prefix=b.prefix)
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# Gradual generation of partial products
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for b_multiplier_index in range(self.N):
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for a_multiplicand_index in range(self.N):
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# AND gates generation for calculation of partial products
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obj_and = AndGate(self.a.get_wire(a_multiplicand_index), self.b.get_wire(b_multiplier_index), prefix=self.prefix+"_and"+str(a_multiplicand_index)+"_"+str(b_multiplier_index))
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self.add_component(obj_and)
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if b_multiplier_index != 0:
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previous_product = self.components[a_multiplicand_index + b_multiplier_index].out if b_multiplier_index == 1 else self.get_previous_partial_product(a_index=a_multiplicand_index, b_index=b_multiplier_index)
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# HA generation for first 1-bit adder in each row starting from the second one
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if a_multiplicand_index == 0:
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obj_adder = HalfAdder(self.get_previous_component().out, previous_product, prefix=self.prefix+"_ha"+str(a_multiplicand_index)+"_"+str(b_multiplier_index))
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self.add_component(obj_adder)
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# Product generation
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self.out.connect(b_multiplier_index, obj_adder.get_sum_wire())
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# HA generation, last 1-bit adder in second row
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elif a_multiplicand_index == self.N-1 and b_multiplier_index == 1:
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obj_adder = HalfAdder(self.get_previous_component().out, self.get_previous_component(number=2).get_carry_wire(), prefix=self.prefix+"_ha"+str(a_multiplicand_index)+"_"+str(b_multiplier_index))
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self.add_component(obj_adder)
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# FA generation
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else:
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obj_adder = FullAdder(self.get_previous_component().out, previous_product, self.get_previous_component(number=2).get_carry_wire(), prefix=self.prefix+"_fa"+str(a_multiplicand_index)+"_"+str(b_multiplier_index))
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self.add_component(obj_adder)
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# PRODUCT GENERATION
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if a_multiplicand_index == 0 and b_multiplier_index == 0:
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self.out.connect(a_multiplicand_index, obj_and.out)
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# 1 bit multiplier case
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if a_multiplicand_index == self.N-1:
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self.out.connect(a_multiplicand_index+1, ConstantWireValue0())
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elif b_multiplier_index == self.N-1:
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self.out.connect(b_multiplier_index + a_multiplicand_index, obj_adder.get_sum_wire())
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if a_multiplicand_index == self.N-1:
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self.out.connect(self.out.N-1, obj_adder.get_carry_wire())
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class SignedArrayMultiplier(MultiplierCircuit):
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"""Class representing signed array multiplier.
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Signed array multiplier represents N-bit multiplier composed of
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many AND/NAND gates and half/full adders to calculate partial products and
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gradually sum them.
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Downside is its rather big area because it is composed of many logic gates.
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```
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A3B0 A2B0 A1B0 A0B0
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│ │ │ │ │ │ │ │
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┌▼─▼─┐ ┌▼─▼┐ ┌▼─▼┐ ┌▼─▼┐
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│NAND│ │AND│ │AND│ │AND│
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└┬───┘ └┬──┘ └┬──┘ └─┬─┘
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A3B1 │ A2B1 │ A1B1 │ A0B1 │
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┌▼─▼─┐ │ ┌▼─▼┐ │ ┌▼─▼┐ │ ┌▼─▼┐ │
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│NAND│ │ │AND│ │ │AND│ │ │AND│ │
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1 └┬───┘ │ └┬──┘ │ └┬──┘ │ └┬──┘ │
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│ │ │ │ │ │ │ │ │
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┌▼──▼┐ ┌▼──▼┐ ┌▼──▼┐ ┌▼──▼┐ │
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│ │ │ │ │ │ │ │ │
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┌───────┤ FA │◄──┤ FA │◄──┤ FA │◄──┤ HA │ │
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│ │ │ │ │ │ │ │ │ │
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│ └┬───┘ └┬───┘ └┬───┘ └─┬──┘ │
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│ A3B2 │ A2B2 │ A1B2 │ A0B2 │ │
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│ ┌▼─▼─┐ │ ┌▼─▼┐ │ ┌▼─▼┐ │ ┌▼─▼┐ │ │
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│ │NAND│ │ │AND│ │ │AND│ │ │AND│ │ │
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│ └┬───┘ │ └┬──┘ │ └┬──┘ │ └┬──┘ │ │
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│ │ │ │ │ │ │ │ │ │
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┌▼──▼┐ ┌▼──▼┐ ┌▼──▼┐ ┌▼──▼┐ │ │
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│ │ │ │ │ │ │ │ │ │
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┌───────┤ FA │◄──┤ FA │◄──┤ FA │◄──┤ HA │ │ │
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│ │ │ │ │ │ │ │ │ │ │
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│ └┬───┘ └┬───┘ └┬───┘ └─┬──┘ │ │
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│ A3B3 │ A2B3 │ A1B3 │ A0B3 │ │ │
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│ ┌▼─▼┐ │ ┌▼─▼─┐ │ ┌▼─▼─┐ │ ┌▼─▼─┐ │ │ │
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│ │AND│ │ │NAND│ │ │NAND│ │ │NAND│ │ │ │
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1 │ └┬──┘ │ └┬───┘ │ └┬───┘ │ └┬───┘ │ │ │
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│ │ │ │ │ │ │ │ │ │ │ │
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┌─▼──┐ ┌▼──▼┐ ┌▼──▼┐ ┌▼──▼┐ ┌▼──▼┐ │ │ │
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│ │ │ │ │ │ │ │ │ │ │ │ │
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│XOR │◄──┤ FA │◄──┤ FA │◄──┤ FA │◄──┤ HA │ │ │ │
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│ │ │ │ │ │ │ │ │ │ │ │ │
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└─┬──┘ └─┬──┘ └─┬──┘ └─┬──┘ └─┬──┘ │ │ │
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│ │ │ │ │ │ │ │
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▼ ▼ ▼ ▼ ▼ ▼ ▼ ▼
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P7 P6 P5 P4 P3 P2 P1 P0
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```
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Description of the __init__ method.
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Args:
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a (Bus): First input bus.
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b (Bus): Second input bus.
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prefix (str, optional): Prefix name of signed array multiplier. Defaults to "".
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name (str, optional): Name of signed array multiplier. Defaults to "s_arrmul".
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"""
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def __init__(self, a: Bus, b: Bus, prefix: str = "", name: str = "s_arrmul", **kwargs):
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self.N = max(a.N, b.N)
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super().__init__(inputs=[a, b], prefix=prefix, name=name, out_N=self.N*2, signed=True, **kwargs)
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# Bus sign extension in case buses have different lengths
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self.a.bus_extend(N=self.N, prefix=a.prefix)
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self.b.bus_extend(N=self.N, prefix=b.prefix)
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# Gradual generation of partial products
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for b_multiplier_index in range(self.N):
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for a_multiplicand_index in range(self.N):
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# AND and NAND gates generation for calculation of partial products and sign extension
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if (b_multiplier_index == self.N-1 and a_multiplicand_index != self.N-1) or (b_multiplier_index != self.N-1 and a_multiplicand_index == self.N-1):
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obj_nand = NandGate(self.a.get_wire(a_multiplicand_index), self.b.get_wire(b_multiplier_index), prefix=self.prefix+"_nand"+str(a_multiplicand_index)+"_"+str(b_multiplier_index), parent_component=self)
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self.add_component(obj_nand)
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else:
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obj_and = AndGate(self.a.get_wire(a_multiplicand_index), self.b.get_wire(b_multiplier_index), prefix=self.prefix+"_and"+str(a_multiplicand_index)+"_"+str(b_multiplier_index), parent_component=self)
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self.add_component(obj_and)
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if b_multiplier_index != 0:
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previous_product = self.components[a_multiplicand_index + b_multiplier_index].out if b_multiplier_index == 1 else self.get_previous_partial_product(a_index=a_multiplicand_index, b_index=b_multiplier_index)
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# HA generation for first 1-bit adder in each row starting from the second one
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if a_multiplicand_index == 0:
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obj_adder = HalfAdder(self.get_previous_component().out, previous_product, prefix=self.prefix+"_ha"+str(a_multiplicand_index)+"_"+str(b_multiplier_index))
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self.add_component(obj_adder)
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# Product generation
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self.out.connect(b_multiplier_index, obj_adder.get_sum_wire())
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# FA generation
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else:
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# Constant wire with value 1 used at the last FA in second row (as one of its inputs) for signed multiplication (based on Baugh Wooley algorithm)
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if a_multiplicand_index == self.N-1 and b_multiplier_index == 1:
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previous_product = ConstantWireValue1()
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obj_adder = FullAdder(self.get_previous_component().out, previous_product, self.get_previous_component(number=2).get_carry_wire(), prefix=self.prefix+"_fa"+str(a_multiplicand_index)+"_"+str(b_multiplier_index))
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self.add_component(obj_adder)
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# PRODUCT GENERATION
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if a_multiplicand_index == 0 and b_multiplier_index == 0:
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self.out.connect(a_multiplicand_index, obj_and.out)
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# 1 bit multiplier case
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if a_multiplicand_index == self.N-1:
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obj_nor = NorGate(ConstantWireValue1(), self.get_previous_component().out, prefix=self.prefix+"_nor_zero_extend", parent_component=self)
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self.add_component(obj_nor)
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self.out.connect(a_multiplicand_index+1, obj_nor.out)
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elif b_multiplier_index == self.N-1:
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self.out.connect(b_multiplier_index + a_multiplicand_index, obj_adder.get_sum_wire())
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if a_multiplicand_index == self.N-1:
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obj_xor = XorGateComponent(self.get_previous_component().get_carry_wire(), ConstantWireValue1(), prefix=self.prefix+"_xor"+str(a_multiplicand_index+1)+"_"+str(b_multiplier_index), parent_component=self)
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self.add_component(obj_xor)
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self.out.connect(self.out.N-1, obj_xor.out.get_wire(0))
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