
* #10 CGP Circuits as inputs (#11) * CGP Circuits as inputs * #10 support of signed output in general circuit * input as output works * output connected to input (c) * automated verilog testing * output rename * Implemented CSA and Wallace tree multiplier composing of CSAs. Also did some code cleanup. * Typos fix and code cleanup. * Added new (approximate) multiplier architectures and did some minor changes regarding sign extension for c output formats. * Updated automated testing scripts. * Small bugfix in python code generation (I initially thought this line is useless). * Updated generated circuits folder. Co-authored-by: Vojta Mrazek <mrazek@fit.vutbr.cz>
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{32,17,1,77,2,1,0}([34]2,18,4)([35]2,18,2)([36]3,19,4)([37]3,19,2)([38]36,35,4)([39]36,35,2)([40]37,39,3)([41]4,20,4)([42]4,20,2)([43]41,40,4)([44]41,40,2)([45]42,44,3)([46]5,21,4)([47]5,21,2)([48]46,45,4)([49]46,45,2)([50]47,49,3)([51]6,22,4)([52]6,22,2)([53]51,50,4)([54]51,50,2)([55]52,54,3)([56]7,23,4)([57]7,23,2)([58]56,55,4)([59]56,55,2)([60]57,59,3)([61]8,24,4)([62]8,24,2)([63]61,60,4)([64]61,60,2)([65]62,64,3)([66]9,25,4)([67]9,25,2)([68]66,65,4)([69]66,65,2)([70]67,69,3)([71]10,26,4)([72]10,26,2)([73]71,70,4)([74]71,70,2)([75]72,74,3)([76]11,27,4)([77]11,27,2)([78]76,75,4)([79]76,75,2)([80]77,79,3)([81]12,28,4)([82]12,28,2)([83]81,80,4)([84]81,80,2)([85]82,84,3)([86]13,29,4)([87]13,29,2)([88]86,85,4)([89]86,85,2)([90]87,89,3)([91]14,30,4)([92]14,30,2)([93]91,90,4)([94]91,90,2)([95]92,94,3)([96]15,31,4)([97]15,31,2)([98]96,95,4)([99]96,95,2)([100]97,99,3)([101]16,32,4)([102]16,32,2)([103]101,100,4)([104]101,100,2)([105]102,104,3)([106]17,33,4)([107]17,33,2)([108]106,105,4)([109]106,105,2)([110]107,109,3)(34,38,43,48,53,58,63,68,73,78,83,88,93,98,103,108,110) |