
* #10 CGP Circuits as inputs (#11) * CGP Circuits as inputs * #10 support of signed output in general circuit * input as output works * output connected to input (c) * automated verilog testing * output rename * Implemented CSA and Wallace tree multiplier composing of CSAs. Also did some code cleanup. * Typos fix and code cleanup. * Added new (approximate) multiplier architectures and did some minor changes regarding sign extension for c output formats. * Updated automated testing scripts. * Small bugfix in python code generation (I initially thought this line is useless). * Updated generated circuits folder. Co-authored-by: Vojta Mrazek <mrazek@fit.vutbr.cz>
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{16,9,1,37,2,1,0}([18]2,10,4)([19]2,10,2)([20]3,11,4)([21]3,11,2)([22]20,19,4)([23]19,20,2)([24]23,21,3)([25]4,12,4)([26]4,12,2)([27]25,24,4)([28]24,25,2)([29]28,26,3)([30]5,13,4)([31]5,13,2)([32]30,29,4)([33]29,30,2)([34]33,31,3)([35]6,14,4)([36]6,14,2)([37]35,34,4)([38]34,35,2)([39]38,36,3)([40]7,15,4)([41]7,15,2)([42]40,39,4)([43]39,40,2)([44]43,41,3)([45]8,16,4)([46]8,16,2)([47]45,44,4)([48]44,45,2)([49]48,46,3)([50]9,17,4)([51]9,17,2)([52]50,49,4)([53]49,50,2)([54]53,51,3)(18,22,27,32,37,42,47,52,54) |