56c86c13ca
* #10 CGP Circuits as inputs (#11) * CGP Circuits as inputs * #10 support of signed output in general circuit * input as output works * output connected to input (c) * automated verilog testing * output rename * Implemented CSA and Wallace tree multiplier composing of CSAs. Also did some code cleanup. * Typos fix and code cleanup. * Added new (approximate) multiplier architectures and did some minor changes regarding sign extension for c output formats. * Updated automated testing scripts. * Small bugfix in python code generation (I initially thought this line is useless). * Updated generated circuits folder. Co-authored-by: Vojta Mrazek <mrazek@fit.vutbr.cz>
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{32,17,1,77,2,1,0}([34]2,18,4)([35]2,18,2)([36]3,19,4)([37]3,19,2)([38]36,35,4)([39]35,36,2)([40]39,37,3)([41]4,20,4)([42]4,20,2)([43]41,40,4)([44]40,41,2)([45]44,42,3)([46]5,21,4)([47]5,21,2)([48]46,45,4)([49]45,46,2)([50]49,47,3)([51]6,22,4)([52]6,22,2)([53]51,50,4)([54]50,51,2)([55]54,52,3)([56]7,23,4)([57]7,23,2)([58]56,55,4)([59]55,56,2)([60]59,57,3)([61]8,24,4)([62]8,24,2)([63]61,60,4)([64]60,61,2)([65]64,62,3)([66]9,25,4)([67]9,25,2)([68]66,65,4)([69]65,66,2)([70]69,67,3)([71]10,26,4)([72]10,26,2)([73]71,70,4)([74]70,71,2)([75]74,72,3)([76]11,27,4)([77]11,27,2)([78]76,75,4)([79]75,76,2)([80]79,77,3)([81]12,28,4)([82]12,28,2)([83]81,80,4)([84]80,81,2)([85]84,82,3)([86]13,29,4)([87]13,29,2)([88]86,85,4)([89]85,86,2)([90]89,87,3)([91]14,30,4)([92]14,30,2)([93]91,90,4)([94]90,91,2)([95]94,92,3)([96]15,31,4)([97]15,31,2)([98]96,95,4)([99]95,96,2)([100]99,97,3)([101]16,32,4)([102]16,32,2)([103]101,100,4)([104]100,101,2)([105]104,102,3)([106]17,33,4)([107]17,33,2)([108]106,105,4)([109]105,106,2)([110]109,107,3)(34,38,43,48,53,58,63,68,73,78,83,88,93,98,103,108,110) |