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* #10 CGP Circuits as inputs (#11) * CGP Circuits as inputs * #10 support of signed output in general circuit * input as output works * output connected to input (c) * automated verilog testing * output rename * Implemented CSA and Wallace tree multiplier composing of CSAs. Also did some code cleanup. * Typos fix and code cleanup. * Added new (approximate) multiplier architectures and did some minor changes regarding sign extension for c output formats. * Updated automated testing scripts. * Small bugfix in python code generation (I initially thought this line is useless). * Updated generated circuits folder. Co-authored-by: Vojta Mrazek <mrazek@fit.vutbr.cz>
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{16,9,1,79,2,1,0}([18]2,10,3)([19]2,10,2)([20]2,10,4)([21]3,11,3)([22]3,11,2)([23]3,11,4)([24]23,19,4)([25]19,21,2)([26]22,25,3)([27]4,12,3)([28]4,12,2)([29]4,12,4)([30]29,26,4)([31]27,18,2)([32]19,27,2)([33]32,21,2)([34]22,27,2)([35]33,34,3)([36]28,35,3)([37]5,13,3)([38]5,13,2)([39]5,13,4)([40]39,36,4)([41]37,21,2)([42]19,27,2)([43]37,21,2)([44]42,43,2)([45]22,37,2)([46]45,27,2)([47]28,37,2)([48]44,47,3)([49]46,48,3)([50]38,49,3)([51]6,14,3)([52]6,14,2)([53]6,14,4)([54]53,50,4)([55]50,51,2)([56]52,55,3)([57]7,15,3)([58]7,15,2)([59]7,15,4)([60]59,56,4)([61]50,57,2)([62]61,51,2)([63]52,57,2)([64]62,63,3)([65]58,64,3)([66]8,16,3)([67]8,16,2)([68]8,16,4)([69]68,65,4)([70]50,57,2)([71]66,51,2)([72]70,71,2)([73]52,66,2)([74]73,57,2)([75]58,66,2)([76]72,74,3)([77]76,75,3)([78]67,77,3)([79]9,17,3)([80]9,17,2)([81]9,17,4)([82]81,78,4)([83]50,66,2)([84]79,57,2)([85]83,84,2)([86]85,51,2)([87]52,66,2)([88]79,57,2)([89]87,88,2)([90]58,79,2)([91]90,66,2)([92]67,79,2)([93]86,91,3)([94]89,92,3)([95]93,94,3)([96]80,95,3)(20,24,30,40,54,60,69,82,96) |