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ariths-gen-mig/generated_circuits/cgp_circuits/flat/u_cla32.cgp
Jan Klhůfek 56c86c13ca
New multipliers (#13) 
* #10 CGP Circuits as inputs (#11)

* CGP Circuits as inputs

* #10 support of signed output in general circuit

* input as output works

* output connected to input (c)

* automated verilog testing

* output rename

* Implemented CSA and Wallace tree multiplier composing of CSAs. Also did some code cleanup.

* Typos fix and code cleanup.

* Added new (approximate) multiplier architectures and did some minor changes regarding sign extension for c output formats.

* Updated automated testing scripts.

* Small bugfix in python code generation (I initially thought this line is useless).

* Updated generated circuits folder.

Co-authored-by: Vojta Mrazek <mrazek@fit.vutbr.cz>
2022-04-17 16:00:00 +02:00

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