56c86c13ca
* #10 CGP Circuits as inputs (#11) * CGP Circuits as inputs * #10 support of signed output in general circuit * input as output works * output connected to input (c) * automated verilog testing * output rename * Implemented CSA and Wallace tree multiplier composing of CSAs. Also did some code cleanup. * Typos fix and code cleanup. * Added new (approximate) multiplier architectures and did some minor changes regarding sign extension for c output formats. * Updated automated testing scripts. * Small bugfix in python code generation (I initially thought this line is useless). * Updated generated circuits folder. Co-authored-by: Vojta Mrazek <mrazek@fit.vutbr.cz>
1 line
1.1 KiB
Plaintext
1 line
1.1 KiB
Plaintext
{8,8,1,83,2,1,0}([10]2,6,2)([11]3,6,2)([12]4,6,2)([13]5,6,2)([14]2,7,2)([15]3,7,2)([16]4,7,2)([17]5,7,2)([18]2,8,2)([19]3,8,2)([20]4,8,2)([21]5,8,2)([22]2,9,2)([23]3,9,2)([24]4,9,2)([25]5,9,2)([26]11,14,4)([27]11,14,2)([28]12,15,4)([29]12,15,2)([30]28,18,4)([31]28,18,2)([32]29,31,3)([33]13,16,4)([34]13,16,2)([35]33,19,4)([36]33,19,2)([37]34,36,3)([38]17,20,4)([39]17,20,2)([40]30,27,4)([41]30,27,2)([42]35,32,4)([43]35,32,2)([44]42,22,4)([45]42,22,2)([46]43,45,3)([47]38,37,4)([48]38,37,2)([49]47,23,4)([50]47,23,2)([51]48,50,3)([52]21,39,4)([53]21,39,2)([54]52,24,4)([55]52,24,2)([56]53,55,3)([57]40,10,2)([58]44,41,3)([59]44,41,2)([60]44,41,4)([61]58,26,2)([62]58,26,2)([63]49,46,3)([64]49,46,2)([65]49,46,4)([66]65,59,4)([67]59,63,2)([68]64,67,3)([69]54,51,3)([70]54,51,2)([71]54,51,4)([72]71,68,4)([73]59,69,2)([74]73,63,2)([75]64,69,2)([76]74,75,3)([77]70,76,3)([78]25,56,3)([79]25,56,2)([80]25,56,4)([81]80,77,4)([82]59,69,2)([83]78,63,2)([84]82,83,2)([85]64,78,2)([86]85,69,2)([87]70,78,2)([88]84,86,3)([89]88,87,3)([90]79,89,3)([91]59,78,2)([92]64,78,2)(10,26,40,60,66,72,81,90) |