
* #10 CGP Circuits as inputs (#11) * CGP Circuits as inputs * #10 support of signed output in general circuit * input as output works * output connected to input (c) * automated verilog testing * output rename * Implemented CSA and Wallace tree multiplier composing of CSAs. Also did some code cleanup. * Typos fix and code cleanup. * Added new (approximate) multiplier architectures and did some minor changes regarding sign extension for c output formats. * Updated automated testing scripts. * Small bugfix in python code generation (I initially thought this line is useless). * Updated generated circuits folder. Co-authored-by: Vojta Mrazek <mrazek@fit.vutbr.cz>
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{8,5,1,35,2,1,0}([10]2,6,3)([11]2,6,2)([12]2,6,4)([13]3,7,3)([14]3,7,2)([15]3,7,4)([16]15,11,4)([17]11,13,2)([18]14,17,3)([19]4,8,3)([20]4,8,2)([21]4,8,4)([22]21,18,4)([23]19,10,2)([24]11,19,2)([25]24,13,2)([26]14,19,2)([27]25,26,3)([28]20,27,3)([29]5,9,3)([30]5,9,2)([31]5,9,4)([32]31,28,4)([33]29,13,2)([34]11,19,2)([35]29,13,2)([36]34,35,2)([37]14,29,2)([38]37,19,2)([39]20,29,2)([40]36,39,3)([41]38,40,3)([42]30,41,3)([43]5,9,4)([44]43,42,4)(12,16,22,32,44) |