56c86c13ca
* #10 CGP Circuits as inputs (#11) * CGP Circuits as inputs * #10 support of signed output in general circuit * input as output works * output connected to input (c) * automated verilog testing * output rename * Implemented CSA and Wallace tree multiplier composing of CSAs. Also did some code cleanup. * Typos fix and code cleanup. * Added new (approximate) multiplier architectures and did some minor changes regarding sign extension for c output formats. * Updated automated testing scripts. * Small bugfix in python code generation (I initially thought this line is useless). * Updated generated circuits folder. Co-authored-by: Vojta Mrazek <mrazek@fit.vutbr.cz>
346 lines
8.2 KiB
Plaintext
346 lines
8.2 KiB
Plaintext
.model u_cska16
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.inputs a[0] a[1] a[2] a[3] a[4] a[5] a[6] a[7] a[8] a[9] a[10] a[11] a[12] a[13] a[14] a[15] b[0] b[1] b[2] b[3] b[4] b[5] b[6] b[7] b[8] b[9] b[10] b[11] b[12] b[13] b[14] b[15]
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.outputs u_cska16_out[0] u_cska16_out[1] u_cska16_out[2] u_cska16_out[3] u_cska16_out[4] u_cska16_out[5] u_cska16_out[6] u_cska16_out[7] u_cska16_out[8] u_cska16_out[9] u_cska16_out[10] u_cska16_out[11] u_cska16_out[12] u_cska16_out[13] u_cska16_out[14] u_cska16_out[15] u_cska16_out[16]
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.names vdd
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1
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.names gnd
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0
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.names a[0] b[0] u_cska16_xor0
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01 1
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10 1
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.names a[0] b[0] u_cska16_ha0_xor0
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01 1
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10 1
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.names a[0] b[0] u_cska16_ha0_and0
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11 1
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.names a[1] b[1] u_cska16_xor1
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01 1
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10 1
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.names a[1] b[1] u_cska16_fa0_xor0
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01 1
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10 1
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.names a[1] b[1] u_cska16_fa0_and0
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11 1
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.names u_cska16_fa0_xor0 u_cska16_ha0_and0 u_cska16_fa0_xor1
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01 1
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10 1
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.names u_cska16_fa0_xor0 u_cska16_ha0_and0 u_cska16_fa0_and1
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11 1
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.names u_cska16_fa0_and0 u_cska16_fa0_and1 u_cska16_fa0_or0
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1- 1
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-1 1
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.names a[2] b[2] u_cska16_xor2
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01 1
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10 1
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.names a[2] b[2] u_cska16_fa1_xor0
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01 1
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10 1
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.names a[2] b[2] u_cska16_fa1_and0
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11 1
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.names u_cska16_fa1_xor0 u_cska16_fa0_or0 u_cska16_fa1_xor1
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01 1
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10 1
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.names u_cska16_fa1_xor0 u_cska16_fa0_or0 u_cska16_fa1_and1
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11 1
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.names u_cska16_fa1_and0 u_cska16_fa1_and1 u_cska16_fa1_or0
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1- 1
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-1 1
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.names a[3] b[3] u_cska16_xor3
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01 1
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10 1
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.names a[3] b[3] u_cska16_fa2_xor0
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01 1
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10 1
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.names a[3] b[3] u_cska16_fa2_and0
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11 1
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.names u_cska16_fa2_xor0 u_cska16_fa1_or0 u_cska16_fa2_xor1
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01 1
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10 1
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.names u_cska16_fa2_xor0 u_cska16_fa1_or0 u_cska16_fa2_and1
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11 1
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.names u_cska16_fa2_and0 u_cska16_fa2_and1 u_cska16_fa2_or0
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1- 1
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-1 1
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.names u_cska16_xor0 u_cska16_xor2 u_cska16_and_propagate00
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11 1
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.names u_cska16_xor1 u_cska16_xor3 u_cska16_and_propagate01
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11 1
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.names u_cska16_and_propagate00 u_cska16_and_propagate01 u_cska16_and_propagate02
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11 1
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.names u_cska16_and_propagate02 u_cska16_mux2to10_not0
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0 1
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.names u_cska16_fa2_or0 u_cska16_mux2to10_not0 u_cska16_mux2to10_and1
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11 1
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.names a[4] b[4] u_cska16_xor4
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01 1
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10 1
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.names a[4] b[4] u_cska16_fa3_xor0
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01 1
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10 1
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.names a[4] b[4] u_cska16_fa3_and0
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11 1
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.names u_cska16_fa3_xor0 u_cska16_mux2to10_and1 u_cska16_fa3_xor1
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01 1
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10 1
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.names u_cska16_fa3_xor0 u_cska16_mux2to10_and1 u_cska16_fa3_and1
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11 1
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.names u_cska16_fa3_and0 u_cska16_fa3_and1 u_cska16_fa3_or0
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1- 1
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-1 1
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.names a[5] b[5] u_cska16_xor5
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01 1
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10 1
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.names a[5] b[5] u_cska16_fa4_xor0
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01 1
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10 1
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.names a[5] b[5] u_cska16_fa4_and0
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11 1
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.names u_cska16_fa4_xor0 u_cska16_fa3_or0 u_cska16_fa4_xor1
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01 1
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10 1
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.names u_cska16_fa4_xor0 u_cska16_fa3_or0 u_cska16_fa4_and1
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11 1
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.names u_cska16_fa4_and0 u_cska16_fa4_and1 u_cska16_fa4_or0
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1- 1
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-1 1
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.names a[6] b[6] u_cska16_xor6
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01 1
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10 1
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.names a[6] b[6] u_cska16_fa5_xor0
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01 1
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10 1
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.names a[6] b[6] u_cska16_fa5_and0
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11 1
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.names u_cska16_fa5_xor0 u_cska16_fa4_or0 u_cska16_fa5_xor1
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01 1
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10 1
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.names u_cska16_fa5_xor0 u_cska16_fa4_or0 u_cska16_fa5_and1
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11 1
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.names u_cska16_fa5_and0 u_cska16_fa5_and1 u_cska16_fa5_or0
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1- 1
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-1 1
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.names a[7] b[7] u_cska16_xor7
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01 1
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10 1
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.names a[7] b[7] u_cska16_fa6_xor0
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01 1
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10 1
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.names a[7] b[7] u_cska16_fa6_and0
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11 1
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.names u_cska16_fa6_xor0 u_cska16_fa5_or0 u_cska16_fa6_xor1
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01 1
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10 1
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.names u_cska16_fa6_xor0 u_cska16_fa5_or0 u_cska16_fa6_and1
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11 1
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.names u_cska16_fa6_and0 u_cska16_fa6_and1 u_cska16_fa6_or0
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1- 1
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-1 1
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.names u_cska16_xor4 u_cska16_xor6 u_cska16_and_propagate13
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11 1
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.names u_cska16_xor5 u_cska16_xor7 u_cska16_and_propagate14
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11 1
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.names u_cska16_and_propagate13 u_cska16_and_propagate14 u_cska16_and_propagate15
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11 1
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.names u_cska16_mux2to10_and1 u_cska16_and_propagate15 u_cska16_mux2to11_and0
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11 1
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.names u_cska16_and_propagate15 u_cska16_mux2to11_not0
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0 1
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.names u_cska16_fa6_or0 u_cska16_mux2to11_not0 u_cska16_mux2to11_and1
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11 1
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.names u_cska16_mux2to11_and0 u_cska16_mux2to11_and1 u_cska16_mux2to11_xor0
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01 1
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10 1
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.names a[8] b[8] u_cska16_xor8
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01 1
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10 1
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.names a[8] b[8] u_cska16_fa7_xor0
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01 1
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10 1
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.names a[8] b[8] u_cska16_fa7_and0
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11 1
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.names u_cska16_fa7_xor0 u_cska16_mux2to11_xor0 u_cska16_fa7_xor1
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01 1
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10 1
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.names u_cska16_fa7_xor0 u_cska16_mux2to11_xor0 u_cska16_fa7_and1
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11 1
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.names u_cska16_fa7_and0 u_cska16_fa7_and1 u_cska16_fa7_or0
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1- 1
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-1 1
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.names a[9] b[9] u_cska16_xor9
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01 1
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10 1
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.names a[9] b[9] u_cska16_fa8_xor0
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01 1
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10 1
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.names a[9] b[9] u_cska16_fa8_and0
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11 1
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.names u_cska16_fa8_xor0 u_cska16_fa7_or0 u_cska16_fa8_xor1
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01 1
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10 1
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.names u_cska16_fa8_xor0 u_cska16_fa7_or0 u_cska16_fa8_and1
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11 1
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.names u_cska16_fa8_and0 u_cska16_fa8_and1 u_cska16_fa8_or0
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1- 1
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-1 1
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.names a[10] b[10] u_cska16_xor10
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01 1
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10 1
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.names a[10] b[10] u_cska16_fa9_xor0
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01 1
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10 1
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.names a[10] b[10] u_cska16_fa9_and0
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11 1
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.names u_cska16_fa9_xor0 u_cska16_fa8_or0 u_cska16_fa9_xor1
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01 1
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10 1
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.names u_cska16_fa9_xor0 u_cska16_fa8_or0 u_cska16_fa9_and1
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11 1
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.names u_cska16_fa9_and0 u_cska16_fa9_and1 u_cska16_fa9_or0
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1- 1
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-1 1
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.names a[11] b[11] u_cska16_xor11
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01 1
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10 1
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.names a[11] b[11] u_cska16_fa10_xor0
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01 1
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10 1
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.names a[11] b[11] u_cska16_fa10_and0
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11 1
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.names u_cska16_fa10_xor0 u_cska16_fa9_or0 u_cska16_fa10_xor1
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01 1
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10 1
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.names u_cska16_fa10_xor0 u_cska16_fa9_or0 u_cska16_fa10_and1
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11 1
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.names u_cska16_fa10_and0 u_cska16_fa10_and1 u_cska16_fa10_or0
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1- 1
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-1 1
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.names u_cska16_xor8 u_cska16_xor10 u_cska16_and_propagate26
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11 1
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.names u_cska16_xor9 u_cska16_xor11 u_cska16_and_propagate27
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11 1
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.names u_cska16_and_propagate26 u_cska16_and_propagate27 u_cska16_and_propagate28
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11 1
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.names u_cska16_mux2to11_xor0 u_cska16_and_propagate28 u_cska16_mux2to12_and0
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11 1
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.names u_cska16_and_propagate28 u_cska16_mux2to12_not0
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0 1
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.names u_cska16_fa10_or0 u_cska16_mux2to12_not0 u_cska16_mux2to12_and1
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11 1
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.names u_cska16_mux2to12_and0 u_cska16_mux2to12_and1 u_cska16_mux2to12_xor0
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01 1
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10 1
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.names a[12] b[12] u_cska16_xor12
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01 1
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10 1
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.names a[12] b[12] u_cska16_fa11_xor0
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01 1
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10 1
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.names a[12] b[12] u_cska16_fa11_and0
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11 1
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.names u_cska16_fa11_xor0 u_cska16_mux2to12_xor0 u_cska16_fa11_xor1
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01 1
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10 1
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.names u_cska16_fa11_xor0 u_cska16_mux2to12_xor0 u_cska16_fa11_and1
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11 1
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.names u_cska16_fa11_and0 u_cska16_fa11_and1 u_cska16_fa11_or0
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1- 1
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-1 1
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.names a[13] b[13] u_cska16_xor13
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01 1
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10 1
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.names a[13] b[13] u_cska16_fa12_xor0
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01 1
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10 1
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.names a[13] b[13] u_cska16_fa12_and0
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11 1
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.names u_cska16_fa12_xor0 u_cska16_fa11_or0 u_cska16_fa12_xor1
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01 1
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10 1
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.names u_cska16_fa12_xor0 u_cska16_fa11_or0 u_cska16_fa12_and1
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11 1
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.names u_cska16_fa12_and0 u_cska16_fa12_and1 u_cska16_fa12_or0
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1- 1
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-1 1
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.names a[14] b[14] u_cska16_xor14
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01 1
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10 1
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.names a[14] b[14] u_cska16_fa13_xor0
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01 1
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10 1
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.names a[14] b[14] u_cska16_fa13_and0
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11 1
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.names u_cska16_fa13_xor0 u_cska16_fa12_or0 u_cska16_fa13_xor1
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01 1
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10 1
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.names u_cska16_fa13_xor0 u_cska16_fa12_or0 u_cska16_fa13_and1
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11 1
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.names u_cska16_fa13_and0 u_cska16_fa13_and1 u_cska16_fa13_or0
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1- 1
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-1 1
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.names a[15] b[15] u_cska16_xor15
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01 1
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10 1
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.names a[15] b[15] u_cska16_fa14_xor0
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01 1
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10 1
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.names a[15] b[15] u_cska16_fa14_and0
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11 1
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.names u_cska16_fa14_xor0 u_cska16_fa13_or0 u_cska16_fa14_xor1
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01 1
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10 1
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.names u_cska16_fa14_xor0 u_cska16_fa13_or0 u_cska16_fa14_and1
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11 1
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.names u_cska16_fa14_and0 u_cska16_fa14_and1 u_cska16_fa14_or0
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1- 1
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-1 1
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.names u_cska16_xor12 u_cska16_xor14 u_cska16_and_propagate39
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11 1
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.names u_cska16_xor13 u_cska16_xor15 u_cska16_and_propagate310
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11 1
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.names u_cska16_and_propagate39 u_cska16_and_propagate310 u_cska16_and_propagate311
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11 1
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.names u_cska16_mux2to12_xor0 u_cska16_and_propagate311 u_cska16_mux2to13_and0
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11 1
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.names u_cska16_and_propagate311 u_cska16_mux2to13_not0
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0 1
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.names u_cska16_fa14_or0 u_cska16_mux2to13_not0 u_cska16_mux2to13_and1
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11 1
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.names u_cska16_mux2to13_and0 u_cska16_mux2to13_and1 u_cska16_mux2to13_xor0
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01 1
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10 1
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.names u_cska16_ha0_xor0 u_cska16_out[0]
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1 1
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.names u_cska16_fa0_xor1 u_cska16_out[1]
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1 1
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.names u_cska16_fa1_xor1 u_cska16_out[2]
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1 1
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.names u_cska16_fa2_xor1 u_cska16_out[3]
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1 1
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.names u_cska16_fa3_xor1 u_cska16_out[4]
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1 1
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.names u_cska16_fa4_xor1 u_cska16_out[5]
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1 1
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.names u_cska16_fa5_xor1 u_cska16_out[6]
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1 1
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.names u_cska16_fa6_xor1 u_cska16_out[7]
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1 1
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.names u_cska16_fa7_xor1 u_cska16_out[8]
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1 1
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.names u_cska16_fa8_xor1 u_cska16_out[9]
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1 1
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.names u_cska16_fa9_xor1 u_cska16_out[10]
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1 1
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.names u_cska16_fa10_xor1 u_cska16_out[11]
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1 1
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.names u_cska16_fa11_xor1 u_cska16_out[12]
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1 1
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.names u_cska16_fa12_xor1 u_cska16_out[13]
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1 1
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.names u_cska16_fa13_xor1 u_cska16_out[14]
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1 1
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.names u_cska16_fa14_xor1 u_cska16_out[15]
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1 1
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.names u_cska16_mux2to13_xor0 u_cska16_out[16]
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1 1
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.end
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