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output connected to input (c)

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This commit is contained in:
Vojta Mrazek 2022-02-02 12:53:18 +01:00
parent dc705106b4
commit ee8621ef4d
2 changed files with 12 additions and 12 deletions
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22
ariths_gen/wire_components/wires.py
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@ -26,6 +26,9 @@ class Wire():
"""
return False
def is_buswire(self):
return self.name.endswith("["+str(self.index)+"]") and self.parent_bus is not None
""" PYTHON CODE GENERATION """
def return_wire_value_python_flat(self, offset: int = 0):
"""Retrieves desired bit value from wire represented in Python code variable (object) and bitwise shifts it to desired position for storing it within a bus for flat generation.
@ -38,13 +41,9 @@ class Wire():
"""
if self.is_const():
return f"({self.c_const}) << {offset}\n"
#else:
# return f"(({self.name} >> 0) & 0x01) << {offset}\n"
# If wire is part of an input bus (where wire names are concatenated from bus prefix and their index position inside the bus in square brackets)
# then the wire value is obtained from bitwise shifting the required wire from the parent bus ('parent_bus.prefix' is the same value as 'self.prefix')
if self.name.endswith("["+str(self.index)+"]") and self.parent_bus is not None:
elif self.is_buswire():
return f"(({self.prefix} >> {self.index}) & 0x01) << {offset}\n"
else:
return f"(({self.name} >> 0) & 0x01) << {offset}\n"
@ -69,13 +68,12 @@ class Wire():
"""
if self.is_const():
return f"({self.c_const})"
# If wire is part of an input bus (where wire names are concatenated from bus prefix and their index position inside the bus in square brackets)
# then the wire value is obtained from bitwise shifting the required wire from the parent bus ('parent_bus.prefix' is the same value as 'self.prefix')
elif self.is_buswire():
return f"(({self.prefix} >> {self.index}) & 0x01)"
else:
# If wire is part of an input bus (where wire names are concatenated from bus prefix and their index position inside the bus in square brackets)
# then the wire value is obtained from bitwise shifting the required wire from the parent bus ('parent_bus.prefix' is the same value as 'self.prefix')
if self.name.endswith("["+str(self.index)+"]") and self.parent_bus is not None:
return f"(({self.prefix} >> {self.index}) & 0x01)"
else:
return f"(({self.name} >> 0) & 0x01)"
return f"(({self.name} >> 0) & 0x01)"
def get_wire_value_c_hier(self):
"""Accesses desired bit value from wire represented in C code variable used for hierarchical generation.
@ -99,6 +97,8 @@ class Wire():
"""
if self.is_const():
return f"({self.c_const}) << {offset};\n"
elif self.is_buswire():
return f"(({self.prefix} >> {self.index}) & 0x01ull) << {offset};\n"
else:
return f"(({self.name} >> 0) & 0x01ull) << {offset};\n"

2
tests/test_cgp.py
View File

@ -143,4 +143,4 @@ def test_cgp_variant1():
cgp = "{16,9,37,1,2,1,0}([18]15,12,1)([19]7,7,4)([20]3,12,5)([21]17,3,0)([22]8,14,3)([23]15,3,6)([24]14,0,2)([25]9,9,5)([26]17,13,1)([27]12,13,0)([28]7,16,8)([29]12,11,0)([30]5,13,3)([31]5,13,2)([32]30,12,5)([33]30,29,2)([34]31,33,3)([35]6,14,4)([36]6,14,2)([37]35,34,4)([38]35,34,2)([39]36,38,3)([40]7,15,4)([41]7,15,2)([42]40,39,4)([43]40,39,2)([44]41,43,3)([45]8,16,4)([46]8,16,2)([47]45,44,4)([48]45,44,2)([49]46,48,3)([50]9,17,4)([51]9,17,2)([52]50,49,4)([53]50,49,2)([54]51,53,3)(11,40,33,32,37,42,47,52,54)"
c = UnsignedCGPCircuit(cgp, [8, 8], name="cgp_circuit")
assert c(0, 0) == 0 # TypeError: 'int' object is not subscriptable
assert c(0, 0) == 8 # TypeError: 'int' object is not subscriptable