dissertation_thesis/ariths-gen-mig
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Edited example circuits generation.

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honzastor 2021-01-18 19:34:05 +01:00
parent 4f8de30911
commit ee73047199
1 changed files with 6 additions and 5 deletions
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11
arithmetic_circuits_generator.py
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@ -220,8 +220,9 @@ if __name__ == "__main__":
rca.get_c_code(open("rca_8.c", "w"))
# Vytvoreni logickeho hradla OR
a1 = wire("a", 1)
b1 = wire("b", 0)
xor_gate = xor_gate(a1, b1)
# Export do jazyka C (flat)
xor_gate.get_c_code(sys.stdout)
# Hodnoty pouze pro otestovani funcnosti v Pythonu
a1 = wire(name="a", value=1)
b1 = wire(name="b", value=0)
xor = xor_gate(a1, b1)
# Vypis v jazyke C (flat) na standardni vystup
xor.get_c_code(sys.stdout)