dissertation_thesis/ariths-gen-mig
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Small bugfixes and removal of redundant code.

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This commit is contained in:
Honza 2022-01-07 20:36:51 +01:00
parent d9b56e8a00
commit 18b44226d8
2 changed files with 7 additions and 13 deletions
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4
ariths_gen/multi_bit_circuits/approximate_multipliers/broken_array_multiplier.py
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@ -166,7 +166,7 @@ class UnsignedBrokenArrayMultiplier(MultiplierCircuit):
self.out.connect(self.out.N-1, obj_adder.get_carry_wire()) self.out.connect(self.out.N-1, obj_adder.get_carry_wire())
# Connecting the output bits generated from ommited cells to ground # Connecting the output bits generated from ommited cells to ground
if self.horizontal_cut >= self.N or self.vertical_cut >= 2*self.N: if self.vertical_cut == 2*self.N-1:
[self.out.connect(out_id, ConstantWireValue0()) for out_id in range(self.out.N)] [self.out.connect(out_id, ConstantWireValue0()) for out_id in range(self.out.N)]
else: else:
for grounded_out_index in range(0, max(self.horizontal_cut, self.vertical_cut)): for grounded_out_index in range(0, max(self.horizontal_cut, self.vertical_cut)):
@ -314,7 +314,7 @@ class SignedBrokenArrayMultiplier(MultiplierCircuit):
self.out.connect(self.out.N-1, obj_xor.out) self.out.connect(self.out.N-1, obj_xor.out)
# Connecting the output bits generated from ommited cells to ground # Connecting the output bits generated from ommited cells to ground
if self.horizontal_cut >= self.N or self.vertical_cut >= 2*self.N: if self.vertical_cut == 2*self.N-1:
[self.out.connect(out_id, ConstantWireValue0()) for out_id in range(self.out.N)] [self.out.connect(out_id, ConstantWireValue0()) for out_id in range(self.out.N)]
else: else:
for grounded_out_index in range(0, max(self.horizontal_cut, self.vertical_cut)): for grounded_out_index in range(0, max(self.horizontal_cut, self.vertical_cut)):

14
ariths_gen/multi_bit_circuits/approximate_multipliers/truncated_multiplier.py
View File

@ -139,11 +139,8 @@ class UnsignedTruncatedMultiplier(MultiplierCircuit):
self.out.connect(self.out.N-1, obj_adder.get_carry_wire()) self.out.connect(self.out.N-1, obj_adder.get_carry_wire())
# Connecting the output bits generated from ommited cells to ground # Connecting the output bits generated from ommited cells to ground
if self.truncation_cut >= self.N: for grounded_out_index in range(0, self.truncation_cut*2):
[self.out.connect(out_id, ConstantWireValue0()) for out_id in range(self.out.N)] self.out.connect(grounded_out_index, ConstantWireValue0())
else:
for grounded_out_index in range(0, self.truncation_cut*2):
self.out.connect(grounded_out_index, ConstantWireValue0())
class SignedTruncatedMultiplier(MultiplierCircuit): class SignedTruncatedMultiplier(MultiplierCircuit):
"""Class representing signed truncated multiplier. """Class representing signed truncated multiplier.
@ -269,8 +266,5 @@ class SignedTruncatedMultiplier(MultiplierCircuit):
self.out.connect(self.out.N-1, obj_xor.out) self.out.connect(self.out.N-1, obj_xor.out)
# Connecting the output bits generated from ommited cells to ground # Connecting the output bits generated from ommited cells to ground
if self.truncation_cut >= self.N: for grounded_out_index in range(0, self.truncation_cut*2):
[self.out.connect(out_id, ConstantWireValue0()) for out_id in range(self.out.N)] self.out.connect(grounded_out_index, ConstantWireValue0())
else:
for grounded_out_index in range(0, self.truncation_cut*2):
self.out.connect(grounded_out_index, ConstantWireValue0())