#-----------------------------------------------------------
# Vivado v2023.2 (64-bit)
# SW Build 4029153 on Fri Oct 13 20:13:54 MDT 2023
# IP Build 4028589 on Sat Oct 14 00:45:43 MDT 2023
# SharedData Build 4025554 on Tue Oct 10 17:18:54 MDT 2023
# Start of session at: Mon Dec  4 08:46:15 2023
# Process ID: 57459
# Current directory: /home/veronikaplevacova/Plocha/PCS2
# Command line: vivado
# Log file: /home/veronikaplevacova/Plocha/PCS2/vivado.log
# Journal file: /home/veronikaplevacova/Plocha/PCS2/vivado.jou
# Running On: veronika-swiftsf11433, OS: Linux, CPU Frequency: 3071.652 MHz, CPU Physical cores: 4, Host memory: 3903 MB
#-----------------------------------------------------------
start_gui
open_project /home/veronikaplevacova/Plocha/PCS2/synth/filter_vivado.xpr
WARNING: [Board 49-26] cannot add Board Part xilinx.com:kc705:part0:1.6 available at /tools/Xilinx/Vivado/2023.2/data/xhub/boards/XilinxBoardStore/boards/Xilinx/kc705/1.6/board.xml as part xc7k325tffg900-2 specified in board_part file is either invalid or not available
WARNING: [Board 49-26] cannot add Board Part xilinx.com:kcu105:part0:1.6 available at /tools/Xilinx/Vivado/2023.2/data/xhub/boards/XilinxBoardStore/boards/Xilinx/kcu105/1.6/board.xml as part xcku040-ffva1156-2-e specified in board_part file is either invalid or not available
WARNING: [Board 49-26] cannot add Board Part xilinx.com:kcu105:part0:1.7 available at /tools/Xilinx/Vivado/2023.2/data/xhub/boards/XilinxBoardStore/boards/Xilinx/kcu105/1.7/board.xml as part xcku040-ffva1156-2-e specified in board_part file is either invalid or not available
WARNING: [Board 49-26] cannot add Board Part xilinx.com:kcu116:part0:1.4 available at /tools/Xilinx/Vivado/2023.2/data/xhub/boards/XilinxBoardStore/boards/Xilinx/kcu116/1.4/board.xml as part xcku5p-ffvb676-2-e specified in board_part file is either invalid or not available
WARNING: [Board 49-26] cannot add Board Part xilinx.com:kcu116:part0:1.5 available at /tools/Xilinx/Vivado/2023.2/data/xhub/boards/XilinxBoardStore/boards/Xilinx/kcu116/1.5/board.xml as part xcku5p-ffvb676-2-e specified in board_part file is either invalid or not available
WARNING: [Board 49-26] cannot add Board Part xilinx.com:kcu1500:part0:1.2 available at /tools/Xilinx/Vivado/2023.2/data/xhub/boards/XilinxBoardStore/boards/Xilinx/kcu1500/1.2/board.xml as part xcku115-flvb2104-2-e specified in board_part file is either invalid or not available
WARNING: [Board 49-26] cannot add Board Part xilinx.com:vc707:part0:1.4 available at /tools/Xilinx/Vivado/2023.2/data/xhub/boards/XilinxBoardStore/boards/Xilinx/vc707/1.4/board.xml as part xc7vx485tffg1761-2 specified in board_part file is either invalid or not available
WARNING: [Board 49-26] cannot add Board Part xilinx.com:vc709:part0:1.8 available at /tools/Xilinx/Vivado/2023.2/data/xhub/boards/XilinxBoardStore/boards/Xilinx/vc709/1.8/board.xml as part xc7vx690tffg1761-2 specified in board_part file is either invalid or not available
WARNING: [Board 49-26] cannot add Board Part xilinx.com:vck190:part0:2.2 available at /tools/Xilinx/Vivado/2023.2/data/xhub/boards/XilinxBoardStore/boards/Xilinx/vck190/production/2.2/board.xml as part xcvc1902-vsva2197-2mp-e-s specified in board_part file is either invalid or not available
WARNING: [Board 49-26] cannot add Board Part xilinx.com:vck190:part0:3.0 available at /tools/Xilinx/Vivado/2023.2/data/xhub/boards/XilinxBoardStore/boards/Xilinx/vck190/production/3.0/board.xml as part xcvc1902-vsva2197-2mp-e-s specified in board_part file is either invalid or not available
WARNING: [Board 49-26] cannot add Board Part xilinx.com:vck190:part0:3.1 available at /tools/Xilinx/Vivado/2023.2/data/xhub/boards/XilinxBoardStore/boards/Xilinx/vck190/production/3.1/board.xml as part xcvc1902-vsva2197-2mp-e-s specified in board_part file is either invalid or not available
WARNING: [Board 49-26] cannot add Board Part xilinx.com:vck190:part0:3.2 available at /tools/Xilinx/Vivado/2023.2/data/xhub/boards/XilinxBoardStore/boards/Xilinx/vck190/production/3.2/board.xml as part xcvc1902-vsva2197-2mp-e-s specified in board_part file is either invalid or not available
WARNING: [Board 49-26] cannot add Board Part xilinx.com:vck190_newl:part0:1.0 available at /tools/Xilinx/Vivado/2023.2/data/xhub/boards/XilinxBoardStore/boards/Xilinx/vck190_newl/production/1.0/board.xml as part xcvc1902-vsva2197-2mp-e-s specified in board_part file is either invalid or not available
WARNING: [Board 49-26] cannot add Board Part xilinx.com:vck190_newl:part0:1.1 available at /tools/Xilinx/Vivado/2023.2/data/xhub/boards/XilinxBoardStore/boards/Xilinx/vck190_newl/production/1.1/board.xml as part xcvc1902-vsva2197-2mp-e-s specified in board_part file is either invalid or not available
WARNING: [Board 49-26] cannot add Board Part xilinx.com:vcu108:part0:1.6 available at /tools/Xilinx/Vivado/2023.2/data/xhub/boards/XilinxBoardStore/boards/Xilinx/vcu108/1.6/board.xml as part xcvu095-ffva2104-2-e specified in board_part file is either invalid or not available
WARNING: [Board 49-26] cannot add Board Part xilinx.com:vcu108:part0:1.7 available at /tools/Xilinx/Vivado/2023.2/data/xhub/boards/XilinxBoardStore/boards/Xilinx/vcu108/1.7/board.xml as part xcvu095-ffva2104-2-e specified in board_part file is either invalid or not available
WARNING: [Board 49-26] cannot add Board Part xilinx.com:vcu110:part0:1.4 available at /tools/Xilinx/Vivado/2023.2/data/xhub/boards/XilinxBoardStore/boards/Xilinx/vcu110/1.4/board.xml as part xcvu190-flgc2104-2-e specified in board_part file is either invalid or not available
WARNING: [Board 49-26] cannot add Board Part xilinx.com:vcu118:part0:2.0 available at /tools/Xilinx/Vivado/2023.2/data/xhub/boards/XilinxBoardStore/boards/Xilinx/vcu118/2.0/board.xml as part xcvu9p-flga2104-2l-e specified in board_part file is either invalid or not available
WARNING: [Board 49-26] cannot add Board Part xilinx.com:vcu118:part0:2.3 available at /tools/Xilinx/Vivado/2023.2/data/xhub/boards/XilinxBoardStore/boards/Xilinx/vcu118/2.3/board.xml as part xcvu9p-flga2104-2l-e specified in board_part file is either invalid or not available
WARNING: [Board 49-26] cannot add Board Part xilinx.com:vcu118:part0:2.4 available at /tools/Xilinx/Vivado/2023.2/data/xhub/boards/XilinxBoardStore/boards/Xilinx/vcu118/2.4/board.xml as part xcvu9p-flga2104-2l-e specified in board_part file is either invalid or not available
WARNING: [Board 49-26] cannot add Board Part xilinx.com:vcu128:part0:1.0 available at /tools/Xilinx/Vivado/2023.2/data/xhub/boards/XilinxBoardStore/boards/Xilinx/vcu128/production/1.0/board.xml as part xcvu37p-fsvh2892-2l-e specified in board_part file is either invalid or not available
WARNING: [Board 49-26] cannot add Board Part xilinx.com:vcu129:part0:1.0 available at /tools/Xilinx/Vivado/2023.2/data/xhub/boards/XilinxBoardStore/boards/Xilinx/vcu129/production/1.0/board.xml as part xcvu29p-fsga2577-2l-e specified in board_part file is either invalid or not available
WARNING: [Board 49-26] cannot add Board Part xilinx.com:vcu1525:part0:1.3 available at /tools/Xilinx/Vivado/2023.2/data/xhub/boards/XilinxBoardStore/boards/Xilinx/vcu1525/1.3/board.xml as part xcvu9p-fsgd2104-2l-e specified in board_part file is either invalid or not available
WARNING: [Board 49-26] cannot add Board Part xilinx.com:vek280:part0:1.0 available at /tools/Xilinx/Vivado/2023.2/data/xhub/boards/XilinxBoardStore/boards/Xilinx/vek280/production/1.0/board.xml as part xcve2802-vsvh1760-2mp-e-s specified in board_part file is either invalid or not available
WARNING: [Board 49-26] cannot add Board Part xilinx.com:vek280_es:part0:1.0 available at /tools/Xilinx/Vivado/2023.2/data/xhub/boards/XilinxBoardStore/boards/Xilinx/vek280/es/rev_a/1.0/board.xml as part xcve2802-vsvh1760-2lp-e-s-es1 specified in board_part file is either invalid or not available
WARNING: [Board 49-26] cannot add Board Part xilinx.com:vek280_es:part0:1.1 available at /tools/Xilinx/Vivado/2023.2/data/xhub/boards/XilinxBoardStore/boards/Xilinx/vek280/es/rev_a/1.1/board.xml as part xcve2802-vsvh1760-2lp-e-s-es1 specified in board_part file is either invalid or not available
WARNING: [Board 49-26] cannot add Board Part xilinx.com:vek280_es_revb:part0:1.0 available at /tools/Xilinx/Vivado/2023.2/data/xhub/boards/XilinxBoardStore/boards/Xilinx/vek280/es/rev_b/1.0/board.xml as part xcve2802-vsvh1760-2mp-e-s-es1 specified in board_part file is either invalid or not available
WARNING: [Board 49-26] cannot add Board Part xilinx.com:vek280_es_revb:part0:1.1 available at /tools/Xilinx/Vivado/2023.2/data/xhub/boards/XilinxBoardStore/boards/Xilinx/vek280/es/rev_b/1.1/board.xml as part xcve2802-vsvh1760-2mp-e-s-es1 specified in board_part file is either invalid or not available
WARNING: [Board 49-26] cannot add Board Part xilinx.com:vermeo_t1_mpsoc:part0:1.0 available at /tools/Xilinx/Vivado/2023.2/data/xhub/boards/XilinxBoardStore/boards/Xilinx/vermeo_t1_mpsoc/1.0/board.xml as part xczu19eg-ffvd1760-2l-e specified in board_part file is either invalid or not available
WARNING: [Board 49-26] cannot add Board Part xilinx.com:vermeo_t1_rfsoc:part0:1.0 available at /tools/Xilinx/Vivado/2023.2/data/xhub/boards/XilinxBoardStore/boards/Xilinx/vermeo_t1_rfsoc/1.0/board.xml as part xczu21dr-ffvd1156-2l-e specified in board_part file is either invalid or not available
WARNING: [Board 49-26] cannot add Board Part xilinx.com:vhk158:part0:1.0 available at /tools/Xilinx/Vivado/2023.2/data/xhub/boards/XilinxBoardStore/boards/Xilinx/vhk158/production/1.0/board.xml as part xcvh1582-vsva3697-2mp-e-s specified in board_part file is either invalid or not available
WARNING: [Board 49-26] cannot add Board Part xilinx.com:vhk158:part0:1.1 available at /tools/Xilinx/Vivado/2023.2/data/xhub/boards/XilinxBoardStore/boards/Xilinx/vhk158/production/1.1/board.xml as part xcvh1582-vsva3697-2mp-e-s specified in board_part file is either invalid or not available
WARNING: [Board 49-26] cannot add Board Part xilinx.com:vhk158_es:part0:1.0 available at /tools/Xilinx/Vivado/2023.2/data/xhub/boards/XilinxBoardStore/boards/Xilinx/vhk158/es/1.0/board.xml as part xcvh1582-vsva3697-2mp-e-s-es1 specified in board_part file is either invalid or not available
WARNING: [Board 49-26] cannot add Board Part xilinx.com:vhk158_es:part0:1.1 available at /tools/Xilinx/Vivado/2023.2/data/xhub/boards/XilinxBoardStore/boards/Xilinx/vhk158/es/1.1/board.xml as part xcvh1582-vsva3697-2mp-e-s-es1 specified in board_part file is either invalid or not available
WARNING: [Board 49-26] cannot add Board Part xilinx.com:vmk180:part0:2.2 available at /tools/Xilinx/Vivado/2023.2/data/xhub/boards/XilinxBoardStore/boards/Xilinx/vmk180/production/2.2/board.xml as part xcvm1802-vsva2197-2mp-e-s specified in board_part file is either invalid or not available
WARNING: [Board 49-26] cannot add Board Part xilinx.com:vmk180:part0:3.0 available at /tools/Xilinx/Vivado/2023.2/data/xhub/boards/XilinxBoardStore/boards/Xilinx/vmk180/production/3.0/board.xml as part xcvm1802-vsva2197-2mp-e-s specified in board_part file is either invalid or not available
WARNING: [Board 49-26] cannot add Board Part xilinx.com:vmk180:part0:3.1 available at /tools/Xilinx/Vivado/2023.2/data/xhub/boards/XilinxBoardStore/boards/Xilinx/vmk180/production/3.1/board.xml as part xcvm1802-vsva2197-2mp-e-s specified in board_part file is either invalid or not available
WARNING: [Board 49-26] cannot add Board Part xilinx.com:vmk180:part0:3.2 available at /tools/Xilinx/Vivado/2023.2/data/xhub/boards/XilinxBoardStore/boards/Xilinx/vmk180/production/3.2/board.xml as part xcvm1802-vsva2197-2mp-e-s specified in board_part file is either invalid or not available
WARNING: [Board 49-26] cannot add Board Part xilinx.com:vmk180_newl:part0:1.0 available at /tools/Xilinx/Vivado/2023.2/data/xhub/boards/XilinxBoardStore/boards/Xilinx/vmk180_newl/production/1.0/board.xml as part xcvm1802-vsva2197-2mp-e-s specified in board_part file is either invalid or not available
WARNING: [Board 49-26] cannot add Board Part xilinx.com:vmk180_newl:part0:1.1 available at /tools/Xilinx/Vivado/2023.2/data/xhub/boards/XilinxBoardStore/boards/Xilinx/vmk180_newl/production/1.1/board.xml as part xcvm1802-vsva2197-2mp-e-s specified in board_part file is either invalid or not available
WARNING: [Board 49-26] cannot add Board Part xilinx.com:vpk120:part0:1.0 available at /tools/Xilinx/Vivado/2023.2/data/xhub/boards/XilinxBoardStore/boards/Xilinx/vpk120/production/1.0/board.xml as part xcvp1202-vsva2785-2mp-e-s specified in board_part file is either invalid or not available
WARNING: [Board 49-26] cannot add Board Part xilinx.com:vpk120:part0:1.1 available at /tools/Xilinx/Vivado/2023.2/data/xhub/boards/XilinxBoardStore/boards/Xilinx/vpk120/production/1.1/board.xml as part xcvp1202-vsva2785-2mp-e-s specified in board_part file is either invalid or not available
WARNING: [Board 49-26] cannot add Board Part xilinx.com:vpk120:part0:1.2 available at /tools/Xilinx/Vivado/2023.2/data/xhub/boards/XilinxBoardStore/boards/Xilinx/vpk120/production/1.2/board.xml as part xcvp1202-vsva2785-2mp-e-s specified in board_part file is either invalid or not available
WARNING: [Board 49-26] cannot add Board Part xilinx.com:vpk180:part0:1.0 available at /tools/Xilinx/Vivado/2023.2/data/xhub/boards/XilinxBoardStore/boards/Xilinx/vpk180/production/1.0/board.xml as part xcvp1802-lsvc4072-2mp-e-s specified in board_part file is either invalid or not available
WARNING: [Board 49-26] cannot add Board Part xilinx.com:vpk180:part0:1.1 available at /tools/Xilinx/Vivado/2023.2/data/xhub/boards/XilinxBoardStore/boards/Xilinx/vpk180/production/1.1/board.xml as part xcvp1802-lsvc4072-2mp-e-s specified in board_part file is either invalid or not available
WARNING: [Board 49-26] cannot add Board Part xilinx.com:zc702:part0:1.4 available at /tools/Xilinx/Vivado/2023.2/data/xhub/boards/XilinxBoardStore/boards/Xilinx/zc702/1.4/board.xml as part xc7z020clg484-1 specified in board_part file is either invalid or not available
WARNING: [Board 49-26] cannot add Board Part xilinx.com:zc706:part0:1.4 available at /tools/Xilinx/Vivado/2023.2/data/xhub/boards/XilinxBoardStore/boards/Xilinx/zc706/1.4/board.xml as part xc7z045ffg900-2 specified in board_part file is either invalid or not available
WARNING: [Board 49-26] cannot add Board Part xilinx.com:zcu102:part0:3.3 available at /tools/Xilinx/Vivado/2023.2/data/xhub/boards/XilinxBoardStore/boards/Xilinx/zcu102/3.3/board.xml as part xczu9eg-ffvb1156-2-e specified in board_part file is either invalid or not available
WARNING: [Board 49-26] cannot add Board Part xilinx.com:zcu102:part0:3.4 available at /tools/Xilinx/Vivado/2023.2/data/xhub/boards/XilinxBoardStore/boards/Xilinx/zcu102/3.4/board.xml as part xczu9eg-ffvb1156-2-e specified in board_part file is either invalid or not available
WARNING: [Board 49-26] cannot add Board Part xilinx.com:zcu104:part0:1.1 available at /tools/Xilinx/Vivado/2023.2/data/xhub/boards/XilinxBoardStore/boards/Xilinx/zcu104/1.1/board.xml as part xczu7ev-ffvc1156-2-e specified in board_part file is either invalid or not available
WARNING: [Board 49-26] cannot add Board Part xilinx.com:zcu106:part0:2.4 available at /tools/Xilinx/Vivado/2023.2/data/xhub/boards/XilinxBoardStore/boards/Xilinx/zcu106/2.4/board.xml as part xczu7ev-ffvc1156-2-e specified in board_part file is either invalid or not available
WARNING: [Board 49-26] cannot add Board Part xilinx.com:zcu106:part0:2.5 available at /tools/Xilinx/Vivado/2023.2/data/xhub/boards/XilinxBoardStore/boards/Xilinx/zcu106/2.5/board.xml as part xczu7ev-ffvc1156-2-e specified in board_part file is either invalid or not available
WARNING: [Board 49-26] cannot add Board Part xilinx.com:zcu106:part0:2.6 available at /tools/Xilinx/Vivado/2023.2/data/xhub/boards/XilinxBoardStore/boards/Xilinx/zcu106/2.6/board.xml as part xczu7ev-ffvc1156-2-e specified in board_part file is either invalid or not available
WARNING: [Board 49-26] cannot add Board Part xilinx.com:zcu111:part0:1.2 available at /tools/Xilinx/Vivado/2023.2/data/xhub/boards/XilinxBoardStore/boards/Xilinx/zcu111/1.2/board.xml as part xczu28dr-ffvg1517-2-e specified in board_part file is either invalid or not available
WARNING: [Board 49-26] cannot add Board Part xilinx.com:zcu111:part0:1.3 available at /tools/Xilinx/Vivado/2023.2/data/xhub/boards/XilinxBoardStore/boards/Xilinx/zcu111/1.3/board.xml as part xczu28dr-ffvg1517-2-e specified in board_part file is either invalid or not available
WARNING: [Board 49-26] cannot add Board Part xilinx.com:zcu111:part0:1.4 available at /tools/Xilinx/Vivado/2023.2/data/xhub/boards/XilinxBoardStore/boards/Xilinx/zcu111/1.4/board.xml as part xczu28dr-ffvg1517-2-e specified in board_part file is either invalid or not available
WARNING: [Board 49-26] cannot add Board Part xilinx.com:zcu1275:part0:1.0 available at /tools/Xilinx/Vivado/2023.2/data/xhub/boards/XilinxBoardStore/boards/Xilinx/zcu1275/1.0/board.xml as part xczu29dr-ffvf1760-2-e specified in board_part file is either invalid or not available
WARNING: [Board 49-26] cannot add Board Part xilinx.com:zcu1285:part0:1.0 available at /tools/Xilinx/Vivado/2023.2/data/xhub/boards/XilinxBoardStore/boards/Xilinx/zcu1285/1.0/board.xml as part xczu39dr-ffvf1760-2-i specified in board_part file is either invalid or not available
WARNING: [Board 49-26] cannot add Board Part xilinx.com:zcu208:part0:2.0 available at /tools/Xilinx/Vivado/2023.2/data/xhub/boards/XilinxBoardStore/boards/Xilinx/zcu208/production/2.0/board.xml as part xczu48dr-fsvg1517-2-e specified in board_part file is either invalid or not available
WARNING: [Board 49-26] cannot add Board Part xilinx.com:zcu208ld:part0:2.0 available at /tools/Xilinx/Vivado/2023.2/data/xhub/boards/XilinxBoardStore/boards/Xilinx/zcu208ld/production/2.0/board.xml as part xczu58dr-fsvg1517-2-i specified in board_part file is either invalid or not available
WARNING: [Board 49-26] cannot add Board Part xilinx.com:zcu216:part0:2.0 available at /tools/Xilinx/Vivado/2023.2/data/xhub/boards/XilinxBoardStore/boards/Xilinx/zcu216/production/2.0/board.xml as part xczu49dr-ffvf1760-2-e specified in board_part file is either invalid or not available
WARNING: [Board 49-26] cannot add Board Part xilinx.com:zcu216ld:part0:2.0 available at /tools/Xilinx/Vivado/2023.2/data/xhub/boards/XilinxBoardStore/boards/Xilinx/zcu216ld/production/2.0/board.xml as part xczu59dr-ffvf1760-2-i specified in board_part file is either invalid or not available
WARNING: [Board 49-26] cannot add Board Part xilinx.com:zcu670:part0:2.0 available at /tools/Xilinx/Vivado/2023.2/data/xhub/boards/XilinxBoardStore/boards/Xilinx/zcu670/2.0/board.xml as part xczu67dr-fsve1156-2-i specified in board_part file is either invalid or not available
WARNING: [Board 49-26] cannot add Board Part xilinx.com:zcu670ld:part0:1.0 available at /tools/Xilinx/Vivado/2023.2/data/xhub/boards/XilinxBoardStore/boards/Xilinx/zcu670ld/1.0/board.xml as part xczu57dr-fsve1156-2-i specified in board_part file is either invalid or not available
INFO: [filemgmt 56-3] Default IP Output Path : Could not find the directory '/home/veronikaplevacova/Plocha/PCS2/synth/filter_vivado.gen/sources_1'.
Scanning sources...
Finished scanning sources
INFO: [IP_Flow 19-234] Refreshing IP repositories
INFO: [IP_Flow 19-1704] No user IP repositories specified
INFO: [IP_Flow 19-2313] Loaded Vivado IP repository '/tools/Xilinx/Vivado/2023.2/data/ip'.
open_project: Time (s): cpu = 00:00:35 ; elapsed = 00:00:20 . Memory (MB): peak = 7829.996 ; gain = 406.953 ; free physical = 266 ; free virtual = 9335
update_compile_order -fileset sources_1
open_run impl_1
INFO: [Device 21-403] Loading part xc7k160tffv676-1
Netlist sorting complete. Time (s): cpu = 00:00:00.06 ; elapsed = 00:00:00.06 . Memory (MB): peak = 8271.379 ; gain = 0.000 ; free physical = 224 ; free virtual = 8985
INFO: [Netlist 29-17] Analyzing 781 Unisim elements for replacement
INFO: [Netlist 29-28] Unisim Transformation completed in 0 CPU seconds
INFO: [Project 1-479] Netlist was created with Vivado 2023.2
INFO: [Project 1-570] Preparing netlist for logic optimization
Read ShapeDB Complete: Time (s): cpu = 00:00:00.01 ; elapsed = 00:00:00.01 . Memory (MB): peak = 8332.098 ; gain = 1.000 ; free physical = 123 ; free virtual = 8910
INFO: [Timing 38-478] Restoring timing data from binary archive.
INFO: [Timing 38-479] Binary timing data restore complete.
INFO: [Project 1-856] Restoring constraints from binary archive.
INFO: [Project 1-853] Binary constraint restore complete.
INFO: [Designutils 20-5722] Start Reading Physical Databases.
Reading placement.
Read Netlist Cache: Time (s): cpu = 00:00:00.01 ; elapsed = 00:00:00.01 . Memory (MB): peak = 8932.129 ; gain = 0.000 ; free physical = 135 ; free virtual = 8380
Reading placer database...
Read Device Cache: Time (s): cpu = 00:00:00.01 ; elapsed = 00:00:00.02 . Memory (MB): peak = 8932.129 ; gain = 0.000 ; free physical = 135 ; free virtual = 8380
Read PlaceDB: Time (s): cpu = 00:00:00.48 ; elapsed = 00:00:00.46 . Memory (MB): peak = 8932.129 ; gain = 0.000 ; free physical = 126 ; free virtual = 8372
Read PulsedLatchDB: Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 8932.129 ; gain = 0.000 ; free physical = 126 ; free virtual = 8372
Reading routing.
Read RouteStorage: Time (s): cpu = 00:00:00.25 ; elapsed = 00:00:00.24 . Memory (MB): peak = 8932.129 ; gain = 0.000 ; free physical = 124 ; free virtual = 8371
Read Physdb Files: Time (s): cpu = 00:00:00.77 ; elapsed = 00:00:00.75 . Memory (MB): peak = 8932.129 ; gain = 0.000 ; free physical = 122 ; free virtual = 8369
Restored from archive | CPU: 0.790000 secs | Memory: 9.724342 MB |
Finished XDEF File Restore: Time (s): cpu = 00:00:00.77 ; elapsed = 00:00:00.75 . Memory (MB): peak = 8932.129 ; gain = 0.000 ; free physical = 122 ; free virtual = 8369
Netlist sorting complete. Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 8932.129 ; gain = 0.000 ; free physical = 108 ; free virtual = 8367
INFO: [Project 1-111] Unisim Transformation Summary:
No Unisim elements were transformed.

open_run: Time (s): cpu = 00:00:39 ; elapsed = 00:00:29 . Memory (MB): peak = 9158.637 ; gain = 1234.473 ; free physical = 147 ; free virtual = 8101
CRITICAL WARNING: [Timing 38-282] The design failed to meet the timing requirements. Please see the timing summary report for details on the timing violations.
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/filter.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/block_memory.vhd:]
reset_run synth_1
launch_runs impl_1 -jobs 2
[Mon Dec  4 08:54:26 2023] Launched synth_1...
Run output will be captured here: /home/veronikaplevacova/Plocha/PCS2/synth/filter_vivado.runs/synth_1/runme.log
[Mon Dec  4 08:54:26 2023] Launched impl_1...
Run output will be captured here: /home/veronikaplevacova/Plocha/PCS2/synth/filter_vivado.runs/impl_1/runme.log
close_design
open_run synth_1 -name synth_1
Design is defaulting to impl run constrset: constrs_1
Design is defaulting to synth run part: xc7k160tffv676-1
Netlist sorting complete. Time (s): cpu = 00:00:00.11 ; elapsed = 00:00:00.14 . Memory (MB): peak = 9158.637 ; gain = 0.000 ; free physical = 165 ; free virtual = 5323
INFO: [Netlist 29-17] Analyzing 781 Unisim elements for replacement
INFO: [Netlist 29-28] Unisim Transformation completed in 0 CPU seconds
INFO: [Project 1-479] Netlist was created with Vivado 2023.2
INFO: [Project 1-570] Preparing netlist for logic optimization
Parsing XDC File [/home/veronikaplevacova/Plocha/PCS2/synth/filter.xdc]
WARNING: [Constraints 18-6211] Setting input delay on a clock pin 'CLK' relative to clock 'CLK' defined on the same pin is not supported, ignoring it [/home/veronikaplevacova/Plocha/PCS2/synth/filter.xdc:13]
Finished Parsing XDC File [/home/veronikaplevacova/Plocha/PCS2/synth/filter.xdc]
INFO: [Opt 31-138] Pushed 0 inverter(s) to 0 load pin(s).
Netlist sorting complete. Time (s): cpu = 00:00:00.01 ; elapsed = 00:00:00 . Memory (MB): peak = 9158.637 ; gain = 0.000 ; free physical = 164 ; free virtual = 5286
INFO: [Project 1-111] Unisim Transformation Summary:
No Unisim elements were transformed.

open_run: Time (s): cpu = 00:00:14 ; elapsed = 00:00:12 . Memory (MB): peak = 9158.637 ; gain = 0.000 ; free physical = 190 ; free virtual = 5081
report_timing_summary -delay_type min_max -report_unconstrained -check_timing_verbose -max_paths 10 -input_pins -routable_nets -name timing_1
WARNING: [Constraints 18-6211] Setting input delay on a clock pin 'CLK' relative to clock 'CLK' defined on the same pin is not supported, ignoring it [/home/veronikaplevacova/Plocha/PCS2/synth/filter.xdc:13]
INFO: [Timing 38-35] Done setting XDC timing constraints.
INFO: [Timing 38-91] UpdateTimingParams: Speed grade: -1, Delay Type: min_max.
INFO: [Timing 38-191] Multithreading enabled for timing update using a maximum of 4 CPUs
WARNING: [Timing 38-242] The property HD.CLK_SRC of clock port "CLK" is not set. In out-of-context mode, this prevents timing estimation for clock delay/skew
Resolution: Set the HD.CLK_SRC property of the out-of-context port to the location of the clock buffer instance in the top-level design
reset_run synth_1
launch_runs synth_1 -jobs 2
WARNING: [Vivado 12-7122] Auto Incremental Compile:: No reference checkpoint was found in run synth_1. Auto-incremental flow will not be run, the standard flow will be run instead.
[Mon Dec  4 09:05:32 2023] Launched synth_1...
Run output will be captured here: /home/veronikaplevacova/Plocha/PCS2/synth/filter_vivado.runs/synth_1/runme.log
close_design
open_run synth_1 -name synth_1
Design is defaulting to impl run constrset: constrs_1
Design is defaulting to synth run part: xc7k160tffv676-1
Netlist sorting complete. Time (s): cpu = 00:00:00.25 ; elapsed = 00:00:00.25 . Memory (MB): peak = 9158.637 ; gain = 0.000 ; free physical = 887 ; free virtual = 7048
INFO: [Netlist 29-17] Analyzing 9337 Unisim elements for replacement
INFO: [Netlist 29-28] Unisim Transformation completed in 6 CPU seconds
INFO: [Project 1-479] Netlist was created with Vivado 2023.2
INFO: [Project 1-570] Preparing netlist for logic optimization
Parsing XDC File [/home/veronikaplevacova/Plocha/PCS2/synth/filter.xdc]
WARNING: [Constraints 18-6211] Setting input delay on a clock pin 'CLK' relative to clock 'CLK' defined on the same pin is not supported, ignoring it [/home/veronikaplevacova/Plocha/PCS2/synth/filter.xdc:13]
Finished Parsing XDC File [/home/veronikaplevacova/Plocha/PCS2/synth/filter.xdc]
INFO: [Opt 31-138] Pushed 0 inverter(s) to 0 load pin(s).
Netlist sorting complete. Time (s): cpu = 00:00:00.03 ; elapsed = 00:00:00.02 . Memory (MB): peak = 9158.637 ; gain = 0.000 ; free physical = 737 ; free virtual = 6998
INFO: [Project 1-111] Unisim Transformation Summary:
  A total of 6272 instances were transformed.
  RAM64M => RAM64M (RAMD64E(x4)): 6144 instances
  RAM64X1D => RAM64X1D (RAMD64E(x2)): 128 instances

open_run: Time (s): cpu = 00:00:24 ; elapsed = 00:00:20 . Memory (MB): peak = 9158.637 ; gain = 0.000 ; free physical = 516 ; free virtual = 6925
report_timing_summary -delay_type min_max -report_unconstrained -check_timing_verbose -max_paths 10 -input_pins -routable_nets -name timing_1
WARNING: [Constraints 18-6211] Setting input delay on a clock pin 'CLK' relative to clock 'CLK' defined on the same pin is not supported, ignoring it [/home/veronikaplevacova/Plocha/PCS2/synth/filter.xdc:13]
INFO: [Timing 38-35] Done setting XDC timing constraints.
INFO: [Timing 38-91] UpdateTimingParams: Speed grade: -1, Delay Type: min_max.
INFO: [Timing 38-191] Multithreading enabled for timing update using a maximum of 4 CPUs
WARNING: [Timing 38-242] The property HD.CLK_SRC of clock port "CLK" is not set. In out-of-context mode, this prevents timing estimation for clock delay/skew
Resolution: Set the HD.CLK_SRC property of the out-of-context port to the location of the clock buffer instance in the top-level design
report_timing_summary: Time (s): cpu = 00:01:14 ; elapsed = 00:00:29 . Memory (MB): peak = 9344.996 ; gain = 186.359 ; free physical = 320 ; free virtual = 6755
launch_runs impl_1 -jobs 2
INFO: [Timing 38-480] Writing timing data to binary archive.
Write ShapeDB Complete: Time (s): cpu = 00:00:00.74 ; elapsed = 00:00:00.21 . Memory (MB): peak = 9376.504 ; gain = 23.504 ; free physical = 382 ; free virtual = 6940
[Mon Dec  4 09:11:00 2023] Launched impl_1...
Run output will be captured here: /home/veronikaplevacova/Plocha/PCS2/synth/filter_vivado.runs/impl_1/runme.log
reset_run impl_1
WARNING: [Vivado 12-1017] Problems encountered:
1. Attempt to kill process failed

reset_run synth_1
launch_runs synth_1 -jobs 2
WARNING: [Vivado 12-7122] Auto Incremental Compile:: No reference checkpoint was found in run synth_1. Auto-incremental flow will not be run, the standard flow will be run instead.
[Mon Dec  4 09:30:14 2023] Launched synth_1...
Run output will be captured here: /home/veronikaplevacova/Plocha/PCS2/synth/filter_vivado.runs/synth_1/runme.log
close_design
close_design: Time (s): cpu = 00:00:05 ; elapsed = 00:00:10 . Memory (MB): peak = 9432.188 ; gain = 9.965 ; free physical = 130 ; free virtual = 5466
open_run synth_1 -name synth_1
Design is defaulting to impl run constrset: constrs_1
Design is defaulting to synth run part: xc7k160tffv676-1
Netlist sorting complete. Time (s): cpu = 00:00:00.11 ; elapsed = 00:00:00.13 . Memory (MB): peak = 9432.188 ; gain = 0.000 ; free physical = 252 ; free virtual = 5484
INFO: [Netlist 29-17] Analyzing 781 Unisim elements for replacement
INFO: [Netlist 29-28] Unisim Transformation completed in 0 CPU seconds
INFO: [Project 1-479] Netlist was created with Vivado 2023.2
INFO: [Project 1-570] Preparing netlist for logic optimization
Parsing XDC File [/home/veronikaplevacova/Plocha/PCS2/synth/filter.xdc]
WARNING: [Constraints 18-6211] Setting input delay on a clock pin 'CLK' relative to clock 'CLK' defined on the same pin is not supported, ignoring it [/home/veronikaplevacova/Plocha/PCS2/synth/filter.xdc:13]
Finished Parsing XDC File [/home/veronikaplevacova/Plocha/PCS2/synth/filter.xdc]
INFO: [Opt 31-138] Pushed 0 inverter(s) to 0 load pin(s).
Netlist sorting complete. Time (s): cpu = 00:00:00 ; elapsed = 00:00:00.01 . Memory (MB): peak = 9432.188 ; gain = 0.000 ; free physical = 153 ; free virtual = 5475
INFO: [Project 1-111] Unisim Transformation Summary:
No Unisim elements were transformed.

open_run: Time (s): cpu = 00:00:11 ; elapsed = 00:00:14 . Memory (MB): peak = 9432.188 ; gain = 0.000 ; free physical = 141 ; free virtual = 5369
report_timing_summary -delay_type min_max -report_unconstrained -check_timing_verbose -max_paths 10 -input_pins -routable_nets -name timing_1
WARNING: [Constraints 18-6211] Setting input delay on a clock pin 'CLK' relative to clock 'CLK' defined on the same pin is not supported, ignoring it [/home/veronikaplevacova/Plocha/PCS2/synth/filter.xdc:13]
INFO: [Timing 38-35] Done setting XDC timing constraints.
INFO: [Timing 38-91] UpdateTimingParams: Speed grade: -1, Delay Type: min_max.
INFO: [Timing 38-191] Multithreading enabled for timing update using a maximum of 4 CPUs
WARNING: [Timing 38-242] The property HD.CLK_SRC of clock port "CLK" is not set. In out-of-context mode, this prevents timing estimation for clock delay/skew
Resolution: Set the HD.CLK_SRC property of the out-of-context port to the location of the clock buffer instance in the top-level design
report_timing_summary: Time (s): cpu = 00:00:10 ; elapsed = 00:00:05 . Memory (MB): peak = 9432.188 ; gain = 0.000 ; free physical = 119 ; free virtual = 5285
reset_run synth_1
launch_runs synth_1 -jobs 2
WARNING: [Vivado 12-7122] Auto Incremental Compile:: No reference checkpoint was found in run synth_1. Auto-incremental flow will not be run, the standard flow will be run instead.
[Mon Dec  4 09:35:30 2023] Launched synth_1...
Run output will be captured here: /home/veronikaplevacova/Plocha/PCS2/synth/filter_vivado.runs/synth_1/runme.log
close_design
close_design: Time (s): cpu = 00:00:03 ; elapsed = 00:00:06 . Memory (MB): peak = 9486.199 ; gain = 9.965 ; free physical = 104 ; free virtual = 4202
open_run synth_1 -name synth_1
Design is defaulting to impl run constrset: constrs_1
Design is defaulting to synth run part: xc7k160tffv676-1
Netlist sorting complete. Time (s): cpu = 00:00:00.08 ; elapsed = 00:00:00.1 . Memory (MB): peak = 9486.199 ; gain = 0.000 ; free physical = 682 ; free virtual = 5113
INFO: [Netlist 29-17] Analyzing 781 Unisim elements for replacement
INFO: [Netlist 29-28] Unisim Transformation completed in 0 CPU seconds
INFO: [Project 1-479] Netlist was created with Vivado 2023.2
INFO: [Project 1-570] Preparing netlist for logic optimization
Parsing XDC File [/home/veronikaplevacova/Plocha/PCS2/synth/filter.xdc]
WARNING: [Constraints 18-6211] Setting input delay on a clock pin 'CLK' relative to clock 'CLK' defined on the same pin is not supported, ignoring it [/home/veronikaplevacova/Plocha/PCS2/synth/filter.xdc:13]
Finished Parsing XDC File [/home/veronikaplevacova/Plocha/PCS2/synth/filter.xdc]
INFO: [Opt 31-138] Pushed 0 inverter(s) to 0 load pin(s).
Netlist sorting complete. Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 9486.199 ; gain = 0.000 ; free physical = 334 ; free virtual = 5059
INFO: [Project 1-111] Unisim Transformation Summary:
No Unisim elements were transformed.

open_run: Time (s): cpu = 00:00:09 ; elapsed = 00:00:12 . Memory (MB): peak = 9486.199 ; gain = 0.000 ; free physical = 193 ; free virtual = 5054
report_timing_summary -delay_type min_max -report_unconstrained -check_timing_verbose -max_paths 10 -input_pins -routable_nets -name timing_1
WARNING: [Constraints 18-6211] Setting input delay on a clock pin 'CLK' relative to clock 'CLK' defined on the same pin is not supported, ignoring it [/home/veronikaplevacova/Plocha/PCS2/synth/filter.xdc:13]
INFO: [Timing 38-35] Done setting XDC timing constraints.
INFO: [Timing 38-91] UpdateTimingParams: Speed grade: -1, Delay Type: min_max.
INFO: [Timing 38-191] Multithreading enabled for timing update using a maximum of 4 CPUs
WARNING: [Timing 38-242] The property HD.CLK_SRC of clock port "CLK" is not set. In out-of-context mode, this prevents timing estimation for clock delay/skew
Resolution: Set the HD.CLK_SRC property of the out-of-context port to the location of the clock buffer instance in the top-level design
report_timing_summary: Time (s): cpu = 00:00:09 ; elapsed = 00:00:06 . Memory (MB): peak = 9486.199 ; gain = 0.000 ; free physical = 235 ; free virtual = 5156
reset_run synth_1
launch_runs synth_1 -jobs 2
WARNING: [Vivado 12-7122] Auto Incremental Compile:: No reference checkpoint was found in run synth_1. Auto-incremental flow will not be run, the standard flow will be run instead.
[Mon Dec  4 09:38:46 2023] Launched synth_1...
Run output will be captured here: /home/veronikaplevacova/Plocha/PCS2/synth/filter_vivado.runs/synth_1/runme.log
close_design
launch_runs impl_1 -jobs 2
[Mon Dec  4 09:42:25 2023] Launched impl_1...
Run output will be captured here: /home/veronikaplevacova/Plocha/PCS2/synth/filter_vivado.runs/impl_1/runme.log
open_run synth_1 -name synth_1
Design is defaulting to impl run constrset: constrs_1
Design is defaulting to synth run part: xc7k160tffv676-1
Netlist sorting complete. Time (s): cpu = 00:00:00.28 ; elapsed = 00:00:00.28 . Memory (MB): peak = 9506.199 ; gain = 0.000 ; free physical = 498 ; free virtual = 6871
INFO: [Netlist 29-17] Analyzing 9337 Unisim elements for replacement
INFO: [Netlist 29-28] Unisim Transformation completed in 10 CPU seconds
INFO: [Project 1-479] Netlist was created with Vivado 2023.2
INFO: [Project 1-570] Preparing netlist for logic optimization
Parsing XDC File [/home/veronikaplevacova/Plocha/PCS2/synth/filter.xdc]
WARNING: [Constraints 18-6211] Setting input delay on a clock pin 'CLK' relative to clock 'CLK' defined on the same pin is not supported, ignoring it [/home/veronikaplevacova/Plocha/PCS2/synth/filter.xdc:13]
Finished Parsing XDC File [/home/veronikaplevacova/Plocha/PCS2/synth/filter.xdc]
INFO: [Opt 31-138] Pushed 0 inverter(s) to 0 load pin(s).
Netlist sorting complete. Time (s): cpu = 00:00:00.04 ; elapsed = 00:00:00.03 . Memory (MB): peak = 9506.199 ; gain = 0.000 ; free physical = 252 ; free virtual = 6895
INFO: [Project 1-111] Unisim Transformation Summary:
  A total of 6272 instances were transformed.
  RAM64M => RAM64M (RAMD64E(x4)): 6144 instances
  RAM64X1D => RAM64X1D (RAMD64E(x2)): 128 instances

open_run: Time (s): cpu = 00:00:29 ; elapsed = 00:00:29 . Memory (MB): peak = 9506.199 ; gain = 0.000 ; free physical = 151 ; free virtual = 6899
report_timing_summary -delay_type min_max -report_unconstrained -check_timing_verbose -max_paths 10 -input_pins -routable_nets -name timing_1
WARNING: [Constraints 18-6211] Setting input delay on a clock pin 'CLK' relative to clock 'CLK' defined on the same pin is not supported, ignoring it [/home/veronikaplevacova/Plocha/PCS2/synth/filter.xdc:13]
INFO: [Timing 38-35] Done setting XDC timing constraints.
INFO: [Timing 38-91] UpdateTimingParams: Speed grade: -1, Delay Type: min_max.
INFO: [Timing 38-191] Multithreading enabled for timing update using a maximum of 4 CPUs
WARNING: [Timing 38-242] The property HD.CLK_SRC of clock port "CLK" is not set. In out-of-context mode, this prevents timing estimation for clock delay/skew
Resolution: Set the HD.CLK_SRC property of the out-of-context port to the location of the clock buffer instance in the top-level design
report_timing_summary: Time (s): cpu = 00:01:35 ; elapsed = 00:00:44 . Memory (MB): peak = 9506.199 ; gain = 0.000 ; free physical = 151 ; free virtual = 6266
reset_run impl_1
WARNING: [Vivado 12-1017] Problems encountered:
1. Attempt to kill process failed

reset_run synth_1
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_final.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/block_memory.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_hash.vhd:]
launch_runs synth_1 -jobs 2
WARNING: [Vivado 12-7122] Auto Incremental Compile:: No reference checkpoint was found in run synth_1. Auto-incremental flow will not be run, the standard flow will be run instead.
[Mon Dec  4 10:19:27 2023] Launched synth_1...
Run output will be captured here: /home/veronikaplevacova/Plocha/PCS2/synth/filter_vivado.runs/synth_1/runme.log
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_final.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/block_memory.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_hash.vhd:]
close_design
close_design: Time (s): cpu = 00:00:05 ; elapsed = 00:00:19 . Memory (MB): peak = 9614.242 ; gain = 0.000 ; free physical = 104 ; free virtual = 3264
open_run synth_1 -name synth_1
Design is defaulting to impl run constrset: constrs_1
Design is defaulting to synth run part: xc7k160tffv676-1
Netlist sorting complete. Time (s): cpu = 00:00:00.32 ; elapsed = 00:00:00.33 . Memory (MB): peak = 9614.242 ; gain = 0.000 ; free physical = 987 ; free virtual = 5523
INFO: [Netlist 29-17] Analyzing 9337 Unisim elements for replacement
INFO: [Netlist 29-28] Unisim Transformation completed in 8 CPU seconds
INFO: [Project 1-479] Netlist was created with Vivado 2023.2
INFO: [Project 1-570] Preparing netlist for logic optimization
Parsing XDC File [/home/veronikaplevacova/Plocha/PCS2/synth/filter.xdc]
WARNING: [Constraints 18-6211] Setting input delay on a clock pin 'CLK' relative to clock 'CLK' defined on the same pin is not supported, ignoring it [/home/veronikaplevacova/Plocha/PCS2/synth/filter.xdc:13]
Finished Parsing XDC File [/home/veronikaplevacova/Plocha/PCS2/synth/filter.xdc]
INFO: [Opt 31-138] Pushed 0 inverter(s) to 0 load pin(s).
Netlist sorting complete. Time (s): cpu = 00:00:00.03 ; elapsed = 00:00:00.03 . Memory (MB): peak = 9614.242 ; gain = 0.000 ; free physical = 736 ; free virtual = 5512
INFO: [Project 1-111] Unisim Transformation Summary:
  A total of 6272 instances were transformed.
  RAM64M => RAM64M (RAMD64E(x4)): 6144 instances
  RAM64X1D => RAM64X1D (RAMD64E(x2)): 128 instances

open_run: Time (s): cpu = 00:00:27 ; elapsed = 00:00:29 . Memory (MB): peak = 9614.242 ; gain = 0.000 ; free physical = 556 ; free virtual = 5528
report_timing_summary -delay_type min_max -report_unconstrained -check_timing_verbose -max_paths 10 -input_pins -routable_nets -name timing_1
WARNING: [Constraints 18-6211] Setting input delay on a clock pin 'CLK' relative to clock 'CLK' defined on the same pin is not supported, ignoring it [/home/veronikaplevacova/Plocha/PCS2/synth/filter.xdc:13]
INFO: [Timing 38-35] Done setting XDC timing constraints.
INFO: [Timing 38-91] UpdateTimingParams: Speed grade: -1, Delay Type: min_max.
INFO: [Timing 38-191] Multithreading enabled for timing update using a maximum of 4 CPUs
WARNING: [Timing 38-242] The property HD.CLK_SRC of clock port "CLK" is not set. In out-of-context mode, this prevents timing estimation for clock delay/skew
Resolution: Set the HD.CLK_SRC property of the out-of-context port to the location of the clock buffer instance in the top-level design
report_timing_summary: Time (s): cpu = 00:01:30 ; elapsed = 00:00:42 . Memory (MB): peak = 9614.242 ; gain = 0.000 ; free physical = 157 ; free virtual = 5379
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_final.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/block_memory.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_hash.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_final.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/block_memory.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_hash.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_final.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/block_memory.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_mix.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_hash.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_final.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/block_memory.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_mix.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_hash.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_final.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/block_memory.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_mix.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_hash.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_final.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/block_memory.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_mix.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_hash.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_final.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/block_memory.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_mix.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_hash.vhd:]
reset_run synth_1
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_final.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/block_memory.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_mix.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_hash.vhd:]
launch_runs synth_1 -jobs 2
WARNING: [Vivado 12-7122] Auto Incremental Compile:: No reference checkpoint was found in run synth_1. Auto-incremental flow will not be run, the standard flow will be run instead.
[Mon Dec  4 13:12:50 2023] Launched synth_1...
Run output will be captured here: /home/veronikaplevacova/Plocha/PCS2/synth/filter_vivado.runs/synth_1/runme.log
report_timing_summary -delay_type min_max -report_unconstrained -check_timing_verbose -max_paths 10 -input_pins -routable_nets -name timing_2
INFO: [Timing 38-91] UpdateTimingParams: Speed grade: -1, Delay Type: min_max.
INFO: [Timing 38-191] Multithreading enabled for timing update using a maximum of 4 CPUs
report_timing_summary: Time (s): cpu = 00:00:20 ; elapsed = 00:00:08 . Memory (MB): peak = 9707.254 ; gain = 0.000 ; free physical = 1514 ; free virtual = 7875
launch_runs impl_1 -jobs 2
WARNING: [Project 1-478] Design 'synth_1' is stale and will not be used when launching 'impl_1'
[Mon Dec  4 13:17:29 2023] Launched impl_1...
Run output will be captured here: /home/veronikaplevacova/Plocha/PCS2/synth/filter_vivado.runs/impl_1/runme.log
refresh_design
Netlist sorting complete. Time (s): cpu = 00:00:00.28 ; elapsed = 00:00:00.26 . Memory (MB): peak = 9728.227 ; gain = 0.000 ; free physical = 543 ; free virtual = 7488
INFO: [Netlist 29-17] Analyzing 9337 Unisim elements for replacement
INFO: [Netlist 29-28] Unisim Transformation completed in 6 CPU seconds
INFO: [Project 1-479] Netlist was created with Vivado 2023.2
INFO: [Project 1-570] Preparing netlist for logic optimization
Parsing XDC File [/home/veronikaplevacova/Plocha/PCS2/synth/filter.xdc]
WARNING: [Constraints 18-6211] Setting input delay on a clock pin 'CLK' relative to clock 'CLK' defined on the same pin is not supported, ignoring it [/home/veronikaplevacova/Plocha/PCS2/synth/filter.xdc:13]
Finished Parsing XDC File [/home/veronikaplevacova/Plocha/PCS2/synth/filter.xdc]
INFO: [Opt 31-138] Pushed 0 inverter(s) to 0 load pin(s).
refresh_design: Time (s): cpu = 00:00:26 ; elapsed = 00:00:23 . Memory (MB): peak = 9728.227 ; gain = 20.973 ; free physical = 275 ; free virtual = 7307
report_timing -delay_type min_max -max_paths 10 -sort_by group -input_pins -routable_nets -name timing_1
WARNING: [Constraints 18-6211] Setting input delay on a clock pin 'CLK' relative to clock 'CLK' defined on the same pin is not supported, ignoring it [/home/veronikaplevacova/Plocha/PCS2/synth/filter.xdc:13]
INFO: [Timing 38-35] Done setting XDC timing constraints.
INFO: [Timing 38-91] UpdateTimingParams: Speed grade: -1, Delay Type: min_max.
INFO: [Timing 38-191] Multithreading enabled for timing update using a maximum of 4 CPUs
WARNING: [Timing 38-242] The property HD.CLK_SRC of clock port "CLK" is not set. In out-of-context mode, this prevents timing estimation for clock delay/skew
Resolution: Set the HD.CLK_SRC property of the out-of-context port to the location of the clock buffer instance in the top-level design
INFO: [Timing 38-78] ReportTimingParams: -max_paths 10 -nworst 1 -delay_type min_max -sort_by group.
report_timing: Time (s): cpu = 00:01:16 ; elapsed = 00:00:34 . Memory (MB): peak = 9728.227 ; gain = 0.000 ; free physical = 186 ; free virtual = 6955
open_run impl_1
Netlist sorting complete. Time (s): cpu = 00:00:00.25 ; elapsed = 00:00:00.25 . Memory (MB): peak = 9728.227 ; gain = 0.000 ; free physical = 1224 ; free virtual = 7370
INFO: [Netlist 29-17] Analyzing 9337 Unisim elements for replacement
INFO: [Netlist 29-28] Unisim Transformation completed in 6 CPU seconds
INFO: [Project 1-479] Netlist was created with Vivado 2023.2
INFO: [Project 1-570] Preparing netlist for logic optimization
Read ShapeDB Complete: Time (s): cpu = 00:00:00.16 ; elapsed = 00:00:00.17 . Memory (MB): peak = 9858.945 ; gain = 7.109 ; free physical = 1000 ; free virtual = 7193
INFO: [Timing 38-478] Restoring timing data from binary archive.
INFO: [Timing 38-479] Binary timing data restore complete.
INFO: [Project 1-856] Restoring constraints from binary archive.
INFO: [Project 1-853] Binary constraint restore complete.
INFO: [Designutils 20-5722] Start Reading Physical Databases.
Reading placement.
Read Netlist Cache: Time (s): cpu = 00:00:00.05 ; elapsed = 00:00:00.05 . Memory (MB): peak = 10074.582 ; gain = 0.000 ; free physical = 800 ; free virtual = 6998
Reading placer database...
Read Device Cache: Time (s): cpu = 00:00:00.01 ; elapsed = 00:00:00.01 . Memory (MB): peak = 10074.582 ; gain = 0.000 ; free physical = 800 ; free virtual = 6998
Read PlaceDB: Time (s): cpu = 00:00:04 ; elapsed = 00:00:04 . Memory (MB): peak = 10107.621 ; gain = 33.039 ; free physical = 757 ; free virtual = 6955
Read PulsedLatchDB: Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 10107.621 ; gain = 0.000 ; free physical = 756 ; free virtual = 6955
Reading routing.
Read RouteStorage: Time (s): cpu = 00:00:02 ; elapsed = 00:00:04 . Memory (MB): peak = 10124.621 ; gain = 17.000 ; free physical = 687 ; free virtual = 6886
Read Physdb Files: Time (s): cpu = 00:00:07 ; elapsed = 00:00:08 . Memory (MB): peak = 10124.621 ; gain = 50.039 ; free physical = 687 ; free virtual = 6886
Restored from archive | CPU: 6.970000 secs | Memory: 71.493851 MB |
Finished XDEF File Restore: Time (s): cpu = 00:00:07 ; elapsed = 00:00:08 . Memory (MB): peak = 10124.621 ; gain = 50.039 ; free physical = 687 ; free virtual = 6886
Netlist sorting complete. Time (s): cpu = 00:00:00.03 ; elapsed = 00:00:00.02 . Memory (MB): peak = 10124.621 ; gain = 0.000 ; free physical = 686 ; free virtual = 6886
INFO: [Project 1-111] Unisim Transformation Summary:
  A total of 6272 instances were transformed.
  RAM64M => RAM64M (RAMD64E(x4)): 6144 instances
  RAM64X1D => RAM64X1D (RAMD64E(x2)): 128 instances

open_run: Time (s): cpu = 00:00:29 ; elapsed = 00:00:28 . Memory (MB): peak = 10236.602 ; gain = 508.375 ; free physical = 410 ; free virtual = 6681
open_report: Time (s): cpu = 00:00:20 ; elapsed = 00:00:07 . Memory (MB): peak = 10363.262 ; gain = 116.695 ; free physical = 162 ; free virtual = 6482
CRITICAL WARNING: [Timing 38-282] The design failed to meet the timing requirements. Please see the timing summary report for details on the timing violations.
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_final.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/block_memory.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_mix.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_hash.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_final.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/block_memory.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_mix.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_hash.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_final.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/block_memory.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_mix.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_hash.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_final.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/block_memory.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_mix.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_hash.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_final.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/block_memory.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_mix.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_hash.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_final.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/block_memory.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_mix.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_hash.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_final.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/block_memory.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_mix.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_hash.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_final.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/block_memory.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_mix.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_hash.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_final.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/block_memory.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_mix.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_hash.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_final.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/block_memory.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_mix.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_hash.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_final.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/block_memory.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_mix.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_hash.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_final.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/block_memory.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_mix.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_hash.vhd:]
reset_run synth_1
launch_runs synth_1 -jobs 2
WARNING: [Vivado 12-7122] Auto Incremental Compile:: No reference checkpoint was found in run synth_1. Auto-incremental flow will not be run, the standard flow will be run instead.
[Mon Dec  4 14:11:25 2023] Launched synth_1...
Run output will be captured here: /home/veronikaplevacova/Plocha/PCS2/synth/filter_vivado.runs/synth_1/runme.log
close_design
close_design: Time (s): cpu = 00:00:04 ; elapsed = 00:00:07 . Memory (MB): peak = 10406.719 ; gain = 0.000 ; free physical = 136 ; free virtual = 4941
close_design
close_design: Time (s): cpu = 00:00:04 ; elapsed = 00:00:07 . Memory (MB): peak = 10406.719 ; gain = 0.000 ; free physical = 125 ; free virtual = 4773
launch_runs impl_1 -jobs 2
[Mon Dec  4 14:15:45 2023] Launched impl_1...
Run output will be captured here: /home/veronikaplevacova/Plocha/PCS2/synth/filter_vivado.runs/impl_1/runme.log
open_run synth_1 -name synth_1
Design is defaulting to impl run constrset: constrs_1
Design is defaulting to synth run part: xc7k160tffv676-1
Netlist sorting complete. Time (s): cpu = 00:00:00.33 ; elapsed = 00:00:00.31 . Memory (MB): peak = 10406.719 ; gain = 0.000 ; free physical = 616 ; free virtual = 6381
INFO: [Netlist 29-17] Analyzing 9337 Unisim elements for replacement
INFO: [Netlist 29-28] Unisim Transformation completed in 8 CPU seconds
INFO: [Project 1-479] Netlist was created with Vivado 2023.2
INFO: [Project 1-570] Preparing netlist for logic optimization
Parsing XDC File [/home/veronikaplevacova/Plocha/PCS2/synth/filter.xdc]
WARNING: [Constraints 18-6211] Setting input delay on a clock pin 'CLK' relative to clock 'CLK' defined on the same pin is not supported, ignoring it [/home/veronikaplevacova/Plocha/PCS2/synth/filter.xdc:13]
Finished Parsing XDC File [/home/veronikaplevacova/Plocha/PCS2/synth/filter.xdc]
INFO: [Opt 31-138] Pushed 0 inverter(s) to 0 load pin(s).
Netlist sorting complete. Time (s): cpu = 00:00:00.03 ; elapsed = 00:00:00.03 . Memory (MB): peak = 10406.719 ; gain = 0.000 ; free physical = 153 ; free virtual = 6089
INFO: [Project 1-111] Unisim Transformation Summary:
  A total of 6272 instances were transformed.
  RAM64M => RAM64M (RAMD64E(x4)): 6144 instances
  RAM64X1D => RAM64X1D (RAMD64E(x2)): 128 instances

open_run: Time (s): cpu = 00:00:27 ; elapsed = 00:00:24 . Memory (MB): peak = 10406.719 ; gain = 0.000 ; free physical = 200 ; free virtual = 6198
report_timing_summary -delay_type min_max -report_unconstrained -check_timing_verbose -max_paths 10 -input_pins -routable_nets -name timing_1
WARNING: [Constraints 18-6211] Setting input delay on a clock pin 'CLK' relative to clock 'CLK' defined on the same pin is not supported, ignoring it [/home/veronikaplevacova/Plocha/PCS2/synth/filter.xdc:13]
INFO: [Timing 38-35] Done setting XDC timing constraints.
INFO: [Timing 38-91] UpdateTimingParams: Speed grade: -1, Delay Type: min_max.
INFO: [Timing 38-191] Multithreading enabled for timing update using a maximum of 4 CPUs
WARNING: [Timing 38-242] The property HD.CLK_SRC of clock port "CLK" is not set. In out-of-context mode, this prevents timing estimation for clock delay/skew
Resolution: Set the HD.CLK_SRC property of the out-of-context port to the location of the clock buffer instance in the top-level design
report_timing_summary: Time (s): cpu = 00:01:32 ; elapsed = 00:00:43 . Memory (MB): peak = 10406.719 ; gain = 0.000 ; free physical = 152 ; free virtual = 5675
open_run impl_1
Netlist sorting complete. Time (s): cpu = 00:00:00.26 ; elapsed = 00:00:00.26 . Memory (MB): peak = 10406.719 ; gain = 0.000 ; free physical = 972 ; free virtual = 6392
INFO: [Netlist 29-17] Analyzing 9337 Unisim elements for replacement
INFO: [Netlist 29-28] Unisim Transformation completed in 7 CPU seconds
INFO: [Project 1-479] Netlist was created with Vivado 2023.2
INFO: [Project 1-570] Preparing netlist for logic optimization
Read ShapeDB Complete: Time (s): cpu = 00:00:00.17 ; elapsed = 00:00:00.2 . Memory (MB): peak = 10406.719 ; gain = 0.000 ; free physical = 735 ; free virtual = 6348
INFO: [Timing 38-478] Restoring timing data from binary archive.
INFO: [Timing 38-479] Binary timing data restore complete.
INFO: [Project 1-856] Restoring constraints from binary archive.
INFO: [Project 1-853] Binary constraint restore complete.
INFO: [Designutils 20-5722] Start Reading Physical Databases.
Reading placement.
Read Netlist Cache: Time (s): cpu = 00:00:00.04 ; elapsed = 00:00:00.05 . Memory (MB): peak = 10406.719 ; gain = 0.000 ; free physical = 524 ; free virtual = 6318
Reading placer database...
Read Device Cache: Time (s): cpu = 00:00:00.01 ; elapsed = 00:00:00.01 . Memory (MB): peak = 10406.719 ; gain = 0.000 ; free physical = 524 ; free virtual = 6318
Read PlaceDB: Time (s): cpu = 00:00:04 ; elapsed = 00:00:05 . Memory (MB): peak = 10406.719 ; gain = 0.000 ; free physical = 482 ; free virtual = 6311
Read PulsedLatchDB: Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 10406.719 ; gain = 0.000 ; free physical = 482 ; free virtual = 6311
Reading routing.
Read RouteStorage: Time (s): cpu = 00:00:02 ; elapsed = 00:00:04 . Memory (MB): peak = 10406.719 ; gain = 0.000 ; free physical = 428 ; free virtual = 6264
Read Physdb Files: Time (s): cpu = 00:00:07 ; elapsed = 00:00:08 . Memory (MB): peak = 10406.719 ; gain = 0.000 ; free physical = 428 ; free virtual = 6264
Restored from archive | CPU: 7.200000 secs | Memory: 69.680054 MB |
Finished XDEF File Restore: Time (s): cpu = 00:00:07 ; elapsed = 00:00:08 . Memory (MB): peak = 10406.719 ; gain = 0.000 ; free physical = 428 ; free virtual = 6264
Netlist sorting complete. Time (s): cpu = 00:00:00.03 ; elapsed = 00:00:00.02 . Memory (MB): peak = 10406.719 ; gain = 0.000 ; free physical = 427 ; free virtual = 6264
INFO: [Project 1-111] Unisim Transformation Summary:
  A total of 6272 instances were transformed.
  RAM64M => RAM64M (RAMD64E(x4)): 6144 instances
  RAM64X1D => RAM64X1D (RAMD64E(x2)): 128 instances

open_run: Time (s): cpu = 00:00:29 ; elapsed = 00:00:31 . Memory (MB): peak = 10433.723 ; gain = 27.004 ; free physical = 173 ; free virtual = 6109
open_report: Time (s): cpu = 00:00:30 ; elapsed = 00:00:09 . Memory (MB): peak = 10530.211 ; gain = 86.523 ; free physical = 117 ; free virtual = 6205
CRITICAL WARNING: [Timing 38-282] The design failed to meet the timing requirements. Please see the timing summary report for details on the timing violations.
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_final.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_mix.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/block_memory.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_hash.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_final.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_mix.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/block_memory.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_hash.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_final.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_mix.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/block_memory.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_hash.vhd:]
reset_run synth_1
launch_runs impl_1 -jobs 2
WARNING: [Project 1-478] Design 'synth_1' is stale and will not be used when launching 'impl_1'
[Mon Dec  4 15:07:15 2023] Launched synth_1...
Run output will be captured here: /home/veronikaplevacova/Plocha/PCS2/synth/filter_vivado.runs/synth_1/runme.log
[Mon Dec  4 15:07:15 2023] Launched impl_1...
Run output will be captured here: /home/veronikaplevacova/Plocha/PCS2/synth/filter_vivado.runs/impl_1/runme.log
close_design
close_design: Time (s): cpu = 00:00:04 ; elapsed = 00:00:10 . Memory (MB): peak = 10530.211 ; gain = 0.000 ; free physical = 162 ; free virtual = 4876
report_timing_summary -delay_type min_max -report_unconstrained -check_timing_verbose -max_paths 10 -input_pins -routable_nets -name timing_2
INFO: [Timing 38-91] UpdateTimingParams: Speed grade: -1, Delay Type: min_max.
INFO: [Timing 38-191] Multithreading enabled for timing update using a maximum of 4 CPUs
report_timing_summary: Time (s): cpu = 00:00:31 ; elapsed = 00:00:16 . Memory (MB): peak = 10530.211 ; gain = 0.000 ; free physical = 130 ; free virtual = 5344
open_run impl_1
Netlist sorting complete. Time (s): cpu = 00:00:00.07 ; elapsed = 00:00:00.07 . Memory (MB): peak = 10530.211 ; gain = 0.000 ; free physical = 945 ; free virtual = 6285
INFO: [Netlist 29-17] Analyzing 781 Unisim elements for replacement
INFO: [Netlist 29-28] Unisim Transformation completed in 0 CPU seconds
INFO: [Project 1-479] Netlist was created with Vivado 2023.2
INFO: [Project 1-570] Preparing netlist for logic optimization
Read ShapeDB Complete: Time (s): cpu = 00:00:00.01 ; elapsed = 00:00:00.02 . Memory (MB): peak = 10530.211 ; gain = 0.000 ; free physical = 776 ; free virtual = 6190
INFO: [Timing 38-478] Restoring timing data from binary archive.
INFO: [Timing 38-479] Binary timing data restore complete.
INFO: [Project 1-856] Restoring constraints from binary archive.
INFO: [Project 1-853] Binary constraint restore complete.
INFO: [Designutils 20-5722] Start Reading Physical Databases.
Reading placement.
Read Netlist Cache: Time (s): cpu = 00:00:00.01 ; elapsed = 00:00:00.02 . Memory (MB): peak = 10530.211 ; gain = 0.000 ; free physical = 649 ; free virtual = 6172
Reading placer database...
Read Device Cache: Time (s): cpu = 00:00:00.01 ; elapsed = 00:00:00.01 . Memory (MB): peak = 10530.211 ; gain = 0.000 ; free physical = 648 ; free virtual = 6172
Read PlaceDB: Time (s): cpu = 00:00:00.54 ; elapsed = 00:00:00.63 . Memory (MB): peak = 10530.211 ; gain = 0.000 ; free physical = 636 ; free virtual = 6166
Read PulsedLatchDB: Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 10530.211 ; gain = 0.000 ; free physical = 636 ; free virtual = 6166
Reading routing.
Read RouteStorage: Time (s): cpu = 00:00:00.31 ; elapsed = 00:00:00.99 . Memory (MB): peak = 10530.211 ; gain = 0.000 ; free physical = 602 ; free virtual = 6134
Read Physdb Files: Time (s): cpu = 00:00:00.87 ; elapsed = 00:00:02 . Memory (MB): peak = 10530.211 ; gain = 0.000 ; free physical = 602 ; free virtual = 6134
Restored from archive | CPU: 1.060000 secs | Memory: 9.077255 MB |
Finished XDEF File Restore: Time (s): cpu = 00:00:00.87 ; elapsed = 00:00:02 . Memory (MB): peak = 10530.211 ; gain = 0.000 ; free physical = 602 ; free virtual = 6134
Netlist sorting complete. Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 10530.211 ; gain = 0.000 ; free physical = 600 ; free virtual = 6133
INFO: [Project 1-111] Unisim Transformation Summary:
No Unisim elements were transformed.

open_run: Time (s): cpu = 00:00:10 ; elapsed = 00:00:09 . Memory (MB): peak = 10530.211 ; gain = 0.000 ; free physical = 291 ; free virtual = 5975
CRITICAL WARNING: [Timing 38-282] The design failed to meet the timing requirements. Please see the timing summary report for details on the timing violations.
report_timing_summary -delay_type min_max -report_unconstrained -check_timing_verbose -max_paths 10 -input_pins -routable_nets -name timing_1
INFO: [Timing 38-91] UpdateTimingParams: Speed grade: -1, Delay Type: min_max.
INFO: [Timing 38-191] Multithreading enabled for timing update using a maximum of 4 CPUs
WARNING: [Timing 38-242] The property HD.CLK_SRC of clock port "CLK" is not set. In out-of-context mode, this prevents timing estimation for clock delay/skew
Resolution: Set the HD.CLK_SRC property of the out-of-context port to the location of the clock buffer instance in the top-level design
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_final.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_mix.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/block_memory.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_hash.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_final.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_mix.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/block_memory.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_hash.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_final.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_mix.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/block_memory.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_hash.vhd:]
reset_run synth_1
launch_runs impl_1 -jobs 2
WARNING: [Project 1-478] Design 'synth_1' is stale and will not be used when launching 'impl_1'
[Mon Dec  4 15:17:29 2023] Launched synth_1...
Run output will be captured here: /home/veronikaplevacova/Plocha/PCS2/synth/filter_vivado.runs/synth_1/runme.log
[Mon Dec  4 15:17:30 2023] Launched impl_1...
Run output will be captured here: /home/veronikaplevacova/Plocha/PCS2/synth/filter_vivado.runs/impl_1/runme.log
close_design
close_design
close_design: Time (s): cpu = 00:00:03 ; elapsed = 00:00:06 . Memory (MB): peak = 10532.590 ; gain = 0.000 ; free physical = 185 ; free virtual = 4959
open_run synth_1 -name synth_1
Design is defaulting to impl run constrset: constrs_1
Design is defaulting to synth run part: xc7k160tffv676-1
Netlist sorting complete. Time (s): cpu = 00:00:00.21 ; elapsed = 00:00:00.1 . Memory (MB): peak = 10532.590 ; gain = 0.000 ; free physical = 174 ; free virtual = 5848
INFO: [Netlist 29-17] Analyzing 781 Unisim elements for replacement
INFO: [Netlist 29-28] Unisim Transformation completed in 0 CPU seconds
INFO: [Project 1-479] Netlist was created with Vivado 2023.2
INFO: [Project 1-570] Preparing netlist for logic optimization
Parsing XDC File [/home/veronikaplevacova/Plocha/PCS2/synth/filter.xdc]
WARNING: [Constraints 18-6211] Setting input delay on a clock pin 'CLK' relative to clock 'CLK' defined on the same pin is not supported, ignoring it [/home/veronikaplevacova/Plocha/PCS2/synth/filter.xdc:13]
Finished Parsing XDC File [/home/veronikaplevacova/Plocha/PCS2/synth/filter.xdc]
INFO: [Opt 31-138] Pushed 0 inverter(s) to 0 load pin(s).
Netlist sorting complete. Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 10532.590 ; gain = 0.000 ; free physical = 152 ; free virtual = 5851
INFO: [Project 1-111] Unisim Transformation Summary:
No Unisim elements were transformed.

open_run: Time (s): cpu = 00:00:09 ; elapsed = 00:00:07 . Memory (MB): peak = 10532.590 ; gain = 0.000 ; free physical = 114 ; free virtual = 5808
report_timing_summary -delay_type min_max -report_unconstrained -check_timing_verbose -max_paths 10 -input_pins -routable_nets -name timing_1
WARNING: [Constraints 18-6211] Setting input delay on a clock pin 'CLK' relative to clock 'CLK' defined on the same pin is not supported, ignoring it [/home/veronikaplevacova/Plocha/PCS2/synth/filter.xdc:13]
INFO: [Timing 38-35] Done setting XDC timing constraints.
INFO: [Timing 38-91] UpdateTimingParams: Speed grade: -1, Delay Type: min_max.
INFO: [Timing 38-191] Multithreading enabled for timing update using a maximum of 4 CPUs
WARNING: [Timing 38-242] The property HD.CLK_SRC of clock port "CLK" is not set. In out-of-context mode, this prevents timing estimation for clock delay/skew
Resolution: Set the HD.CLK_SRC property of the out-of-context port to the location of the clock buffer instance in the top-level design
open_run impl_1
Netlist sorting complete. Time (s): cpu = 00:00:00.12 ; elapsed = 00:00:00.07 . Memory (MB): peak = 10532.590 ; gain = 0.000 ; free physical = 996 ; free virtual = 6236
INFO: [Netlist 29-17] Analyzing 781 Unisim elements for replacement
INFO: [Netlist 29-28] Unisim Transformation completed in 0 CPU seconds
INFO: [Project 1-479] Netlist was created with Vivado 2023.2
INFO: [Project 1-570] Preparing netlist for logic optimization
Read ShapeDB Complete: Time (s): cpu = 00:00:00.01 ; elapsed = 00:00:00.02 . Memory (MB): peak = 10532.590 ; gain = 0.000 ; free physical = 809 ; free virtual = 6127
INFO: [Timing 38-478] Restoring timing data from binary archive.
INFO: [Timing 38-479] Binary timing data restore complete.
INFO: [Project 1-856] Restoring constraints from binary archive.
INFO: [Project 1-853] Binary constraint restore complete.
INFO: [Designutils 20-5722] Start Reading Physical Databases.
Reading placement.
Read Netlist Cache: Time (s): cpu = 00:00:00.02 ; elapsed = 00:00:00.02 . Memory (MB): peak = 10532.590 ; gain = 0.000 ; free physical = 661 ; free virtual = 6078
Reading placer database...
Read Device Cache: Time (s): cpu = 00:00:00.01 ; elapsed = 00:00:00.02 . Memory (MB): peak = 10532.590 ; gain = 0.000 ; free physical = 660 ; free virtual = 6078
Read PlaceDB: Time (s): cpu = 00:00:00.53 ; elapsed = 00:00:00.62 . Memory (MB): peak = 10532.590 ; gain = 0.000 ; free physical = 652 ; free virtual = 6074
Read PulsedLatchDB: Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 10532.590 ; gain = 0.000 ; free physical = 652 ; free virtual = 6074
Reading routing.
Read RouteStorage: Time (s): cpu = 00:00:00.35 ; elapsed = 00:00:01 . Memory (MB): peak = 10532.590 ; gain = 0.000 ; free physical = 623 ; free virtual = 6047
Read Physdb Files: Time (s): cpu = 00:00:00.92 ; elapsed = 00:00:02 . Memory (MB): peak = 10532.590 ; gain = 0.000 ; free physical = 623 ; free virtual = 6047
Restored from archive | CPU: 1.080000 secs | Memory: 9.141907 MB |
Finished XDEF File Restore: Time (s): cpu = 00:00:00.92 ; elapsed = 00:00:02 . Memory (MB): peak = 10532.590 ; gain = 0.000 ; free physical = 623 ; free virtual = 6047
Netlist sorting complete. Time (s): cpu = 00:00:00.01 ; elapsed = 00:00:00 . Memory (MB): peak = 10532.590 ; gain = 0.000 ; free physical = 622 ; free virtual = 6047
INFO: [Project 1-111] Unisim Transformation Summary:
No Unisim elements were transformed.

open_run: Time (s): cpu = 00:00:09 ; elapsed = 00:00:10 . Memory (MB): peak = 10583.613 ; gain = 51.023 ; free physical = 300 ; free virtual = 5917
CRITICAL WARNING: [Timing 38-282] The design failed to meet the timing requirements. Please see the timing summary report for details on the timing violations.
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_final.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_mix.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/block_memory.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_hash.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_final.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_mix.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/block_memory.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_hash.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_final.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_mix.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/block_memory.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_hash.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_final.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_mix.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/block_memory.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_hash.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_final.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_mix.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/block_memory.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_hash.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_final.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_mix.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/block_memory.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_hash.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_final.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_mix.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/block_memory.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_hash.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_final.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_mix.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/block_memory.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_hash.vhd:]
reset_run synth_1
launch_runs impl_1 -jobs 2
WARNING: [Project 1-478] Design 'synth_1' is stale and will not be used when launching 'impl_1'
[Mon Dec  4 15:27:21 2023] Launched synth_1...
Run output will be captured here: /home/veronikaplevacova/Plocha/PCS2/synth/filter_vivado.runs/synth_1/runme.log
[Mon Dec  4 15:27:21 2023] Launched impl_1...
Run output will be captured here: /home/veronikaplevacova/Plocha/PCS2/synth/filter_vivado.runs/impl_1/runme.log
close_design
reset_run synth_1
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_final.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_mix.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/block_memory.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_hash.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_final.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_mix.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/block_memory.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_hash.vhd:]
launch_runs impl_1 -jobs 2
WARNING: [Project 1-478] Design 'synth_1' is stale and will not be used when launching 'impl_1'
[Mon Dec  4 15:27:47 2023] Launched synth_1...
Run output will be captured here: /home/veronikaplevacova/Plocha/PCS2/synth/filter_vivado.runs/synth_1/runme.log
[Mon Dec  4 15:27:47 2023] Launched impl_1...
Run output will be captured here: /home/veronikaplevacova/Plocha/PCS2/synth/filter_vivado.runs/impl_1/runme.log
close_design
open_run impl_1
Netlist sorting complete. Time (s): cpu = 00:00:00.28 ; elapsed = 00:00:00.29 . Memory (MB): peak = 10583.613 ; gain = 0.000 ; free physical = 996 ; free virtual = 6966
INFO: [Netlist 29-17] Analyzing 9337 Unisim elements for replacement
INFO: [Netlist 29-28] Unisim Transformation completed in 7 CPU seconds
INFO: [Project 1-479] Netlist was created with Vivado 2023.2
INFO: [Project 1-570] Preparing netlist for logic optimization
Read ShapeDB Complete: Time (s): cpu = 00:00:00.17 ; elapsed = 00:00:00.24 . Memory (MB): peak = 10583.613 ; gain = 0.000 ; free physical = 639 ; free virtual = 6846
INFO: [Timing 38-478] Restoring timing data from binary archive.
INFO: [Timing 38-479] Binary timing data restore complete.
INFO: [Project 1-856] Restoring constraints from binary archive.
INFO: [Project 1-853] Binary constraint restore complete.
INFO: [Designutils 20-5722] Start Reading Physical Databases.
Reading placement.
Read Netlist Cache: Time (s): cpu = 00:00:00.05 ; elapsed = 00:00:00.06 . Memory (MB): peak = 10583.613 ; gain = 0.000 ; free physical = 434 ; free virtual = 6844
Reading placer database...
Read Device Cache: Time (s): cpu = 00:00:00.01 ; elapsed = 00:00:00.01 . Memory (MB): peak = 10583.613 ; gain = 0.000 ; free physical = 434 ; free virtual = 6844
Read PlaceDB: Time (s): cpu = 00:00:04 ; elapsed = 00:00:05 . Memory (MB): peak = 10583.613 ; gain = 0.000 ; free physical = 384 ; free virtual = 6834
Read PulsedLatchDB: Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 10583.613 ; gain = 0.000 ; free physical = 384 ; free virtual = 6834
Reading routing.
Read RouteStorage: Time (s): cpu = 00:00:03 ; elapsed = 00:00:04 . Memory (MB): peak = 10583.613 ; gain = 0.000 ; free physical = 312 ; free virtual = 6777
Read Physdb Files: Time (s): cpu = 00:00:07 ; elapsed = 00:00:08 . Memory (MB): peak = 10583.613 ; gain = 0.000 ; free physical = 311 ; free virtual = 6777
Restored from archive | CPU: 7.470000 secs | Memory: 69.677048 MB |
Finished XDEF File Restore: Time (s): cpu = 00:00:07 ; elapsed = 00:00:08 . Memory (MB): peak = 10583.613 ; gain = 0.000 ; free physical = 311 ; free virtual = 6777
Netlist sorting complete. Time (s): cpu = 00:00:00.02 ; elapsed = 00:00:00.03 . Memory (MB): peak = 10583.613 ; gain = 0.000 ; free physical = 305 ; free virtual = 6775
INFO: [Project 1-111] Unisim Transformation Summary:
  A total of 6272 instances were transformed.
  RAM64M => RAM64M (RAMD64E(x4)): 6144 instances
  RAM64X1D => RAM64X1D (RAMD64E(x2)): 128 instances

open_run: Time (s): cpu = 00:00:30 ; elapsed = 00:00:32 . Memory (MB): peak = 10583.613 ; gain = 0.000 ; free physical = 123 ; free virtual = 6746
open_report: Time (s): cpu = 00:00:24 ; elapsed = 00:00:11 . Memory (MB): peak = 10613.613 ; gain = 24.012 ; free physical = 228 ; free virtual = 6498
CRITICAL WARNING: [Timing 38-282] The design failed to meet the timing requirements. Please see the timing summary report for details on the timing violations.
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_final.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_mix.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/block_memory.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_hash.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_final.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_mix.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/block_memory.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_hash.vhd:]
launch_simulation
Command: launch_simulation 
INFO: [Vivado 12-12493] Simulation top is 'filter'
INFO: [Vivado 12-5682] Launching behavioral simulation in '/home/veronikaplevacova/Plocha/PCS2/synth/filter_vivado.sim/sim_1/behav/xsim'
INFO: [SIM-utils-51] Simulation object is 'sim_1'
INFO: [SIM-utils-72] Using boost library from '/tools/Xilinx/Vivado/2023.2/tps/boost_1_72_0'
INFO: [SIM-utils-54] Inspecting design source files for 'filter' in fileset 'sim_1'...
INFO: [USF-XSim-97] Finding global include files...
INFO: [USF-XSim-98] Fetching design files from 'sim_1'...
INFO: [USF-XSim-2] XSim::Compile design
INFO: [USF-XSim-61] Executing 'COMPILE and ANALYZE' step in '/home/veronikaplevacova/Plocha/PCS2/synth/filter_vivado.sim/sim_1/behav/xsim'
xvhdl --incr --relax -prj filter_vhdl.prj
INFO: [VRFC 10-163] Analyzing VHDL file "/home/veronikaplevacova/Plocha/PCS2/comp/functions.vhd" into library xil_defaultlib
INFO: [VRFC 10-163] Analyzing VHDL file "/home/veronikaplevacova/Plocha/PCS2/comp/block_memory.vhd" into library xil_defaultlib
INFO: [VRFC 10-3107] analyzing entity 'block_memory'
INFO: [VRFC 10-163] Analyzing VHDL file "/home/veronikaplevacova/Plocha/PCS2/filter_ent.vhd" into library xil_defaultlib
INFO: [VRFC 10-3107] analyzing entity 'filter'
INFO: [VRFC 10-163] Analyzing VHDL file "/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_mix.vhd" into library xil_defaultlib
INFO: [VRFC 10-3107] analyzing entity 'jenkins_mix'
INFO: [VRFC 10-163] Analyzing VHDL file "/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_final.vhd" into library xil_defaultlib
INFO: [VRFC 10-3107] analyzing entity 'jenkins_final'
INFO: [VRFC 10-163] Analyzing VHDL file "/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_hash.vhd" into library xil_defaultlib
INFO: [VRFC 10-3107] analyzing entity 'jenkins_hash'
INFO: [VRFC 10-163] Analyzing VHDL file "/home/veronikaplevacova/Plocha/PCS2/filter.vhd" into library xil_defaultlib
Waiting for jobs to finish...
No pending jobs, compilation finished.
INFO: [USF-XSim-69] 'compile' step finished in '4' seconds
INFO: [USF-XSim-3] XSim::Elaborate design
INFO: [USF-XSim-61] Executing 'ELABORATE' step in '/home/veronikaplevacova/Plocha/PCS2/synth/filter_vivado.sim/sim_1/behav/xsim'
xelab --incr --debug typical --relax --mt 8 -L xil_defaultlib -L secureip --snapshot filter_behav xil_defaultlib.filter -log elaborate.log
Vivado Simulator v2023.2
Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
Copyright 2022-2023 Advanced Micro Devices, Inc. All Rights Reserved.
Running: /tools/Xilinx/Vivado/2023.2/bin/unwrapped/lnx64.o/xelab --incr --debug typical --relax --mt 8 -L xil_defaultlib -L secureip --snapshot filter_behav xil_defaultlib.filter -log elaborate.log 
Using 8 slave threads.
Starting static elaboration
Completed static elaboration
Starting simulation data flow analysis
Completed simulation data flow analysis
Time Resolution for simulation is 1ps
Compiling package std.standard
Compiling package std.textio
Compiling package ieee.std_logic_1164
Compiling package ieee.numeric_std
Compiling package ieee.std_logic_arith
Compiling package xil_defaultlib.functions_package
Compiling package ieee.std_logic_unsigned
Compiling architecture behavioral of entity xil_defaultlib.jenkins_mix [\jenkins_mix(length=4)\]
Compiling architecture behavioral of entity xil_defaultlib.jenkins_final [\jenkins_final(length=4)\]
Compiling architecture behavioral of entity xil_defaultlib.jenkins_hash [\jenkins_hash(length=4,initval="...]
Compiling architecture behavioral of entity xil_defaultlib.jenkins_hash [\jenkins_hash(length=4,initval="...]
Compiling architecture behavioral of entity xil_defaultlib.jenkins_hash [\jenkins_hash(length=4,initval="...]
Compiling architecture behavioral of entity xil_defaultlib.jenkins_hash [\jenkins_hash(length=4,initval="...]
Compiling architecture behavioral of entity xil_defaultlib.block_memory [\block_memory(item_width=145,ite...]
Compiling architecture structural of entity xil_defaultlib.filter
Built simulation snapshot filter_behav
execute_script: Time (s): cpu = 00:00:10 ; elapsed = 00:00:10 . Memory (MB): peak = 10613.613 ; gain = 0.000 ; free physical = 193 ; free virtual = 6626
INFO: [USF-XSim-69] 'elaborate' step finished in '10' seconds
INFO: [USF-XSim-4] XSim::Simulate design
INFO: [USF-XSim-61] Executing 'SIMULATE' step in '/home/veronikaplevacova/Plocha/PCS2/synth/filter_vivado.sim/sim_1/behav/xsim'
INFO: [USF-XSim-98] *** Running xsim
   with args "filter_behav -key {Behavioral:sim_1:Functional:filter} -tclbatch {filter.tcl} -log {simulate.log}"
INFO: [USF-XSim-8] Loading simulator feature
Time resolution is 1 ps
source filter.tcl
# set curr_wave [current_wave_config]
# if { [string length $curr_wave] == 0 } {
#   if { [llength [get_objects]] > 0} {
#     add_wave /
#     set_property needs_save false [current_wave_config]
#   } else {
#      send_msg_id Add_Wave-1 WARNING "No top level signals found. Simulator will start without a wave window. If you want to open a wave window go to 'File->New Waveform Configuration' or type 'create_wave_config' in the TCL console."
#   }
# }
# run 1000ns
INFO: [USF-XSim-96] XSim completed. Design snapshot 'filter_behav' loaded.
INFO: [USF-XSim-97] XSim simulation ran for 1000ns
launch_simulation: Time (s): cpu = 00:00:21 ; elapsed = 00:00:20 . Memory (MB): peak = 10658.883 ; gain = 45.270 ; free physical = 110 ; free virtual = 6672
close_sim
INFO: [Simtcl 6-16] Simulation closed
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_final.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_mix.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/block_memory.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/filter.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_hash.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_final.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_mix.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/block_memory.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/filter.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_hash.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_final.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_mix.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/block_memory.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/filter.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_hash.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_final.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_mix.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/block_memory.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/filter.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_hash.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_final.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_mix.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/block_memory.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/filter.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_hash.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_final.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_mix.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/block_memory.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/filter.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_hash.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_final.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_mix.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/block_memory.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/filter.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_hash.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_final.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_mix.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/block_memory.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/filter.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_hash.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_final.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_mix.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/block_memory.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/filter.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_hash.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_final.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_mix.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/block_memory.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/filter.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_hash.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_final.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_mix.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/block_memory.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/filter.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_hash.vhd:]
reset_run synth_1
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_final.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_mix.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/block_memory.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/filter.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_hash.vhd:]
launch_runs impl_1 -jobs 2
[Mon Dec  4 22:35:26 2023] Launched synth_1...
Run output will be captured here: /home/veronikaplevacova/Plocha/PCS2/synth/filter_vivado.runs/synth_1/runme.log
[Mon Dec  4 22:35:26 2023] Launched impl_1...
Run output will be captured here: /home/veronikaplevacova/Plocha/PCS2/synth/filter_vivado.runs/impl_1/runme.log
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_final.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_mix.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/block_memory.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/filter.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_hash.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_final.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_mix.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/block_memory.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/filter.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_hash.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_final.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_mix.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/block_memory.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/filter.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_hash.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_final.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_mix.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/block_memory.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/filter.vhd:]
WARNING: [filemgmt 56-199] Attempt to get parsing info during refresh. "On-the-fly" syntax checking information may be incorrect. [/home/veronikaplevacova/Plocha/PCS2/comp/jenkins_hash.vhd:]
close_design
close_design: Time (s): cpu = 00:00:05 ; elapsed = 00:00:09 . Memory (MB): peak = 10687.109 ; gain = 0.000 ; free physical = 105 ; free virtual = 4909
open_run synth_1 -name synth_1
Design is defaulting to impl run constrset: constrs_1
Design is defaulting to synth run part: xc7k160tffv676-1
Netlist sorting complete. Time (s): cpu = 00:00:00.14 ; elapsed = 00:00:00.09 . Memory (MB): peak = 10687.109 ; gain = 0.000 ; free physical = 206 ; free virtual = 5621
INFO: [Netlist 29-17] Analyzing 781 Unisim elements for replacement
INFO: [Netlist 29-28] Unisim Transformation completed in 0 CPU seconds
INFO: [Project 1-479] Netlist was created with Vivado 2023.2
INFO: [Project 1-570] Preparing netlist for logic optimization
Parsing XDC File [/home/veronikaplevacova/Plocha/PCS2/synth/filter.xdc]
WARNING: [Constraints 18-6211] Setting input delay on a clock pin 'CLK' relative to clock 'CLK' defined on the same pin is not supported, ignoring it [/home/veronikaplevacova/Plocha/PCS2/synth/filter.xdc:13]
Finished Parsing XDC File [/home/veronikaplevacova/Plocha/PCS2/synth/filter.xdc]
INFO: [Opt 31-138] Pushed 0 inverter(s) to 0 load pin(s).
Netlist sorting complete. Time (s): cpu = 00:00:00.01 ; elapsed = 00:00:00 . Memory (MB): peak = 10687.109 ; gain = 0.000 ; free physical = 133 ; free virtual = 5510
INFO: [Project 1-111] Unisim Transformation Summary:
No Unisim elements were transformed.

open_run: Time (s): cpu = 00:00:10 ; elapsed = 00:00:09 . Memory (MB): peak = 10687.109 ; gain = 0.000 ; free physical = 160 ; free virtual = 5304
report_timing_summary -delay_type min_max -report_unconstrained -check_timing_verbose -max_paths 10 -input_pins -routable_nets -name timing_1
WARNING: [Constraints 18-6211] Setting input delay on a clock pin 'CLK' relative to clock 'CLK' defined on the same pin is not supported, ignoring it [/home/veronikaplevacova/Plocha/PCS2/synth/filter.xdc:13]
INFO: [Timing 38-35] Done setting XDC timing constraints.
INFO: [Timing 38-91] UpdateTimingParams: Speed grade: -1, Delay Type: min_max.
INFO: [Timing 38-191] Multithreading enabled for timing update using a maximum of 4 CPUs
WARNING: [Timing 38-242] The property HD.CLK_SRC of clock port "CLK" is not set. In out-of-context mode, this prevents timing estimation for clock delay/skew
Resolution: Set the HD.CLK_SRC property of the out-of-context port to the location of the clock buffer instance in the top-level design
reset_run impl_1
WARNING: [Vivado 12-1017] Problems encountered:
1. Attempt to kill process failed

exit
INFO: [Common 17-206] Exiting Vivado at Mon Dec  4 22:40:09 2023...
