dissertation_thesis/ariths-gen
1
0
Fork 0
mirror of https://github.com/ehw-fit/ariths-gen.git synced 2025-04-22 23:01:23 +01:00
Code Issues Actions Packages Projects Releases Wiki Activity
ariths-gen/generated_circuits/blif_circuits/logic_gates/and_gate.blif
honzastor f57a633f6c Renamed generated circuits folders.
2021-04-22 20:56:38 +02:00

7 lines
70 B
Plaintext
Raw Blame History

.model and_gate
.inputs _a _b
.outputs _y0
.names _a _b _y0
11 1
.end
Reference in New Issue View Git Blame Copy Permalink