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<header>
<h1 class="title">Module <code>ariths_gen.multi_bit_circuits.adders.carry_lookahead_adder</code></h1>
</header>
<section id="section-intro">
<details class="source">
<summary>
<span>Expand source code</span>
</summary>
<pre><code class="python">from ariths_gen.wire_components import (
Wire,
ConstantWireValue0,
ConstantWireValue1,
Bus
)
from ariths_gen.core.arithmetic_circuits import (
ArithmeticCircuit,
MultiplierCircuit
)
from ariths_gen.core.logic_gate_circuits import (
MultipleInputLogicGate
)
from ariths_gen.one_bit_circuits.one_bit_components import (
HalfAdder,
PGLogicBlock,
FullAdder,
FullAdderPG
)
from ariths_gen.one_bit_circuits.logic_gates import (
AndGate,
NandGate,
OrGate,
NorGate,
XorGate,
XnorGate,
NotGate
)
class UnsignedCarryLookaheadAdder(ArithmeticCircuit):
&#34;&#34;&#34;Class representing unsigned carry-lookahead adder.
Unsigned carry-lookahead adder represents faster adder circuit which is composed
of more complex circuitry but provides much less propagation delay as opposed to rca.
It is mainly composed of propagate/generate blocks and many AND/OR gates to calculate carries individually.
Class enables to choose the size of composite inner cla blocks (default is 4). These cla blocks are then cascaded
to form the final N bit adder.
```
B3 A3 B2 A2 B1 A1 B0 A0
│ │ │ │ │ │ │ │
┌─▼──▼─┐ ┌─▼──▼─┐ ┌─▼──▼─┐ ┌─▼──▼─┐
│ PG │ │ PG │ │ PG │ │ PG │
│ block│ │ block│ │ block│ │ block│
│ │ │ │ │ │ │ │
└─┬┬┬──┘ └─┬┬┬──┘ └─┬┬┬──┘ └─┬┬┬──┘
│││G3P3S3 │││G2P2S2 │││G1P1S1 │││G0P0S0
┌─▼▼▼────────▼▼▼────────▼▼▼────────▼▼▼──┐
│ Carry Lookahead logic │
│ │
└┬────┬───────┬──────────┬──────────┬───┘
│ │ │ │ │
▼ ▼ ▼ ▼ ▼
Cout S3 S1 S0 S0
```
Description of the __init__ method.
Args:
a (Bus): First input bus.
b (Bus): Second input bus.
cla_block_size (int, optional): Size of each composite cla adder block size. Defaults to 4.
prefix (str, optional): Prefix name of unsigned cla. Defaults to &#34;&#34;.
name (str, optional): Name of unsigned cla. Defaults to &#34;u_cla&#34;.
&#34;&#34;&#34;
def __init__(self, a: Bus, b: Bus, cla_block_size: int = 4, prefix: str = &#34;&#34;, name: str = &#34;u_cla&#34;, **kwargs):
self.N = max(a.N, b.N)
super().__init__(a=a, b=b, prefix=prefix, name=name, out_N=self.N+1, **kwargs)
# Bus sign extension in case buses have different lengths
self.a.bus_extend(N=self.N, prefix=a.prefix)
self.b.bus_extend(N=self.N, prefix=b.prefix)
# To signify current number of blocks and number of bits that remain to be added into function blocks
N_blocks = 0
N_wires = self.N
cin = ConstantWireValue0()
while N_wires != 0:
# Lists containing all propagate/generate wires
self.propagate = []
self.generate = []
# Cin0 used as a first generate wire for obtaining next carry bits
self.generate.append(cin)
block_size = cla_block_size if N_wires &gt;= cla_block_size else N_wires
# Gradual addition of propagate/generate logic blocks and AND/OR gates for Cout bits generation, XOR gates for Sum bits generation
for i in range(block_size):
pg_block = PGLogicBlock(self.a.get_wire((N_blocks*cla_block_size)+i), self.b.get_wire((N_blocks*cla_block_size)+i), prefix=self.prefix+&#34;_pg_logic&#34;+str(self.get_instance_num(cls=PGLogicBlock)))
self.propagate.append(pg_block.get_propagate_wire())
self.generate.append(pg_block.get_generate_wire())
self.add_component(pg_block)
if i == 0 and N_blocks == 0:
obj_sum_xor = XorGate(pg_block.get_sum_wire(), cin, prefix=self.prefix+&#34;_xor&#34;+str(self.get_instance_num(cls=XorGate)), parent_component=self)
self.add_component(obj_sum_xor)
self.out.connect(i+(N_blocks*cla_block_size), obj_sum_xor.out)
# Carry propagation calculation
obj_and = AndGate(self.propagate[(N_blocks*cla_block_size)+i], self.generate[(N_blocks*cla_block_size)+i], prefix=self.prefix+&#34;_and&#34;+str(self.get_instance_num(cls=AndGate)), parent_component=self)
self.add_component(obj_and)
# Carry bit generation
obj_cout_or = OrGate(pg_block.get_generate_wire(), self.get_previous_component().out, prefix=self.prefix+&#34;_or&#34;+str(self.get_instance_num(cls=OrGate, count_disabled_gates=False)), parent_component=self)
self.add_component(obj_cout_or)
else:
obj_sum_xor = XorGate(pg_block.get_sum_wire(), self.get_previous_component(2).out, prefix=self.prefix+&#34;_xor&#34;+str(self.get_instance_num(cls=XorGate)), parent_component=self)
self.add_component(obj_sum_xor)
self.out.connect(i+(N_blocks*cla_block_size), obj_sum_xor.out)
# List of AND gates outputs that are later combined in a multi-bit OR gate
composite_or_gates_inputs = []
for g_index in range(len(self.generate)-1):
composite_wires = []
# Getting a list of wires used for current bit position cout composite AND gate&#39;s generation
# E.g. for Cout2 = G1 + G0·P1 C0·P0·P1 it gets a list containing [C0,P0,P1] then [G0,P1]
composite_wires.append(self.generate[g_index])
for p_index in range(len(self.propagate)-1, g_index-1, -1):
composite_wires.append(self.propagate[p_index])
# For each pg pair values algorithmically combine two input AND gates to replace multiple input gates (resolves fan-in issue)
pg_wires = Bus(wires_list=composite_wires)
multi_bit_and_gate = MultipleInputLogicGate(a=pg_wires, two_input_gate_cls=AndGate, prefix=self.prefix+&#34;_and&#34;, parent_component=self)
composite_or_gates_inputs.append(multi_bit_and_gate.out)
# Final OR gates cascade using generated AND gates output wires
composite_or_wires = Bus(wires_list=composite_or_gates_inputs)
multi_bit_or_gate = MultipleInputLogicGate(a=composite_or_wires, two_input_gate_cls=OrGate, prefix=self.prefix+&#34;_or&#34;, parent_component=self)
# Carry bit generation
obj_cout_or = OrGate(pg_block.get_generate_wire(), multi_bit_or_gate.out, prefix=self.prefix+&#34;_or&#34;+str(self.get_instance_num(cls=OrGate, count_disabled_gates=False)), parent_component=self)
self.add_component(obj_cout_or)
# Updating cin for the the next bypass block
# Also updating cout value which is used as cin for the first adder of the next block
cin = obj_cout_or.out
N_wires -= block_size
N_blocks += 1
# Connection of final Cout
self.out.connect(self.N, cin)
class SignedCarryLookaheadAdder(UnsignedCarryLookaheadAdder, ArithmeticCircuit):
&#34;&#34;&#34;Class representing signed carry-lookahead adder.
Signed carry-lookahead adder represents faster adder circuit which is composed
of more complex circuitry but provides much less propagation delay as opposed to rca.
It is mainly composed of propagate/generate blocks and many AND/OR gates to calculate carries individually.
Class enables to choose the size of composite inner cla blocks (default is 4). These cla blocks are then cascaded
to form the final N bit adder.
At last XOR gates are used to ensure proper sign extension.
```
B3 A3 B2 A2 B1 A1 B0 A0
│ │ │ │ │ │ │ │
┌─▼──▼─┐ ┌─▼──▼─┐ ┌─▼──▼─┐ ┌─▼──▼─┐
│ PG │ │ PG │ │ PG │ │ PG │
│ block│ │ block│ │ block│ │ block│
│ │ │ │ │ │ │ │
└─┬┬┬──┘ └─┬┬┬──┘ └─┬┬┬──┘ └─┬┬┬──┘
│││G3P3S3 │││G2P2S2 │││G1P1S1 │││G0P0S0
┌─▼▼▼────────▼▼▼────────▼▼▼────────▼▼▼──┐
│ Carry Lookahead logic │
│ with sign extension │
└┬────┬───────┬──────────┬──────────┬───┘
│ │ │ │ │
▼ ▼ ▼ ▼ ▼
Cout S3 S1 S0 S0
```
Description of the __init__ method.
Args:
a (Bus): First input bus.
b (Bus): Second input bus.
cla_block_size (int, optional): Size of each composite cla adder block size. Defaults to 4.
prefix (str, optional): Prefix name of signed cla. Defaults to &#34;&#34;.
name (str, optional): Name of signed cla. Defaults to &#34;s_cla&#34;.
&#34;&#34;&#34;
def __init__(self, a: Bus, b: Bus, cla_block_size: int = 4, prefix: str = &#34;&#34;, name: str = &#34;s_cla&#34;, **kwargs):
super().__init__(a=a, b=b, cla_block_size=cla_block_size, prefix=prefix, name=name, signed=True, **kwargs)
self.c_data_type = &#34;int64_t&#34;
# Additional XOR gates to ensure correct sign extension in case of sign addition
sign_xor_1 = XorGate(self.a.get_wire(self.N-1), self.b.get_wire(self.N-1), prefix=self.prefix+&#34;_xor&#34;+str(self.get_instance_num(cls=XorGate)), parent_component=self)
self.add_component(sign_xor_1)
sign_xor_2 = XorGate(sign_xor_1.out, self.get_previous_component(2).out, prefix=self.prefix+&#34;_xor&#34;+str(self.get_instance_num(cls=XorGate)), parent_component=self)
self.add_component(sign_xor_2)
self.out.connect(self.N, sign_xor_2.out)</code></pre>
</details>
</section>
<section>
</section>
<section>
</section>
<section>
</section>
<section>
<h2 class="section-title" id="header-classes">Classes</h2>
<dl>
<dt id="ariths_gen.multi_bit_circuits.adders.carry_lookahead_adder.SignedCarryLookaheadAdder"><code class="flex name class">
<span>class <span class="ident">SignedCarryLookaheadAdder</span></span>
<span>(</span><span>a: <a title="ariths_gen.wire_components.buses.Bus" href="../../wire_components/buses.html#ariths_gen.wire_components.buses.Bus">Bus</a>, b: <a title="ariths_gen.wire_components.buses.Bus" href="../../wire_components/buses.html#ariths_gen.wire_components.buses.Bus">Bus</a>, cla_block_size: int = 4, prefix: str = '', name: str = 's_cla', **kwargs)</span>
</code></dt>
<dd>
<div class="desc"><p>Class representing signed carry-lookahead adder.</p>
<p>Signed carry-lookahead adder represents faster adder circuit which is composed
of more complex circuitry but provides much less propagation delay as opposed to rca.
It is mainly composed of propagate/generate blocks and many AND/OR gates to calculate carries individually.</p>
<p>Class enables to choose the size of composite inner cla blocks (default is 4). These cla blocks are then cascaded
to form the final N bit adder.
At last XOR gates are used to ensure proper sign extension.</p>
<pre><code> B3 A3 B2 A2 B1 A1 B0 A0
│ │ │ │ │ │ │ │
┌─▼──▼─┐ ┌─▼──▼─┐ ┌─▼──▼─┐ ┌─▼──▼─┐
│ PG │ │ PG │ │ PG │ │ PG │
│ block│ │ block│ │ block│ │ block│
│ │ │ │ │ │ │ │
└─┬┬┬──┘ └─┬┬┬──┘ └─┬┬┬──┘ └─┬┬┬──┘
│││G3P3S3 │││G2P2S2 │││G1P1S1 │││G0P0S0
┌─▼▼▼────────▼▼▼────────▼▼▼────────▼▼▼──┐
│ Carry Lookahead logic │
│ with sign extension │
└┬────┬───────┬──────────┬──────────┬───┘
│ │ │ │ │
▼ ▼ ▼ ▼ ▼
Cout S3 S1 S0 S0
</code></pre>
<p>Description of the <strong>init</strong> method.</p>
<h2 id="args">Args</h2>
<dl>
<dt><strong><code>a</code></strong> :&ensp;<code>Bus</code></dt>
<dd>First input bus.</dd>
<dt><strong><code>b</code></strong> :&ensp;<code>Bus</code></dt>
<dd>Second input bus.</dd>
<dt><strong><code>cla_block_size</code></strong> :&ensp;<code>int</code>, optional</dt>
<dd>Size of each composite cla adder block size. Defaults to 4.</dd>
<dt><strong><code>prefix</code></strong> :&ensp;<code>str</code>, optional</dt>
<dd>Prefix name of signed cla. Defaults to "".</dd>
<dt><strong><code>name</code></strong> :&ensp;<code>str</code>, optional</dt>
<dd>Name of signed cla. Defaults to "s_cla".</dd>
</dl></div>
<details class="source">
<summary>
<span>Expand source code</span>
</summary>
<pre><code class="python">class SignedCarryLookaheadAdder(UnsignedCarryLookaheadAdder, ArithmeticCircuit):
&#34;&#34;&#34;Class representing signed carry-lookahead adder.
Signed carry-lookahead adder represents faster adder circuit which is composed
of more complex circuitry but provides much less propagation delay as opposed to rca.
It is mainly composed of propagate/generate blocks and many AND/OR gates to calculate carries individually.
Class enables to choose the size of composite inner cla blocks (default is 4). These cla blocks are then cascaded
to form the final N bit adder.
At last XOR gates are used to ensure proper sign extension.
```
B3 A3 B2 A2 B1 A1 B0 A0
│ │ │ │ │ │ │ │
┌─▼──▼─┐ ┌─▼──▼─┐ ┌─▼──▼─┐ ┌─▼──▼─┐
│ PG │ │ PG │ │ PG │ │ PG │
│ block│ │ block│ │ block│ │ block│
│ │ │ │ │ │ │ │
└─┬┬┬──┘ └─┬┬┬──┘ └─┬┬┬──┘ └─┬┬┬──┘
│││G3P3S3 │││G2P2S2 │││G1P1S1 │││G0P0S0
┌─▼▼▼────────▼▼▼────────▼▼▼────────▼▼▼──┐
│ Carry Lookahead logic │
│ with sign extension │
└┬────┬───────┬──────────┬──────────┬───┘
│ │ │ │ │
▼ ▼ ▼ ▼ ▼
Cout S3 S1 S0 S0
```
Description of the __init__ method.
Args:
a (Bus): First input bus.
b (Bus): Second input bus.
cla_block_size (int, optional): Size of each composite cla adder block size. Defaults to 4.
prefix (str, optional): Prefix name of signed cla. Defaults to &#34;&#34;.
name (str, optional): Name of signed cla. Defaults to &#34;s_cla&#34;.
&#34;&#34;&#34;
def __init__(self, a: Bus, b: Bus, cla_block_size: int = 4, prefix: str = &#34;&#34;, name: str = &#34;s_cla&#34;, **kwargs):
super().__init__(a=a, b=b, cla_block_size=cla_block_size, prefix=prefix, name=name, signed=True, **kwargs)
self.c_data_type = &#34;int64_t&#34;
# Additional XOR gates to ensure correct sign extension in case of sign addition
sign_xor_1 = XorGate(self.a.get_wire(self.N-1), self.b.get_wire(self.N-1), prefix=self.prefix+&#34;_xor&#34;+str(self.get_instance_num(cls=XorGate)), parent_component=self)
self.add_component(sign_xor_1)
sign_xor_2 = XorGate(sign_xor_1.out, self.get_previous_component(2).out, prefix=self.prefix+&#34;_xor&#34;+str(self.get_instance_num(cls=XorGate)), parent_component=self)
self.add_component(sign_xor_2)
self.out.connect(self.N, sign_xor_2.out)</code></pre>
</details>
<h3>Ancestors</h3>
<ul class="hlist">
<li><a title="ariths_gen.multi_bit_circuits.adders.carry_lookahead_adder.UnsignedCarryLookaheadAdder" href="#ariths_gen.multi_bit_circuits.adders.carry_lookahead_adder.UnsignedCarryLookaheadAdder">UnsignedCarryLookaheadAdder</a></li>
<li><a title="ariths_gen.core.arithmetic_circuits.arithmetic_circuit.ArithmeticCircuit" href="../../core/arithmetic_circuits/arithmetic_circuit.html#ariths_gen.core.arithmetic_circuits.arithmetic_circuit.ArithmeticCircuit">ArithmeticCircuit</a></li>
<li><a title="ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit">GeneralCircuit</a></li>
</ul>
<h3>Inherited members</h3>
<ul class="hlist">
<li><code><b><a title="ariths_gen.multi_bit_circuits.adders.carry_lookahead_adder.UnsignedCarryLookaheadAdder" href="#ariths_gen.multi_bit_circuits.adders.carry_lookahead_adder.UnsignedCarryLookaheadAdder">UnsignedCarryLookaheadAdder</a></b></code>:
<ul class="hlist">
<li><code><a title="ariths_gen.multi_bit_circuits.adders.carry_lookahead_adder.UnsignedCarryLookaheadAdder.add_component" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit.add_component">add_component</a></code></li>
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<li><code><a title="ariths_gen.multi_bit_circuits.adders.carry_lookahead_adder.UnsignedCarryLookaheadAdder.get_python_code_flat" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit.get_python_code_flat">get_python_code_flat</a></code></li>
<li><code><a title="ariths_gen.multi_bit_circuits.adders.carry_lookahead_adder.UnsignedCarryLookaheadAdder.get_sum_wire" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit.get_sum_wire">get_sum_wire</a></code></li>
<li><code><a title="ariths_gen.multi_bit_circuits.adders.carry_lookahead_adder.UnsignedCarryLookaheadAdder.get_triplets_cgp" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit.get_triplets_cgp">get_triplets_cgp</a></code></li>
<li><code><a title="ariths_gen.multi_bit_circuits.adders.carry_lookahead_adder.UnsignedCarryLookaheadAdder.get_unique_types" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit.get_unique_types">get_unique_types</a></code></li>
<li><code><a title="ariths_gen.multi_bit_circuits.adders.carry_lookahead_adder.UnsignedCarryLookaheadAdder.get_v_code_flat" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit.get_v_code_flat">get_v_code_flat</a></code></li>
<li><code><a title="ariths_gen.multi_bit_circuits.adders.carry_lookahead_adder.UnsignedCarryLookaheadAdder.get_v_code_hier" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit.get_v_code_hier">get_v_code_hier</a></code></li>
<li><code><a title="ariths_gen.multi_bit_circuits.adders.carry_lookahead_adder.UnsignedCarryLookaheadAdder.save_wire_id" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit.save_wire_id">save_wire_id</a></code></li>
</ul>
</li>
</ul>
</dd>
<dt id="ariths_gen.multi_bit_circuits.adders.carry_lookahead_adder.UnsignedCarryLookaheadAdder"><code class="flex name class">
<span>class <span class="ident">UnsignedCarryLookaheadAdder</span></span>
<span>(</span><span>a: <a title="ariths_gen.wire_components.buses.Bus" href="../../wire_components/buses.html#ariths_gen.wire_components.buses.Bus">Bus</a>, b: <a title="ariths_gen.wire_components.buses.Bus" href="../../wire_components/buses.html#ariths_gen.wire_components.buses.Bus">Bus</a>, cla_block_size: int = 4, prefix: str = '', name: str = 'u_cla', **kwargs)</span>
</code></dt>
<dd>
<div class="desc"><p>Class representing unsigned carry-lookahead adder.</p>
<p>Unsigned carry-lookahead adder represents faster adder circuit which is composed
of more complex circuitry but provides much less propagation delay as opposed to rca.
It is mainly composed of propagate/generate blocks and many AND/OR gates to calculate carries individually.</p>
<p>Class enables to choose the size of composite inner cla blocks (default is 4). These cla blocks are then cascaded
to form the final N bit adder.</p>
<pre><code> B3 A3 B2 A2 B1 A1 B0 A0
│ │ │ │ │ │ │ │
┌─▼──▼─┐ ┌─▼──▼─┐ ┌─▼──▼─┐ ┌─▼──▼─┐
│ PG │ │ PG │ │ PG │ │ PG │
│ block│ │ block│ │ block│ │ block│
│ │ │ │ │ │ │ │
└─┬┬┬──┘ └─┬┬┬──┘ └─┬┬┬──┘ └─┬┬┬──┘
│││G3P3S3 │││G2P2S2 │││G1P1S1 │││G0P0S0
┌─▼▼▼────────▼▼▼────────▼▼▼────────▼▼▼──┐
│ Carry Lookahead logic │
│ │
└┬────┬───────┬──────────┬──────────┬───┘
│ │ │ │ │
▼ ▼ ▼ ▼ ▼
Cout S3 S1 S0 S0
</code></pre>
<p>Description of the <strong>init</strong> method.</p>
<h2 id="args">Args</h2>
<dl>
<dt><strong><code>a</code></strong> :&ensp;<code>Bus</code></dt>
<dd>First input bus.</dd>
<dt><strong><code>b</code></strong> :&ensp;<code>Bus</code></dt>
<dd>Second input bus.</dd>
<dt><strong><code>cla_block_size</code></strong> :&ensp;<code>int</code>, optional</dt>
<dd>Size of each composite cla adder block size. Defaults to 4.</dd>
<dt><strong><code>prefix</code></strong> :&ensp;<code>str</code>, optional</dt>
<dd>Prefix name of unsigned cla. Defaults to "".</dd>
<dt><strong><code>name</code></strong> :&ensp;<code>str</code>, optional</dt>
<dd>Name of unsigned cla. Defaults to "u_cla".</dd>
</dl></div>
<details class="source">
<summary>
<span>Expand source code</span>
</summary>
<pre><code class="python">class UnsignedCarryLookaheadAdder(ArithmeticCircuit):
&#34;&#34;&#34;Class representing unsigned carry-lookahead adder.
Unsigned carry-lookahead adder represents faster adder circuit which is composed
of more complex circuitry but provides much less propagation delay as opposed to rca.
It is mainly composed of propagate/generate blocks and many AND/OR gates to calculate carries individually.
Class enables to choose the size of composite inner cla blocks (default is 4). These cla blocks are then cascaded
to form the final N bit adder.
```
B3 A3 B2 A2 B1 A1 B0 A0
│ │ │ │ │ │ │ │
┌─▼──▼─┐ ┌─▼──▼─┐ ┌─▼──▼─┐ ┌─▼──▼─┐
│ PG │ │ PG │ │ PG │ │ PG │
│ block│ │ block│ │ block│ │ block│
│ │ │ │ │ │ │ │
└─┬┬┬──┘ └─┬┬┬──┘ └─┬┬┬──┘ └─┬┬┬──┘
│││G3P3S3 │││G2P2S2 │││G1P1S1 │││G0P0S0
┌─▼▼▼────────▼▼▼────────▼▼▼────────▼▼▼──┐
│ Carry Lookahead logic │
│ │
└┬────┬───────┬──────────┬──────────┬───┘
│ │ │ │ │
▼ ▼ ▼ ▼ ▼
Cout S3 S1 S0 S0
```
Description of the __init__ method.
Args:
a (Bus): First input bus.
b (Bus): Second input bus.
cla_block_size (int, optional): Size of each composite cla adder block size. Defaults to 4.
prefix (str, optional): Prefix name of unsigned cla. Defaults to &#34;&#34;.
name (str, optional): Name of unsigned cla. Defaults to &#34;u_cla&#34;.
&#34;&#34;&#34;
def __init__(self, a: Bus, b: Bus, cla_block_size: int = 4, prefix: str = &#34;&#34;, name: str = &#34;u_cla&#34;, **kwargs):
self.N = max(a.N, b.N)
super().__init__(a=a, b=b, prefix=prefix, name=name, out_N=self.N+1, **kwargs)
# Bus sign extension in case buses have different lengths
self.a.bus_extend(N=self.N, prefix=a.prefix)
self.b.bus_extend(N=self.N, prefix=b.prefix)
# To signify current number of blocks and number of bits that remain to be added into function blocks
N_blocks = 0
N_wires = self.N
cin = ConstantWireValue0()
while N_wires != 0:
# Lists containing all propagate/generate wires
self.propagate = []
self.generate = []
# Cin0 used as a first generate wire for obtaining next carry bits
self.generate.append(cin)
block_size = cla_block_size if N_wires &gt;= cla_block_size else N_wires
# Gradual addition of propagate/generate logic blocks and AND/OR gates for Cout bits generation, XOR gates for Sum bits generation
for i in range(block_size):
pg_block = PGLogicBlock(self.a.get_wire((N_blocks*cla_block_size)+i), self.b.get_wire((N_blocks*cla_block_size)+i), prefix=self.prefix+&#34;_pg_logic&#34;+str(self.get_instance_num(cls=PGLogicBlock)))
self.propagate.append(pg_block.get_propagate_wire())
self.generate.append(pg_block.get_generate_wire())
self.add_component(pg_block)
if i == 0 and N_blocks == 0:
obj_sum_xor = XorGate(pg_block.get_sum_wire(), cin, prefix=self.prefix+&#34;_xor&#34;+str(self.get_instance_num(cls=XorGate)), parent_component=self)
self.add_component(obj_sum_xor)
self.out.connect(i+(N_blocks*cla_block_size), obj_sum_xor.out)
# Carry propagation calculation
obj_and = AndGate(self.propagate[(N_blocks*cla_block_size)+i], self.generate[(N_blocks*cla_block_size)+i], prefix=self.prefix+&#34;_and&#34;+str(self.get_instance_num(cls=AndGate)), parent_component=self)
self.add_component(obj_and)
# Carry bit generation
obj_cout_or = OrGate(pg_block.get_generate_wire(), self.get_previous_component().out, prefix=self.prefix+&#34;_or&#34;+str(self.get_instance_num(cls=OrGate, count_disabled_gates=False)), parent_component=self)
self.add_component(obj_cout_or)
else:
obj_sum_xor = XorGate(pg_block.get_sum_wire(), self.get_previous_component(2).out, prefix=self.prefix+&#34;_xor&#34;+str(self.get_instance_num(cls=XorGate)), parent_component=self)
self.add_component(obj_sum_xor)
self.out.connect(i+(N_blocks*cla_block_size), obj_sum_xor.out)
# List of AND gates outputs that are later combined in a multi-bit OR gate
composite_or_gates_inputs = []
for g_index in range(len(self.generate)-1):
composite_wires = []
# Getting a list of wires used for current bit position cout composite AND gate&#39;s generation
# E.g. for Cout2 = G1 + G0·P1 C0·P0·P1 it gets a list containing [C0,P0,P1] then [G0,P1]
composite_wires.append(self.generate[g_index])
for p_index in range(len(self.propagate)-1, g_index-1, -1):
composite_wires.append(self.propagate[p_index])
# For each pg pair values algorithmically combine two input AND gates to replace multiple input gates (resolves fan-in issue)
pg_wires = Bus(wires_list=composite_wires)
multi_bit_and_gate = MultipleInputLogicGate(a=pg_wires, two_input_gate_cls=AndGate, prefix=self.prefix+&#34;_and&#34;, parent_component=self)
composite_or_gates_inputs.append(multi_bit_and_gate.out)
# Final OR gates cascade using generated AND gates output wires
composite_or_wires = Bus(wires_list=composite_or_gates_inputs)
multi_bit_or_gate = MultipleInputLogicGate(a=composite_or_wires, two_input_gate_cls=OrGate, prefix=self.prefix+&#34;_or&#34;, parent_component=self)
# Carry bit generation
obj_cout_or = OrGate(pg_block.get_generate_wire(), multi_bit_or_gate.out, prefix=self.prefix+&#34;_or&#34;+str(self.get_instance_num(cls=OrGate, count_disabled_gates=False)), parent_component=self)
self.add_component(obj_cout_or)
# Updating cin for the the next bypass block
# Also updating cout value which is used as cin for the first adder of the next block
cin = obj_cout_or.out
N_wires -= block_size
N_blocks += 1
# Connection of final Cout
self.out.connect(self.N, cin)</code></pre>
</details>
<h3>Ancestors</h3>
<ul class="hlist">
<li><a title="ariths_gen.core.arithmetic_circuits.arithmetic_circuit.ArithmeticCircuit" href="../../core/arithmetic_circuits/arithmetic_circuit.html#ariths_gen.core.arithmetic_circuits.arithmetic_circuit.ArithmeticCircuit">ArithmeticCircuit</a></li>
<li><a title="ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit">GeneralCircuit</a></li>
</ul>
<h3>Subclasses</h3>
<ul class="hlist">
<li><a title="ariths_gen.multi_bit_circuits.adders.carry_lookahead_adder.SignedCarryLookaheadAdder" href="#ariths_gen.multi_bit_circuits.adders.carry_lookahead_adder.SignedCarryLookaheadAdder">SignedCarryLookaheadAdder</a></li>
</ul>
<h3>Inherited members</h3>
<ul class="hlist">
<li><code><b><a title="ariths_gen.core.arithmetic_circuits.arithmetic_circuit.ArithmeticCircuit" href="../../core/arithmetic_circuits/arithmetic_circuit.html#ariths_gen.core.arithmetic_circuits.arithmetic_circuit.ArithmeticCircuit">ArithmeticCircuit</a></b></code>:
<ul class="hlist">
<li><code><a title="ariths_gen.core.arithmetic_circuits.arithmetic_circuit.ArithmeticCircuit.add_component" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit.add_component">add_component</a></code></li>
<li><code><a title="ariths_gen.core.arithmetic_circuits.arithmetic_circuit.ArithmeticCircuit.get_blif_code_flat" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit.get_blif_code_flat">get_blif_code_flat</a></code></li>
<li><code><a title="ariths_gen.core.arithmetic_circuits.arithmetic_circuit.ArithmeticCircuit.get_blif_code_hier" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit.get_blif_code_hier">get_blif_code_hier</a></code></li>
<li><code><a title="ariths_gen.core.arithmetic_circuits.arithmetic_circuit.ArithmeticCircuit.get_c_code_flat" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit.get_c_code_flat">get_c_code_flat</a></code></li>
<li><code><a title="ariths_gen.core.arithmetic_circuits.arithmetic_circuit.ArithmeticCircuit.get_c_code_hier" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit.get_c_code_hier">get_c_code_hier</a></code></li>
<li><code><a title="ariths_gen.core.arithmetic_circuits.arithmetic_circuit.ArithmeticCircuit.get_carry_wire" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit.get_carry_wire">get_carry_wire</a></code></li>
<li><code><a title="ariths_gen.core.arithmetic_circuits.arithmetic_circuit.ArithmeticCircuit.get_cgp_code_flat" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit.get_cgp_code_flat">get_cgp_code_flat</a></code></li>
<li><code><a title="ariths_gen.core.arithmetic_circuits.arithmetic_circuit.ArithmeticCircuit.get_cgp_wires" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit.get_cgp_wires">get_cgp_wires</a></code></li>
<li><code><a title="ariths_gen.core.arithmetic_circuits.arithmetic_circuit.ArithmeticCircuit.get_circuit_blif" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit.get_circuit_blif">get_circuit_blif</a></code></li>
<li><code><a title="ariths_gen.core.arithmetic_circuits.arithmetic_circuit.ArithmeticCircuit.get_circuit_c" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit.get_circuit_c">get_circuit_c</a></code></li>
<li><code><a title="ariths_gen.core.arithmetic_circuits.arithmetic_circuit.ArithmeticCircuit.get_circuit_gates" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit.get_circuit_gates">get_circuit_gates</a></code></li>
<li><code><a title="ariths_gen.core.arithmetic_circuits.arithmetic_circuit.ArithmeticCircuit.get_circuit_v" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit.get_circuit_v">get_circuit_v</a></code></li>
<li><code><a title="ariths_gen.core.arithmetic_circuits.arithmetic_circuit.ArithmeticCircuit.get_circuit_wire_index" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit.get_circuit_wire_index">get_circuit_wire_index</a></code></li>
<li><code><a title="ariths_gen.core.arithmetic_circuits.arithmetic_circuit.ArithmeticCircuit.get_component_types" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit.get_component_types">get_component_types</a></code></li>
<li><code><a title="ariths_gen.core.arithmetic_circuits.arithmetic_circuit.ArithmeticCircuit.get_declaration_blif" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit.get_declaration_blif">get_declaration_blif</a></code></li>
<li><code><a title="ariths_gen.core.arithmetic_circuits.arithmetic_circuit.ArithmeticCircuit.get_declaration_c_flat" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit.get_declaration_c_flat">get_declaration_c_flat</a></code></li>
<li><code><a title="ariths_gen.core.arithmetic_circuits.arithmetic_circuit.ArithmeticCircuit.get_declaration_c_hier" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit.get_declaration_c_hier">get_declaration_c_hier</a></code></li>
<li><code><a title="ariths_gen.core.arithmetic_circuits.arithmetic_circuit.ArithmeticCircuit.get_declaration_v_flat" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit.get_declaration_v_flat">get_declaration_v_flat</a></code></li>
<li><code><a title="ariths_gen.core.arithmetic_circuits.arithmetic_circuit.ArithmeticCircuit.get_declaration_v_hier" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit.get_declaration_v_hier">get_declaration_v_hier</a></code></li>
<li><code><a title="ariths_gen.core.arithmetic_circuits.arithmetic_circuit.ArithmeticCircuit.get_declarations_c_hier" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit.get_declarations_c_hier">get_declarations_c_hier</a></code></li>
<li><code><a title="ariths_gen.core.arithmetic_circuits.arithmetic_circuit.ArithmeticCircuit.get_declarations_v_hier" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit.get_declarations_v_hier">get_declarations_v_hier</a></code></li>
<li><code><a title="ariths_gen.core.arithmetic_circuits.arithmetic_circuit.ArithmeticCircuit.get_function_blif_flat" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit.get_function_blif_flat">get_function_blif_flat</a></code></li>
<li><code><a title="ariths_gen.core.arithmetic_circuits.arithmetic_circuit.ArithmeticCircuit.get_function_block_blif" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit.get_function_block_blif">get_function_block_blif</a></code></li>
<li><code><a title="ariths_gen.core.arithmetic_circuits.arithmetic_circuit.ArithmeticCircuit.get_function_block_c" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit.get_function_block_c">get_function_block_c</a></code></li>
<li><code><a title="ariths_gen.core.arithmetic_circuits.arithmetic_circuit.ArithmeticCircuit.get_function_block_v" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit.get_function_block_v">get_function_block_v</a></code></li>
<li><code><a title="ariths_gen.core.arithmetic_circuits.arithmetic_circuit.ArithmeticCircuit.get_function_blocks_blif" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit.get_function_blocks_blif">get_function_blocks_blif</a></code></li>
<li><code><a title="ariths_gen.core.arithmetic_circuits.arithmetic_circuit.ArithmeticCircuit.get_function_blocks_c" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit.get_function_blocks_c">get_function_blocks_c</a></code></li>
<li><code><a title="ariths_gen.core.arithmetic_circuits.arithmetic_circuit.ArithmeticCircuit.get_function_blocks_v" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit.get_function_blocks_v">get_function_blocks_v</a></code></li>
<li><code><a title="ariths_gen.core.arithmetic_circuits.arithmetic_circuit.ArithmeticCircuit.get_function_out_blif" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit.get_function_out_blif">get_function_out_blif</a></code></li>
<li><code><a title="ariths_gen.core.arithmetic_circuits.arithmetic_circuit.ArithmeticCircuit.get_function_out_c_flat" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit.get_function_out_c_flat">get_function_out_c_flat</a></code></li>
<li><code><a title="ariths_gen.core.arithmetic_circuits.arithmetic_circuit.ArithmeticCircuit.get_function_out_c_hier" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit.get_function_out_c_hier">get_function_out_c_hier</a></code></li>
<li><code><a title="ariths_gen.core.arithmetic_circuits.arithmetic_circuit.ArithmeticCircuit.get_function_out_python_flat" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit.get_function_out_python_flat">get_function_out_python_flat</a></code></li>
<li><code><a title="ariths_gen.core.arithmetic_circuits.arithmetic_circuit.ArithmeticCircuit.get_function_out_v_flat" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit.get_function_out_v_flat">get_function_out_v_flat</a></code></li>
<li><code><a title="ariths_gen.core.arithmetic_circuits.arithmetic_circuit.ArithmeticCircuit.get_function_out_v_hier" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit.get_function_out_v_hier">get_function_out_v_hier</a></code></li>
<li><code><a title="ariths_gen.core.arithmetic_circuits.arithmetic_circuit.ArithmeticCircuit.get_includes_c" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit.get_includes_c">get_includes_c</a></code></li>
<li><code><a title="ariths_gen.core.arithmetic_circuits.arithmetic_circuit.ArithmeticCircuit.get_init_c_flat" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit.get_init_c_flat">get_init_c_flat</a></code></li>
<li><code><a title="ariths_gen.core.arithmetic_circuits.arithmetic_circuit.ArithmeticCircuit.get_init_c_hier" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit.get_init_c_hier">get_init_c_hier</a></code></li>
<li><code><a title="ariths_gen.core.arithmetic_circuits.arithmetic_circuit.ArithmeticCircuit.get_init_python_flat" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit.get_init_python_flat">get_init_python_flat</a></code></li>
<li><code><a title="ariths_gen.core.arithmetic_circuits.arithmetic_circuit.ArithmeticCircuit.get_init_v_flat" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit.get_init_v_flat">get_init_v_flat</a></code></li>
<li><code><a title="ariths_gen.core.arithmetic_circuits.arithmetic_circuit.ArithmeticCircuit.get_init_v_hier" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit.get_init_v_hier">get_init_v_hier</a></code></li>
<li><code><a title="ariths_gen.core.arithmetic_circuits.arithmetic_circuit.ArithmeticCircuit.get_instance_num" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit.get_instance_num">get_instance_num</a></code></li>
<li><code><a title="ariths_gen.core.arithmetic_circuits.arithmetic_circuit.ArithmeticCircuit.get_invocation_blif_hier" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit.get_invocation_blif_hier">get_invocation_blif_hier</a></code></li>
<li><code><a title="ariths_gen.core.arithmetic_circuits.arithmetic_circuit.ArithmeticCircuit.get_invocations_blif_hier" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit.get_invocations_blif_hier">get_invocations_blif_hier</a></code></li>
<li><code><a title="ariths_gen.core.arithmetic_circuits.arithmetic_circuit.ArithmeticCircuit.get_multi_bit_components" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit.get_multi_bit_components">get_multi_bit_components</a></code></li>
<li><code><a title="ariths_gen.core.arithmetic_circuits.arithmetic_circuit.ArithmeticCircuit.get_one_bit_components" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit.get_one_bit_components">get_one_bit_components</a></code></li>
<li><code><a title="ariths_gen.core.arithmetic_circuits.arithmetic_circuit.ArithmeticCircuit.get_out_invocation_c" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit.get_out_invocation_c">get_out_invocation_c</a></code></li>
<li><code><a title="ariths_gen.core.arithmetic_circuits.arithmetic_circuit.ArithmeticCircuit.get_out_invocation_v" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit.get_out_invocation_v">get_out_invocation_v</a></code></li>
<li><code><a title="ariths_gen.core.arithmetic_circuits.arithmetic_circuit.ArithmeticCircuit.get_outputs_cgp" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit.get_outputs_cgp">get_outputs_cgp</a></code></li>
<li><code><a title="ariths_gen.core.arithmetic_circuits.arithmetic_circuit.ArithmeticCircuit.get_parameters_cgp" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit.get_parameters_cgp">get_parameters_cgp</a></code></li>
<li><code><a title="ariths_gen.core.arithmetic_circuits.arithmetic_circuit.ArithmeticCircuit.get_previous_component" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit.get_previous_component">get_previous_component</a></code></li>
<li><code><a title="ariths_gen.core.arithmetic_circuits.arithmetic_circuit.ArithmeticCircuit.get_prototype_blif" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit.get_prototype_blif">get_prototype_blif</a></code></li>
<li><code><a title="ariths_gen.core.arithmetic_circuits.arithmetic_circuit.ArithmeticCircuit.get_prototype_c" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit.get_prototype_c">get_prototype_c</a></code></li>
<li><code><a title="ariths_gen.core.arithmetic_circuits.arithmetic_circuit.ArithmeticCircuit.get_prototype_python" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit.get_prototype_python">get_prototype_python</a></code></li>
<li><code><a title="ariths_gen.core.arithmetic_circuits.arithmetic_circuit.ArithmeticCircuit.get_prototype_v" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit.get_prototype_v">get_prototype_v</a></code></li>
<li><code><a title="ariths_gen.core.arithmetic_circuits.arithmetic_circuit.ArithmeticCircuit.get_python_code_flat" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit.get_python_code_flat">get_python_code_flat</a></code></li>
<li><code><a title="ariths_gen.core.arithmetic_circuits.arithmetic_circuit.ArithmeticCircuit.get_sum_wire" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit.get_sum_wire">get_sum_wire</a></code></li>
<li><code><a title="ariths_gen.core.arithmetic_circuits.arithmetic_circuit.ArithmeticCircuit.get_triplets_cgp" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit.get_triplets_cgp">get_triplets_cgp</a></code></li>
<li><code><a title="ariths_gen.core.arithmetic_circuits.arithmetic_circuit.ArithmeticCircuit.get_unique_types" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit.get_unique_types">get_unique_types</a></code></li>
<li><code><a title="ariths_gen.core.arithmetic_circuits.arithmetic_circuit.ArithmeticCircuit.get_v_code_flat" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit.get_v_code_flat">get_v_code_flat</a></code></li>
<li><code><a title="ariths_gen.core.arithmetic_circuits.arithmetic_circuit.ArithmeticCircuit.get_v_code_hier" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit.get_v_code_hier">get_v_code_hier</a></code></li>
<li><code><a title="ariths_gen.core.arithmetic_circuits.arithmetic_circuit.ArithmeticCircuit.save_wire_id" href="../../core/arithmetic_circuits/general_circuit.html#ariths_gen.core.arithmetic_circuits.general_circuit.GeneralCircuit.save_wire_id">save_wire_id</a></code></li>
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