mirror of
https://github.com/ehw-fit/ariths-gen.git
synced 2025-04-21 14:21:22 +01:00
56c86c13ca
* #10 CGP Circuits as inputs (#11) * CGP Circuits as inputs * #10 support of signed output in general circuit * input as output works * output connected to input (c) * automated verilog testing * output rename * Implemented CSA and Wallace tree multiplier composing of CSAs. Also did some code cleanup. * Typos fix and code cleanup. * Added new (approximate) multiplier architectures and did some minor changes regarding sign extension for c output formats. * Updated automated testing scripts. * Small bugfix in python code generation (I initially thought this line is useless). * Updated generated circuits folder. Co-authored-by: Vojta Mrazek <mrazek@fit.vutbr.cz>
140 lines
7.5 KiB
Coq
140 lines
7.5 KiB
Coq
module u_csamul_rca4(input [3:0] a, input [3:0] b, output [7:0] u_csamul_rca4_out);
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wire u_csamul_rca4_and0_0;
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wire u_csamul_rca4_and1_0;
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wire u_csamul_rca4_and2_0;
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wire u_csamul_rca4_and3_0;
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wire u_csamul_rca4_and0_1;
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wire u_csamul_rca4_ha0_1_xor0;
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wire u_csamul_rca4_ha0_1_and0;
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wire u_csamul_rca4_and1_1;
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wire u_csamul_rca4_ha1_1_xor0;
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wire u_csamul_rca4_ha1_1_and0;
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wire u_csamul_rca4_and2_1;
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wire u_csamul_rca4_ha2_1_xor0;
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wire u_csamul_rca4_ha2_1_and0;
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wire u_csamul_rca4_and3_1;
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wire u_csamul_rca4_and0_2;
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wire u_csamul_rca4_fa0_2_xor0;
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wire u_csamul_rca4_fa0_2_and0;
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wire u_csamul_rca4_fa0_2_xor1;
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wire u_csamul_rca4_fa0_2_and1;
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wire u_csamul_rca4_fa0_2_or0;
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wire u_csamul_rca4_and1_2;
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wire u_csamul_rca4_fa1_2_xor0;
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wire u_csamul_rca4_fa1_2_and0;
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wire u_csamul_rca4_fa1_2_xor1;
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wire u_csamul_rca4_fa1_2_and1;
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wire u_csamul_rca4_fa1_2_or0;
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wire u_csamul_rca4_and2_2;
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wire u_csamul_rca4_fa2_2_xor0;
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wire u_csamul_rca4_fa2_2_and0;
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wire u_csamul_rca4_fa2_2_xor1;
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wire u_csamul_rca4_fa2_2_and1;
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wire u_csamul_rca4_fa2_2_or0;
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wire u_csamul_rca4_and3_2;
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wire u_csamul_rca4_and0_3;
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wire u_csamul_rca4_fa0_3_xor0;
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wire u_csamul_rca4_fa0_3_and0;
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wire u_csamul_rca4_fa0_3_xor1;
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wire u_csamul_rca4_fa0_3_and1;
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wire u_csamul_rca4_fa0_3_or0;
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wire u_csamul_rca4_and1_3;
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wire u_csamul_rca4_fa1_3_xor0;
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wire u_csamul_rca4_fa1_3_and0;
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wire u_csamul_rca4_fa1_3_xor1;
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wire u_csamul_rca4_fa1_3_and1;
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wire u_csamul_rca4_fa1_3_or0;
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wire u_csamul_rca4_and2_3;
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wire u_csamul_rca4_fa2_3_xor0;
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wire u_csamul_rca4_fa2_3_and0;
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wire u_csamul_rca4_fa2_3_xor1;
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wire u_csamul_rca4_fa2_3_and1;
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wire u_csamul_rca4_fa2_3_or0;
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wire u_csamul_rca4_and3_3;
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wire u_csamul_rca4_u_rca4_ha_xor0;
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wire u_csamul_rca4_u_rca4_ha_and0;
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wire u_csamul_rca4_u_rca4_fa1_xor0;
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wire u_csamul_rca4_u_rca4_fa1_and0;
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wire u_csamul_rca4_u_rca4_fa1_xor1;
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wire u_csamul_rca4_u_rca4_fa1_and1;
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wire u_csamul_rca4_u_rca4_fa1_or0;
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wire u_csamul_rca4_u_rca4_fa2_xor0;
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wire u_csamul_rca4_u_rca4_fa2_and0;
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wire u_csamul_rca4_u_rca4_fa2_xor1;
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wire u_csamul_rca4_u_rca4_fa2_and1;
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wire u_csamul_rca4_u_rca4_fa2_or0;
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assign u_csamul_rca4_and0_0 = a[0] & b[0];
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assign u_csamul_rca4_and1_0 = a[1] & b[0];
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assign u_csamul_rca4_and2_0 = a[2] & b[0];
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assign u_csamul_rca4_and3_0 = a[3] & b[0];
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assign u_csamul_rca4_and0_1 = a[0] & b[1];
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assign u_csamul_rca4_ha0_1_xor0 = u_csamul_rca4_and0_1 ^ u_csamul_rca4_and1_0;
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assign u_csamul_rca4_ha0_1_and0 = u_csamul_rca4_and0_1 & u_csamul_rca4_and1_0;
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assign u_csamul_rca4_and1_1 = a[1] & b[1];
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assign u_csamul_rca4_ha1_1_xor0 = u_csamul_rca4_and1_1 ^ u_csamul_rca4_and2_0;
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assign u_csamul_rca4_ha1_1_and0 = u_csamul_rca4_and1_1 & u_csamul_rca4_and2_0;
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assign u_csamul_rca4_and2_1 = a[2] & b[1];
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assign u_csamul_rca4_ha2_1_xor0 = u_csamul_rca4_and2_1 ^ u_csamul_rca4_and3_0;
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assign u_csamul_rca4_ha2_1_and0 = u_csamul_rca4_and2_1 & u_csamul_rca4_and3_0;
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assign u_csamul_rca4_and3_1 = a[3] & b[1];
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assign u_csamul_rca4_and0_2 = a[0] & b[2];
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assign u_csamul_rca4_fa0_2_xor0 = u_csamul_rca4_and0_2 ^ u_csamul_rca4_ha1_1_xor0;
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assign u_csamul_rca4_fa0_2_and0 = u_csamul_rca4_and0_2 & u_csamul_rca4_ha1_1_xor0;
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assign u_csamul_rca4_fa0_2_xor1 = u_csamul_rca4_fa0_2_xor0 ^ u_csamul_rca4_ha0_1_and0;
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assign u_csamul_rca4_fa0_2_and1 = u_csamul_rca4_fa0_2_xor0 & u_csamul_rca4_ha0_1_and0;
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assign u_csamul_rca4_fa0_2_or0 = u_csamul_rca4_fa0_2_and0 | u_csamul_rca4_fa0_2_and1;
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assign u_csamul_rca4_and1_2 = a[1] & b[2];
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assign u_csamul_rca4_fa1_2_xor0 = u_csamul_rca4_and1_2 ^ u_csamul_rca4_ha2_1_xor0;
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assign u_csamul_rca4_fa1_2_and0 = u_csamul_rca4_and1_2 & u_csamul_rca4_ha2_1_xor0;
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assign u_csamul_rca4_fa1_2_xor1 = u_csamul_rca4_fa1_2_xor0 ^ u_csamul_rca4_ha1_1_and0;
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assign u_csamul_rca4_fa1_2_and1 = u_csamul_rca4_fa1_2_xor0 & u_csamul_rca4_ha1_1_and0;
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assign u_csamul_rca4_fa1_2_or0 = u_csamul_rca4_fa1_2_and0 | u_csamul_rca4_fa1_2_and1;
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assign u_csamul_rca4_and2_2 = a[2] & b[2];
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assign u_csamul_rca4_fa2_2_xor0 = u_csamul_rca4_and2_2 ^ u_csamul_rca4_and3_1;
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assign u_csamul_rca4_fa2_2_and0 = u_csamul_rca4_and2_2 & u_csamul_rca4_and3_1;
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assign u_csamul_rca4_fa2_2_xor1 = u_csamul_rca4_fa2_2_xor0 ^ u_csamul_rca4_ha2_1_and0;
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assign u_csamul_rca4_fa2_2_and1 = u_csamul_rca4_fa2_2_xor0 & u_csamul_rca4_ha2_1_and0;
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assign u_csamul_rca4_fa2_2_or0 = u_csamul_rca4_fa2_2_and0 | u_csamul_rca4_fa2_2_and1;
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assign u_csamul_rca4_and3_2 = a[3] & b[2];
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assign u_csamul_rca4_and0_3 = a[0] & b[3];
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assign u_csamul_rca4_fa0_3_xor0 = u_csamul_rca4_and0_3 ^ u_csamul_rca4_fa1_2_xor1;
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assign u_csamul_rca4_fa0_3_and0 = u_csamul_rca4_and0_3 & u_csamul_rca4_fa1_2_xor1;
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assign u_csamul_rca4_fa0_3_xor1 = u_csamul_rca4_fa0_3_xor0 ^ u_csamul_rca4_fa0_2_or0;
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assign u_csamul_rca4_fa0_3_and1 = u_csamul_rca4_fa0_3_xor0 & u_csamul_rca4_fa0_2_or0;
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assign u_csamul_rca4_fa0_3_or0 = u_csamul_rca4_fa0_3_and0 | u_csamul_rca4_fa0_3_and1;
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assign u_csamul_rca4_and1_3 = a[1] & b[3];
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assign u_csamul_rca4_fa1_3_xor0 = u_csamul_rca4_and1_3 ^ u_csamul_rca4_fa2_2_xor1;
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assign u_csamul_rca4_fa1_3_and0 = u_csamul_rca4_and1_3 & u_csamul_rca4_fa2_2_xor1;
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assign u_csamul_rca4_fa1_3_xor1 = u_csamul_rca4_fa1_3_xor0 ^ u_csamul_rca4_fa1_2_or0;
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assign u_csamul_rca4_fa1_3_and1 = u_csamul_rca4_fa1_3_xor0 & u_csamul_rca4_fa1_2_or0;
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assign u_csamul_rca4_fa1_3_or0 = u_csamul_rca4_fa1_3_and0 | u_csamul_rca4_fa1_3_and1;
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assign u_csamul_rca4_and2_3 = a[2] & b[3];
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assign u_csamul_rca4_fa2_3_xor0 = u_csamul_rca4_and2_3 ^ u_csamul_rca4_and3_2;
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assign u_csamul_rca4_fa2_3_and0 = u_csamul_rca4_and2_3 & u_csamul_rca4_and3_2;
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assign u_csamul_rca4_fa2_3_xor1 = u_csamul_rca4_fa2_3_xor0 ^ u_csamul_rca4_fa2_2_or0;
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assign u_csamul_rca4_fa2_3_and1 = u_csamul_rca4_fa2_3_xor0 & u_csamul_rca4_fa2_2_or0;
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assign u_csamul_rca4_fa2_3_or0 = u_csamul_rca4_fa2_3_and0 | u_csamul_rca4_fa2_3_and1;
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assign u_csamul_rca4_and3_3 = a[3] & b[3];
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assign u_csamul_rca4_u_rca4_ha_xor0 = u_csamul_rca4_fa1_3_xor1 ^ u_csamul_rca4_fa0_3_or0;
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assign u_csamul_rca4_u_rca4_ha_and0 = u_csamul_rca4_fa1_3_xor1 & u_csamul_rca4_fa0_3_or0;
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assign u_csamul_rca4_u_rca4_fa1_xor0 = u_csamul_rca4_fa2_3_xor1 ^ u_csamul_rca4_fa1_3_or0;
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assign u_csamul_rca4_u_rca4_fa1_and0 = u_csamul_rca4_fa2_3_xor1 & u_csamul_rca4_fa1_3_or0;
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assign u_csamul_rca4_u_rca4_fa1_xor1 = u_csamul_rca4_u_rca4_fa1_xor0 ^ u_csamul_rca4_u_rca4_ha_and0;
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assign u_csamul_rca4_u_rca4_fa1_and1 = u_csamul_rca4_u_rca4_fa1_xor0 & u_csamul_rca4_u_rca4_ha_and0;
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assign u_csamul_rca4_u_rca4_fa1_or0 = u_csamul_rca4_u_rca4_fa1_and0 | u_csamul_rca4_u_rca4_fa1_and1;
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assign u_csamul_rca4_u_rca4_fa2_xor0 = u_csamul_rca4_and3_3 ^ u_csamul_rca4_fa2_3_or0;
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assign u_csamul_rca4_u_rca4_fa2_and0 = u_csamul_rca4_and3_3 & u_csamul_rca4_fa2_3_or0;
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assign u_csamul_rca4_u_rca4_fa2_xor1 = u_csamul_rca4_u_rca4_fa2_xor0 ^ u_csamul_rca4_u_rca4_fa1_or0;
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assign u_csamul_rca4_u_rca4_fa2_and1 = u_csamul_rca4_u_rca4_fa2_xor0 & u_csamul_rca4_u_rca4_fa1_or0;
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assign u_csamul_rca4_u_rca4_fa2_or0 = u_csamul_rca4_u_rca4_fa2_and0 | u_csamul_rca4_u_rca4_fa2_and1;
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assign u_csamul_rca4_out[0] = u_csamul_rca4_and0_0;
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assign u_csamul_rca4_out[1] = u_csamul_rca4_ha0_1_xor0;
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assign u_csamul_rca4_out[2] = u_csamul_rca4_fa0_2_xor1;
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assign u_csamul_rca4_out[3] = u_csamul_rca4_fa0_3_xor1;
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assign u_csamul_rca4_out[4] = u_csamul_rca4_u_rca4_ha_xor0;
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assign u_csamul_rca4_out[5] = u_csamul_rca4_u_rca4_fa1_xor1;
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assign u_csamul_rca4_out[6] = u_csamul_rca4_u_rca4_fa2_xor1;
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assign u_csamul_rca4_out[7] = u_csamul_rca4_u_rca4_fa2_or0;
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endmodule |