mirror of
https://github.com/ehw-fit/ariths-gen.git
synced 2025-04-19 13:30:56 +01:00
6607 lines
439 KiB
C
6607 lines
439 KiB
C
#include <stdio.h>
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#include <stdint.h>
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int64_t s_arrmul24(int64_t a, int64_t b){
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int64_t s_arrmul24_out = 0;
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uint8_t s_arrmul24_and0_0 = 0;
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uint8_t s_arrmul24_and1_0 = 0;
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uint8_t s_arrmul24_and2_0 = 0;
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uint8_t s_arrmul24_and3_0 = 0;
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uint8_t s_arrmul24_and4_0 = 0;
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uint8_t s_arrmul24_and5_0 = 0;
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uint8_t s_arrmul24_and6_0 = 0;
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uint8_t s_arrmul24_and7_0 = 0;
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uint8_t s_arrmul24_and8_0 = 0;
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uint8_t s_arrmul24_and9_0 = 0;
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uint8_t s_arrmul24_and10_0 = 0;
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uint8_t s_arrmul24_and11_0 = 0;
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uint8_t s_arrmul24_and12_0 = 0;
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uint8_t s_arrmul24_and13_0 = 0;
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uint8_t s_arrmul24_and14_0 = 0;
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uint8_t s_arrmul24_and15_0 = 0;
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uint8_t s_arrmul24_and16_0 = 0;
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uint8_t s_arrmul24_and17_0 = 0;
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uint8_t s_arrmul24_and18_0 = 0;
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uint8_t s_arrmul24_and19_0 = 0;
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uint8_t s_arrmul24_and20_0 = 0;
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uint8_t s_arrmul24_and21_0 = 0;
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uint8_t s_arrmul24_and22_0 = 0;
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uint8_t s_arrmul24_nand23_0 = 0;
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uint8_t s_arrmul24_and0_1 = 0;
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uint8_t s_arrmul24_ha0_1_xor0 = 0;
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uint8_t s_arrmul24_ha0_1_and0 = 0;
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uint8_t s_arrmul24_and1_1 = 0;
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uint8_t s_arrmul24_fa1_1_xor0 = 0;
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uint8_t s_arrmul24_fa1_1_and0 = 0;
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uint8_t s_arrmul24_fa1_1_xor1 = 0;
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uint8_t s_arrmul24_fa1_1_and1 = 0;
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uint8_t s_arrmul24_fa1_1_or0 = 0;
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uint8_t s_arrmul24_and2_1 = 0;
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uint8_t s_arrmul24_fa2_1_xor0 = 0;
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uint8_t s_arrmul24_fa2_1_and0 = 0;
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uint8_t s_arrmul24_fa2_1_xor1 = 0;
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uint8_t s_arrmul24_fa2_1_and1 = 0;
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uint8_t s_arrmul24_fa2_1_or0 = 0;
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uint8_t s_arrmul24_and3_1 = 0;
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uint8_t s_arrmul24_fa3_1_xor0 = 0;
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uint8_t s_arrmul24_fa3_1_and0 = 0;
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uint8_t s_arrmul24_fa3_1_xor1 = 0;
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uint8_t s_arrmul24_fa3_1_and1 = 0;
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uint8_t s_arrmul24_fa3_1_or0 = 0;
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uint8_t s_arrmul24_and4_1 = 0;
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uint8_t s_arrmul24_fa4_1_xor0 = 0;
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uint8_t s_arrmul24_fa4_1_and0 = 0;
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uint8_t s_arrmul24_fa4_1_xor1 = 0;
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uint8_t s_arrmul24_fa4_1_and1 = 0;
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uint8_t s_arrmul24_fa4_1_or0 = 0;
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uint8_t s_arrmul24_and5_1 = 0;
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uint8_t s_arrmul24_fa5_1_xor0 = 0;
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uint8_t s_arrmul24_fa5_1_and0 = 0;
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uint8_t s_arrmul24_fa5_1_xor1 = 0;
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uint8_t s_arrmul24_fa5_1_and1 = 0;
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uint8_t s_arrmul24_fa5_1_or0 = 0;
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uint8_t s_arrmul24_and6_1 = 0;
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uint8_t s_arrmul24_fa6_1_xor0 = 0;
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uint8_t s_arrmul24_fa6_1_and0 = 0;
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uint8_t s_arrmul24_fa6_1_xor1 = 0;
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uint8_t s_arrmul24_fa6_1_and1 = 0;
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uint8_t s_arrmul24_fa6_1_or0 = 0;
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uint8_t s_arrmul24_and7_1 = 0;
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uint8_t s_arrmul24_fa7_1_xor0 = 0;
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uint8_t s_arrmul24_fa7_1_and0 = 0;
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uint8_t s_arrmul24_fa7_1_xor1 = 0;
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uint8_t s_arrmul24_fa7_1_and1 = 0;
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uint8_t s_arrmul24_fa7_1_or0 = 0;
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uint8_t s_arrmul24_and8_1 = 0;
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uint8_t s_arrmul24_fa8_1_xor0 = 0;
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uint8_t s_arrmul24_fa8_1_and0 = 0;
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uint8_t s_arrmul24_fa8_1_xor1 = 0;
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uint8_t s_arrmul24_fa8_1_and1 = 0;
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uint8_t s_arrmul24_fa8_1_or0 = 0;
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uint8_t s_arrmul24_and9_1 = 0;
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uint8_t s_arrmul24_fa9_1_xor0 = 0;
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uint8_t s_arrmul24_fa9_1_and0 = 0;
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uint8_t s_arrmul24_fa9_1_xor1 = 0;
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uint8_t s_arrmul24_fa9_1_and1 = 0;
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uint8_t s_arrmul24_fa9_1_or0 = 0;
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uint8_t s_arrmul24_and10_1 = 0;
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uint8_t s_arrmul24_fa10_1_xor0 = 0;
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uint8_t s_arrmul24_fa10_1_and0 = 0;
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uint8_t s_arrmul24_fa10_1_xor1 = 0;
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uint8_t s_arrmul24_fa10_1_and1 = 0;
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uint8_t s_arrmul24_fa10_1_or0 = 0;
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uint8_t s_arrmul24_and11_1 = 0;
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uint8_t s_arrmul24_fa11_1_xor0 = 0;
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uint8_t s_arrmul24_fa11_1_and0 = 0;
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uint8_t s_arrmul24_fa11_1_xor1 = 0;
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uint8_t s_arrmul24_fa11_1_and1 = 0;
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uint8_t s_arrmul24_fa11_1_or0 = 0;
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uint8_t s_arrmul24_and12_1 = 0;
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uint8_t s_arrmul24_fa12_1_xor0 = 0;
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uint8_t s_arrmul24_fa12_1_and0 = 0;
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uint8_t s_arrmul24_fa12_1_xor1 = 0;
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uint8_t s_arrmul24_fa12_1_and1 = 0;
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uint8_t s_arrmul24_fa12_1_or0 = 0;
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uint8_t s_arrmul24_and13_1 = 0;
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uint8_t s_arrmul24_fa13_1_xor0 = 0;
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uint8_t s_arrmul24_fa13_1_and0 = 0;
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uint8_t s_arrmul24_fa13_1_xor1 = 0;
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uint8_t s_arrmul24_fa13_1_and1 = 0;
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uint8_t s_arrmul24_fa13_1_or0 = 0;
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uint8_t s_arrmul24_and14_1 = 0;
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uint8_t s_arrmul24_fa14_1_xor0 = 0;
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uint8_t s_arrmul24_fa14_1_and0 = 0;
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uint8_t s_arrmul24_fa14_1_xor1 = 0;
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uint8_t s_arrmul24_fa14_1_and1 = 0;
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uint8_t s_arrmul24_fa14_1_or0 = 0;
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uint8_t s_arrmul24_and15_1 = 0;
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uint8_t s_arrmul24_fa15_1_xor0 = 0;
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uint8_t s_arrmul24_fa15_1_and0 = 0;
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uint8_t s_arrmul24_fa15_1_xor1 = 0;
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uint8_t s_arrmul24_fa15_1_and1 = 0;
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uint8_t s_arrmul24_fa15_1_or0 = 0;
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uint8_t s_arrmul24_and16_1 = 0;
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uint8_t s_arrmul24_fa16_1_xor0 = 0;
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uint8_t s_arrmul24_fa16_1_and0 = 0;
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uint8_t s_arrmul24_fa16_1_xor1 = 0;
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uint8_t s_arrmul24_fa16_1_and1 = 0;
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uint8_t s_arrmul24_fa16_1_or0 = 0;
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uint8_t s_arrmul24_and17_1 = 0;
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uint8_t s_arrmul24_fa17_1_xor0 = 0;
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uint8_t s_arrmul24_fa17_1_and0 = 0;
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uint8_t s_arrmul24_fa17_1_xor1 = 0;
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uint8_t s_arrmul24_fa17_1_and1 = 0;
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uint8_t s_arrmul24_fa17_1_or0 = 0;
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uint8_t s_arrmul24_and18_1 = 0;
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uint8_t s_arrmul24_fa18_1_xor0 = 0;
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uint8_t s_arrmul24_fa18_1_and0 = 0;
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uint8_t s_arrmul24_fa18_1_xor1 = 0;
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uint8_t s_arrmul24_fa18_1_and1 = 0;
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uint8_t s_arrmul24_fa18_1_or0 = 0;
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uint8_t s_arrmul24_and19_1 = 0;
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uint8_t s_arrmul24_fa19_1_xor0 = 0;
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uint8_t s_arrmul24_fa19_1_and0 = 0;
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uint8_t s_arrmul24_fa19_1_xor1 = 0;
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uint8_t s_arrmul24_fa19_1_and1 = 0;
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uint8_t s_arrmul24_fa19_1_or0 = 0;
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uint8_t s_arrmul24_and20_1 = 0;
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uint8_t s_arrmul24_fa20_1_xor0 = 0;
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uint8_t s_arrmul24_fa20_1_and0 = 0;
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uint8_t s_arrmul24_fa20_1_xor1 = 0;
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uint8_t s_arrmul24_fa20_1_and1 = 0;
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uint8_t s_arrmul24_fa20_1_or0 = 0;
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uint8_t s_arrmul24_and21_1 = 0;
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uint8_t s_arrmul24_fa21_1_xor0 = 0;
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uint8_t s_arrmul24_fa21_1_and0 = 0;
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uint8_t s_arrmul24_fa21_1_xor1 = 0;
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uint8_t s_arrmul24_fa21_1_and1 = 0;
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uint8_t s_arrmul24_fa21_1_or0 = 0;
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uint8_t s_arrmul24_and22_1 = 0;
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uint8_t s_arrmul24_fa22_1_xor0 = 0;
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uint8_t s_arrmul24_fa22_1_and0 = 0;
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uint8_t s_arrmul24_fa22_1_xor1 = 0;
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uint8_t s_arrmul24_fa22_1_and1 = 0;
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uint8_t s_arrmul24_fa22_1_or0 = 0;
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uint8_t s_arrmul24_nand23_1 = 0;
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uint8_t s_arrmul24_fa23_1_xor0 = 0;
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uint8_t s_arrmul24_fa23_1_xor1 = 0;
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uint8_t s_arrmul24_fa23_1_and1 = 0;
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uint8_t s_arrmul24_fa23_1_or0 = 0;
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uint8_t s_arrmul24_and0_2 = 0;
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uint8_t s_arrmul24_ha0_2_xor0 = 0;
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uint8_t s_arrmul24_ha0_2_and0 = 0;
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uint8_t s_arrmul24_and1_2 = 0;
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uint8_t s_arrmul24_fa1_2_xor0 = 0;
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uint8_t s_arrmul24_fa1_2_and0 = 0;
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uint8_t s_arrmul24_fa1_2_xor1 = 0;
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uint8_t s_arrmul24_fa1_2_and1 = 0;
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uint8_t s_arrmul24_fa1_2_or0 = 0;
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uint8_t s_arrmul24_and2_2 = 0;
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uint8_t s_arrmul24_fa2_2_xor0 = 0;
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uint8_t s_arrmul24_fa2_2_and0 = 0;
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uint8_t s_arrmul24_fa2_2_xor1 = 0;
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uint8_t s_arrmul24_fa2_2_and1 = 0;
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uint8_t s_arrmul24_fa2_2_or0 = 0;
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uint8_t s_arrmul24_and3_2 = 0;
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uint8_t s_arrmul24_fa3_2_xor0 = 0;
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uint8_t s_arrmul24_fa3_2_and0 = 0;
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uint8_t s_arrmul24_fa3_2_xor1 = 0;
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uint8_t s_arrmul24_fa3_2_and1 = 0;
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uint8_t s_arrmul24_fa3_2_or0 = 0;
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uint8_t s_arrmul24_and4_2 = 0;
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uint8_t s_arrmul24_fa4_2_xor0 = 0;
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uint8_t s_arrmul24_fa4_2_and0 = 0;
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uint8_t s_arrmul24_fa4_2_xor1 = 0;
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uint8_t s_arrmul24_fa4_2_and1 = 0;
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uint8_t s_arrmul24_fa4_2_or0 = 0;
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uint8_t s_arrmul24_and5_2 = 0;
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uint8_t s_arrmul24_fa5_2_xor0 = 0;
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uint8_t s_arrmul24_fa5_2_and0 = 0;
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uint8_t s_arrmul24_fa5_2_xor1 = 0;
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uint8_t s_arrmul24_fa5_2_and1 = 0;
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uint8_t s_arrmul24_fa5_2_or0 = 0;
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uint8_t s_arrmul24_and6_2 = 0;
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uint8_t s_arrmul24_fa6_2_xor0 = 0;
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uint8_t s_arrmul24_fa6_2_and0 = 0;
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uint8_t s_arrmul24_fa6_2_xor1 = 0;
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uint8_t s_arrmul24_fa6_2_and1 = 0;
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uint8_t s_arrmul24_fa6_2_or0 = 0;
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uint8_t s_arrmul24_and7_2 = 0;
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uint8_t s_arrmul24_fa7_2_xor0 = 0;
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uint8_t s_arrmul24_fa7_2_and0 = 0;
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uint8_t s_arrmul24_fa7_2_xor1 = 0;
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uint8_t s_arrmul24_fa7_2_and1 = 0;
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uint8_t s_arrmul24_fa7_2_or0 = 0;
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uint8_t s_arrmul24_and8_2 = 0;
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uint8_t s_arrmul24_fa8_2_xor0 = 0;
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uint8_t s_arrmul24_fa8_2_and0 = 0;
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uint8_t s_arrmul24_fa8_2_xor1 = 0;
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uint8_t s_arrmul24_fa8_2_and1 = 0;
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uint8_t s_arrmul24_fa8_2_or0 = 0;
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uint8_t s_arrmul24_and9_2 = 0;
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uint8_t s_arrmul24_fa9_2_xor0 = 0;
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uint8_t s_arrmul24_fa9_2_and0 = 0;
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uint8_t s_arrmul24_fa9_2_xor1 = 0;
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uint8_t s_arrmul24_fa9_2_and1 = 0;
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uint8_t s_arrmul24_fa9_2_or0 = 0;
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uint8_t s_arrmul24_and10_2 = 0;
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uint8_t s_arrmul24_fa10_2_xor0 = 0;
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uint8_t s_arrmul24_fa10_2_and0 = 0;
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uint8_t s_arrmul24_fa10_2_xor1 = 0;
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uint8_t s_arrmul24_fa10_2_and1 = 0;
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uint8_t s_arrmul24_fa10_2_or0 = 0;
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uint8_t s_arrmul24_and11_2 = 0;
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uint8_t s_arrmul24_fa11_2_xor0 = 0;
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uint8_t s_arrmul24_fa11_2_and0 = 0;
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uint8_t s_arrmul24_fa11_2_xor1 = 0;
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uint8_t s_arrmul24_fa11_2_and1 = 0;
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uint8_t s_arrmul24_fa11_2_or0 = 0;
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uint8_t s_arrmul24_and12_2 = 0;
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uint8_t s_arrmul24_fa12_2_xor0 = 0;
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uint8_t s_arrmul24_fa12_2_and0 = 0;
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uint8_t s_arrmul24_fa12_2_xor1 = 0;
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uint8_t s_arrmul24_fa12_2_and1 = 0;
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uint8_t s_arrmul24_fa12_2_or0 = 0;
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uint8_t s_arrmul24_and13_2 = 0;
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uint8_t s_arrmul24_fa13_2_xor0 = 0;
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uint8_t s_arrmul24_fa13_2_and0 = 0;
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uint8_t s_arrmul24_fa13_2_xor1 = 0;
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uint8_t s_arrmul24_fa13_2_and1 = 0;
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uint8_t s_arrmul24_fa13_2_or0 = 0;
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uint8_t s_arrmul24_and14_2 = 0;
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uint8_t s_arrmul24_fa14_2_xor0 = 0;
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uint8_t s_arrmul24_fa14_2_and0 = 0;
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uint8_t s_arrmul24_fa14_2_xor1 = 0;
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uint8_t s_arrmul24_fa14_2_and1 = 0;
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uint8_t s_arrmul24_fa14_2_or0 = 0;
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uint8_t s_arrmul24_and15_2 = 0;
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uint8_t s_arrmul24_fa15_2_xor0 = 0;
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uint8_t s_arrmul24_fa15_2_and0 = 0;
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uint8_t s_arrmul24_fa15_2_xor1 = 0;
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uint8_t s_arrmul24_fa15_2_and1 = 0;
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uint8_t s_arrmul24_fa15_2_or0 = 0;
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uint8_t s_arrmul24_and16_2 = 0;
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uint8_t s_arrmul24_fa16_2_xor0 = 0;
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uint8_t s_arrmul24_fa16_2_and0 = 0;
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uint8_t s_arrmul24_fa16_2_xor1 = 0;
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uint8_t s_arrmul24_fa16_2_and1 = 0;
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uint8_t s_arrmul24_fa16_2_or0 = 0;
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uint8_t s_arrmul24_and17_2 = 0;
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uint8_t s_arrmul24_fa17_2_xor0 = 0;
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uint8_t s_arrmul24_fa17_2_and0 = 0;
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uint8_t s_arrmul24_fa17_2_xor1 = 0;
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uint8_t s_arrmul24_fa17_2_and1 = 0;
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uint8_t s_arrmul24_fa17_2_or0 = 0;
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uint8_t s_arrmul24_and18_2 = 0;
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uint8_t s_arrmul24_fa18_2_xor0 = 0;
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uint8_t s_arrmul24_fa18_2_and0 = 0;
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uint8_t s_arrmul24_fa18_2_xor1 = 0;
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uint8_t s_arrmul24_fa18_2_and1 = 0;
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uint8_t s_arrmul24_fa18_2_or0 = 0;
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uint8_t s_arrmul24_and19_2 = 0;
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uint8_t s_arrmul24_fa19_2_xor0 = 0;
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uint8_t s_arrmul24_fa19_2_and0 = 0;
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uint8_t s_arrmul24_fa19_2_xor1 = 0;
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uint8_t s_arrmul24_fa19_2_and1 = 0;
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uint8_t s_arrmul24_fa19_2_or0 = 0;
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uint8_t s_arrmul24_and20_2 = 0;
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uint8_t s_arrmul24_fa20_2_xor0 = 0;
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uint8_t s_arrmul24_fa20_2_and0 = 0;
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|
uint8_t s_arrmul24_fa20_2_xor1 = 0;
|
|
uint8_t s_arrmul24_fa20_2_and1 = 0;
|
|
uint8_t s_arrmul24_fa20_2_or0 = 0;
|
|
uint8_t s_arrmul24_and21_2 = 0;
|
|
uint8_t s_arrmul24_fa21_2_xor0 = 0;
|
|
uint8_t s_arrmul24_fa21_2_and0 = 0;
|
|
uint8_t s_arrmul24_fa21_2_xor1 = 0;
|
|
uint8_t s_arrmul24_fa21_2_and1 = 0;
|
|
uint8_t s_arrmul24_fa21_2_or0 = 0;
|
|
uint8_t s_arrmul24_and22_2 = 0;
|
|
uint8_t s_arrmul24_fa22_2_xor0 = 0;
|
|
uint8_t s_arrmul24_fa22_2_and0 = 0;
|
|
uint8_t s_arrmul24_fa22_2_xor1 = 0;
|
|
uint8_t s_arrmul24_fa22_2_and1 = 0;
|
|
uint8_t s_arrmul24_fa22_2_or0 = 0;
|
|
uint8_t s_arrmul24_nand23_2 = 0;
|
|
uint8_t s_arrmul24_fa23_2_xor0 = 0;
|
|
uint8_t s_arrmul24_fa23_2_and0 = 0;
|
|
uint8_t s_arrmul24_fa23_2_xor1 = 0;
|
|
uint8_t s_arrmul24_fa23_2_and1 = 0;
|
|
uint8_t s_arrmul24_fa23_2_or0 = 0;
|
|
uint8_t s_arrmul24_and0_3 = 0;
|
|
uint8_t s_arrmul24_ha0_3_xor0 = 0;
|
|
uint8_t s_arrmul24_ha0_3_and0 = 0;
|
|
uint8_t s_arrmul24_and1_3 = 0;
|
|
uint8_t s_arrmul24_fa1_3_xor0 = 0;
|
|
uint8_t s_arrmul24_fa1_3_and0 = 0;
|
|
uint8_t s_arrmul24_fa1_3_xor1 = 0;
|
|
uint8_t s_arrmul24_fa1_3_and1 = 0;
|
|
uint8_t s_arrmul24_fa1_3_or0 = 0;
|
|
uint8_t s_arrmul24_and2_3 = 0;
|
|
uint8_t s_arrmul24_fa2_3_xor0 = 0;
|
|
uint8_t s_arrmul24_fa2_3_and0 = 0;
|
|
uint8_t s_arrmul24_fa2_3_xor1 = 0;
|
|
uint8_t s_arrmul24_fa2_3_and1 = 0;
|
|
uint8_t s_arrmul24_fa2_3_or0 = 0;
|
|
uint8_t s_arrmul24_and3_3 = 0;
|
|
uint8_t s_arrmul24_fa3_3_xor0 = 0;
|
|
uint8_t s_arrmul24_fa3_3_and0 = 0;
|
|
uint8_t s_arrmul24_fa3_3_xor1 = 0;
|
|
uint8_t s_arrmul24_fa3_3_and1 = 0;
|
|
uint8_t s_arrmul24_fa3_3_or0 = 0;
|
|
uint8_t s_arrmul24_and4_3 = 0;
|
|
uint8_t s_arrmul24_fa4_3_xor0 = 0;
|
|
uint8_t s_arrmul24_fa4_3_and0 = 0;
|
|
uint8_t s_arrmul24_fa4_3_xor1 = 0;
|
|
uint8_t s_arrmul24_fa4_3_and1 = 0;
|
|
uint8_t s_arrmul24_fa4_3_or0 = 0;
|
|
uint8_t s_arrmul24_and5_3 = 0;
|
|
uint8_t s_arrmul24_fa5_3_xor0 = 0;
|
|
uint8_t s_arrmul24_fa5_3_and0 = 0;
|
|
uint8_t s_arrmul24_fa5_3_xor1 = 0;
|
|
uint8_t s_arrmul24_fa5_3_and1 = 0;
|
|
uint8_t s_arrmul24_fa5_3_or0 = 0;
|
|
uint8_t s_arrmul24_and6_3 = 0;
|
|
uint8_t s_arrmul24_fa6_3_xor0 = 0;
|
|
uint8_t s_arrmul24_fa6_3_and0 = 0;
|
|
uint8_t s_arrmul24_fa6_3_xor1 = 0;
|
|
uint8_t s_arrmul24_fa6_3_and1 = 0;
|
|
uint8_t s_arrmul24_fa6_3_or0 = 0;
|
|
uint8_t s_arrmul24_and7_3 = 0;
|
|
uint8_t s_arrmul24_fa7_3_xor0 = 0;
|
|
uint8_t s_arrmul24_fa7_3_and0 = 0;
|
|
uint8_t s_arrmul24_fa7_3_xor1 = 0;
|
|
uint8_t s_arrmul24_fa7_3_and1 = 0;
|
|
uint8_t s_arrmul24_fa7_3_or0 = 0;
|
|
uint8_t s_arrmul24_and8_3 = 0;
|
|
uint8_t s_arrmul24_fa8_3_xor0 = 0;
|
|
uint8_t s_arrmul24_fa8_3_and0 = 0;
|
|
uint8_t s_arrmul24_fa8_3_xor1 = 0;
|
|
uint8_t s_arrmul24_fa8_3_and1 = 0;
|
|
uint8_t s_arrmul24_fa8_3_or0 = 0;
|
|
uint8_t s_arrmul24_and9_3 = 0;
|
|
uint8_t s_arrmul24_fa9_3_xor0 = 0;
|
|
uint8_t s_arrmul24_fa9_3_and0 = 0;
|
|
uint8_t s_arrmul24_fa9_3_xor1 = 0;
|
|
uint8_t s_arrmul24_fa9_3_and1 = 0;
|
|
uint8_t s_arrmul24_fa9_3_or0 = 0;
|
|
uint8_t s_arrmul24_and10_3 = 0;
|
|
uint8_t s_arrmul24_fa10_3_xor0 = 0;
|
|
uint8_t s_arrmul24_fa10_3_and0 = 0;
|
|
uint8_t s_arrmul24_fa10_3_xor1 = 0;
|
|
uint8_t s_arrmul24_fa10_3_and1 = 0;
|
|
uint8_t s_arrmul24_fa10_3_or0 = 0;
|
|
uint8_t s_arrmul24_and11_3 = 0;
|
|
uint8_t s_arrmul24_fa11_3_xor0 = 0;
|
|
uint8_t s_arrmul24_fa11_3_and0 = 0;
|
|
uint8_t s_arrmul24_fa11_3_xor1 = 0;
|
|
uint8_t s_arrmul24_fa11_3_and1 = 0;
|
|
uint8_t s_arrmul24_fa11_3_or0 = 0;
|
|
uint8_t s_arrmul24_and12_3 = 0;
|
|
uint8_t s_arrmul24_fa12_3_xor0 = 0;
|
|
uint8_t s_arrmul24_fa12_3_and0 = 0;
|
|
uint8_t s_arrmul24_fa12_3_xor1 = 0;
|
|
uint8_t s_arrmul24_fa12_3_and1 = 0;
|
|
uint8_t s_arrmul24_fa12_3_or0 = 0;
|
|
uint8_t s_arrmul24_and13_3 = 0;
|
|
uint8_t s_arrmul24_fa13_3_xor0 = 0;
|
|
uint8_t s_arrmul24_fa13_3_and0 = 0;
|
|
uint8_t s_arrmul24_fa13_3_xor1 = 0;
|
|
uint8_t s_arrmul24_fa13_3_and1 = 0;
|
|
uint8_t s_arrmul24_fa13_3_or0 = 0;
|
|
uint8_t s_arrmul24_and14_3 = 0;
|
|
uint8_t s_arrmul24_fa14_3_xor0 = 0;
|
|
uint8_t s_arrmul24_fa14_3_and0 = 0;
|
|
uint8_t s_arrmul24_fa14_3_xor1 = 0;
|
|
uint8_t s_arrmul24_fa14_3_and1 = 0;
|
|
uint8_t s_arrmul24_fa14_3_or0 = 0;
|
|
uint8_t s_arrmul24_and15_3 = 0;
|
|
uint8_t s_arrmul24_fa15_3_xor0 = 0;
|
|
uint8_t s_arrmul24_fa15_3_and0 = 0;
|
|
uint8_t s_arrmul24_fa15_3_xor1 = 0;
|
|
uint8_t s_arrmul24_fa15_3_and1 = 0;
|
|
uint8_t s_arrmul24_fa15_3_or0 = 0;
|
|
uint8_t s_arrmul24_and16_3 = 0;
|
|
uint8_t s_arrmul24_fa16_3_xor0 = 0;
|
|
uint8_t s_arrmul24_fa16_3_and0 = 0;
|
|
uint8_t s_arrmul24_fa16_3_xor1 = 0;
|
|
uint8_t s_arrmul24_fa16_3_and1 = 0;
|
|
uint8_t s_arrmul24_fa16_3_or0 = 0;
|
|
uint8_t s_arrmul24_and17_3 = 0;
|
|
uint8_t s_arrmul24_fa17_3_xor0 = 0;
|
|
uint8_t s_arrmul24_fa17_3_and0 = 0;
|
|
uint8_t s_arrmul24_fa17_3_xor1 = 0;
|
|
uint8_t s_arrmul24_fa17_3_and1 = 0;
|
|
uint8_t s_arrmul24_fa17_3_or0 = 0;
|
|
uint8_t s_arrmul24_and18_3 = 0;
|
|
uint8_t s_arrmul24_fa18_3_xor0 = 0;
|
|
uint8_t s_arrmul24_fa18_3_and0 = 0;
|
|
uint8_t s_arrmul24_fa18_3_xor1 = 0;
|
|
uint8_t s_arrmul24_fa18_3_and1 = 0;
|
|
uint8_t s_arrmul24_fa18_3_or0 = 0;
|
|
uint8_t s_arrmul24_and19_3 = 0;
|
|
uint8_t s_arrmul24_fa19_3_xor0 = 0;
|
|
uint8_t s_arrmul24_fa19_3_and0 = 0;
|
|
uint8_t s_arrmul24_fa19_3_xor1 = 0;
|
|
uint8_t s_arrmul24_fa19_3_and1 = 0;
|
|
uint8_t s_arrmul24_fa19_3_or0 = 0;
|
|
uint8_t s_arrmul24_and20_3 = 0;
|
|
uint8_t s_arrmul24_fa20_3_xor0 = 0;
|
|
uint8_t s_arrmul24_fa20_3_and0 = 0;
|
|
uint8_t s_arrmul24_fa20_3_xor1 = 0;
|
|
uint8_t s_arrmul24_fa20_3_and1 = 0;
|
|
uint8_t s_arrmul24_fa20_3_or0 = 0;
|
|
uint8_t s_arrmul24_and21_3 = 0;
|
|
uint8_t s_arrmul24_fa21_3_xor0 = 0;
|
|
uint8_t s_arrmul24_fa21_3_and0 = 0;
|
|
uint8_t s_arrmul24_fa21_3_xor1 = 0;
|
|
uint8_t s_arrmul24_fa21_3_and1 = 0;
|
|
uint8_t s_arrmul24_fa21_3_or0 = 0;
|
|
uint8_t s_arrmul24_and22_3 = 0;
|
|
uint8_t s_arrmul24_fa22_3_xor0 = 0;
|
|
uint8_t s_arrmul24_fa22_3_and0 = 0;
|
|
uint8_t s_arrmul24_fa22_3_xor1 = 0;
|
|
uint8_t s_arrmul24_fa22_3_and1 = 0;
|
|
uint8_t s_arrmul24_fa22_3_or0 = 0;
|
|
uint8_t s_arrmul24_nand23_3 = 0;
|
|
uint8_t s_arrmul24_fa23_3_xor0 = 0;
|
|
uint8_t s_arrmul24_fa23_3_and0 = 0;
|
|
uint8_t s_arrmul24_fa23_3_xor1 = 0;
|
|
uint8_t s_arrmul24_fa23_3_and1 = 0;
|
|
uint8_t s_arrmul24_fa23_3_or0 = 0;
|
|
uint8_t s_arrmul24_and0_4 = 0;
|
|
uint8_t s_arrmul24_ha0_4_xor0 = 0;
|
|
uint8_t s_arrmul24_ha0_4_and0 = 0;
|
|
uint8_t s_arrmul24_and1_4 = 0;
|
|
uint8_t s_arrmul24_fa1_4_xor0 = 0;
|
|
uint8_t s_arrmul24_fa1_4_and0 = 0;
|
|
uint8_t s_arrmul24_fa1_4_xor1 = 0;
|
|
uint8_t s_arrmul24_fa1_4_and1 = 0;
|
|
uint8_t s_arrmul24_fa1_4_or0 = 0;
|
|
uint8_t s_arrmul24_and2_4 = 0;
|
|
uint8_t s_arrmul24_fa2_4_xor0 = 0;
|
|
uint8_t s_arrmul24_fa2_4_and0 = 0;
|
|
uint8_t s_arrmul24_fa2_4_xor1 = 0;
|
|
uint8_t s_arrmul24_fa2_4_and1 = 0;
|
|
uint8_t s_arrmul24_fa2_4_or0 = 0;
|
|
uint8_t s_arrmul24_and3_4 = 0;
|
|
uint8_t s_arrmul24_fa3_4_xor0 = 0;
|
|
uint8_t s_arrmul24_fa3_4_and0 = 0;
|
|
uint8_t s_arrmul24_fa3_4_xor1 = 0;
|
|
uint8_t s_arrmul24_fa3_4_and1 = 0;
|
|
uint8_t s_arrmul24_fa3_4_or0 = 0;
|
|
uint8_t s_arrmul24_and4_4 = 0;
|
|
uint8_t s_arrmul24_fa4_4_xor0 = 0;
|
|
uint8_t s_arrmul24_fa4_4_and0 = 0;
|
|
uint8_t s_arrmul24_fa4_4_xor1 = 0;
|
|
uint8_t s_arrmul24_fa4_4_and1 = 0;
|
|
uint8_t s_arrmul24_fa4_4_or0 = 0;
|
|
uint8_t s_arrmul24_and5_4 = 0;
|
|
uint8_t s_arrmul24_fa5_4_xor0 = 0;
|
|
uint8_t s_arrmul24_fa5_4_and0 = 0;
|
|
uint8_t s_arrmul24_fa5_4_xor1 = 0;
|
|
uint8_t s_arrmul24_fa5_4_and1 = 0;
|
|
uint8_t s_arrmul24_fa5_4_or0 = 0;
|
|
uint8_t s_arrmul24_and6_4 = 0;
|
|
uint8_t s_arrmul24_fa6_4_xor0 = 0;
|
|
uint8_t s_arrmul24_fa6_4_and0 = 0;
|
|
uint8_t s_arrmul24_fa6_4_xor1 = 0;
|
|
uint8_t s_arrmul24_fa6_4_and1 = 0;
|
|
uint8_t s_arrmul24_fa6_4_or0 = 0;
|
|
uint8_t s_arrmul24_and7_4 = 0;
|
|
uint8_t s_arrmul24_fa7_4_xor0 = 0;
|
|
uint8_t s_arrmul24_fa7_4_and0 = 0;
|
|
uint8_t s_arrmul24_fa7_4_xor1 = 0;
|
|
uint8_t s_arrmul24_fa7_4_and1 = 0;
|
|
uint8_t s_arrmul24_fa7_4_or0 = 0;
|
|
uint8_t s_arrmul24_and8_4 = 0;
|
|
uint8_t s_arrmul24_fa8_4_xor0 = 0;
|
|
uint8_t s_arrmul24_fa8_4_and0 = 0;
|
|
uint8_t s_arrmul24_fa8_4_xor1 = 0;
|
|
uint8_t s_arrmul24_fa8_4_and1 = 0;
|
|
uint8_t s_arrmul24_fa8_4_or0 = 0;
|
|
uint8_t s_arrmul24_and9_4 = 0;
|
|
uint8_t s_arrmul24_fa9_4_xor0 = 0;
|
|
uint8_t s_arrmul24_fa9_4_and0 = 0;
|
|
uint8_t s_arrmul24_fa9_4_xor1 = 0;
|
|
uint8_t s_arrmul24_fa9_4_and1 = 0;
|
|
uint8_t s_arrmul24_fa9_4_or0 = 0;
|
|
uint8_t s_arrmul24_and10_4 = 0;
|
|
uint8_t s_arrmul24_fa10_4_xor0 = 0;
|
|
uint8_t s_arrmul24_fa10_4_and0 = 0;
|
|
uint8_t s_arrmul24_fa10_4_xor1 = 0;
|
|
uint8_t s_arrmul24_fa10_4_and1 = 0;
|
|
uint8_t s_arrmul24_fa10_4_or0 = 0;
|
|
uint8_t s_arrmul24_and11_4 = 0;
|
|
uint8_t s_arrmul24_fa11_4_xor0 = 0;
|
|
uint8_t s_arrmul24_fa11_4_and0 = 0;
|
|
uint8_t s_arrmul24_fa11_4_xor1 = 0;
|
|
uint8_t s_arrmul24_fa11_4_and1 = 0;
|
|
uint8_t s_arrmul24_fa11_4_or0 = 0;
|
|
uint8_t s_arrmul24_and12_4 = 0;
|
|
uint8_t s_arrmul24_fa12_4_xor0 = 0;
|
|
uint8_t s_arrmul24_fa12_4_and0 = 0;
|
|
uint8_t s_arrmul24_fa12_4_xor1 = 0;
|
|
uint8_t s_arrmul24_fa12_4_and1 = 0;
|
|
uint8_t s_arrmul24_fa12_4_or0 = 0;
|
|
uint8_t s_arrmul24_and13_4 = 0;
|
|
uint8_t s_arrmul24_fa13_4_xor0 = 0;
|
|
uint8_t s_arrmul24_fa13_4_and0 = 0;
|
|
uint8_t s_arrmul24_fa13_4_xor1 = 0;
|
|
uint8_t s_arrmul24_fa13_4_and1 = 0;
|
|
uint8_t s_arrmul24_fa13_4_or0 = 0;
|
|
uint8_t s_arrmul24_and14_4 = 0;
|
|
uint8_t s_arrmul24_fa14_4_xor0 = 0;
|
|
uint8_t s_arrmul24_fa14_4_and0 = 0;
|
|
uint8_t s_arrmul24_fa14_4_xor1 = 0;
|
|
uint8_t s_arrmul24_fa14_4_and1 = 0;
|
|
uint8_t s_arrmul24_fa14_4_or0 = 0;
|
|
uint8_t s_arrmul24_and15_4 = 0;
|
|
uint8_t s_arrmul24_fa15_4_xor0 = 0;
|
|
uint8_t s_arrmul24_fa15_4_and0 = 0;
|
|
uint8_t s_arrmul24_fa15_4_xor1 = 0;
|
|
uint8_t s_arrmul24_fa15_4_and1 = 0;
|
|
uint8_t s_arrmul24_fa15_4_or0 = 0;
|
|
uint8_t s_arrmul24_and16_4 = 0;
|
|
uint8_t s_arrmul24_fa16_4_xor0 = 0;
|
|
uint8_t s_arrmul24_fa16_4_and0 = 0;
|
|
uint8_t s_arrmul24_fa16_4_xor1 = 0;
|
|
uint8_t s_arrmul24_fa16_4_and1 = 0;
|
|
uint8_t s_arrmul24_fa16_4_or0 = 0;
|
|
uint8_t s_arrmul24_and17_4 = 0;
|
|
uint8_t s_arrmul24_fa17_4_xor0 = 0;
|
|
uint8_t s_arrmul24_fa17_4_and0 = 0;
|
|
uint8_t s_arrmul24_fa17_4_xor1 = 0;
|
|
uint8_t s_arrmul24_fa17_4_and1 = 0;
|
|
uint8_t s_arrmul24_fa17_4_or0 = 0;
|
|
uint8_t s_arrmul24_and18_4 = 0;
|
|
uint8_t s_arrmul24_fa18_4_xor0 = 0;
|
|
uint8_t s_arrmul24_fa18_4_and0 = 0;
|
|
uint8_t s_arrmul24_fa18_4_xor1 = 0;
|
|
uint8_t s_arrmul24_fa18_4_and1 = 0;
|
|
uint8_t s_arrmul24_fa18_4_or0 = 0;
|
|
uint8_t s_arrmul24_and19_4 = 0;
|
|
uint8_t s_arrmul24_fa19_4_xor0 = 0;
|
|
uint8_t s_arrmul24_fa19_4_and0 = 0;
|
|
uint8_t s_arrmul24_fa19_4_xor1 = 0;
|
|
uint8_t s_arrmul24_fa19_4_and1 = 0;
|
|
uint8_t s_arrmul24_fa19_4_or0 = 0;
|
|
uint8_t s_arrmul24_and20_4 = 0;
|
|
uint8_t s_arrmul24_fa20_4_xor0 = 0;
|
|
uint8_t s_arrmul24_fa20_4_and0 = 0;
|
|
uint8_t s_arrmul24_fa20_4_xor1 = 0;
|
|
uint8_t s_arrmul24_fa20_4_and1 = 0;
|
|
uint8_t s_arrmul24_fa20_4_or0 = 0;
|
|
uint8_t s_arrmul24_and21_4 = 0;
|
|
uint8_t s_arrmul24_fa21_4_xor0 = 0;
|
|
uint8_t s_arrmul24_fa21_4_and0 = 0;
|
|
uint8_t s_arrmul24_fa21_4_xor1 = 0;
|
|
uint8_t s_arrmul24_fa21_4_and1 = 0;
|
|
uint8_t s_arrmul24_fa21_4_or0 = 0;
|
|
uint8_t s_arrmul24_and22_4 = 0;
|
|
uint8_t s_arrmul24_fa22_4_xor0 = 0;
|
|
uint8_t s_arrmul24_fa22_4_and0 = 0;
|
|
uint8_t s_arrmul24_fa22_4_xor1 = 0;
|
|
uint8_t s_arrmul24_fa22_4_and1 = 0;
|
|
uint8_t s_arrmul24_fa22_4_or0 = 0;
|
|
uint8_t s_arrmul24_nand23_4 = 0;
|
|
uint8_t s_arrmul24_fa23_4_xor0 = 0;
|
|
uint8_t s_arrmul24_fa23_4_and0 = 0;
|
|
uint8_t s_arrmul24_fa23_4_xor1 = 0;
|
|
uint8_t s_arrmul24_fa23_4_and1 = 0;
|
|
uint8_t s_arrmul24_fa23_4_or0 = 0;
|
|
uint8_t s_arrmul24_and0_5 = 0;
|
|
uint8_t s_arrmul24_ha0_5_xor0 = 0;
|
|
uint8_t s_arrmul24_ha0_5_and0 = 0;
|
|
uint8_t s_arrmul24_and1_5 = 0;
|
|
uint8_t s_arrmul24_fa1_5_xor0 = 0;
|
|
uint8_t s_arrmul24_fa1_5_and0 = 0;
|
|
uint8_t s_arrmul24_fa1_5_xor1 = 0;
|
|
uint8_t s_arrmul24_fa1_5_and1 = 0;
|
|
uint8_t s_arrmul24_fa1_5_or0 = 0;
|
|
uint8_t s_arrmul24_and2_5 = 0;
|
|
uint8_t s_arrmul24_fa2_5_xor0 = 0;
|
|
uint8_t s_arrmul24_fa2_5_and0 = 0;
|
|
uint8_t s_arrmul24_fa2_5_xor1 = 0;
|
|
uint8_t s_arrmul24_fa2_5_and1 = 0;
|
|
uint8_t s_arrmul24_fa2_5_or0 = 0;
|
|
uint8_t s_arrmul24_and3_5 = 0;
|
|
uint8_t s_arrmul24_fa3_5_xor0 = 0;
|
|
uint8_t s_arrmul24_fa3_5_and0 = 0;
|
|
uint8_t s_arrmul24_fa3_5_xor1 = 0;
|
|
uint8_t s_arrmul24_fa3_5_and1 = 0;
|
|
uint8_t s_arrmul24_fa3_5_or0 = 0;
|
|
uint8_t s_arrmul24_and4_5 = 0;
|
|
uint8_t s_arrmul24_fa4_5_xor0 = 0;
|
|
uint8_t s_arrmul24_fa4_5_and0 = 0;
|
|
uint8_t s_arrmul24_fa4_5_xor1 = 0;
|
|
uint8_t s_arrmul24_fa4_5_and1 = 0;
|
|
uint8_t s_arrmul24_fa4_5_or0 = 0;
|
|
uint8_t s_arrmul24_and5_5 = 0;
|
|
uint8_t s_arrmul24_fa5_5_xor0 = 0;
|
|
uint8_t s_arrmul24_fa5_5_and0 = 0;
|
|
uint8_t s_arrmul24_fa5_5_xor1 = 0;
|
|
uint8_t s_arrmul24_fa5_5_and1 = 0;
|
|
uint8_t s_arrmul24_fa5_5_or0 = 0;
|
|
uint8_t s_arrmul24_and6_5 = 0;
|
|
uint8_t s_arrmul24_fa6_5_xor0 = 0;
|
|
uint8_t s_arrmul24_fa6_5_and0 = 0;
|
|
uint8_t s_arrmul24_fa6_5_xor1 = 0;
|
|
uint8_t s_arrmul24_fa6_5_and1 = 0;
|
|
uint8_t s_arrmul24_fa6_5_or0 = 0;
|
|
uint8_t s_arrmul24_and7_5 = 0;
|
|
uint8_t s_arrmul24_fa7_5_xor0 = 0;
|
|
uint8_t s_arrmul24_fa7_5_and0 = 0;
|
|
uint8_t s_arrmul24_fa7_5_xor1 = 0;
|
|
uint8_t s_arrmul24_fa7_5_and1 = 0;
|
|
uint8_t s_arrmul24_fa7_5_or0 = 0;
|
|
uint8_t s_arrmul24_and8_5 = 0;
|
|
uint8_t s_arrmul24_fa8_5_xor0 = 0;
|
|
uint8_t s_arrmul24_fa8_5_and0 = 0;
|
|
uint8_t s_arrmul24_fa8_5_xor1 = 0;
|
|
uint8_t s_arrmul24_fa8_5_and1 = 0;
|
|
uint8_t s_arrmul24_fa8_5_or0 = 0;
|
|
uint8_t s_arrmul24_and9_5 = 0;
|
|
uint8_t s_arrmul24_fa9_5_xor0 = 0;
|
|
uint8_t s_arrmul24_fa9_5_and0 = 0;
|
|
uint8_t s_arrmul24_fa9_5_xor1 = 0;
|
|
uint8_t s_arrmul24_fa9_5_and1 = 0;
|
|
uint8_t s_arrmul24_fa9_5_or0 = 0;
|
|
uint8_t s_arrmul24_and10_5 = 0;
|
|
uint8_t s_arrmul24_fa10_5_xor0 = 0;
|
|
uint8_t s_arrmul24_fa10_5_and0 = 0;
|
|
uint8_t s_arrmul24_fa10_5_xor1 = 0;
|
|
uint8_t s_arrmul24_fa10_5_and1 = 0;
|
|
uint8_t s_arrmul24_fa10_5_or0 = 0;
|
|
uint8_t s_arrmul24_and11_5 = 0;
|
|
uint8_t s_arrmul24_fa11_5_xor0 = 0;
|
|
uint8_t s_arrmul24_fa11_5_and0 = 0;
|
|
uint8_t s_arrmul24_fa11_5_xor1 = 0;
|
|
uint8_t s_arrmul24_fa11_5_and1 = 0;
|
|
uint8_t s_arrmul24_fa11_5_or0 = 0;
|
|
uint8_t s_arrmul24_and12_5 = 0;
|
|
uint8_t s_arrmul24_fa12_5_xor0 = 0;
|
|
uint8_t s_arrmul24_fa12_5_and0 = 0;
|
|
uint8_t s_arrmul24_fa12_5_xor1 = 0;
|
|
uint8_t s_arrmul24_fa12_5_and1 = 0;
|
|
uint8_t s_arrmul24_fa12_5_or0 = 0;
|
|
uint8_t s_arrmul24_and13_5 = 0;
|
|
uint8_t s_arrmul24_fa13_5_xor0 = 0;
|
|
uint8_t s_arrmul24_fa13_5_and0 = 0;
|
|
uint8_t s_arrmul24_fa13_5_xor1 = 0;
|
|
uint8_t s_arrmul24_fa13_5_and1 = 0;
|
|
uint8_t s_arrmul24_fa13_5_or0 = 0;
|
|
uint8_t s_arrmul24_and14_5 = 0;
|
|
uint8_t s_arrmul24_fa14_5_xor0 = 0;
|
|
uint8_t s_arrmul24_fa14_5_and0 = 0;
|
|
uint8_t s_arrmul24_fa14_5_xor1 = 0;
|
|
uint8_t s_arrmul24_fa14_5_and1 = 0;
|
|
uint8_t s_arrmul24_fa14_5_or0 = 0;
|
|
uint8_t s_arrmul24_and15_5 = 0;
|
|
uint8_t s_arrmul24_fa15_5_xor0 = 0;
|
|
uint8_t s_arrmul24_fa15_5_and0 = 0;
|
|
uint8_t s_arrmul24_fa15_5_xor1 = 0;
|
|
uint8_t s_arrmul24_fa15_5_and1 = 0;
|
|
uint8_t s_arrmul24_fa15_5_or0 = 0;
|
|
uint8_t s_arrmul24_and16_5 = 0;
|
|
uint8_t s_arrmul24_fa16_5_xor0 = 0;
|
|
uint8_t s_arrmul24_fa16_5_and0 = 0;
|
|
uint8_t s_arrmul24_fa16_5_xor1 = 0;
|
|
uint8_t s_arrmul24_fa16_5_and1 = 0;
|
|
uint8_t s_arrmul24_fa16_5_or0 = 0;
|
|
uint8_t s_arrmul24_and17_5 = 0;
|
|
uint8_t s_arrmul24_fa17_5_xor0 = 0;
|
|
uint8_t s_arrmul24_fa17_5_and0 = 0;
|
|
uint8_t s_arrmul24_fa17_5_xor1 = 0;
|
|
uint8_t s_arrmul24_fa17_5_and1 = 0;
|
|
uint8_t s_arrmul24_fa17_5_or0 = 0;
|
|
uint8_t s_arrmul24_and18_5 = 0;
|
|
uint8_t s_arrmul24_fa18_5_xor0 = 0;
|
|
uint8_t s_arrmul24_fa18_5_and0 = 0;
|
|
uint8_t s_arrmul24_fa18_5_xor1 = 0;
|
|
uint8_t s_arrmul24_fa18_5_and1 = 0;
|
|
uint8_t s_arrmul24_fa18_5_or0 = 0;
|
|
uint8_t s_arrmul24_and19_5 = 0;
|
|
uint8_t s_arrmul24_fa19_5_xor0 = 0;
|
|
uint8_t s_arrmul24_fa19_5_and0 = 0;
|
|
uint8_t s_arrmul24_fa19_5_xor1 = 0;
|
|
uint8_t s_arrmul24_fa19_5_and1 = 0;
|
|
uint8_t s_arrmul24_fa19_5_or0 = 0;
|
|
uint8_t s_arrmul24_and20_5 = 0;
|
|
uint8_t s_arrmul24_fa20_5_xor0 = 0;
|
|
uint8_t s_arrmul24_fa20_5_and0 = 0;
|
|
uint8_t s_arrmul24_fa20_5_xor1 = 0;
|
|
uint8_t s_arrmul24_fa20_5_and1 = 0;
|
|
uint8_t s_arrmul24_fa20_5_or0 = 0;
|
|
uint8_t s_arrmul24_and21_5 = 0;
|
|
uint8_t s_arrmul24_fa21_5_xor0 = 0;
|
|
uint8_t s_arrmul24_fa21_5_and0 = 0;
|
|
uint8_t s_arrmul24_fa21_5_xor1 = 0;
|
|
uint8_t s_arrmul24_fa21_5_and1 = 0;
|
|
uint8_t s_arrmul24_fa21_5_or0 = 0;
|
|
uint8_t s_arrmul24_and22_5 = 0;
|
|
uint8_t s_arrmul24_fa22_5_xor0 = 0;
|
|
uint8_t s_arrmul24_fa22_5_and0 = 0;
|
|
uint8_t s_arrmul24_fa22_5_xor1 = 0;
|
|
uint8_t s_arrmul24_fa22_5_and1 = 0;
|
|
uint8_t s_arrmul24_fa22_5_or0 = 0;
|
|
uint8_t s_arrmul24_nand23_5 = 0;
|
|
uint8_t s_arrmul24_fa23_5_xor0 = 0;
|
|
uint8_t s_arrmul24_fa23_5_and0 = 0;
|
|
uint8_t s_arrmul24_fa23_5_xor1 = 0;
|
|
uint8_t s_arrmul24_fa23_5_and1 = 0;
|
|
uint8_t s_arrmul24_fa23_5_or0 = 0;
|
|
uint8_t s_arrmul24_and0_6 = 0;
|
|
uint8_t s_arrmul24_ha0_6_xor0 = 0;
|
|
uint8_t s_arrmul24_ha0_6_and0 = 0;
|
|
uint8_t s_arrmul24_and1_6 = 0;
|
|
uint8_t s_arrmul24_fa1_6_xor0 = 0;
|
|
uint8_t s_arrmul24_fa1_6_and0 = 0;
|
|
uint8_t s_arrmul24_fa1_6_xor1 = 0;
|
|
uint8_t s_arrmul24_fa1_6_and1 = 0;
|
|
uint8_t s_arrmul24_fa1_6_or0 = 0;
|
|
uint8_t s_arrmul24_and2_6 = 0;
|
|
uint8_t s_arrmul24_fa2_6_xor0 = 0;
|
|
uint8_t s_arrmul24_fa2_6_and0 = 0;
|
|
uint8_t s_arrmul24_fa2_6_xor1 = 0;
|
|
uint8_t s_arrmul24_fa2_6_and1 = 0;
|
|
uint8_t s_arrmul24_fa2_6_or0 = 0;
|
|
uint8_t s_arrmul24_and3_6 = 0;
|
|
uint8_t s_arrmul24_fa3_6_xor0 = 0;
|
|
uint8_t s_arrmul24_fa3_6_and0 = 0;
|
|
uint8_t s_arrmul24_fa3_6_xor1 = 0;
|
|
uint8_t s_arrmul24_fa3_6_and1 = 0;
|
|
uint8_t s_arrmul24_fa3_6_or0 = 0;
|
|
uint8_t s_arrmul24_and4_6 = 0;
|
|
uint8_t s_arrmul24_fa4_6_xor0 = 0;
|
|
uint8_t s_arrmul24_fa4_6_and0 = 0;
|
|
uint8_t s_arrmul24_fa4_6_xor1 = 0;
|
|
uint8_t s_arrmul24_fa4_6_and1 = 0;
|
|
uint8_t s_arrmul24_fa4_6_or0 = 0;
|
|
uint8_t s_arrmul24_and5_6 = 0;
|
|
uint8_t s_arrmul24_fa5_6_xor0 = 0;
|
|
uint8_t s_arrmul24_fa5_6_and0 = 0;
|
|
uint8_t s_arrmul24_fa5_6_xor1 = 0;
|
|
uint8_t s_arrmul24_fa5_6_and1 = 0;
|
|
uint8_t s_arrmul24_fa5_6_or0 = 0;
|
|
uint8_t s_arrmul24_and6_6 = 0;
|
|
uint8_t s_arrmul24_fa6_6_xor0 = 0;
|
|
uint8_t s_arrmul24_fa6_6_and0 = 0;
|
|
uint8_t s_arrmul24_fa6_6_xor1 = 0;
|
|
uint8_t s_arrmul24_fa6_6_and1 = 0;
|
|
uint8_t s_arrmul24_fa6_6_or0 = 0;
|
|
uint8_t s_arrmul24_and7_6 = 0;
|
|
uint8_t s_arrmul24_fa7_6_xor0 = 0;
|
|
uint8_t s_arrmul24_fa7_6_and0 = 0;
|
|
uint8_t s_arrmul24_fa7_6_xor1 = 0;
|
|
uint8_t s_arrmul24_fa7_6_and1 = 0;
|
|
uint8_t s_arrmul24_fa7_6_or0 = 0;
|
|
uint8_t s_arrmul24_and8_6 = 0;
|
|
uint8_t s_arrmul24_fa8_6_xor0 = 0;
|
|
uint8_t s_arrmul24_fa8_6_and0 = 0;
|
|
uint8_t s_arrmul24_fa8_6_xor1 = 0;
|
|
uint8_t s_arrmul24_fa8_6_and1 = 0;
|
|
uint8_t s_arrmul24_fa8_6_or0 = 0;
|
|
uint8_t s_arrmul24_and9_6 = 0;
|
|
uint8_t s_arrmul24_fa9_6_xor0 = 0;
|
|
uint8_t s_arrmul24_fa9_6_and0 = 0;
|
|
uint8_t s_arrmul24_fa9_6_xor1 = 0;
|
|
uint8_t s_arrmul24_fa9_6_and1 = 0;
|
|
uint8_t s_arrmul24_fa9_6_or0 = 0;
|
|
uint8_t s_arrmul24_and10_6 = 0;
|
|
uint8_t s_arrmul24_fa10_6_xor0 = 0;
|
|
uint8_t s_arrmul24_fa10_6_and0 = 0;
|
|
uint8_t s_arrmul24_fa10_6_xor1 = 0;
|
|
uint8_t s_arrmul24_fa10_6_and1 = 0;
|
|
uint8_t s_arrmul24_fa10_6_or0 = 0;
|
|
uint8_t s_arrmul24_and11_6 = 0;
|
|
uint8_t s_arrmul24_fa11_6_xor0 = 0;
|
|
uint8_t s_arrmul24_fa11_6_and0 = 0;
|
|
uint8_t s_arrmul24_fa11_6_xor1 = 0;
|
|
uint8_t s_arrmul24_fa11_6_and1 = 0;
|
|
uint8_t s_arrmul24_fa11_6_or0 = 0;
|
|
uint8_t s_arrmul24_and12_6 = 0;
|
|
uint8_t s_arrmul24_fa12_6_xor0 = 0;
|
|
uint8_t s_arrmul24_fa12_6_and0 = 0;
|
|
uint8_t s_arrmul24_fa12_6_xor1 = 0;
|
|
uint8_t s_arrmul24_fa12_6_and1 = 0;
|
|
uint8_t s_arrmul24_fa12_6_or0 = 0;
|
|
uint8_t s_arrmul24_and13_6 = 0;
|
|
uint8_t s_arrmul24_fa13_6_xor0 = 0;
|
|
uint8_t s_arrmul24_fa13_6_and0 = 0;
|
|
uint8_t s_arrmul24_fa13_6_xor1 = 0;
|
|
uint8_t s_arrmul24_fa13_6_and1 = 0;
|
|
uint8_t s_arrmul24_fa13_6_or0 = 0;
|
|
uint8_t s_arrmul24_and14_6 = 0;
|
|
uint8_t s_arrmul24_fa14_6_xor0 = 0;
|
|
uint8_t s_arrmul24_fa14_6_and0 = 0;
|
|
uint8_t s_arrmul24_fa14_6_xor1 = 0;
|
|
uint8_t s_arrmul24_fa14_6_and1 = 0;
|
|
uint8_t s_arrmul24_fa14_6_or0 = 0;
|
|
uint8_t s_arrmul24_and15_6 = 0;
|
|
uint8_t s_arrmul24_fa15_6_xor0 = 0;
|
|
uint8_t s_arrmul24_fa15_6_and0 = 0;
|
|
uint8_t s_arrmul24_fa15_6_xor1 = 0;
|
|
uint8_t s_arrmul24_fa15_6_and1 = 0;
|
|
uint8_t s_arrmul24_fa15_6_or0 = 0;
|
|
uint8_t s_arrmul24_and16_6 = 0;
|
|
uint8_t s_arrmul24_fa16_6_xor0 = 0;
|
|
uint8_t s_arrmul24_fa16_6_and0 = 0;
|
|
uint8_t s_arrmul24_fa16_6_xor1 = 0;
|
|
uint8_t s_arrmul24_fa16_6_and1 = 0;
|
|
uint8_t s_arrmul24_fa16_6_or0 = 0;
|
|
uint8_t s_arrmul24_and17_6 = 0;
|
|
uint8_t s_arrmul24_fa17_6_xor0 = 0;
|
|
uint8_t s_arrmul24_fa17_6_and0 = 0;
|
|
uint8_t s_arrmul24_fa17_6_xor1 = 0;
|
|
uint8_t s_arrmul24_fa17_6_and1 = 0;
|
|
uint8_t s_arrmul24_fa17_6_or0 = 0;
|
|
uint8_t s_arrmul24_and18_6 = 0;
|
|
uint8_t s_arrmul24_fa18_6_xor0 = 0;
|
|
uint8_t s_arrmul24_fa18_6_and0 = 0;
|
|
uint8_t s_arrmul24_fa18_6_xor1 = 0;
|
|
uint8_t s_arrmul24_fa18_6_and1 = 0;
|
|
uint8_t s_arrmul24_fa18_6_or0 = 0;
|
|
uint8_t s_arrmul24_and19_6 = 0;
|
|
uint8_t s_arrmul24_fa19_6_xor0 = 0;
|
|
uint8_t s_arrmul24_fa19_6_and0 = 0;
|
|
uint8_t s_arrmul24_fa19_6_xor1 = 0;
|
|
uint8_t s_arrmul24_fa19_6_and1 = 0;
|
|
uint8_t s_arrmul24_fa19_6_or0 = 0;
|
|
uint8_t s_arrmul24_and20_6 = 0;
|
|
uint8_t s_arrmul24_fa20_6_xor0 = 0;
|
|
uint8_t s_arrmul24_fa20_6_and0 = 0;
|
|
uint8_t s_arrmul24_fa20_6_xor1 = 0;
|
|
uint8_t s_arrmul24_fa20_6_and1 = 0;
|
|
uint8_t s_arrmul24_fa20_6_or0 = 0;
|
|
uint8_t s_arrmul24_and21_6 = 0;
|
|
uint8_t s_arrmul24_fa21_6_xor0 = 0;
|
|
uint8_t s_arrmul24_fa21_6_and0 = 0;
|
|
uint8_t s_arrmul24_fa21_6_xor1 = 0;
|
|
uint8_t s_arrmul24_fa21_6_and1 = 0;
|
|
uint8_t s_arrmul24_fa21_6_or0 = 0;
|
|
uint8_t s_arrmul24_and22_6 = 0;
|
|
uint8_t s_arrmul24_fa22_6_xor0 = 0;
|
|
uint8_t s_arrmul24_fa22_6_and0 = 0;
|
|
uint8_t s_arrmul24_fa22_6_xor1 = 0;
|
|
uint8_t s_arrmul24_fa22_6_and1 = 0;
|
|
uint8_t s_arrmul24_fa22_6_or0 = 0;
|
|
uint8_t s_arrmul24_nand23_6 = 0;
|
|
uint8_t s_arrmul24_fa23_6_xor0 = 0;
|
|
uint8_t s_arrmul24_fa23_6_and0 = 0;
|
|
uint8_t s_arrmul24_fa23_6_xor1 = 0;
|
|
uint8_t s_arrmul24_fa23_6_and1 = 0;
|
|
uint8_t s_arrmul24_fa23_6_or0 = 0;
|
|
uint8_t s_arrmul24_and0_7 = 0;
|
|
uint8_t s_arrmul24_ha0_7_xor0 = 0;
|
|
uint8_t s_arrmul24_ha0_7_and0 = 0;
|
|
uint8_t s_arrmul24_and1_7 = 0;
|
|
uint8_t s_arrmul24_fa1_7_xor0 = 0;
|
|
uint8_t s_arrmul24_fa1_7_and0 = 0;
|
|
uint8_t s_arrmul24_fa1_7_xor1 = 0;
|
|
uint8_t s_arrmul24_fa1_7_and1 = 0;
|
|
uint8_t s_arrmul24_fa1_7_or0 = 0;
|
|
uint8_t s_arrmul24_and2_7 = 0;
|
|
uint8_t s_arrmul24_fa2_7_xor0 = 0;
|
|
uint8_t s_arrmul24_fa2_7_and0 = 0;
|
|
uint8_t s_arrmul24_fa2_7_xor1 = 0;
|
|
uint8_t s_arrmul24_fa2_7_and1 = 0;
|
|
uint8_t s_arrmul24_fa2_7_or0 = 0;
|
|
uint8_t s_arrmul24_and3_7 = 0;
|
|
uint8_t s_arrmul24_fa3_7_xor0 = 0;
|
|
uint8_t s_arrmul24_fa3_7_and0 = 0;
|
|
uint8_t s_arrmul24_fa3_7_xor1 = 0;
|
|
uint8_t s_arrmul24_fa3_7_and1 = 0;
|
|
uint8_t s_arrmul24_fa3_7_or0 = 0;
|
|
uint8_t s_arrmul24_and4_7 = 0;
|
|
uint8_t s_arrmul24_fa4_7_xor0 = 0;
|
|
uint8_t s_arrmul24_fa4_7_and0 = 0;
|
|
uint8_t s_arrmul24_fa4_7_xor1 = 0;
|
|
uint8_t s_arrmul24_fa4_7_and1 = 0;
|
|
uint8_t s_arrmul24_fa4_7_or0 = 0;
|
|
uint8_t s_arrmul24_and5_7 = 0;
|
|
uint8_t s_arrmul24_fa5_7_xor0 = 0;
|
|
uint8_t s_arrmul24_fa5_7_and0 = 0;
|
|
uint8_t s_arrmul24_fa5_7_xor1 = 0;
|
|
uint8_t s_arrmul24_fa5_7_and1 = 0;
|
|
uint8_t s_arrmul24_fa5_7_or0 = 0;
|
|
uint8_t s_arrmul24_and6_7 = 0;
|
|
uint8_t s_arrmul24_fa6_7_xor0 = 0;
|
|
uint8_t s_arrmul24_fa6_7_and0 = 0;
|
|
uint8_t s_arrmul24_fa6_7_xor1 = 0;
|
|
uint8_t s_arrmul24_fa6_7_and1 = 0;
|
|
uint8_t s_arrmul24_fa6_7_or0 = 0;
|
|
uint8_t s_arrmul24_and7_7 = 0;
|
|
uint8_t s_arrmul24_fa7_7_xor0 = 0;
|
|
uint8_t s_arrmul24_fa7_7_and0 = 0;
|
|
uint8_t s_arrmul24_fa7_7_xor1 = 0;
|
|
uint8_t s_arrmul24_fa7_7_and1 = 0;
|
|
uint8_t s_arrmul24_fa7_7_or0 = 0;
|
|
uint8_t s_arrmul24_and8_7 = 0;
|
|
uint8_t s_arrmul24_fa8_7_xor0 = 0;
|
|
uint8_t s_arrmul24_fa8_7_and0 = 0;
|
|
uint8_t s_arrmul24_fa8_7_xor1 = 0;
|
|
uint8_t s_arrmul24_fa8_7_and1 = 0;
|
|
uint8_t s_arrmul24_fa8_7_or0 = 0;
|
|
uint8_t s_arrmul24_and9_7 = 0;
|
|
uint8_t s_arrmul24_fa9_7_xor0 = 0;
|
|
uint8_t s_arrmul24_fa9_7_and0 = 0;
|
|
uint8_t s_arrmul24_fa9_7_xor1 = 0;
|
|
uint8_t s_arrmul24_fa9_7_and1 = 0;
|
|
uint8_t s_arrmul24_fa9_7_or0 = 0;
|
|
uint8_t s_arrmul24_and10_7 = 0;
|
|
uint8_t s_arrmul24_fa10_7_xor0 = 0;
|
|
uint8_t s_arrmul24_fa10_7_and0 = 0;
|
|
uint8_t s_arrmul24_fa10_7_xor1 = 0;
|
|
uint8_t s_arrmul24_fa10_7_and1 = 0;
|
|
uint8_t s_arrmul24_fa10_7_or0 = 0;
|
|
uint8_t s_arrmul24_and11_7 = 0;
|
|
uint8_t s_arrmul24_fa11_7_xor0 = 0;
|
|
uint8_t s_arrmul24_fa11_7_and0 = 0;
|
|
uint8_t s_arrmul24_fa11_7_xor1 = 0;
|
|
uint8_t s_arrmul24_fa11_7_and1 = 0;
|
|
uint8_t s_arrmul24_fa11_7_or0 = 0;
|
|
uint8_t s_arrmul24_and12_7 = 0;
|
|
uint8_t s_arrmul24_fa12_7_xor0 = 0;
|
|
uint8_t s_arrmul24_fa12_7_and0 = 0;
|
|
uint8_t s_arrmul24_fa12_7_xor1 = 0;
|
|
uint8_t s_arrmul24_fa12_7_and1 = 0;
|
|
uint8_t s_arrmul24_fa12_7_or0 = 0;
|
|
uint8_t s_arrmul24_and13_7 = 0;
|
|
uint8_t s_arrmul24_fa13_7_xor0 = 0;
|
|
uint8_t s_arrmul24_fa13_7_and0 = 0;
|
|
uint8_t s_arrmul24_fa13_7_xor1 = 0;
|
|
uint8_t s_arrmul24_fa13_7_and1 = 0;
|
|
uint8_t s_arrmul24_fa13_7_or0 = 0;
|
|
uint8_t s_arrmul24_and14_7 = 0;
|
|
uint8_t s_arrmul24_fa14_7_xor0 = 0;
|
|
uint8_t s_arrmul24_fa14_7_and0 = 0;
|
|
uint8_t s_arrmul24_fa14_7_xor1 = 0;
|
|
uint8_t s_arrmul24_fa14_7_and1 = 0;
|
|
uint8_t s_arrmul24_fa14_7_or0 = 0;
|
|
uint8_t s_arrmul24_and15_7 = 0;
|
|
uint8_t s_arrmul24_fa15_7_xor0 = 0;
|
|
uint8_t s_arrmul24_fa15_7_and0 = 0;
|
|
uint8_t s_arrmul24_fa15_7_xor1 = 0;
|
|
uint8_t s_arrmul24_fa15_7_and1 = 0;
|
|
uint8_t s_arrmul24_fa15_7_or0 = 0;
|
|
uint8_t s_arrmul24_and16_7 = 0;
|
|
uint8_t s_arrmul24_fa16_7_xor0 = 0;
|
|
uint8_t s_arrmul24_fa16_7_and0 = 0;
|
|
uint8_t s_arrmul24_fa16_7_xor1 = 0;
|
|
uint8_t s_arrmul24_fa16_7_and1 = 0;
|
|
uint8_t s_arrmul24_fa16_7_or0 = 0;
|
|
uint8_t s_arrmul24_and17_7 = 0;
|
|
uint8_t s_arrmul24_fa17_7_xor0 = 0;
|
|
uint8_t s_arrmul24_fa17_7_and0 = 0;
|
|
uint8_t s_arrmul24_fa17_7_xor1 = 0;
|
|
uint8_t s_arrmul24_fa17_7_and1 = 0;
|
|
uint8_t s_arrmul24_fa17_7_or0 = 0;
|
|
uint8_t s_arrmul24_and18_7 = 0;
|
|
uint8_t s_arrmul24_fa18_7_xor0 = 0;
|
|
uint8_t s_arrmul24_fa18_7_and0 = 0;
|
|
uint8_t s_arrmul24_fa18_7_xor1 = 0;
|
|
uint8_t s_arrmul24_fa18_7_and1 = 0;
|
|
uint8_t s_arrmul24_fa18_7_or0 = 0;
|
|
uint8_t s_arrmul24_and19_7 = 0;
|
|
uint8_t s_arrmul24_fa19_7_xor0 = 0;
|
|
uint8_t s_arrmul24_fa19_7_and0 = 0;
|
|
uint8_t s_arrmul24_fa19_7_xor1 = 0;
|
|
uint8_t s_arrmul24_fa19_7_and1 = 0;
|
|
uint8_t s_arrmul24_fa19_7_or0 = 0;
|
|
uint8_t s_arrmul24_and20_7 = 0;
|
|
uint8_t s_arrmul24_fa20_7_xor0 = 0;
|
|
uint8_t s_arrmul24_fa20_7_and0 = 0;
|
|
uint8_t s_arrmul24_fa20_7_xor1 = 0;
|
|
uint8_t s_arrmul24_fa20_7_and1 = 0;
|
|
uint8_t s_arrmul24_fa20_7_or0 = 0;
|
|
uint8_t s_arrmul24_and21_7 = 0;
|
|
uint8_t s_arrmul24_fa21_7_xor0 = 0;
|
|
uint8_t s_arrmul24_fa21_7_and0 = 0;
|
|
uint8_t s_arrmul24_fa21_7_xor1 = 0;
|
|
uint8_t s_arrmul24_fa21_7_and1 = 0;
|
|
uint8_t s_arrmul24_fa21_7_or0 = 0;
|
|
uint8_t s_arrmul24_and22_7 = 0;
|
|
uint8_t s_arrmul24_fa22_7_xor0 = 0;
|
|
uint8_t s_arrmul24_fa22_7_and0 = 0;
|
|
uint8_t s_arrmul24_fa22_7_xor1 = 0;
|
|
uint8_t s_arrmul24_fa22_7_and1 = 0;
|
|
uint8_t s_arrmul24_fa22_7_or0 = 0;
|
|
uint8_t s_arrmul24_nand23_7 = 0;
|
|
uint8_t s_arrmul24_fa23_7_xor0 = 0;
|
|
uint8_t s_arrmul24_fa23_7_and0 = 0;
|
|
uint8_t s_arrmul24_fa23_7_xor1 = 0;
|
|
uint8_t s_arrmul24_fa23_7_and1 = 0;
|
|
uint8_t s_arrmul24_fa23_7_or0 = 0;
|
|
uint8_t s_arrmul24_and0_8 = 0;
|
|
uint8_t s_arrmul24_ha0_8_xor0 = 0;
|
|
uint8_t s_arrmul24_ha0_8_and0 = 0;
|
|
uint8_t s_arrmul24_and1_8 = 0;
|
|
uint8_t s_arrmul24_fa1_8_xor0 = 0;
|
|
uint8_t s_arrmul24_fa1_8_and0 = 0;
|
|
uint8_t s_arrmul24_fa1_8_xor1 = 0;
|
|
uint8_t s_arrmul24_fa1_8_and1 = 0;
|
|
uint8_t s_arrmul24_fa1_8_or0 = 0;
|
|
uint8_t s_arrmul24_and2_8 = 0;
|
|
uint8_t s_arrmul24_fa2_8_xor0 = 0;
|
|
uint8_t s_arrmul24_fa2_8_and0 = 0;
|
|
uint8_t s_arrmul24_fa2_8_xor1 = 0;
|
|
uint8_t s_arrmul24_fa2_8_and1 = 0;
|
|
uint8_t s_arrmul24_fa2_8_or0 = 0;
|
|
uint8_t s_arrmul24_and3_8 = 0;
|
|
uint8_t s_arrmul24_fa3_8_xor0 = 0;
|
|
uint8_t s_arrmul24_fa3_8_and0 = 0;
|
|
uint8_t s_arrmul24_fa3_8_xor1 = 0;
|
|
uint8_t s_arrmul24_fa3_8_and1 = 0;
|
|
uint8_t s_arrmul24_fa3_8_or0 = 0;
|
|
uint8_t s_arrmul24_and4_8 = 0;
|
|
uint8_t s_arrmul24_fa4_8_xor0 = 0;
|
|
uint8_t s_arrmul24_fa4_8_and0 = 0;
|
|
uint8_t s_arrmul24_fa4_8_xor1 = 0;
|
|
uint8_t s_arrmul24_fa4_8_and1 = 0;
|
|
uint8_t s_arrmul24_fa4_8_or0 = 0;
|
|
uint8_t s_arrmul24_and5_8 = 0;
|
|
uint8_t s_arrmul24_fa5_8_xor0 = 0;
|
|
uint8_t s_arrmul24_fa5_8_and0 = 0;
|
|
uint8_t s_arrmul24_fa5_8_xor1 = 0;
|
|
uint8_t s_arrmul24_fa5_8_and1 = 0;
|
|
uint8_t s_arrmul24_fa5_8_or0 = 0;
|
|
uint8_t s_arrmul24_and6_8 = 0;
|
|
uint8_t s_arrmul24_fa6_8_xor0 = 0;
|
|
uint8_t s_arrmul24_fa6_8_and0 = 0;
|
|
uint8_t s_arrmul24_fa6_8_xor1 = 0;
|
|
uint8_t s_arrmul24_fa6_8_and1 = 0;
|
|
uint8_t s_arrmul24_fa6_8_or0 = 0;
|
|
uint8_t s_arrmul24_and7_8 = 0;
|
|
uint8_t s_arrmul24_fa7_8_xor0 = 0;
|
|
uint8_t s_arrmul24_fa7_8_and0 = 0;
|
|
uint8_t s_arrmul24_fa7_8_xor1 = 0;
|
|
uint8_t s_arrmul24_fa7_8_and1 = 0;
|
|
uint8_t s_arrmul24_fa7_8_or0 = 0;
|
|
uint8_t s_arrmul24_and8_8 = 0;
|
|
uint8_t s_arrmul24_fa8_8_xor0 = 0;
|
|
uint8_t s_arrmul24_fa8_8_and0 = 0;
|
|
uint8_t s_arrmul24_fa8_8_xor1 = 0;
|
|
uint8_t s_arrmul24_fa8_8_and1 = 0;
|
|
uint8_t s_arrmul24_fa8_8_or0 = 0;
|
|
uint8_t s_arrmul24_and9_8 = 0;
|
|
uint8_t s_arrmul24_fa9_8_xor0 = 0;
|
|
uint8_t s_arrmul24_fa9_8_and0 = 0;
|
|
uint8_t s_arrmul24_fa9_8_xor1 = 0;
|
|
uint8_t s_arrmul24_fa9_8_and1 = 0;
|
|
uint8_t s_arrmul24_fa9_8_or0 = 0;
|
|
uint8_t s_arrmul24_and10_8 = 0;
|
|
uint8_t s_arrmul24_fa10_8_xor0 = 0;
|
|
uint8_t s_arrmul24_fa10_8_and0 = 0;
|
|
uint8_t s_arrmul24_fa10_8_xor1 = 0;
|
|
uint8_t s_arrmul24_fa10_8_and1 = 0;
|
|
uint8_t s_arrmul24_fa10_8_or0 = 0;
|
|
uint8_t s_arrmul24_and11_8 = 0;
|
|
uint8_t s_arrmul24_fa11_8_xor0 = 0;
|
|
uint8_t s_arrmul24_fa11_8_and0 = 0;
|
|
uint8_t s_arrmul24_fa11_8_xor1 = 0;
|
|
uint8_t s_arrmul24_fa11_8_and1 = 0;
|
|
uint8_t s_arrmul24_fa11_8_or0 = 0;
|
|
uint8_t s_arrmul24_and12_8 = 0;
|
|
uint8_t s_arrmul24_fa12_8_xor0 = 0;
|
|
uint8_t s_arrmul24_fa12_8_and0 = 0;
|
|
uint8_t s_arrmul24_fa12_8_xor1 = 0;
|
|
uint8_t s_arrmul24_fa12_8_and1 = 0;
|
|
uint8_t s_arrmul24_fa12_8_or0 = 0;
|
|
uint8_t s_arrmul24_and13_8 = 0;
|
|
uint8_t s_arrmul24_fa13_8_xor0 = 0;
|
|
uint8_t s_arrmul24_fa13_8_and0 = 0;
|
|
uint8_t s_arrmul24_fa13_8_xor1 = 0;
|
|
uint8_t s_arrmul24_fa13_8_and1 = 0;
|
|
uint8_t s_arrmul24_fa13_8_or0 = 0;
|
|
uint8_t s_arrmul24_and14_8 = 0;
|
|
uint8_t s_arrmul24_fa14_8_xor0 = 0;
|
|
uint8_t s_arrmul24_fa14_8_and0 = 0;
|
|
uint8_t s_arrmul24_fa14_8_xor1 = 0;
|
|
uint8_t s_arrmul24_fa14_8_and1 = 0;
|
|
uint8_t s_arrmul24_fa14_8_or0 = 0;
|
|
uint8_t s_arrmul24_and15_8 = 0;
|
|
uint8_t s_arrmul24_fa15_8_xor0 = 0;
|
|
uint8_t s_arrmul24_fa15_8_and0 = 0;
|
|
uint8_t s_arrmul24_fa15_8_xor1 = 0;
|
|
uint8_t s_arrmul24_fa15_8_and1 = 0;
|
|
uint8_t s_arrmul24_fa15_8_or0 = 0;
|
|
uint8_t s_arrmul24_and16_8 = 0;
|
|
uint8_t s_arrmul24_fa16_8_xor0 = 0;
|
|
uint8_t s_arrmul24_fa16_8_and0 = 0;
|
|
uint8_t s_arrmul24_fa16_8_xor1 = 0;
|
|
uint8_t s_arrmul24_fa16_8_and1 = 0;
|
|
uint8_t s_arrmul24_fa16_8_or0 = 0;
|
|
uint8_t s_arrmul24_and17_8 = 0;
|
|
uint8_t s_arrmul24_fa17_8_xor0 = 0;
|
|
uint8_t s_arrmul24_fa17_8_and0 = 0;
|
|
uint8_t s_arrmul24_fa17_8_xor1 = 0;
|
|
uint8_t s_arrmul24_fa17_8_and1 = 0;
|
|
uint8_t s_arrmul24_fa17_8_or0 = 0;
|
|
uint8_t s_arrmul24_and18_8 = 0;
|
|
uint8_t s_arrmul24_fa18_8_xor0 = 0;
|
|
uint8_t s_arrmul24_fa18_8_and0 = 0;
|
|
uint8_t s_arrmul24_fa18_8_xor1 = 0;
|
|
uint8_t s_arrmul24_fa18_8_and1 = 0;
|
|
uint8_t s_arrmul24_fa18_8_or0 = 0;
|
|
uint8_t s_arrmul24_and19_8 = 0;
|
|
uint8_t s_arrmul24_fa19_8_xor0 = 0;
|
|
uint8_t s_arrmul24_fa19_8_and0 = 0;
|
|
uint8_t s_arrmul24_fa19_8_xor1 = 0;
|
|
uint8_t s_arrmul24_fa19_8_and1 = 0;
|
|
uint8_t s_arrmul24_fa19_8_or0 = 0;
|
|
uint8_t s_arrmul24_and20_8 = 0;
|
|
uint8_t s_arrmul24_fa20_8_xor0 = 0;
|
|
uint8_t s_arrmul24_fa20_8_and0 = 0;
|
|
uint8_t s_arrmul24_fa20_8_xor1 = 0;
|
|
uint8_t s_arrmul24_fa20_8_and1 = 0;
|
|
uint8_t s_arrmul24_fa20_8_or0 = 0;
|
|
uint8_t s_arrmul24_and21_8 = 0;
|
|
uint8_t s_arrmul24_fa21_8_xor0 = 0;
|
|
uint8_t s_arrmul24_fa21_8_and0 = 0;
|
|
uint8_t s_arrmul24_fa21_8_xor1 = 0;
|
|
uint8_t s_arrmul24_fa21_8_and1 = 0;
|
|
uint8_t s_arrmul24_fa21_8_or0 = 0;
|
|
uint8_t s_arrmul24_and22_8 = 0;
|
|
uint8_t s_arrmul24_fa22_8_xor0 = 0;
|
|
uint8_t s_arrmul24_fa22_8_and0 = 0;
|
|
uint8_t s_arrmul24_fa22_8_xor1 = 0;
|
|
uint8_t s_arrmul24_fa22_8_and1 = 0;
|
|
uint8_t s_arrmul24_fa22_8_or0 = 0;
|
|
uint8_t s_arrmul24_nand23_8 = 0;
|
|
uint8_t s_arrmul24_fa23_8_xor0 = 0;
|
|
uint8_t s_arrmul24_fa23_8_and0 = 0;
|
|
uint8_t s_arrmul24_fa23_8_xor1 = 0;
|
|
uint8_t s_arrmul24_fa23_8_and1 = 0;
|
|
uint8_t s_arrmul24_fa23_8_or0 = 0;
|
|
uint8_t s_arrmul24_and0_9 = 0;
|
|
uint8_t s_arrmul24_ha0_9_xor0 = 0;
|
|
uint8_t s_arrmul24_ha0_9_and0 = 0;
|
|
uint8_t s_arrmul24_and1_9 = 0;
|
|
uint8_t s_arrmul24_fa1_9_xor0 = 0;
|
|
uint8_t s_arrmul24_fa1_9_and0 = 0;
|
|
uint8_t s_arrmul24_fa1_9_xor1 = 0;
|
|
uint8_t s_arrmul24_fa1_9_and1 = 0;
|
|
uint8_t s_arrmul24_fa1_9_or0 = 0;
|
|
uint8_t s_arrmul24_and2_9 = 0;
|
|
uint8_t s_arrmul24_fa2_9_xor0 = 0;
|
|
uint8_t s_arrmul24_fa2_9_and0 = 0;
|
|
uint8_t s_arrmul24_fa2_9_xor1 = 0;
|
|
uint8_t s_arrmul24_fa2_9_and1 = 0;
|
|
uint8_t s_arrmul24_fa2_9_or0 = 0;
|
|
uint8_t s_arrmul24_and3_9 = 0;
|
|
uint8_t s_arrmul24_fa3_9_xor0 = 0;
|
|
uint8_t s_arrmul24_fa3_9_and0 = 0;
|
|
uint8_t s_arrmul24_fa3_9_xor1 = 0;
|
|
uint8_t s_arrmul24_fa3_9_and1 = 0;
|
|
uint8_t s_arrmul24_fa3_9_or0 = 0;
|
|
uint8_t s_arrmul24_and4_9 = 0;
|
|
uint8_t s_arrmul24_fa4_9_xor0 = 0;
|
|
uint8_t s_arrmul24_fa4_9_and0 = 0;
|
|
uint8_t s_arrmul24_fa4_9_xor1 = 0;
|
|
uint8_t s_arrmul24_fa4_9_and1 = 0;
|
|
uint8_t s_arrmul24_fa4_9_or0 = 0;
|
|
uint8_t s_arrmul24_and5_9 = 0;
|
|
uint8_t s_arrmul24_fa5_9_xor0 = 0;
|
|
uint8_t s_arrmul24_fa5_9_and0 = 0;
|
|
uint8_t s_arrmul24_fa5_9_xor1 = 0;
|
|
uint8_t s_arrmul24_fa5_9_and1 = 0;
|
|
uint8_t s_arrmul24_fa5_9_or0 = 0;
|
|
uint8_t s_arrmul24_and6_9 = 0;
|
|
uint8_t s_arrmul24_fa6_9_xor0 = 0;
|
|
uint8_t s_arrmul24_fa6_9_and0 = 0;
|
|
uint8_t s_arrmul24_fa6_9_xor1 = 0;
|
|
uint8_t s_arrmul24_fa6_9_and1 = 0;
|
|
uint8_t s_arrmul24_fa6_9_or0 = 0;
|
|
uint8_t s_arrmul24_and7_9 = 0;
|
|
uint8_t s_arrmul24_fa7_9_xor0 = 0;
|
|
uint8_t s_arrmul24_fa7_9_and0 = 0;
|
|
uint8_t s_arrmul24_fa7_9_xor1 = 0;
|
|
uint8_t s_arrmul24_fa7_9_and1 = 0;
|
|
uint8_t s_arrmul24_fa7_9_or0 = 0;
|
|
uint8_t s_arrmul24_and8_9 = 0;
|
|
uint8_t s_arrmul24_fa8_9_xor0 = 0;
|
|
uint8_t s_arrmul24_fa8_9_and0 = 0;
|
|
uint8_t s_arrmul24_fa8_9_xor1 = 0;
|
|
uint8_t s_arrmul24_fa8_9_and1 = 0;
|
|
uint8_t s_arrmul24_fa8_9_or0 = 0;
|
|
uint8_t s_arrmul24_and9_9 = 0;
|
|
uint8_t s_arrmul24_fa9_9_xor0 = 0;
|
|
uint8_t s_arrmul24_fa9_9_and0 = 0;
|
|
uint8_t s_arrmul24_fa9_9_xor1 = 0;
|
|
uint8_t s_arrmul24_fa9_9_and1 = 0;
|
|
uint8_t s_arrmul24_fa9_9_or0 = 0;
|
|
uint8_t s_arrmul24_and10_9 = 0;
|
|
uint8_t s_arrmul24_fa10_9_xor0 = 0;
|
|
uint8_t s_arrmul24_fa10_9_and0 = 0;
|
|
uint8_t s_arrmul24_fa10_9_xor1 = 0;
|
|
uint8_t s_arrmul24_fa10_9_and1 = 0;
|
|
uint8_t s_arrmul24_fa10_9_or0 = 0;
|
|
uint8_t s_arrmul24_and11_9 = 0;
|
|
uint8_t s_arrmul24_fa11_9_xor0 = 0;
|
|
uint8_t s_arrmul24_fa11_9_and0 = 0;
|
|
uint8_t s_arrmul24_fa11_9_xor1 = 0;
|
|
uint8_t s_arrmul24_fa11_9_and1 = 0;
|
|
uint8_t s_arrmul24_fa11_9_or0 = 0;
|
|
uint8_t s_arrmul24_and12_9 = 0;
|
|
uint8_t s_arrmul24_fa12_9_xor0 = 0;
|
|
uint8_t s_arrmul24_fa12_9_and0 = 0;
|
|
uint8_t s_arrmul24_fa12_9_xor1 = 0;
|
|
uint8_t s_arrmul24_fa12_9_and1 = 0;
|
|
uint8_t s_arrmul24_fa12_9_or0 = 0;
|
|
uint8_t s_arrmul24_and13_9 = 0;
|
|
uint8_t s_arrmul24_fa13_9_xor0 = 0;
|
|
uint8_t s_arrmul24_fa13_9_and0 = 0;
|
|
uint8_t s_arrmul24_fa13_9_xor1 = 0;
|
|
uint8_t s_arrmul24_fa13_9_and1 = 0;
|
|
uint8_t s_arrmul24_fa13_9_or0 = 0;
|
|
uint8_t s_arrmul24_and14_9 = 0;
|
|
uint8_t s_arrmul24_fa14_9_xor0 = 0;
|
|
uint8_t s_arrmul24_fa14_9_and0 = 0;
|
|
uint8_t s_arrmul24_fa14_9_xor1 = 0;
|
|
uint8_t s_arrmul24_fa14_9_and1 = 0;
|
|
uint8_t s_arrmul24_fa14_9_or0 = 0;
|
|
uint8_t s_arrmul24_and15_9 = 0;
|
|
uint8_t s_arrmul24_fa15_9_xor0 = 0;
|
|
uint8_t s_arrmul24_fa15_9_and0 = 0;
|
|
uint8_t s_arrmul24_fa15_9_xor1 = 0;
|
|
uint8_t s_arrmul24_fa15_9_and1 = 0;
|
|
uint8_t s_arrmul24_fa15_9_or0 = 0;
|
|
uint8_t s_arrmul24_and16_9 = 0;
|
|
uint8_t s_arrmul24_fa16_9_xor0 = 0;
|
|
uint8_t s_arrmul24_fa16_9_and0 = 0;
|
|
uint8_t s_arrmul24_fa16_9_xor1 = 0;
|
|
uint8_t s_arrmul24_fa16_9_and1 = 0;
|
|
uint8_t s_arrmul24_fa16_9_or0 = 0;
|
|
uint8_t s_arrmul24_and17_9 = 0;
|
|
uint8_t s_arrmul24_fa17_9_xor0 = 0;
|
|
uint8_t s_arrmul24_fa17_9_and0 = 0;
|
|
uint8_t s_arrmul24_fa17_9_xor1 = 0;
|
|
uint8_t s_arrmul24_fa17_9_and1 = 0;
|
|
uint8_t s_arrmul24_fa17_9_or0 = 0;
|
|
uint8_t s_arrmul24_and18_9 = 0;
|
|
uint8_t s_arrmul24_fa18_9_xor0 = 0;
|
|
uint8_t s_arrmul24_fa18_9_and0 = 0;
|
|
uint8_t s_arrmul24_fa18_9_xor1 = 0;
|
|
uint8_t s_arrmul24_fa18_9_and1 = 0;
|
|
uint8_t s_arrmul24_fa18_9_or0 = 0;
|
|
uint8_t s_arrmul24_and19_9 = 0;
|
|
uint8_t s_arrmul24_fa19_9_xor0 = 0;
|
|
uint8_t s_arrmul24_fa19_9_and0 = 0;
|
|
uint8_t s_arrmul24_fa19_9_xor1 = 0;
|
|
uint8_t s_arrmul24_fa19_9_and1 = 0;
|
|
uint8_t s_arrmul24_fa19_9_or0 = 0;
|
|
uint8_t s_arrmul24_and20_9 = 0;
|
|
uint8_t s_arrmul24_fa20_9_xor0 = 0;
|
|
uint8_t s_arrmul24_fa20_9_and0 = 0;
|
|
uint8_t s_arrmul24_fa20_9_xor1 = 0;
|
|
uint8_t s_arrmul24_fa20_9_and1 = 0;
|
|
uint8_t s_arrmul24_fa20_9_or0 = 0;
|
|
uint8_t s_arrmul24_and21_9 = 0;
|
|
uint8_t s_arrmul24_fa21_9_xor0 = 0;
|
|
uint8_t s_arrmul24_fa21_9_and0 = 0;
|
|
uint8_t s_arrmul24_fa21_9_xor1 = 0;
|
|
uint8_t s_arrmul24_fa21_9_and1 = 0;
|
|
uint8_t s_arrmul24_fa21_9_or0 = 0;
|
|
uint8_t s_arrmul24_and22_9 = 0;
|
|
uint8_t s_arrmul24_fa22_9_xor0 = 0;
|
|
uint8_t s_arrmul24_fa22_9_and0 = 0;
|
|
uint8_t s_arrmul24_fa22_9_xor1 = 0;
|
|
uint8_t s_arrmul24_fa22_9_and1 = 0;
|
|
uint8_t s_arrmul24_fa22_9_or0 = 0;
|
|
uint8_t s_arrmul24_nand23_9 = 0;
|
|
uint8_t s_arrmul24_fa23_9_xor0 = 0;
|
|
uint8_t s_arrmul24_fa23_9_and0 = 0;
|
|
uint8_t s_arrmul24_fa23_9_xor1 = 0;
|
|
uint8_t s_arrmul24_fa23_9_and1 = 0;
|
|
uint8_t s_arrmul24_fa23_9_or0 = 0;
|
|
uint8_t s_arrmul24_and0_10 = 0;
|
|
uint8_t s_arrmul24_ha0_10_xor0 = 0;
|
|
uint8_t s_arrmul24_ha0_10_and0 = 0;
|
|
uint8_t s_arrmul24_and1_10 = 0;
|
|
uint8_t s_arrmul24_fa1_10_xor0 = 0;
|
|
uint8_t s_arrmul24_fa1_10_and0 = 0;
|
|
uint8_t s_arrmul24_fa1_10_xor1 = 0;
|
|
uint8_t s_arrmul24_fa1_10_and1 = 0;
|
|
uint8_t s_arrmul24_fa1_10_or0 = 0;
|
|
uint8_t s_arrmul24_and2_10 = 0;
|
|
uint8_t s_arrmul24_fa2_10_xor0 = 0;
|
|
uint8_t s_arrmul24_fa2_10_and0 = 0;
|
|
uint8_t s_arrmul24_fa2_10_xor1 = 0;
|
|
uint8_t s_arrmul24_fa2_10_and1 = 0;
|
|
uint8_t s_arrmul24_fa2_10_or0 = 0;
|
|
uint8_t s_arrmul24_and3_10 = 0;
|
|
uint8_t s_arrmul24_fa3_10_xor0 = 0;
|
|
uint8_t s_arrmul24_fa3_10_and0 = 0;
|
|
uint8_t s_arrmul24_fa3_10_xor1 = 0;
|
|
uint8_t s_arrmul24_fa3_10_and1 = 0;
|
|
uint8_t s_arrmul24_fa3_10_or0 = 0;
|
|
uint8_t s_arrmul24_and4_10 = 0;
|
|
uint8_t s_arrmul24_fa4_10_xor0 = 0;
|
|
uint8_t s_arrmul24_fa4_10_and0 = 0;
|
|
uint8_t s_arrmul24_fa4_10_xor1 = 0;
|
|
uint8_t s_arrmul24_fa4_10_and1 = 0;
|
|
uint8_t s_arrmul24_fa4_10_or0 = 0;
|
|
uint8_t s_arrmul24_and5_10 = 0;
|
|
uint8_t s_arrmul24_fa5_10_xor0 = 0;
|
|
uint8_t s_arrmul24_fa5_10_and0 = 0;
|
|
uint8_t s_arrmul24_fa5_10_xor1 = 0;
|
|
uint8_t s_arrmul24_fa5_10_and1 = 0;
|
|
uint8_t s_arrmul24_fa5_10_or0 = 0;
|
|
uint8_t s_arrmul24_and6_10 = 0;
|
|
uint8_t s_arrmul24_fa6_10_xor0 = 0;
|
|
uint8_t s_arrmul24_fa6_10_and0 = 0;
|
|
uint8_t s_arrmul24_fa6_10_xor1 = 0;
|
|
uint8_t s_arrmul24_fa6_10_and1 = 0;
|
|
uint8_t s_arrmul24_fa6_10_or0 = 0;
|
|
uint8_t s_arrmul24_and7_10 = 0;
|
|
uint8_t s_arrmul24_fa7_10_xor0 = 0;
|
|
uint8_t s_arrmul24_fa7_10_and0 = 0;
|
|
uint8_t s_arrmul24_fa7_10_xor1 = 0;
|
|
uint8_t s_arrmul24_fa7_10_and1 = 0;
|
|
uint8_t s_arrmul24_fa7_10_or0 = 0;
|
|
uint8_t s_arrmul24_and8_10 = 0;
|
|
uint8_t s_arrmul24_fa8_10_xor0 = 0;
|
|
uint8_t s_arrmul24_fa8_10_and0 = 0;
|
|
uint8_t s_arrmul24_fa8_10_xor1 = 0;
|
|
uint8_t s_arrmul24_fa8_10_and1 = 0;
|
|
uint8_t s_arrmul24_fa8_10_or0 = 0;
|
|
uint8_t s_arrmul24_and9_10 = 0;
|
|
uint8_t s_arrmul24_fa9_10_xor0 = 0;
|
|
uint8_t s_arrmul24_fa9_10_and0 = 0;
|
|
uint8_t s_arrmul24_fa9_10_xor1 = 0;
|
|
uint8_t s_arrmul24_fa9_10_and1 = 0;
|
|
uint8_t s_arrmul24_fa9_10_or0 = 0;
|
|
uint8_t s_arrmul24_and10_10 = 0;
|
|
uint8_t s_arrmul24_fa10_10_xor0 = 0;
|
|
uint8_t s_arrmul24_fa10_10_and0 = 0;
|
|
uint8_t s_arrmul24_fa10_10_xor1 = 0;
|
|
uint8_t s_arrmul24_fa10_10_and1 = 0;
|
|
uint8_t s_arrmul24_fa10_10_or0 = 0;
|
|
uint8_t s_arrmul24_and11_10 = 0;
|
|
uint8_t s_arrmul24_fa11_10_xor0 = 0;
|
|
uint8_t s_arrmul24_fa11_10_and0 = 0;
|
|
uint8_t s_arrmul24_fa11_10_xor1 = 0;
|
|
uint8_t s_arrmul24_fa11_10_and1 = 0;
|
|
uint8_t s_arrmul24_fa11_10_or0 = 0;
|
|
uint8_t s_arrmul24_and12_10 = 0;
|
|
uint8_t s_arrmul24_fa12_10_xor0 = 0;
|
|
uint8_t s_arrmul24_fa12_10_and0 = 0;
|
|
uint8_t s_arrmul24_fa12_10_xor1 = 0;
|
|
uint8_t s_arrmul24_fa12_10_and1 = 0;
|
|
uint8_t s_arrmul24_fa12_10_or0 = 0;
|
|
uint8_t s_arrmul24_and13_10 = 0;
|
|
uint8_t s_arrmul24_fa13_10_xor0 = 0;
|
|
uint8_t s_arrmul24_fa13_10_and0 = 0;
|
|
uint8_t s_arrmul24_fa13_10_xor1 = 0;
|
|
uint8_t s_arrmul24_fa13_10_and1 = 0;
|
|
uint8_t s_arrmul24_fa13_10_or0 = 0;
|
|
uint8_t s_arrmul24_and14_10 = 0;
|
|
uint8_t s_arrmul24_fa14_10_xor0 = 0;
|
|
uint8_t s_arrmul24_fa14_10_and0 = 0;
|
|
uint8_t s_arrmul24_fa14_10_xor1 = 0;
|
|
uint8_t s_arrmul24_fa14_10_and1 = 0;
|
|
uint8_t s_arrmul24_fa14_10_or0 = 0;
|
|
uint8_t s_arrmul24_and15_10 = 0;
|
|
uint8_t s_arrmul24_fa15_10_xor0 = 0;
|
|
uint8_t s_arrmul24_fa15_10_and0 = 0;
|
|
uint8_t s_arrmul24_fa15_10_xor1 = 0;
|
|
uint8_t s_arrmul24_fa15_10_and1 = 0;
|
|
uint8_t s_arrmul24_fa15_10_or0 = 0;
|
|
uint8_t s_arrmul24_and16_10 = 0;
|
|
uint8_t s_arrmul24_fa16_10_xor0 = 0;
|
|
uint8_t s_arrmul24_fa16_10_and0 = 0;
|
|
uint8_t s_arrmul24_fa16_10_xor1 = 0;
|
|
uint8_t s_arrmul24_fa16_10_and1 = 0;
|
|
uint8_t s_arrmul24_fa16_10_or0 = 0;
|
|
uint8_t s_arrmul24_and17_10 = 0;
|
|
uint8_t s_arrmul24_fa17_10_xor0 = 0;
|
|
uint8_t s_arrmul24_fa17_10_and0 = 0;
|
|
uint8_t s_arrmul24_fa17_10_xor1 = 0;
|
|
uint8_t s_arrmul24_fa17_10_and1 = 0;
|
|
uint8_t s_arrmul24_fa17_10_or0 = 0;
|
|
uint8_t s_arrmul24_and18_10 = 0;
|
|
uint8_t s_arrmul24_fa18_10_xor0 = 0;
|
|
uint8_t s_arrmul24_fa18_10_and0 = 0;
|
|
uint8_t s_arrmul24_fa18_10_xor1 = 0;
|
|
uint8_t s_arrmul24_fa18_10_and1 = 0;
|
|
uint8_t s_arrmul24_fa18_10_or0 = 0;
|
|
uint8_t s_arrmul24_and19_10 = 0;
|
|
uint8_t s_arrmul24_fa19_10_xor0 = 0;
|
|
uint8_t s_arrmul24_fa19_10_and0 = 0;
|
|
uint8_t s_arrmul24_fa19_10_xor1 = 0;
|
|
uint8_t s_arrmul24_fa19_10_and1 = 0;
|
|
uint8_t s_arrmul24_fa19_10_or0 = 0;
|
|
uint8_t s_arrmul24_and20_10 = 0;
|
|
uint8_t s_arrmul24_fa20_10_xor0 = 0;
|
|
uint8_t s_arrmul24_fa20_10_and0 = 0;
|
|
uint8_t s_arrmul24_fa20_10_xor1 = 0;
|
|
uint8_t s_arrmul24_fa20_10_and1 = 0;
|
|
uint8_t s_arrmul24_fa20_10_or0 = 0;
|
|
uint8_t s_arrmul24_and21_10 = 0;
|
|
uint8_t s_arrmul24_fa21_10_xor0 = 0;
|
|
uint8_t s_arrmul24_fa21_10_and0 = 0;
|
|
uint8_t s_arrmul24_fa21_10_xor1 = 0;
|
|
uint8_t s_arrmul24_fa21_10_and1 = 0;
|
|
uint8_t s_arrmul24_fa21_10_or0 = 0;
|
|
uint8_t s_arrmul24_and22_10 = 0;
|
|
uint8_t s_arrmul24_fa22_10_xor0 = 0;
|
|
uint8_t s_arrmul24_fa22_10_and0 = 0;
|
|
uint8_t s_arrmul24_fa22_10_xor1 = 0;
|
|
uint8_t s_arrmul24_fa22_10_and1 = 0;
|
|
uint8_t s_arrmul24_fa22_10_or0 = 0;
|
|
uint8_t s_arrmul24_nand23_10 = 0;
|
|
uint8_t s_arrmul24_fa23_10_xor0 = 0;
|
|
uint8_t s_arrmul24_fa23_10_and0 = 0;
|
|
uint8_t s_arrmul24_fa23_10_xor1 = 0;
|
|
uint8_t s_arrmul24_fa23_10_and1 = 0;
|
|
uint8_t s_arrmul24_fa23_10_or0 = 0;
|
|
uint8_t s_arrmul24_and0_11 = 0;
|
|
uint8_t s_arrmul24_ha0_11_xor0 = 0;
|
|
uint8_t s_arrmul24_ha0_11_and0 = 0;
|
|
uint8_t s_arrmul24_and1_11 = 0;
|
|
uint8_t s_arrmul24_fa1_11_xor0 = 0;
|
|
uint8_t s_arrmul24_fa1_11_and0 = 0;
|
|
uint8_t s_arrmul24_fa1_11_xor1 = 0;
|
|
uint8_t s_arrmul24_fa1_11_and1 = 0;
|
|
uint8_t s_arrmul24_fa1_11_or0 = 0;
|
|
uint8_t s_arrmul24_and2_11 = 0;
|
|
uint8_t s_arrmul24_fa2_11_xor0 = 0;
|
|
uint8_t s_arrmul24_fa2_11_and0 = 0;
|
|
uint8_t s_arrmul24_fa2_11_xor1 = 0;
|
|
uint8_t s_arrmul24_fa2_11_and1 = 0;
|
|
uint8_t s_arrmul24_fa2_11_or0 = 0;
|
|
uint8_t s_arrmul24_and3_11 = 0;
|
|
uint8_t s_arrmul24_fa3_11_xor0 = 0;
|
|
uint8_t s_arrmul24_fa3_11_and0 = 0;
|
|
uint8_t s_arrmul24_fa3_11_xor1 = 0;
|
|
uint8_t s_arrmul24_fa3_11_and1 = 0;
|
|
uint8_t s_arrmul24_fa3_11_or0 = 0;
|
|
uint8_t s_arrmul24_and4_11 = 0;
|
|
uint8_t s_arrmul24_fa4_11_xor0 = 0;
|
|
uint8_t s_arrmul24_fa4_11_and0 = 0;
|
|
uint8_t s_arrmul24_fa4_11_xor1 = 0;
|
|
uint8_t s_arrmul24_fa4_11_and1 = 0;
|
|
uint8_t s_arrmul24_fa4_11_or0 = 0;
|
|
uint8_t s_arrmul24_and5_11 = 0;
|
|
uint8_t s_arrmul24_fa5_11_xor0 = 0;
|
|
uint8_t s_arrmul24_fa5_11_and0 = 0;
|
|
uint8_t s_arrmul24_fa5_11_xor1 = 0;
|
|
uint8_t s_arrmul24_fa5_11_and1 = 0;
|
|
uint8_t s_arrmul24_fa5_11_or0 = 0;
|
|
uint8_t s_arrmul24_and6_11 = 0;
|
|
uint8_t s_arrmul24_fa6_11_xor0 = 0;
|
|
uint8_t s_arrmul24_fa6_11_and0 = 0;
|
|
uint8_t s_arrmul24_fa6_11_xor1 = 0;
|
|
uint8_t s_arrmul24_fa6_11_and1 = 0;
|
|
uint8_t s_arrmul24_fa6_11_or0 = 0;
|
|
uint8_t s_arrmul24_and7_11 = 0;
|
|
uint8_t s_arrmul24_fa7_11_xor0 = 0;
|
|
uint8_t s_arrmul24_fa7_11_and0 = 0;
|
|
uint8_t s_arrmul24_fa7_11_xor1 = 0;
|
|
uint8_t s_arrmul24_fa7_11_and1 = 0;
|
|
uint8_t s_arrmul24_fa7_11_or0 = 0;
|
|
uint8_t s_arrmul24_and8_11 = 0;
|
|
uint8_t s_arrmul24_fa8_11_xor0 = 0;
|
|
uint8_t s_arrmul24_fa8_11_and0 = 0;
|
|
uint8_t s_arrmul24_fa8_11_xor1 = 0;
|
|
uint8_t s_arrmul24_fa8_11_and1 = 0;
|
|
uint8_t s_arrmul24_fa8_11_or0 = 0;
|
|
uint8_t s_arrmul24_and9_11 = 0;
|
|
uint8_t s_arrmul24_fa9_11_xor0 = 0;
|
|
uint8_t s_arrmul24_fa9_11_and0 = 0;
|
|
uint8_t s_arrmul24_fa9_11_xor1 = 0;
|
|
uint8_t s_arrmul24_fa9_11_and1 = 0;
|
|
uint8_t s_arrmul24_fa9_11_or0 = 0;
|
|
uint8_t s_arrmul24_and10_11 = 0;
|
|
uint8_t s_arrmul24_fa10_11_xor0 = 0;
|
|
uint8_t s_arrmul24_fa10_11_and0 = 0;
|
|
uint8_t s_arrmul24_fa10_11_xor1 = 0;
|
|
uint8_t s_arrmul24_fa10_11_and1 = 0;
|
|
uint8_t s_arrmul24_fa10_11_or0 = 0;
|
|
uint8_t s_arrmul24_and11_11 = 0;
|
|
uint8_t s_arrmul24_fa11_11_xor0 = 0;
|
|
uint8_t s_arrmul24_fa11_11_and0 = 0;
|
|
uint8_t s_arrmul24_fa11_11_xor1 = 0;
|
|
uint8_t s_arrmul24_fa11_11_and1 = 0;
|
|
uint8_t s_arrmul24_fa11_11_or0 = 0;
|
|
uint8_t s_arrmul24_and12_11 = 0;
|
|
uint8_t s_arrmul24_fa12_11_xor0 = 0;
|
|
uint8_t s_arrmul24_fa12_11_and0 = 0;
|
|
uint8_t s_arrmul24_fa12_11_xor1 = 0;
|
|
uint8_t s_arrmul24_fa12_11_and1 = 0;
|
|
uint8_t s_arrmul24_fa12_11_or0 = 0;
|
|
uint8_t s_arrmul24_and13_11 = 0;
|
|
uint8_t s_arrmul24_fa13_11_xor0 = 0;
|
|
uint8_t s_arrmul24_fa13_11_and0 = 0;
|
|
uint8_t s_arrmul24_fa13_11_xor1 = 0;
|
|
uint8_t s_arrmul24_fa13_11_and1 = 0;
|
|
uint8_t s_arrmul24_fa13_11_or0 = 0;
|
|
uint8_t s_arrmul24_and14_11 = 0;
|
|
uint8_t s_arrmul24_fa14_11_xor0 = 0;
|
|
uint8_t s_arrmul24_fa14_11_and0 = 0;
|
|
uint8_t s_arrmul24_fa14_11_xor1 = 0;
|
|
uint8_t s_arrmul24_fa14_11_and1 = 0;
|
|
uint8_t s_arrmul24_fa14_11_or0 = 0;
|
|
uint8_t s_arrmul24_and15_11 = 0;
|
|
uint8_t s_arrmul24_fa15_11_xor0 = 0;
|
|
uint8_t s_arrmul24_fa15_11_and0 = 0;
|
|
uint8_t s_arrmul24_fa15_11_xor1 = 0;
|
|
uint8_t s_arrmul24_fa15_11_and1 = 0;
|
|
uint8_t s_arrmul24_fa15_11_or0 = 0;
|
|
uint8_t s_arrmul24_and16_11 = 0;
|
|
uint8_t s_arrmul24_fa16_11_xor0 = 0;
|
|
uint8_t s_arrmul24_fa16_11_and0 = 0;
|
|
uint8_t s_arrmul24_fa16_11_xor1 = 0;
|
|
uint8_t s_arrmul24_fa16_11_and1 = 0;
|
|
uint8_t s_arrmul24_fa16_11_or0 = 0;
|
|
uint8_t s_arrmul24_and17_11 = 0;
|
|
uint8_t s_arrmul24_fa17_11_xor0 = 0;
|
|
uint8_t s_arrmul24_fa17_11_and0 = 0;
|
|
uint8_t s_arrmul24_fa17_11_xor1 = 0;
|
|
uint8_t s_arrmul24_fa17_11_and1 = 0;
|
|
uint8_t s_arrmul24_fa17_11_or0 = 0;
|
|
uint8_t s_arrmul24_and18_11 = 0;
|
|
uint8_t s_arrmul24_fa18_11_xor0 = 0;
|
|
uint8_t s_arrmul24_fa18_11_and0 = 0;
|
|
uint8_t s_arrmul24_fa18_11_xor1 = 0;
|
|
uint8_t s_arrmul24_fa18_11_and1 = 0;
|
|
uint8_t s_arrmul24_fa18_11_or0 = 0;
|
|
uint8_t s_arrmul24_and19_11 = 0;
|
|
uint8_t s_arrmul24_fa19_11_xor0 = 0;
|
|
uint8_t s_arrmul24_fa19_11_and0 = 0;
|
|
uint8_t s_arrmul24_fa19_11_xor1 = 0;
|
|
uint8_t s_arrmul24_fa19_11_and1 = 0;
|
|
uint8_t s_arrmul24_fa19_11_or0 = 0;
|
|
uint8_t s_arrmul24_and20_11 = 0;
|
|
uint8_t s_arrmul24_fa20_11_xor0 = 0;
|
|
uint8_t s_arrmul24_fa20_11_and0 = 0;
|
|
uint8_t s_arrmul24_fa20_11_xor1 = 0;
|
|
uint8_t s_arrmul24_fa20_11_and1 = 0;
|
|
uint8_t s_arrmul24_fa20_11_or0 = 0;
|
|
uint8_t s_arrmul24_and21_11 = 0;
|
|
uint8_t s_arrmul24_fa21_11_xor0 = 0;
|
|
uint8_t s_arrmul24_fa21_11_and0 = 0;
|
|
uint8_t s_arrmul24_fa21_11_xor1 = 0;
|
|
uint8_t s_arrmul24_fa21_11_and1 = 0;
|
|
uint8_t s_arrmul24_fa21_11_or0 = 0;
|
|
uint8_t s_arrmul24_and22_11 = 0;
|
|
uint8_t s_arrmul24_fa22_11_xor0 = 0;
|
|
uint8_t s_arrmul24_fa22_11_and0 = 0;
|
|
uint8_t s_arrmul24_fa22_11_xor1 = 0;
|
|
uint8_t s_arrmul24_fa22_11_and1 = 0;
|
|
uint8_t s_arrmul24_fa22_11_or0 = 0;
|
|
uint8_t s_arrmul24_nand23_11 = 0;
|
|
uint8_t s_arrmul24_fa23_11_xor0 = 0;
|
|
uint8_t s_arrmul24_fa23_11_and0 = 0;
|
|
uint8_t s_arrmul24_fa23_11_xor1 = 0;
|
|
uint8_t s_arrmul24_fa23_11_and1 = 0;
|
|
uint8_t s_arrmul24_fa23_11_or0 = 0;
|
|
uint8_t s_arrmul24_and0_12 = 0;
|
|
uint8_t s_arrmul24_ha0_12_xor0 = 0;
|
|
uint8_t s_arrmul24_ha0_12_and0 = 0;
|
|
uint8_t s_arrmul24_and1_12 = 0;
|
|
uint8_t s_arrmul24_fa1_12_xor0 = 0;
|
|
uint8_t s_arrmul24_fa1_12_and0 = 0;
|
|
uint8_t s_arrmul24_fa1_12_xor1 = 0;
|
|
uint8_t s_arrmul24_fa1_12_and1 = 0;
|
|
uint8_t s_arrmul24_fa1_12_or0 = 0;
|
|
uint8_t s_arrmul24_and2_12 = 0;
|
|
uint8_t s_arrmul24_fa2_12_xor0 = 0;
|
|
uint8_t s_arrmul24_fa2_12_and0 = 0;
|
|
uint8_t s_arrmul24_fa2_12_xor1 = 0;
|
|
uint8_t s_arrmul24_fa2_12_and1 = 0;
|
|
uint8_t s_arrmul24_fa2_12_or0 = 0;
|
|
uint8_t s_arrmul24_and3_12 = 0;
|
|
uint8_t s_arrmul24_fa3_12_xor0 = 0;
|
|
uint8_t s_arrmul24_fa3_12_and0 = 0;
|
|
uint8_t s_arrmul24_fa3_12_xor1 = 0;
|
|
uint8_t s_arrmul24_fa3_12_and1 = 0;
|
|
uint8_t s_arrmul24_fa3_12_or0 = 0;
|
|
uint8_t s_arrmul24_and4_12 = 0;
|
|
uint8_t s_arrmul24_fa4_12_xor0 = 0;
|
|
uint8_t s_arrmul24_fa4_12_and0 = 0;
|
|
uint8_t s_arrmul24_fa4_12_xor1 = 0;
|
|
uint8_t s_arrmul24_fa4_12_and1 = 0;
|
|
uint8_t s_arrmul24_fa4_12_or0 = 0;
|
|
uint8_t s_arrmul24_and5_12 = 0;
|
|
uint8_t s_arrmul24_fa5_12_xor0 = 0;
|
|
uint8_t s_arrmul24_fa5_12_and0 = 0;
|
|
uint8_t s_arrmul24_fa5_12_xor1 = 0;
|
|
uint8_t s_arrmul24_fa5_12_and1 = 0;
|
|
uint8_t s_arrmul24_fa5_12_or0 = 0;
|
|
uint8_t s_arrmul24_and6_12 = 0;
|
|
uint8_t s_arrmul24_fa6_12_xor0 = 0;
|
|
uint8_t s_arrmul24_fa6_12_and0 = 0;
|
|
uint8_t s_arrmul24_fa6_12_xor1 = 0;
|
|
uint8_t s_arrmul24_fa6_12_and1 = 0;
|
|
uint8_t s_arrmul24_fa6_12_or0 = 0;
|
|
uint8_t s_arrmul24_and7_12 = 0;
|
|
uint8_t s_arrmul24_fa7_12_xor0 = 0;
|
|
uint8_t s_arrmul24_fa7_12_and0 = 0;
|
|
uint8_t s_arrmul24_fa7_12_xor1 = 0;
|
|
uint8_t s_arrmul24_fa7_12_and1 = 0;
|
|
uint8_t s_arrmul24_fa7_12_or0 = 0;
|
|
uint8_t s_arrmul24_and8_12 = 0;
|
|
uint8_t s_arrmul24_fa8_12_xor0 = 0;
|
|
uint8_t s_arrmul24_fa8_12_and0 = 0;
|
|
uint8_t s_arrmul24_fa8_12_xor1 = 0;
|
|
uint8_t s_arrmul24_fa8_12_and1 = 0;
|
|
uint8_t s_arrmul24_fa8_12_or0 = 0;
|
|
uint8_t s_arrmul24_and9_12 = 0;
|
|
uint8_t s_arrmul24_fa9_12_xor0 = 0;
|
|
uint8_t s_arrmul24_fa9_12_and0 = 0;
|
|
uint8_t s_arrmul24_fa9_12_xor1 = 0;
|
|
uint8_t s_arrmul24_fa9_12_and1 = 0;
|
|
uint8_t s_arrmul24_fa9_12_or0 = 0;
|
|
uint8_t s_arrmul24_and10_12 = 0;
|
|
uint8_t s_arrmul24_fa10_12_xor0 = 0;
|
|
uint8_t s_arrmul24_fa10_12_and0 = 0;
|
|
uint8_t s_arrmul24_fa10_12_xor1 = 0;
|
|
uint8_t s_arrmul24_fa10_12_and1 = 0;
|
|
uint8_t s_arrmul24_fa10_12_or0 = 0;
|
|
uint8_t s_arrmul24_and11_12 = 0;
|
|
uint8_t s_arrmul24_fa11_12_xor0 = 0;
|
|
uint8_t s_arrmul24_fa11_12_and0 = 0;
|
|
uint8_t s_arrmul24_fa11_12_xor1 = 0;
|
|
uint8_t s_arrmul24_fa11_12_and1 = 0;
|
|
uint8_t s_arrmul24_fa11_12_or0 = 0;
|
|
uint8_t s_arrmul24_and12_12 = 0;
|
|
uint8_t s_arrmul24_fa12_12_xor0 = 0;
|
|
uint8_t s_arrmul24_fa12_12_and0 = 0;
|
|
uint8_t s_arrmul24_fa12_12_xor1 = 0;
|
|
uint8_t s_arrmul24_fa12_12_and1 = 0;
|
|
uint8_t s_arrmul24_fa12_12_or0 = 0;
|
|
uint8_t s_arrmul24_and13_12 = 0;
|
|
uint8_t s_arrmul24_fa13_12_xor0 = 0;
|
|
uint8_t s_arrmul24_fa13_12_and0 = 0;
|
|
uint8_t s_arrmul24_fa13_12_xor1 = 0;
|
|
uint8_t s_arrmul24_fa13_12_and1 = 0;
|
|
uint8_t s_arrmul24_fa13_12_or0 = 0;
|
|
uint8_t s_arrmul24_and14_12 = 0;
|
|
uint8_t s_arrmul24_fa14_12_xor0 = 0;
|
|
uint8_t s_arrmul24_fa14_12_and0 = 0;
|
|
uint8_t s_arrmul24_fa14_12_xor1 = 0;
|
|
uint8_t s_arrmul24_fa14_12_and1 = 0;
|
|
uint8_t s_arrmul24_fa14_12_or0 = 0;
|
|
uint8_t s_arrmul24_and15_12 = 0;
|
|
uint8_t s_arrmul24_fa15_12_xor0 = 0;
|
|
uint8_t s_arrmul24_fa15_12_and0 = 0;
|
|
uint8_t s_arrmul24_fa15_12_xor1 = 0;
|
|
uint8_t s_arrmul24_fa15_12_and1 = 0;
|
|
uint8_t s_arrmul24_fa15_12_or0 = 0;
|
|
uint8_t s_arrmul24_and16_12 = 0;
|
|
uint8_t s_arrmul24_fa16_12_xor0 = 0;
|
|
uint8_t s_arrmul24_fa16_12_and0 = 0;
|
|
uint8_t s_arrmul24_fa16_12_xor1 = 0;
|
|
uint8_t s_arrmul24_fa16_12_and1 = 0;
|
|
uint8_t s_arrmul24_fa16_12_or0 = 0;
|
|
uint8_t s_arrmul24_and17_12 = 0;
|
|
uint8_t s_arrmul24_fa17_12_xor0 = 0;
|
|
uint8_t s_arrmul24_fa17_12_and0 = 0;
|
|
uint8_t s_arrmul24_fa17_12_xor1 = 0;
|
|
uint8_t s_arrmul24_fa17_12_and1 = 0;
|
|
uint8_t s_arrmul24_fa17_12_or0 = 0;
|
|
uint8_t s_arrmul24_and18_12 = 0;
|
|
uint8_t s_arrmul24_fa18_12_xor0 = 0;
|
|
uint8_t s_arrmul24_fa18_12_and0 = 0;
|
|
uint8_t s_arrmul24_fa18_12_xor1 = 0;
|
|
uint8_t s_arrmul24_fa18_12_and1 = 0;
|
|
uint8_t s_arrmul24_fa18_12_or0 = 0;
|
|
uint8_t s_arrmul24_and19_12 = 0;
|
|
uint8_t s_arrmul24_fa19_12_xor0 = 0;
|
|
uint8_t s_arrmul24_fa19_12_and0 = 0;
|
|
uint8_t s_arrmul24_fa19_12_xor1 = 0;
|
|
uint8_t s_arrmul24_fa19_12_and1 = 0;
|
|
uint8_t s_arrmul24_fa19_12_or0 = 0;
|
|
uint8_t s_arrmul24_and20_12 = 0;
|
|
uint8_t s_arrmul24_fa20_12_xor0 = 0;
|
|
uint8_t s_arrmul24_fa20_12_and0 = 0;
|
|
uint8_t s_arrmul24_fa20_12_xor1 = 0;
|
|
uint8_t s_arrmul24_fa20_12_and1 = 0;
|
|
uint8_t s_arrmul24_fa20_12_or0 = 0;
|
|
uint8_t s_arrmul24_and21_12 = 0;
|
|
uint8_t s_arrmul24_fa21_12_xor0 = 0;
|
|
uint8_t s_arrmul24_fa21_12_and0 = 0;
|
|
uint8_t s_arrmul24_fa21_12_xor1 = 0;
|
|
uint8_t s_arrmul24_fa21_12_and1 = 0;
|
|
uint8_t s_arrmul24_fa21_12_or0 = 0;
|
|
uint8_t s_arrmul24_and22_12 = 0;
|
|
uint8_t s_arrmul24_fa22_12_xor0 = 0;
|
|
uint8_t s_arrmul24_fa22_12_and0 = 0;
|
|
uint8_t s_arrmul24_fa22_12_xor1 = 0;
|
|
uint8_t s_arrmul24_fa22_12_and1 = 0;
|
|
uint8_t s_arrmul24_fa22_12_or0 = 0;
|
|
uint8_t s_arrmul24_nand23_12 = 0;
|
|
uint8_t s_arrmul24_fa23_12_xor0 = 0;
|
|
uint8_t s_arrmul24_fa23_12_and0 = 0;
|
|
uint8_t s_arrmul24_fa23_12_xor1 = 0;
|
|
uint8_t s_arrmul24_fa23_12_and1 = 0;
|
|
uint8_t s_arrmul24_fa23_12_or0 = 0;
|
|
uint8_t s_arrmul24_and0_13 = 0;
|
|
uint8_t s_arrmul24_ha0_13_xor0 = 0;
|
|
uint8_t s_arrmul24_ha0_13_and0 = 0;
|
|
uint8_t s_arrmul24_and1_13 = 0;
|
|
uint8_t s_arrmul24_fa1_13_xor0 = 0;
|
|
uint8_t s_arrmul24_fa1_13_and0 = 0;
|
|
uint8_t s_arrmul24_fa1_13_xor1 = 0;
|
|
uint8_t s_arrmul24_fa1_13_and1 = 0;
|
|
uint8_t s_arrmul24_fa1_13_or0 = 0;
|
|
uint8_t s_arrmul24_and2_13 = 0;
|
|
uint8_t s_arrmul24_fa2_13_xor0 = 0;
|
|
uint8_t s_arrmul24_fa2_13_and0 = 0;
|
|
uint8_t s_arrmul24_fa2_13_xor1 = 0;
|
|
uint8_t s_arrmul24_fa2_13_and1 = 0;
|
|
uint8_t s_arrmul24_fa2_13_or0 = 0;
|
|
uint8_t s_arrmul24_and3_13 = 0;
|
|
uint8_t s_arrmul24_fa3_13_xor0 = 0;
|
|
uint8_t s_arrmul24_fa3_13_and0 = 0;
|
|
uint8_t s_arrmul24_fa3_13_xor1 = 0;
|
|
uint8_t s_arrmul24_fa3_13_and1 = 0;
|
|
uint8_t s_arrmul24_fa3_13_or0 = 0;
|
|
uint8_t s_arrmul24_and4_13 = 0;
|
|
uint8_t s_arrmul24_fa4_13_xor0 = 0;
|
|
uint8_t s_arrmul24_fa4_13_and0 = 0;
|
|
uint8_t s_arrmul24_fa4_13_xor1 = 0;
|
|
uint8_t s_arrmul24_fa4_13_and1 = 0;
|
|
uint8_t s_arrmul24_fa4_13_or0 = 0;
|
|
uint8_t s_arrmul24_and5_13 = 0;
|
|
uint8_t s_arrmul24_fa5_13_xor0 = 0;
|
|
uint8_t s_arrmul24_fa5_13_and0 = 0;
|
|
uint8_t s_arrmul24_fa5_13_xor1 = 0;
|
|
uint8_t s_arrmul24_fa5_13_and1 = 0;
|
|
uint8_t s_arrmul24_fa5_13_or0 = 0;
|
|
uint8_t s_arrmul24_and6_13 = 0;
|
|
uint8_t s_arrmul24_fa6_13_xor0 = 0;
|
|
uint8_t s_arrmul24_fa6_13_and0 = 0;
|
|
uint8_t s_arrmul24_fa6_13_xor1 = 0;
|
|
uint8_t s_arrmul24_fa6_13_and1 = 0;
|
|
uint8_t s_arrmul24_fa6_13_or0 = 0;
|
|
uint8_t s_arrmul24_and7_13 = 0;
|
|
uint8_t s_arrmul24_fa7_13_xor0 = 0;
|
|
uint8_t s_arrmul24_fa7_13_and0 = 0;
|
|
uint8_t s_arrmul24_fa7_13_xor1 = 0;
|
|
uint8_t s_arrmul24_fa7_13_and1 = 0;
|
|
uint8_t s_arrmul24_fa7_13_or0 = 0;
|
|
uint8_t s_arrmul24_and8_13 = 0;
|
|
uint8_t s_arrmul24_fa8_13_xor0 = 0;
|
|
uint8_t s_arrmul24_fa8_13_and0 = 0;
|
|
uint8_t s_arrmul24_fa8_13_xor1 = 0;
|
|
uint8_t s_arrmul24_fa8_13_and1 = 0;
|
|
uint8_t s_arrmul24_fa8_13_or0 = 0;
|
|
uint8_t s_arrmul24_and9_13 = 0;
|
|
uint8_t s_arrmul24_fa9_13_xor0 = 0;
|
|
uint8_t s_arrmul24_fa9_13_and0 = 0;
|
|
uint8_t s_arrmul24_fa9_13_xor1 = 0;
|
|
uint8_t s_arrmul24_fa9_13_and1 = 0;
|
|
uint8_t s_arrmul24_fa9_13_or0 = 0;
|
|
uint8_t s_arrmul24_and10_13 = 0;
|
|
uint8_t s_arrmul24_fa10_13_xor0 = 0;
|
|
uint8_t s_arrmul24_fa10_13_and0 = 0;
|
|
uint8_t s_arrmul24_fa10_13_xor1 = 0;
|
|
uint8_t s_arrmul24_fa10_13_and1 = 0;
|
|
uint8_t s_arrmul24_fa10_13_or0 = 0;
|
|
uint8_t s_arrmul24_and11_13 = 0;
|
|
uint8_t s_arrmul24_fa11_13_xor0 = 0;
|
|
uint8_t s_arrmul24_fa11_13_and0 = 0;
|
|
uint8_t s_arrmul24_fa11_13_xor1 = 0;
|
|
uint8_t s_arrmul24_fa11_13_and1 = 0;
|
|
uint8_t s_arrmul24_fa11_13_or0 = 0;
|
|
uint8_t s_arrmul24_and12_13 = 0;
|
|
uint8_t s_arrmul24_fa12_13_xor0 = 0;
|
|
uint8_t s_arrmul24_fa12_13_and0 = 0;
|
|
uint8_t s_arrmul24_fa12_13_xor1 = 0;
|
|
uint8_t s_arrmul24_fa12_13_and1 = 0;
|
|
uint8_t s_arrmul24_fa12_13_or0 = 0;
|
|
uint8_t s_arrmul24_and13_13 = 0;
|
|
uint8_t s_arrmul24_fa13_13_xor0 = 0;
|
|
uint8_t s_arrmul24_fa13_13_and0 = 0;
|
|
uint8_t s_arrmul24_fa13_13_xor1 = 0;
|
|
uint8_t s_arrmul24_fa13_13_and1 = 0;
|
|
uint8_t s_arrmul24_fa13_13_or0 = 0;
|
|
uint8_t s_arrmul24_and14_13 = 0;
|
|
uint8_t s_arrmul24_fa14_13_xor0 = 0;
|
|
uint8_t s_arrmul24_fa14_13_and0 = 0;
|
|
uint8_t s_arrmul24_fa14_13_xor1 = 0;
|
|
uint8_t s_arrmul24_fa14_13_and1 = 0;
|
|
uint8_t s_arrmul24_fa14_13_or0 = 0;
|
|
uint8_t s_arrmul24_and15_13 = 0;
|
|
uint8_t s_arrmul24_fa15_13_xor0 = 0;
|
|
uint8_t s_arrmul24_fa15_13_and0 = 0;
|
|
uint8_t s_arrmul24_fa15_13_xor1 = 0;
|
|
uint8_t s_arrmul24_fa15_13_and1 = 0;
|
|
uint8_t s_arrmul24_fa15_13_or0 = 0;
|
|
uint8_t s_arrmul24_and16_13 = 0;
|
|
uint8_t s_arrmul24_fa16_13_xor0 = 0;
|
|
uint8_t s_arrmul24_fa16_13_and0 = 0;
|
|
uint8_t s_arrmul24_fa16_13_xor1 = 0;
|
|
uint8_t s_arrmul24_fa16_13_and1 = 0;
|
|
uint8_t s_arrmul24_fa16_13_or0 = 0;
|
|
uint8_t s_arrmul24_and17_13 = 0;
|
|
uint8_t s_arrmul24_fa17_13_xor0 = 0;
|
|
uint8_t s_arrmul24_fa17_13_and0 = 0;
|
|
uint8_t s_arrmul24_fa17_13_xor1 = 0;
|
|
uint8_t s_arrmul24_fa17_13_and1 = 0;
|
|
uint8_t s_arrmul24_fa17_13_or0 = 0;
|
|
uint8_t s_arrmul24_and18_13 = 0;
|
|
uint8_t s_arrmul24_fa18_13_xor0 = 0;
|
|
uint8_t s_arrmul24_fa18_13_and0 = 0;
|
|
uint8_t s_arrmul24_fa18_13_xor1 = 0;
|
|
uint8_t s_arrmul24_fa18_13_and1 = 0;
|
|
uint8_t s_arrmul24_fa18_13_or0 = 0;
|
|
uint8_t s_arrmul24_and19_13 = 0;
|
|
uint8_t s_arrmul24_fa19_13_xor0 = 0;
|
|
uint8_t s_arrmul24_fa19_13_and0 = 0;
|
|
uint8_t s_arrmul24_fa19_13_xor1 = 0;
|
|
uint8_t s_arrmul24_fa19_13_and1 = 0;
|
|
uint8_t s_arrmul24_fa19_13_or0 = 0;
|
|
uint8_t s_arrmul24_and20_13 = 0;
|
|
uint8_t s_arrmul24_fa20_13_xor0 = 0;
|
|
uint8_t s_arrmul24_fa20_13_and0 = 0;
|
|
uint8_t s_arrmul24_fa20_13_xor1 = 0;
|
|
uint8_t s_arrmul24_fa20_13_and1 = 0;
|
|
uint8_t s_arrmul24_fa20_13_or0 = 0;
|
|
uint8_t s_arrmul24_and21_13 = 0;
|
|
uint8_t s_arrmul24_fa21_13_xor0 = 0;
|
|
uint8_t s_arrmul24_fa21_13_and0 = 0;
|
|
uint8_t s_arrmul24_fa21_13_xor1 = 0;
|
|
uint8_t s_arrmul24_fa21_13_and1 = 0;
|
|
uint8_t s_arrmul24_fa21_13_or0 = 0;
|
|
uint8_t s_arrmul24_and22_13 = 0;
|
|
uint8_t s_arrmul24_fa22_13_xor0 = 0;
|
|
uint8_t s_arrmul24_fa22_13_and0 = 0;
|
|
uint8_t s_arrmul24_fa22_13_xor1 = 0;
|
|
uint8_t s_arrmul24_fa22_13_and1 = 0;
|
|
uint8_t s_arrmul24_fa22_13_or0 = 0;
|
|
uint8_t s_arrmul24_nand23_13 = 0;
|
|
uint8_t s_arrmul24_fa23_13_xor0 = 0;
|
|
uint8_t s_arrmul24_fa23_13_and0 = 0;
|
|
uint8_t s_arrmul24_fa23_13_xor1 = 0;
|
|
uint8_t s_arrmul24_fa23_13_and1 = 0;
|
|
uint8_t s_arrmul24_fa23_13_or0 = 0;
|
|
uint8_t s_arrmul24_and0_14 = 0;
|
|
uint8_t s_arrmul24_ha0_14_xor0 = 0;
|
|
uint8_t s_arrmul24_ha0_14_and0 = 0;
|
|
uint8_t s_arrmul24_and1_14 = 0;
|
|
uint8_t s_arrmul24_fa1_14_xor0 = 0;
|
|
uint8_t s_arrmul24_fa1_14_and0 = 0;
|
|
uint8_t s_arrmul24_fa1_14_xor1 = 0;
|
|
uint8_t s_arrmul24_fa1_14_and1 = 0;
|
|
uint8_t s_arrmul24_fa1_14_or0 = 0;
|
|
uint8_t s_arrmul24_and2_14 = 0;
|
|
uint8_t s_arrmul24_fa2_14_xor0 = 0;
|
|
uint8_t s_arrmul24_fa2_14_and0 = 0;
|
|
uint8_t s_arrmul24_fa2_14_xor1 = 0;
|
|
uint8_t s_arrmul24_fa2_14_and1 = 0;
|
|
uint8_t s_arrmul24_fa2_14_or0 = 0;
|
|
uint8_t s_arrmul24_and3_14 = 0;
|
|
uint8_t s_arrmul24_fa3_14_xor0 = 0;
|
|
uint8_t s_arrmul24_fa3_14_and0 = 0;
|
|
uint8_t s_arrmul24_fa3_14_xor1 = 0;
|
|
uint8_t s_arrmul24_fa3_14_and1 = 0;
|
|
uint8_t s_arrmul24_fa3_14_or0 = 0;
|
|
uint8_t s_arrmul24_and4_14 = 0;
|
|
uint8_t s_arrmul24_fa4_14_xor0 = 0;
|
|
uint8_t s_arrmul24_fa4_14_and0 = 0;
|
|
uint8_t s_arrmul24_fa4_14_xor1 = 0;
|
|
uint8_t s_arrmul24_fa4_14_and1 = 0;
|
|
uint8_t s_arrmul24_fa4_14_or0 = 0;
|
|
uint8_t s_arrmul24_and5_14 = 0;
|
|
uint8_t s_arrmul24_fa5_14_xor0 = 0;
|
|
uint8_t s_arrmul24_fa5_14_and0 = 0;
|
|
uint8_t s_arrmul24_fa5_14_xor1 = 0;
|
|
uint8_t s_arrmul24_fa5_14_and1 = 0;
|
|
uint8_t s_arrmul24_fa5_14_or0 = 0;
|
|
uint8_t s_arrmul24_and6_14 = 0;
|
|
uint8_t s_arrmul24_fa6_14_xor0 = 0;
|
|
uint8_t s_arrmul24_fa6_14_and0 = 0;
|
|
uint8_t s_arrmul24_fa6_14_xor1 = 0;
|
|
uint8_t s_arrmul24_fa6_14_and1 = 0;
|
|
uint8_t s_arrmul24_fa6_14_or0 = 0;
|
|
uint8_t s_arrmul24_and7_14 = 0;
|
|
uint8_t s_arrmul24_fa7_14_xor0 = 0;
|
|
uint8_t s_arrmul24_fa7_14_and0 = 0;
|
|
uint8_t s_arrmul24_fa7_14_xor1 = 0;
|
|
uint8_t s_arrmul24_fa7_14_and1 = 0;
|
|
uint8_t s_arrmul24_fa7_14_or0 = 0;
|
|
uint8_t s_arrmul24_and8_14 = 0;
|
|
uint8_t s_arrmul24_fa8_14_xor0 = 0;
|
|
uint8_t s_arrmul24_fa8_14_and0 = 0;
|
|
uint8_t s_arrmul24_fa8_14_xor1 = 0;
|
|
uint8_t s_arrmul24_fa8_14_and1 = 0;
|
|
uint8_t s_arrmul24_fa8_14_or0 = 0;
|
|
uint8_t s_arrmul24_and9_14 = 0;
|
|
uint8_t s_arrmul24_fa9_14_xor0 = 0;
|
|
uint8_t s_arrmul24_fa9_14_and0 = 0;
|
|
uint8_t s_arrmul24_fa9_14_xor1 = 0;
|
|
uint8_t s_arrmul24_fa9_14_and1 = 0;
|
|
uint8_t s_arrmul24_fa9_14_or0 = 0;
|
|
uint8_t s_arrmul24_and10_14 = 0;
|
|
uint8_t s_arrmul24_fa10_14_xor0 = 0;
|
|
uint8_t s_arrmul24_fa10_14_and0 = 0;
|
|
uint8_t s_arrmul24_fa10_14_xor1 = 0;
|
|
uint8_t s_arrmul24_fa10_14_and1 = 0;
|
|
uint8_t s_arrmul24_fa10_14_or0 = 0;
|
|
uint8_t s_arrmul24_and11_14 = 0;
|
|
uint8_t s_arrmul24_fa11_14_xor0 = 0;
|
|
uint8_t s_arrmul24_fa11_14_and0 = 0;
|
|
uint8_t s_arrmul24_fa11_14_xor1 = 0;
|
|
uint8_t s_arrmul24_fa11_14_and1 = 0;
|
|
uint8_t s_arrmul24_fa11_14_or0 = 0;
|
|
uint8_t s_arrmul24_and12_14 = 0;
|
|
uint8_t s_arrmul24_fa12_14_xor0 = 0;
|
|
uint8_t s_arrmul24_fa12_14_and0 = 0;
|
|
uint8_t s_arrmul24_fa12_14_xor1 = 0;
|
|
uint8_t s_arrmul24_fa12_14_and1 = 0;
|
|
uint8_t s_arrmul24_fa12_14_or0 = 0;
|
|
uint8_t s_arrmul24_and13_14 = 0;
|
|
uint8_t s_arrmul24_fa13_14_xor0 = 0;
|
|
uint8_t s_arrmul24_fa13_14_and0 = 0;
|
|
uint8_t s_arrmul24_fa13_14_xor1 = 0;
|
|
uint8_t s_arrmul24_fa13_14_and1 = 0;
|
|
uint8_t s_arrmul24_fa13_14_or0 = 0;
|
|
uint8_t s_arrmul24_and14_14 = 0;
|
|
uint8_t s_arrmul24_fa14_14_xor0 = 0;
|
|
uint8_t s_arrmul24_fa14_14_and0 = 0;
|
|
uint8_t s_arrmul24_fa14_14_xor1 = 0;
|
|
uint8_t s_arrmul24_fa14_14_and1 = 0;
|
|
uint8_t s_arrmul24_fa14_14_or0 = 0;
|
|
uint8_t s_arrmul24_and15_14 = 0;
|
|
uint8_t s_arrmul24_fa15_14_xor0 = 0;
|
|
uint8_t s_arrmul24_fa15_14_and0 = 0;
|
|
uint8_t s_arrmul24_fa15_14_xor1 = 0;
|
|
uint8_t s_arrmul24_fa15_14_and1 = 0;
|
|
uint8_t s_arrmul24_fa15_14_or0 = 0;
|
|
uint8_t s_arrmul24_and16_14 = 0;
|
|
uint8_t s_arrmul24_fa16_14_xor0 = 0;
|
|
uint8_t s_arrmul24_fa16_14_and0 = 0;
|
|
uint8_t s_arrmul24_fa16_14_xor1 = 0;
|
|
uint8_t s_arrmul24_fa16_14_and1 = 0;
|
|
uint8_t s_arrmul24_fa16_14_or0 = 0;
|
|
uint8_t s_arrmul24_and17_14 = 0;
|
|
uint8_t s_arrmul24_fa17_14_xor0 = 0;
|
|
uint8_t s_arrmul24_fa17_14_and0 = 0;
|
|
uint8_t s_arrmul24_fa17_14_xor1 = 0;
|
|
uint8_t s_arrmul24_fa17_14_and1 = 0;
|
|
uint8_t s_arrmul24_fa17_14_or0 = 0;
|
|
uint8_t s_arrmul24_and18_14 = 0;
|
|
uint8_t s_arrmul24_fa18_14_xor0 = 0;
|
|
uint8_t s_arrmul24_fa18_14_and0 = 0;
|
|
uint8_t s_arrmul24_fa18_14_xor1 = 0;
|
|
uint8_t s_arrmul24_fa18_14_and1 = 0;
|
|
uint8_t s_arrmul24_fa18_14_or0 = 0;
|
|
uint8_t s_arrmul24_and19_14 = 0;
|
|
uint8_t s_arrmul24_fa19_14_xor0 = 0;
|
|
uint8_t s_arrmul24_fa19_14_and0 = 0;
|
|
uint8_t s_arrmul24_fa19_14_xor1 = 0;
|
|
uint8_t s_arrmul24_fa19_14_and1 = 0;
|
|
uint8_t s_arrmul24_fa19_14_or0 = 0;
|
|
uint8_t s_arrmul24_and20_14 = 0;
|
|
uint8_t s_arrmul24_fa20_14_xor0 = 0;
|
|
uint8_t s_arrmul24_fa20_14_and0 = 0;
|
|
uint8_t s_arrmul24_fa20_14_xor1 = 0;
|
|
uint8_t s_arrmul24_fa20_14_and1 = 0;
|
|
uint8_t s_arrmul24_fa20_14_or0 = 0;
|
|
uint8_t s_arrmul24_and21_14 = 0;
|
|
uint8_t s_arrmul24_fa21_14_xor0 = 0;
|
|
uint8_t s_arrmul24_fa21_14_and0 = 0;
|
|
uint8_t s_arrmul24_fa21_14_xor1 = 0;
|
|
uint8_t s_arrmul24_fa21_14_and1 = 0;
|
|
uint8_t s_arrmul24_fa21_14_or0 = 0;
|
|
uint8_t s_arrmul24_and22_14 = 0;
|
|
uint8_t s_arrmul24_fa22_14_xor0 = 0;
|
|
uint8_t s_arrmul24_fa22_14_and0 = 0;
|
|
uint8_t s_arrmul24_fa22_14_xor1 = 0;
|
|
uint8_t s_arrmul24_fa22_14_and1 = 0;
|
|
uint8_t s_arrmul24_fa22_14_or0 = 0;
|
|
uint8_t s_arrmul24_nand23_14 = 0;
|
|
uint8_t s_arrmul24_fa23_14_xor0 = 0;
|
|
uint8_t s_arrmul24_fa23_14_and0 = 0;
|
|
uint8_t s_arrmul24_fa23_14_xor1 = 0;
|
|
uint8_t s_arrmul24_fa23_14_and1 = 0;
|
|
uint8_t s_arrmul24_fa23_14_or0 = 0;
|
|
uint8_t s_arrmul24_and0_15 = 0;
|
|
uint8_t s_arrmul24_ha0_15_xor0 = 0;
|
|
uint8_t s_arrmul24_ha0_15_and0 = 0;
|
|
uint8_t s_arrmul24_and1_15 = 0;
|
|
uint8_t s_arrmul24_fa1_15_xor0 = 0;
|
|
uint8_t s_arrmul24_fa1_15_and0 = 0;
|
|
uint8_t s_arrmul24_fa1_15_xor1 = 0;
|
|
uint8_t s_arrmul24_fa1_15_and1 = 0;
|
|
uint8_t s_arrmul24_fa1_15_or0 = 0;
|
|
uint8_t s_arrmul24_and2_15 = 0;
|
|
uint8_t s_arrmul24_fa2_15_xor0 = 0;
|
|
uint8_t s_arrmul24_fa2_15_and0 = 0;
|
|
uint8_t s_arrmul24_fa2_15_xor1 = 0;
|
|
uint8_t s_arrmul24_fa2_15_and1 = 0;
|
|
uint8_t s_arrmul24_fa2_15_or0 = 0;
|
|
uint8_t s_arrmul24_and3_15 = 0;
|
|
uint8_t s_arrmul24_fa3_15_xor0 = 0;
|
|
uint8_t s_arrmul24_fa3_15_and0 = 0;
|
|
uint8_t s_arrmul24_fa3_15_xor1 = 0;
|
|
uint8_t s_arrmul24_fa3_15_and1 = 0;
|
|
uint8_t s_arrmul24_fa3_15_or0 = 0;
|
|
uint8_t s_arrmul24_and4_15 = 0;
|
|
uint8_t s_arrmul24_fa4_15_xor0 = 0;
|
|
uint8_t s_arrmul24_fa4_15_and0 = 0;
|
|
uint8_t s_arrmul24_fa4_15_xor1 = 0;
|
|
uint8_t s_arrmul24_fa4_15_and1 = 0;
|
|
uint8_t s_arrmul24_fa4_15_or0 = 0;
|
|
uint8_t s_arrmul24_and5_15 = 0;
|
|
uint8_t s_arrmul24_fa5_15_xor0 = 0;
|
|
uint8_t s_arrmul24_fa5_15_and0 = 0;
|
|
uint8_t s_arrmul24_fa5_15_xor1 = 0;
|
|
uint8_t s_arrmul24_fa5_15_and1 = 0;
|
|
uint8_t s_arrmul24_fa5_15_or0 = 0;
|
|
uint8_t s_arrmul24_and6_15 = 0;
|
|
uint8_t s_arrmul24_fa6_15_xor0 = 0;
|
|
uint8_t s_arrmul24_fa6_15_and0 = 0;
|
|
uint8_t s_arrmul24_fa6_15_xor1 = 0;
|
|
uint8_t s_arrmul24_fa6_15_and1 = 0;
|
|
uint8_t s_arrmul24_fa6_15_or0 = 0;
|
|
uint8_t s_arrmul24_and7_15 = 0;
|
|
uint8_t s_arrmul24_fa7_15_xor0 = 0;
|
|
uint8_t s_arrmul24_fa7_15_and0 = 0;
|
|
uint8_t s_arrmul24_fa7_15_xor1 = 0;
|
|
uint8_t s_arrmul24_fa7_15_and1 = 0;
|
|
uint8_t s_arrmul24_fa7_15_or0 = 0;
|
|
uint8_t s_arrmul24_and8_15 = 0;
|
|
uint8_t s_arrmul24_fa8_15_xor0 = 0;
|
|
uint8_t s_arrmul24_fa8_15_and0 = 0;
|
|
uint8_t s_arrmul24_fa8_15_xor1 = 0;
|
|
uint8_t s_arrmul24_fa8_15_and1 = 0;
|
|
uint8_t s_arrmul24_fa8_15_or0 = 0;
|
|
uint8_t s_arrmul24_and9_15 = 0;
|
|
uint8_t s_arrmul24_fa9_15_xor0 = 0;
|
|
uint8_t s_arrmul24_fa9_15_and0 = 0;
|
|
uint8_t s_arrmul24_fa9_15_xor1 = 0;
|
|
uint8_t s_arrmul24_fa9_15_and1 = 0;
|
|
uint8_t s_arrmul24_fa9_15_or0 = 0;
|
|
uint8_t s_arrmul24_and10_15 = 0;
|
|
uint8_t s_arrmul24_fa10_15_xor0 = 0;
|
|
uint8_t s_arrmul24_fa10_15_and0 = 0;
|
|
uint8_t s_arrmul24_fa10_15_xor1 = 0;
|
|
uint8_t s_arrmul24_fa10_15_and1 = 0;
|
|
uint8_t s_arrmul24_fa10_15_or0 = 0;
|
|
uint8_t s_arrmul24_and11_15 = 0;
|
|
uint8_t s_arrmul24_fa11_15_xor0 = 0;
|
|
uint8_t s_arrmul24_fa11_15_and0 = 0;
|
|
uint8_t s_arrmul24_fa11_15_xor1 = 0;
|
|
uint8_t s_arrmul24_fa11_15_and1 = 0;
|
|
uint8_t s_arrmul24_fa11_15_or0 = 0;
|
|
uint8_t s_arrmul24_and12_15 = 0;
|
|
uint8_t s_arrmul24_fa12_15_xor0 = 0;
|
|
uint8_t s_arrmul24_fa12_15_and0 = 0;
|
|
uint8_t s_arrmul24_fa12_15_xor1 = 0;
|
|
uint8_t s_arrmul24_fa12_15_and1 = 0;
|
|
uint8_t s_arrmul24_fa12_15_or0 = 0;
|
|
uint8_t s_arrmul24_and13_15 = 0;
|
|
uint8_t s_arrmul24_fa13_15_xor0 = 0;
|
|
uint8_t s_arrmul24_fa13_15_and0 = 0;
|
|
uint8_t s_arrmul24_fa13_15_xor1 = 0;
|
|
uint8_t s_arrmul24_fa13_15_and1 = 0;
|
|
uint8_t s_arrmul24_fa13_15_or0 = 0;
|
|
uint8_t s_arrmul24_and14_15 = 0;
|
|
uint8_t s_arrmul24_fa14_15_xor0 = 0;
|
|
uint8_t s_arrmul24_fa14_15_and0 = 0;
|
|
uint8_t s_arrmul24_fa14_15_xor1 = 0;
|
|
uint8_t s_arrmul24_fa14_15_and1 = 0;
|
|
uint8_t s_arrmul24_fa14_15_or0 = 0;
|
|
uint8_t s_arrmul24_and15_15 = 0;
|
|
uint8_t s_arrmul24_fa15_15_xor0 = 0;
|
|
uint8_t s_arrmul24_fa15_15_and0 = 0;
|
|
uint8_t s_arrmul24_fa15_15_xor1 = 0;
|
|
uint8_t s_arrmul24_fa15_15_and1 = 0;
|
|
uint8_t s_arrmul24_fa15_15_or0 = 0;
|
|
uint8_t s_arrmul24_and16_15 = 0;
|
|
uint8_t s_arrmul24_fa16_15_xor0 = 0;
|
|
uint8_t s_arrmul24_fa16_15_and0 = 0;
|
|
uint8_t s_arrmul24_fa16_15_xor1 = 0;
|
|
uint8_t s_arrmul24_fa16_15_and1 = 0;
|
|
uint8_t s_arrmul24_fa16_15_or0 = 0;
|
|
uint8_t s_arrmul24_and17_15 = 0;
|
|
uint8_t s_arrmul24_fa17_15_xor0 = 0;
|
|
uint8_t s_arrmul24_fa17_15_and0 = 0;
|
|
uint8_t s_arrmul24_fa17_15_xor1 = 0;
|
|
uint8_t s_arrmul24_fa17_15_and1 = 0;
|
|
uint8_t s_arrmul24_fa17_15_or0 = 0;
|
|
uint8_t s_arrmul24_and18_15 = 0;
|
|
uint8_t s_arrmul24_fa18_15_xor0 = 0;
|
|
uint8_t s_arrmul24_fa18_15_and0 = 0;
|
|
uint8_t s_arrmul24_fa18_15_xor1 = 0;
|
|
uint8_t s_arrmul24_fa18_15_and1 = 0;
|
|
uint8_t s_arrmul24_fa18_15_or0 = 0;
|
|
uint8_t s_arrmul24_and19_15 = 0;
|
|
uint8_t s_arrmul24_fa19_15_xor0 = 0;
|
|
uint8_t s_arrmul24_fa19_15_and0 = 0;
|
|
uint8_t s_arrmul24_fa19_15_xor1 = 0;
|
|
uint8_t s_arrmul24_fa19_15_and1 = 0;
|
|
uint8_t s_arrmul24_fa19_15_or0 = 0;
|
|
uint8_t s_arrmul24_and20_15 = 0;
|
|
uint8_t s_arrmul24_fa20_15_xor0 = 0;
|
|
uint8_t s_arrmul24_fa20_15_and0 = 0;
|
|
uint8_t s_arrmul24_fa20_15_xor1 = 0;
|
|
uint8_t s_arrmul24_fa20_15_and1 = 0;
|
|
uint8_t s_arrmul24_fa20_15_or0 = 0;
|
|
uint8_t s_arrmul24_and21_15 = 0;
|
|
uint8_t s_arrmul24_fa21_15_xor0 = 0;
|
|
uint8_t s_arrmul24_fa21_15_and0 = 0;
|
|
uint8_t s_arrmul24_fa21_15_xor1 = 0;
|
|
uint8_t s_arrmul24_fa21_15_and1 = 0;
|
|
uint8_t s_arrmul24_fa21_15_or0 = 0;
|
|
uint8_t s_arrmul24_and22_15 = 0;
|
|
uint8_t s_arrmul24_fa22_15_xor0 = 0;
|
|
uint8_t s_arrmul24_fa22_15_and0 = 0;
|
|
uint8_t s_arrmul24_fa22_15_xor1 = 0;
|
|
uint8_t s_arrmul24_fa22_15_and1 = 0;
|
|
uint8_t s_arrmul24_fa22_15_or0 = 0;
|
|
uint8_t s_arrmul24_nand23_15 = 0;
|
|
uint8_t s_arrmul24_fa23_15_xor0 = 0;
|
|
uint8_t s_arrmul24_fa23_15_and0 = 0;
|
|
uint8_t s_arrmul24_fa23_15_xor1 = 0;
|
|
uint8_t s_arrmul24_fa23_15_and1 = 0;
|
|
uint8_t s_arrmul24_fa23_15_or0 = 0;
|
|
uint8_t s_arrmul24_and0_16 = 0;
|
|
uint8_t s_arrmul24_ha0_16_xor0 = 0;
|
|
uint8_t s_arrmul24_ha0_16_and0 = 0;
|
|
uint8_t s_arrmul24_and1_16 = 0;
|
|
uint8_t s_arrmul24_fa1_16_xor0 = 0;
|
|
uint8_t s_arrmul24_fa1_16_and0 = 0;
|
|
uint8_t s_arrmul24_fa1_16_xor1 = 0;
|
|
uint8_t s_arrmul24_fa1_16_and1 = 0;
|
|
uint8_t s_arrmul24_fa1_16_or0 = 0;
|
|
uint8_t s_arrmul24_and2_16 = 0;
|
|
uint8_t s_arrmul24_fa2_16_xor0 = 0;
|
|
uint8_t s_arrmul24_fa2_16_and0 = 0;
|
|
uint8_t s_arrmul24_fa2_16_xor1 = 0;
|
|
uint8_t s_arrmul24_fa2_16_and1 = 0;
|
|
uint8_t s_arrmul24_fa2_16_or0 = 0;
|
|
uint8_t s_arrmul24_and3_16 = 0;
|
|
uint8_t s_arrmul24_fa3_16_xor0 = 0;
|
|
uint8_t s_arrmul24_fa3_16_and0 = 0;
|
|
uint8_t s_arrmul24_fa3_16_xor1 = 0;
|
|
uint8_t s_arrmul24_fa3_16_and1 = 0;
|
|
uint8_t s_arrmul24_fa3_16_or0 = 0;
|
|
uint8_t s_arrmul24_and4_16 = 0;
|
|
uint8_t s_arrmul24_fa4_16_xor0 = 0;
|
|
uint8_t s_arrmul24_fa4_16_and0 = 0;
|
|
uint8_t s_arrmul24_fa4_16_xor1 = 0;
|
|
uint8_t s_arrmul24_fa4_16_and1 = 0;
|
|
uint8_t s_arrmul24_fa4_16_or0 = 0;
|
|
uint8_t s_arrmul24_and5_16 = 0;
|
|
uint8_t s_arrmul24_fa5_16_xor0 = 0;
|
|
uint8_t s_arrmul24_fa5_16_and0 = 0;
|
|
uint8_t s_arrmul24_fa5_16_xor1 = 0;
|
|
uint8_t s_arrmul24_fa5_16_and1 = 0;
|
|
uint8_t s_arrmul24_fa5_16_or0 = 0;
|
|
uint8_t s_arrmul24_and6_16 = 0;
|
|
uint8_t s_arrmul24_fa6_16_xor0 = 0;
|
|
uint8_t s_arrmul24_fa6_16_and0 = 0;
|
|
uint8_t s_arrmul24_fa6_16_xor1 = 0;
|
|
uint8_t s_arrmul24_fa6_16_and1 = 0;
|
|
uint8_t s_arrmul24_fa6_16_or0 = 0;
|
|
uint8_t s_arrmul24_and7_16 = 0;
|
|
uint8_t s_arrmul24_fa7_16_xor0 = 0;
|
|
uint8_t s_arrmul24_fa7_16_and0 = 0;
|
|
uint8_t s_arrmul24_fa7_16_xor1 = 0;
|
|
uint8_t s_arrmul24_fa7_16_and1 = 0;
|
|
uint8_t s_arrmul24_fa7_16_or0 = 0;
|
|
uint8_t s_arrmul24_and8_16 = 0;
|
|
uint8_t s_arrmul24_fa8_16_xor0 = 0;
|
|
uint8_t s_arrmul24_fa8_16_and0 = 0;
|
|
uint8_t s_arrmul24_fa8_16_xor1 = 0;
|
|
uint8_t s_arrmul24_fa8_16_and1 = 0;
|
|
uint8_t s_arrmul24_fa8_16_or0 = 0;
|
|
uint8_t s_arrmul24_and9_16 = 0;
|
|
uint8_t s_arrmul24_fa9_16_xor0 = 0;
|
|
uint8_t s_arrmul24_fa9_16_and0 = 0;
|
|
uint8_t s_arrmul24_fa9_16_xor1 = 0;
|
|
uint8_t s_arrmul24_fa9_16_and1 = 0;
|
|
uint8_t s_arrmul24_fa9_16_or0 = 0;
|
|
uint8_t s_arrmul24_and10_16 = 0;
|
|
uint8_t s_arrmul24_fa10_16_xor0 = 0;
|
|
uint8_t s_arrmul24_fa10_16_and0 = 0;
|
|
uint8_t s_arrmul24_fa10_16_xor1 = 0;
|
|
uint8_t s_arrmul24_fa10_16_and1 = 0;
|
|
uint8_t s_arrmul24_fa10_16_or0 = 0;
|
|
uint8_t s_arrmul24_and11_16 = 0;
|
|
uint8_t s_arrmul24_fa11_16_xor0 = 0;
|
|
uint8_t s_arrmul24_fa11_16_and0 = 0;
|
|
uint8_t s_arrmul24_fa11_16_xor1 = 0;
|
|
uint8_t s_arrmul24_fa11_16_and1 = 0;
|
|
uint8_t s_arrmul24_fa11_16_or0 = 0;
|
|
uint8_t s_arrmul24_and12_16 = 0;
|
|
uint8_t s_arrmul24_fa12_16_xor0 = 0;
|
|
uint8_t s_arrmul24_fa12_16_and0 = 0;
|
|
uint8_t s_arrmul24_fa12_16_xor1 = 0;
|
|
uint8_t s_arrmul24_fa12_16_and1 = 0;
|
|
uint8_t s_arrmul24_fa12_16_or0 = 0;
|
|
uint8_t s_arrmul24_and13_16 = 0;
|
|
uint8_t s_arrmul24_fa13_16_xor0 = 0;
|
|
uint8_t s_arrmul24_fa13_16_and0 = 0;
|
|
uint8_t s_arrmul24_fa13_16_xor1 = 0;
|
|
uint8_t s_arrmul24_fa13_16_and1 = 0;
|
|
uint8_t s_arrmul24_fa13_16_or0 = 0;
|
|
uint8_t s_arrmul24_and14_16 = 0;
|
|
uint8_t s_arrmul24_fa14_16_xor0 = 0;
|
|
uint8_t s_arrmul24_fa14_16_and0 = 0;
|
|
uint8_t s_arrmul24_fa14_16_xor1 = 0;
|
|
uint8_t s_arrmul24_fa14_16_and1 = 0;
|
|
uint8_t s_arrmul24_fa14_16_or0 = 0;
|
|
uint8_t s_arrmul24_and15_16 = 0;
|
|
uint8_t s_arrmul24_fa15_16_xor0 = 0;
|
|
uint8_t s_arrmul24_fa15_16_and0 = 0;
|
|
uint8_t s_arrmul24_fa15_16_xor1 = 0;
|
|
uint8_t s_arrmul24_fa15_16_and1 = 0;
|
|
uint8_t s_arrmul24_fa15_16_or0 = 0;
|
|
uint8_t s_arrmul24_and16_16 = 0;
|
|
uint8_t s_arrmul24_fa16_16_xor0 = 0;
|
|
uint8_t s_arrmul24_fa16_16_and0 = 0;
|
|
uint8_t s_arrmul24_fa16_16_xor1 = 0;
|
|
uint8_t s_arrmul24_fa16_16_and1 = 0;
|
|
uint8_t s_arrmul24_fa16_16_or0 = 0;
|
|
uint8_t s_arrmul24_and17_16 = 0;
|
|
uint8_t s_arrmul24_fa17_16_xor0 = 0;
|
|
uint8_t s_arrmul24_fa17_16_and0 = 0;
|
|
uint8_t s_arrmul24_fa17_16_xor1 = 0;
|
|
uint8_t s_arrmul24_fa17_16_and1 = 0;
|
|
uint8_t s_arrmul24_fa17_16_or0 = 0;
|
|
uint8_t s_arrmul24_and18_16 = 0;
|
|
uint8_t s_arrmul24_fa18_16_xor0 = 0;
|
|
uint8_t s_arrmul24_fa18_16_and0 = 0;
|
|
uint8_t s_arrmul24_fa18_16_xor1 = 0;
|
|
uint8_t s_arrmul24_fa18_16_and1 = 0;
|
|
uint8_t s_arrmul24_fa18_16_or0 = 0;
|
|
uint8_t s_arrmul24_and19_16 = 0;
|
|
uint8_t s_arrmul24_fa19_16_xor0 = 0;
|
|
uint8_t s_arrmul24_fa19_16_and0 = 0;
|
|
uint8_t s_arrmul24_fa19_16_xor1 = 0;
|
|
uint8_t s_arrmul24_fa19_16_and1 = 0;
|
|
uint8_t s_arrmul24_fa19_16_or0 = 0;
|
|
uint8_t s_arrmul24_and20_16 = 0;
|
|
uint8_t s_arrmul24_fa20_16_xor0 = 0;
|
|
uint8_t s_arrmul24_fa20_16_and0 = 0;
|
|
uint8_t s_arrmul24_fa20_16_xor1 = 0;
|
|
uint8_t s_arrmul24_fa20_16_and1 = 0;
|
|
uint8_t s_arrmul24_fa20_16_or0 = 0;
|
|
uint8_t s_arrmul24_and21_16 = 0;
|
|
uint8_t s_arrmul24_fa21_16_xor0 = 0;
|
|
uint8_t s_arrmul24_fa21_16_and0 = 0;
|
|
uint8_t s_arrmul24_fa21_16_xor1 = 0;
|
|
uint8_t s_arrmul24_fa21_16_and1 = 0;
|
|
uint8_t s_arrmul24_fa21_16_or0 = 0;
|
|
uint8_t s_arrmul24_and22_16 = 0;
|
|
uint8_t s_arrmul24_fa22_16_xor0 = 0;
|
|
uint8_t s_arrmul24_fa22_16_and0 = 0;
|
|
uint8_t s_arrmul24_fa22_16_xor1 = 0;
|
|
uint8_t s_arrmul24_fa22_16_and1 = 0;
|
|
uint8_t s_arrmul24_fa22_16_or0 = 0;
|
|
uint8_t s_arrmul24_nand23_16 = 0;
|
|
uint8_t s_arrmul24_fa23_16_xor0 = 0;
|
|
uint8_t s_arrmul24_fa23_16_and0 = 0;
|
|
uint8_t s_arrmul24_fa23_16_xor1 = 0;
|
|
uint8_t s_arrmul24_fa23_16_and1 = 0;
|
|
uint8_t s_arrmul24_fa23_16_or0 = 0;
|
|
uint8_t s_arrmul24_and0_17 = 0;
|
|
uint8_t s_arrmul24_ha0_17_xor0 = 0;
|
|
uint8_t s_arrmul24_ha0_17_and0 = 0;
|
|
uint8_t s_arrmul24_and1_17 = 0;
|
|
uint8_t s_arrmul24_fa1_17_xor0 = 0;
|
|
uint8_t s_arrmul24_fa1_17_and0 = 0;
|
|
uint8_t s_arrmul24_fa1_17_xor1 = 0;
|
|
uint8_t s_arrmul24_fa1_17_and1 = 0;
|
|
uint8_t s_arrmul24_fa1_17_or0 = 0;
|
|
uint8_t s_arrmul24_and2_17 = 0;
|
|
uint8_t s_arrmul24_fa2_17_xor0 = 0;
|
|
uint8_t s_arrmul24_fa2_17_and0 = 0;
|
|
uint8_t s_arrmul24_fa2_17_xor1 = 0;
|
|
uint8_t s_arrmul24_fa2_17_and1 = 0;
|
|
uint8_t s_arrmul24_fa2_17_or0 = 0;
|
|
uint8_t s_arrmul24_and3_17 = 0;
|
|
uint8_t s_arrmul24_fa3_17_xor0 = 0;
|
|
uint8_t s_arrmul24_fa3_17_and0 = 0;
|
|
uint8_t s_arrmul24_fa3_17_xor1 = 0;
|
|
uint8_t s_arrmul24_fa3_17_and1 = 0;
|
|
uint8_t s_arrmul24_fa3_17_or0 = 0;
|
|
uint8_t s_arrmul24_and4_17 = 0;
|
|
uint8_t s_arrmul24_fa4_17_xor0 = 0;
|
|
uint8_t s_arrmul24_fa4_17_and0 = 0;
|
|
uint8_t s_arrmul24_fa4_17_xor1 = 0;
|
|
uint8_t s_arrmul24_fa4_17_and1 = 0;
|
|
uint8_t s_arrmul24_fa4_17_or0 = 0;
|
|
uint8_t s_arrmul24_and5_17 = 0;
|
|
uint8_t s_arrmul24_fa5_17_xor0 = 0;
|
|
uint8_t s_arrmul24_fa5_17_and0 = 0;
|
|
uint8_t s_arrmul24_fa5_17_xor1 = 0;
|
|
uint8_t s_arrmul24_fa5_17_and1 = 0;
|
|
uint8_t s_arrmul24_fa5_17_or0 = 0;
|
|
uint8_t s_arrmul24_and6_17 = 0;
|
|
uint8_t s_arrmul24_fa6_17_xor0 = 0;
|
|
uint8_t s_arrmul24_fa6_17_and0 = 0;
|
|
uint8_t s_arrmul24_fa6_17_xor1 = 0;
|
|
uint8_t s_arrmul24_fa6_17_and1 = 0;
|
|
uint8_t s_arrmul24_fa6_17_or0 = 0;
|
|
uint8_t s_arrmul24_and7_17 = 0;
|
|
uint8_t s_arrmul24_fa7_17_xor0 = 0;
|
|
uint8_t s_arrmul24_fa7_17_and0 = 0;
|
|
uint8_t s_arrmul24_fa7_17_xor1 = 0;
|
|
uint8_t s_arrmul24_fa7_17_and1 = 0;
|
|
uint8_t s_arrmul24_fa7_17_or0 = 0;
|
|
uint8_t s_arrmul24_and8_17 = 0;
|
|
uint8_t s_arrmul24_fa8_17_xor0 = 0;
|
|
uint8_t s_arrmul24_fa8_17_and0 = 0;
|
|
uint8_t s_arrmul24_fa8_17_xor1 = 0;
|
|
uint8_t s_arrmul24_fa8_17_and1 = 0;
|
|
uint8_t s_arrmul24_fa8_17_or0 = 0;
|
|
uint8_t s_arrmul24_and9_17 = 0;
|
|
uint8_t s_arrmul24_fa9_17_xor0 = 0;
|
|
uint8_t s_arrmul24_fa9_17_and0 = 0;
|
|
uint8_t s_arrmul24_fa9_17_xor1 = 0;
|
|
uint8_t s_arrmul24_fa9_17_and1 = 0;
|
|
uint8_t s_arrmul24_fa9_17_or0 = 0;
|
|
uint8_t s_arrmul24_and10_17 = 0;
|
|
uint8_t s_arrmul24_fa10_17_xor0 = 0;
|
|
uint8_t s_arrmul24_fa10_17_and0 = 0;
|
|
uint8_t s_arrmul24_fa10_17_xor1 = 0;
|
|
uint8_t s_arrmul24_fa10_17_and1 = 0;
|
|
uint8_t s_arrmul24_fa10_17_or0 = 0;
|
|
uint8_t s_arrmul24_and11_17 = 0;
|
|
uint8_t s_arrmul24_fa11_17_xor0 = 0;
|
|
uint8_t s_arrmul24_fa11_17_and0 = 0;
|
|
uint8_t s_arrmul24_fa11_17_xor1 = 0;
|
|
uint8_t s_arrmul24_fa11_17_and1 = 0;
|
|
uint8_t s_arrmul24_fa11_17_or0 = 0;
|
|
uint8_t s_arrmul24_and12_17 = 0;
|
|
uint8_t s_arrmul24_fa12_17_xor0 = 0;
|
|
uint8_t s_arrmul24_fa12_17_and0 = 0;
|
|
uint8_t s_arrmul24_fa12_17_xor1 = 0;
|
|
uint8_t s_arrmul24_fa12_17_and1 = 0;
|
|
uint8_t s_arrmul24_fa12_17_or0 = 0;
|
|
uint8_t s_arrmul24_and13_17 = 0;
|
|
uint8_t s_arrmul24_fa13_17_xor0 = 0;
|
|
uint8_t s_arrmul24_fa13_17_and0 = 0;
|
|
uint8_t s_arrmul24_fa13_17_xor1 = 0;
|
|
uint8_t s_arrmul24_fa13_17_and1 = 0;
|
|
uint8_t s_arrmul24_fa13_17_or0 = 0;
|
|
uint8_t s_arrmul24_and14_17 = 0;
|
|
uint8_t s_arrmul24_fa14_17_xor0 = 0;
|
|
uint8_t s_arrmul24_fa14_17_and0 = 0;
|
|
uint8_t s_arrmul24_fa14_17_xor1 = 0;
|
|
uint8_t s_arrmul24_fa14_17_and1 = 0;
|
|
uint8_t s_arrmul24_fa14_17_or0 = 0;
|
|
uint8_t s_arrmul24_and15_17 = 0;
|
|
uint8_t s_arrmul24_fa15_17_xor0 = 0;
|
|
uint8_t s_arrmul24_fa15_17_and0 = 0;
|
|
uint8_t s_arrmul24_fa15_17_xor1 = 0;
|
|
uint8_t s_arrmul24_fa15_17_and1 = 0;
|
|
uint8_t s_arrmul24_fa15_17_or0 = 0;
|
|
uint8_t s_arrmul24_and16_17 = 0;
|
|
uint8_t s_arrmul24_fa16_17_xor0 = 0;
|
|
uint8_t s_arrmul24_fa16_17_and0 = 0;
|
|
uint8_t s_arrmul24_fa16_17_xor1 = 0;
|
|
uint8_t s_arrmul24_fa16_17_and1 = 0;
|
|
uint8_t s_arrmul24_fa16_17_or0 = 0;
|
|
uint8_t s_arrmul24_and17_17 = 0;
|
|
uint8_t s_arrmul24_fa17_17_xor0 = 0;
|
|
uint8_t s_arrmul24_fa17_17_and0 = 0;
|
|
uint8_t s_arrmul24_fa17_17_xor1 = 0;
|
|
uint8_t s_arrmul24_fa17_17_and1 = 0;
|
|
uint8_t s_arrmul24_fa17_17_or0 = 0;
|
|
uint8_t s_arrmul24_and18_17 = 0;
|
|
uint8_t s_arrmul24_fa18_17_xor0 = 0;
|
|
uint8_t s_arrmul24_fa18_17_and0 = 0;
|
|
uint8_t s_arrmul24_fa18_17_xor1 = 0;
|
|
uint8_t s_arrmul24_fa18_17_and1 = 0;
|
|
uint8_t s_arrmul24_fa18_17_or0 = 0;
|
|
uint8_t s_arrmul24_and19_17 = 0;
|
|
uint8_t s_arrmul24_fa19_17_xor0 = 0;
|
|
uint8_t s_arrmul24_fa19_17_and0 = 0;
|
|
uint8_t s_arrmul24_fa19_17_xor1 = 0;
|
|
uint8_t s_arrmul24_fa19_17_and1 = 0;
|
|
uint8_t s_arrmul24_fa19_17_or0 = 0;
|
|
uint8_t s_arrmul24_and20_17 = 0;
|
|
uint8_t s_arrmul24_fa20_17_xor0 = 0;
|
|
uint8_t s_arrmul24_fa20_17_and0 = 0;
|
|
uint8_t s_arrmul24_fa20_17_xor1 = 0;
|
|
uint8_t s_arrmul24_fa20_17_and1 = 0;
|
|
uint8_t s_arrmul24_fa20_17_or0 = 0;
|
|
uint8_t s_arrmul24_and21_17 = 0;
|
|
uint8_t s_arrmul24_fa21_17_xor0 = 0;
|
|
uint8_t s_arrmul24_fa21_17_and0 = 0;
|
|
uint8_t s_arrmul24_fa21_17_xor1 = 0;
|
|
uint8_t s_arrmul24_fa21_17_and1 = 0;
|
|
uint8_t s_arrmul24_fa21_17_or0 = 0;
|
|
uint8_t s_arrmul24_and22_17 = 0;
|
|
uint8_t s_arrmul24_fa22_17_xor0 = 0;
|
|
uint8_t s_arrmul24_fa22_17_and0 = 0;
|
|
uint8_t s_arrmul24_fa22_17_xor1 = 0;
|
|
uint8_t s_arrmul24_fa22_17_and1 = 0;
|
|
uint8_t s_arrmul24_fa22_17_or0 = 0;
|
|
uint8_t s_arrmul24_nand23_17 = 0;
|
|
uint8_t s_arrmul24_fa23_17_xor0 = 0;
|
|
uint8_t s_arrmul24_fa23_17_and0 = 0;
|
|
uint8_t s_arrmul24_fa23_17_xor1 = 0;
|
|
uint8_t s_arrmul24_fa23_17_and1 = 0;
|
|
uint8_t s_arrmul24_fa23_17_or0 = 0;
|
|
uint8_t s_arrmul24_and0_18 = 0;
|
|
uint8_t s_arrmul24_ha0_18_xor0 = 0;
|
|
uint8_t s_arrmul24_ha0_18_and0 = 0;
|
|
uint8_t s_arrmul24_and1_18 = 0;
|
|
uint8_t s_arrmul24_fa1_18_xor0 = 0;
|
|
uint8_t s_arrmul24_fa1_18_and0 = 0;
|
|
uint8_t s_arrmul24_fa1_18_xor1 = 0;
|
|
uint8_t s_arrmul24_fa1_18_and1 = 0;
|
|
uint8_t s_arrmul24_fa1_18_or0 = 0;
|
|
uint8_t s_arrmul24_and2_18 = 0;
|
|
uint8_t s_arrmul24_fa2_18_xor0 = 0;
|
|
uint8_t s_arrmul24_fa2_18_and0 = 0;
|
|
uint8_t s_arrmul24_fa2_18_xor1 = 0;
|
|
uint8_t s_arrmul24_fa2_18_and1 = 0;
|
|
uint8_t s_arrmul24_fa2_18_or0 = 0;
|
|
uint8_t s_arrmul24_and3_18 = 0;
|
|
uint8_t s_arrmul24_fa3_18_xor0 = 0;
|
|
uint8_t s_arrmul24_fa3_18_and0 = 0;
|
|
uint8_t s_arrmul24_fa3_18_xor1 = 0;
|
|
uint8_t s_arrmul24_fa3_18_and1 = 0;
|
|
uint8_t s_arrmul24_fa3_18_or0 = 0;
|
|
uint8_t s_arrmul24_and4_18 = 0;
|
|
uint8_t s_arrmul24_fa4_18_xor0 = 0;
|
|
uint8_t s_arrmul24_fa4_18_and0 = 0;
|
|
uint8_t s_arrmul24_fa4_18_xor1 = 0;
|
|
uint8_t s_arrmul24_fa4_18_and1 = 0;
|
|
uint8_t s_arrmul24_fa4_18_or0 = 0;
|
|
uint8_t s_arrmul24_and5_18 = 0;
|
|
uint8_t s_arrmul24_fa5_18_xor0 = 0;
|
|
uint8_t s_arrmul24_fa5_18_and0 = 0;
|
|
uint8_t s_arrmul24_fa5_18_xor1 = 0;
|
|
uint8_t s_arrmul24_fa5_18_and1 = 0;
|
|
uint8_t s_arrmul24_fa5_18_or0 = 0;
|
|
uint8_t s_arrmul24_and6_18 = 0;
|
|
uint8_t s_arrmul24_fa6_18_xor0 = 0;
|
|
uint8_t s_arrmul24_fa6_18_and0 = 0;
|
|
uint8_t s_arrmul24_fa6_18_xor1 = 0;
|
|
uint8_t s_arrmul24_fa6_18_and1 = 0;
|
|
uint8_t s_arrmul24_fa6_18_or0 = 0;
|
|
uint8_t s_arrmul24_and7_18 = 0;
|
|
uint8_t s_arrmul24_fa7_18_xor0 = 0;
|
|
uint8_t s_arrmul24_fa7_18_and0 = 0;
|
|
uint8_t s_arrmul24_fa7_18_xor1 = 0;
|
|
uint8_t s_arrmul24_fa7_18_and1 = 0;
|
|
uint8_t s_arrmul24_fa7_18_or0 = 0;
|
|
uint8_t s_arrmul24_and8_18 = 0;
|
|
uint8_t s_arrmul24_fa8_18_xor0 = 0;
|
|
uint8_t s_arrmul24_fa8_18_and0 = 0;
|
|
uint8_t s_arrmul24_fa8_18_xor1 = 0;
|
|
uint8_t s_arrmul24_fa8_18_and1 = 0;
|
|
uint8_t s_arrmul24_fa8_18_or0 = 0;
|
|
uint8_t s_arrmul24_and9_18 = 0;
|
|
uint8_t s_arrmul24_fa9_18_xor0 = 0;
|
|
uint8_t s_arrmul24_fa9_18_and0 = 0;
|
|
uint8_t s_arrmul24_fa9_18_xor1 = 0;
|
|
uint8_t s_arrmul24_fa9_18_and1 = 0;
|
|
uint8_t s_arrmul24_fa9_18_or0 = 0;
|
|
uint8_t s_arrmul24_and10_18 = 0;
|
|
uint8_t s_arrmul24_fa10_18_xor0 = 0;
|
|
uint8_t s_arrmul24_fa10_18_and0 = 0;
|
|
uint8_t s_arrmul24_fa10_18_xor1 = 0;
|
|
uint8_t s_arrmul24_fa10_18_and1 = 0;
|
|
uint8_t s_arrmul24_fa10_18_or0 = 0;
|
|
uint8_t s_arrmul24_and11_18 = 0;
|
|
uint8_t s_arrmul24_fa11_18_xor0 = 0;
|
|
uint8_t s_arrmul24_fa11_18_and0 = 0;
|
|
uint8_t s_arrmul24_fa11_18_xor1 = 0;
|
|
uint8_t s_arrmul24_fa11_18_and1 = 0;
|
|
uint8_t s_arrmul24_fa11_18_or0 = 0;
|
|
uint8_t s_arrmul24_and12_18 = 0;
|
|
uint8_t s_arrmul24_fa12_18_xor0 = 0;
|
|
uint8_t s_arrmul24_fa12_18_and0 = 0;
|
|
uint8_t s_arrmul24_fa12_18_xor1 = 0;
|
|
uint8_t s_arrmul24_fa12_18_and1 = 0;
|
|
uint8_t s_arrmul24_fa12_18_or0 = 0;
|
|
uint8_t s_arrmul24_and13_18 = 0;
|
|
uint8_t s_arrmul24_fa13_18_xor0 = 0;
|
|
uint8_t s_arrmul24_fa13_18_and0 = 0;
|
|
uint8_t s_arrmul24_fa13_18_xor1 = 0;
|
|
uint8_t s_arrmul24_fa13_18_and1 = 0;
|
|
uint8_t s_arrmul24_fa13_18_or0 = 0;
|
|
uint8_t s_arrmul24_and14_18 = 0;
|
|
uint8_t s_arrmul24_fa14_18_xor0 = 0;
|
|
uint8_t s_arrmul24_fa14_18_and0 = 0;
|
|
uint8_t s_arrmul24_fa14_18_xor1 = 0;
|
|
uint8_t s_arrmul24_fa14_18_and1 = 0;
|
|
uint8_t s_arrmul24_fa14_18_or0 = 0;
|
|
uint8_t s_arrmul24_and15_18 = 0;
|
|
uint8_t s_arrmul24_fa15_18_xor0 = 0;
|
|
uint8_t s_arrmul24_fa15_18_and0 = 0;
|
|
uint8_t s_arrmul24_fa15_18_xor1 = 0;
|
|
uint8_t s_arrmul24_fa15_18_and1 = 0;
|
|
uint8_t s_arrmul24_fa15_18_or0 = 0;
|
|
uint8_t s_arrmul24_and16_18 = 0;
|
|
uint8_t s_arrmul24_fa16_18_xor0 = 0;
|
|
uint8_t s_arrmul24_fa16_18_and0 = 0;
|
|
uint8_t s_arrmul24_fa16_18_xor1 = 0;
|
|
uint8_t s_arrmul24_fa16_18_and1 = 0;
|
|
uint8_t s_arrmul24_fa16_18_or0 = 0;
|
|
uint8_t s_arrmul24_and17_18 = 0;
|
|
uint8_t s_arrmul24_fa17_18_xor0 = 0;
|
|
uint8_t s_arrmul24_fa17_18_and0 = 0;
|
|
uint8_t s_arrmul24_fa17_18_xor1 = 0;
|
|
uint8_t s_arrmul24_fa17_18_and1 = 0;
|
|
uint8_t s_arrmul24_fa17_18_or0 = 0;
|
|
uint8_t s_arrmul24_and18_18 = 0;
|
|
uint8_t s_arrmul24_fa18_18_xor0 = 0;
|
|
uint8_t s_arrmul24_fa18_18_and0 = 0;
|
|
uint8_t s_arrmul24_fa18_18_xor1 = 0;
|
|
uint8_t s_arrmul24_fa18_18_and1 = 0;
|
|
uint8_t s_arrmul24_fa18_18_or0 = 0;
|
|
uint8_t s_arrmul24_and19_18 = 0;
|
|
uint8_t s_arrmul24_fa19_18_xor0 = 0;
|
|
uint8_t s_arrmul24_fa19_18_and0 = 0;
|
|
uint8_t s_arrmul24_fa19_18_xor1 = 0;
|
|
uint8_t s_arrmul24_fa19_18_and1 = 0;
|
|
uint8_t s_arrmul24_fa19_18_or0 = 0;
|
|
uint8_t s_arrmul24_and20_18 = 0;
|
|
uint8_t s_arrmul24_fa20_18_xor0 = 0;
|
|
uint8_t s_arrmul24_fa20_18_and0 = 0;
|
|
uint8_t s_arrmul24_fa20_18_xor1 = 0;
|
|
uint8_t s_arrmul24_fa20_18_and1 = 0;
|
|
uint8_t s_arrmul24_fa20_18_or0 = 0;
|
|
uint8_t s_arrmul24_and21_18 = 0;
|
|
uint8_t s_arrmul24_fa21_18_xor0 = 0;
|
|
uint8_t s_arrmul24_fa21_18_and0 = 0;
|
|
uint8_t s_arrmul24_fa21_18_xor1 = 0;
|
|
uint8_t s_arrmul24_fa21_18_and1 = 0;
|
|
uint8_t s_arrmul24_fa21_18_or0 = 0;
|
|
uint8_t s_arrmul24_and22_18 = 0;
|
|
uint8_t s_arrmul24_fa22_18_xor0 = 0;
|
|
uint8_t s_arrmul24_fa22_18_and0 = 0;
|
|
uint8_t s_arrmul24_fa22_18_xor1 = 0;
|
|
uint8_t s_arrmul24_fa22_18_and1 = 0;
|
|
uint8_t s_arrmul24_fa22_18_or0 = 0;
|
|
uint8_t s_arrmul24_nand23_18 = 0;
|
|
uint8_t s_arrmul24_fa23_18_xor0 = 0;
|
|
uint8_t s_arrmul24_fa23_18_and0 = 0;
|
|
uint8_t s_arrmul24_fa23_18_xor1 = 0;
|
|
uint8_t s_arrmul24_fa23_18_and1 = 0;
|
|
uint8_t s_arrmul24_fa23_18_or0 = 0;
|
|
uint8_t s_arrmul24_and0_19 = 0;
|
|
uint8_t s_arrmul24_ha0_19_xor0 = 0;
|
|
uint8_t s_arrmul24_ha0_19_and0 = 0;
|
|
uint8_t s_arrmul24_and1_19 = 0;
|
|
uint8_t s_arrmul24_fa1_19_xor0 = 0;
|
|
uint8_t s_arrmul24_fa1_19_and0 = 0;
|
|
uint8_t s_arrmul24_fa1_19_xor1 = 0;
|
|
uint8_t s_arrmul24_fa1_19_and1 = 0;
|
|
uint8_t s_arrmul24_fa1_19_or0 = 0;
|
|
uint8_t s_arrmul24_and2_19 = 0;
|
|
uint8_t s_arrmul24_fa2_19_xor0 = 0;
|
|
uint8_t s_arrmul24_fa2_19_and0 = 0;
|
|
uint8_t s_arrmul24_fa2_19_xor1 = 0;
|
|
uint8_t s_arrmul24_fa2_19_and1 = 0;
|
|
uint8_t s_arrmul24_fa2_19_or0 = 0;
|
|
uint8_t s_arrmul24_and3_19 = 0;
|
|
uint8_t s_arrmul24_fa3_19_xor0 = 0;
|
|
uint8_t s_arrmul24_fa3_19_and0 = 0;
|
|
uint8_t s_arrmul24_fa3_19_xor1 = 0;
|
|
uint8_t s_arrmul24_fa3_19_and1 = 0;
|
|
uint8_t s_arrmul24_fa3_19_or0 = 0;
|
|
uint8_t s_arrmul24_and4_19 = 0;
|
|
uint8_t s_arrmul24_fa4_19_xor0 = 0;
|
|
uint8_t s_arrmul24_fa4_19_and0 = 0;
|
|
uint8_t s_arrmul24_fa4_19_xor1 = 0;
|
|
uint8_t s_arrmul24_fa4_19_and1 = 0;
|
|
uint8_t s_arrmul24_fa4_19_or0 = 0;
|
|
uint8_t s_arrmul24_and5_19 = 0;
|
|
uint8_t s_arrmul24_fa5_19_xor0 = 0;
|
|
uint8_t s_arrmul24_fa5_19_and0 = 0;
|
|
uint8_t s_arrmul24_fa5_19_xor1 = 0;
|
|
uint8_t s_arrmul24_fa5_19_and1 = 0;
|
|
uint8_t s_arrmul24_fa5_19_or0 = 0;
|
|
uint8_t s_arrmul24_and6_19 = 0;
|
|
uint8_t s_arrmul24_fa6_19_xor0 = 0;
|
|
uint8_t s_arrmul24_fa6_19_and0 = 0;
|
|
uint8_t s_arrmul24_fa6_19_xor1 = 0;
|
|
uint8_t s_arrmul24_fa6_19_and1 = 0;
|
|
uint8_t s_arrmul24_fa6_19_or0 = 0;
|
|
uint8_t s_arrmul24_and7_19 = 0;
|
|
uint8_t s_arrmul24_fa7_19_xor0 = 0;
|
|
uint8_t s_arrmul24_fa7_19_and0 = 0;
|
|
uint8_t s_arrmul24_fa7_19_xor1 = 0;
|
|
uint8_t s_arrmul24_fa7_19_and1 = 0;
|
|
uint8_t s_arrmul24_fa7_19_or0 = 0;
|
|
uint8_t s_arrmul24_and8_19 = 0;
|
|
uint8_t s_arrmul24_fa8_19_xor0 = 0;
|
|
uint8_t s_arrmul24_fa8_19_and0 = 0;
|
|
uint8_t s_arrmul24_fa8_19_xor1 = 0;
|
|
uint8_t s_arrmul24_fa8_19_and1 = 0;
|
|
uint8_t s_arrmul24_fa8_19_or0 = 0;
|
|
uint8_t s_arrmul24_and9_19 = 0;
|
|
uint8_t s_arrmul24_fa9_19_xor0 = 0;
|
|
uint8_t s_arrmul24_fa9_19_and0 = 0;
|
|
uint8_t s_arrmul24_fa9_19_xor1 = 0;
|
|
uint8_t s_arrmul24_fa9_19_and1 = 0;
|
|
uint8_t s_arrmul24_fa9_19_or0 = 0;
|
|
uint8_t s_arrmul24_and10_19 = 0;
|
|
uint8_t s_arrmul24_fa10_19_xor0 = 0;
|
|
uint8_t s_arrmul24_fa10_19_and0 = 0;
|
|
uint8_t s_arrmul24_fa10_19_xor1 = 0;
|
|
uint8_t s_arrmul24_fa10_19_and1 = 0;
|
|
uint8_t s_arrmul24_fa10_19_or0 = 0;
|
|
uint8_t s_arrmul24_and11_19 = 0;
|
|
uint8_t s_arrmul24_fa11_19_xor0 = 0;
|
|
uint8_t s_arrmul24_fa11_19_and0 = 0;
|
|
uint8_t s_arrmul24_fa11_19_xor1 = 0;
|
|
uint8_t s_arrmul24_fa11_19_and1 = 0;
|
|
uint8_t s_arrmul24_fa11_19_or0 = 0;
|
|
uint8_t s_arrmul24_and12_19 = 0;
|
|
uint8_t s_arrmul24_fa12_19_xor0 = 0;
|
|
uint8_t s_arrmul24_fa12_19_and0 = 0;
|
|
uint8_t s_arrmul24_fa12_19_xor1 = 0;
|
|
uint8_t s_arrmul24_fa12_19_and1 = 0;
|
|
uint8_t s_arrmul24_fa12_19_or0 = 0;
|
|
uint8_t s_arrmul24_and13_19 = 0;
|
|
uint8_t s_arrmul24_fa13_19_xor0 = 0;
|
|
uint8_t s_arrmul24_fa13_19_and0 = 0;
|
|
uint8_t s_arrmul24_fa13_19_xor1 = 0;
|
|
uint8_t s_arrmul24_fa13_19_and1 = 0;
|
|
uint8_t s_arrmul24_fa13_19_or0 = 0;
|
|
uint8_t s_arrmul24_and14_19 = 0;
|
|
uint8_t s_arrmul24_fa14_19_xor0 = 0;
|
|
uint8_t s_arrmul24_fa14_19_and0 = 0;
|
|
uint8_t s_arrmul24_fa14_19_xor1 = 0;
|
|
uint8_t s_arrmul24_fa14_19_and1 = 0;
|
|
uint8_t s_arrmul24_fa14_19_or0 = 0;
|
|
uint8_t s_arrmul24_and15_19 = 0;
|
|
uint8_t s_arrmul24_fa15_19_xor0 = 0;
|
|
uint8_t s_arrmul24_fa15_19_and0 = 0;
|
|
uint8_t s_arrmul24_fa15_19_xor1 = 0;
|
|
uint8_t s_arrmul24_fa15_19_and1 = 0;
|
|
uint8_t s_arrmul24_fa15_19_or0 = 0;
|
|
uint8_t s_arrmul24_and16_19 = 0;
|
|
uint8_t s_arrmul24_fa16_19_xor0 = 0;
|
|
uint8_t s_arrmul24_fa16_19_and0 = 0;
|
|
uint8_t s_arrmul24_fa16_19_xor1 = 0;
|
|
uint8_t s_arrmul24_fa16_19_and1 = 0;
|
|
uint8_t s_arrmul24_fa16_19_or0 = 0;
|
|
uint8_t s_arrmul24_and17_19 = 0;
|
|
uint8_t s_arrmul24_fa17_19_xor0 = 0;
|
|
uint8_t s_arrmul24_fa17_19_and0 = 0;
|
|
uint8_t s_arrmul24_fa17_19_xor1 = 0;
|
|
uint8_t s_arrmul24_fa17_19_and1 = 0;
|
|
uint8_t s_arrmul24_fa17_19_or0 = 0;
|
|
uint8_t s_arrmul24_and18_19 = 0;
|
|
uint8_t s_arrmul24_fa18_19_xor0 = 0;
|
|
uint8_t s_arrmul24_fa18_19_and0 = 0;
|
|
uint8_t s_arrmul24_fa18_19_xor1 = 0;
|
|
uint8_t s_arrmul24_fa18_19_and1 = 0;
|
|
uint8_t s_arrmul24_fa18_19_or0 = 0;
|
|
uint8_t s_arrmul24_and19_19 = 0;
|
|
uint8_t s_arrmul24_fa19_19_xor0 = 0;
|
|
uint8_t s_arrmul24_fa19_19_and0 = 0;
|
|
uint8_t s_arrmul24_fa19_19_xor1 = 0;
|
|
uint8_t s_arrmul24_fa19_19_and1 = 0;
|
|
uint8_t s_arrmul24_fa19_19_or0 = 0;
|
|
uint8_t s_arrmul24_and20_19 = 0;
|
|
uint8_t s_arrmul24_fa20_19_xor0 = 0;
|
|
uint8_t s_arrmul24_fa20_19_and0 = 0;
|
|
uint8_t s_arrmul24_fa20_19_xor1 = 0;
|
|
uint8_t s_arrmul24_fa20_19_and1 = 0;
|
|
uint8_t s_arrmul24_fa20_19_or0 = 0;
|
|
uint8_t s_arrmul24_and21_19 = 0;
|
|
uint8_t s_arrmul24_fa21_19_xor0 = 0;
|
|
uint8_t s_arrmul24_fa21_19_and0 = 0;
|
|
uint8_t s_arrmul24_fa21_19_xor1 = 0;
|
|
uint8_t s_arrmul24_fa21_19_and1 = 0;
|
|
uint8_t s_arrmul24_fa21_19_or0 = 0;
|
|
uint8_t s_arrmul24_and22_19 = 0;
|
|
uint8_t s_arrmul24_fa22_19_xor0 = 0;
|
|
uint8_t s_arrmul24_fa22_19_and0 = 0;
|
|
uint8_t s_arrmul24_fa22_19_xor1 = 0;
|
|
uint8_t s_arrmul24_fa22_19_and1 = 0;
|
|
uint8_t s_arrmul24_fa22_19_or0 = 0;
|
|
uint8_t s_arrmul24_nand23_19 = 0;
|
|
uint8_t s_arrmul24_fa23_19_xor0 = 0;
|
|
uint8_t s_arrmul24_fa23_19_and0 = 0;
|
|
uint8_t s_arrmul24_fa23_19_xor1 = 0;
|
|
uint8_t s_arrmul24_fa23_19_and1 = 0;
|
|
uint8_t s_arrmul24_fa23_19_or0 = 0;
|
|
uint8_t s_arrmul24_and0_20 = 0;
|
|
uint8_t s_arrmul24_ha0_20_xor0 = 0;
|
|
uint8_t s_arrmul24_ha0_20_and0 = 0;
|
|
uint8_t s_arrmul24_and1_20 = 0;
|
|
uint8_t s_arrmul24_fa1_20_xor0 = 0;
|
|
uint8_t s_arrmul24_fa1_20_and0 = 0;
|
|
uint8_t s_arrmul24_fa1_20_xor1 = 0;
|
|
uint8_t s_arrmul24_fa1_20_and1 = 0;
|
|
uint8_t s_arrmul24_fa1_20_or0 = 0;
|
|
uint8_t s_arrmul24_and2_20 = 0;
|
|
uint8_t s_arrmul24_fa2_20_xor0 = 0;
|
|
uint8_t s_arrmul24_fa2_20_and0 = 0;
|
|
uint8_t s_arrmul24_fa2_20_xor1 = 0;
|
|
uint8_t s_arrmul24_fa2_20_and1 = 0;
|
|
uint8_t s_arrmul24_fa2_20_or0 = 0;
|
|
uint8_t s_arrmul24_and3_20 = 0;
|
|
uint8_t s_arrmul24_fa3_20_xor0 = 0;
|
|
uint8_t s_arrmul24_fa3_20_and0 = 0;
|
|
uint8_t s_arrmul24_fa3_20_xor1 = 0;
|
|
uint8_t s_arrmul24_fa3_20_and1 = 0;
|
|
uint8_t s_arrmul24_fa3_20_or0 = 0;
|
|
uint8_t s_arrmul24_and4_20 = 0;
|
|
uint8_t s_arrmul24_fa4_20_xor0 = 0;
|
|
uint8_t s_arrmul24_fa4_20_and0 = 0;
|
|
uint8_t s_arrmul24_fa4_20_xor1 = 0;
|
|
uint8_t s_arrmul24_fa4_20_and1 = 0;
|
|
uint8_t s_arrmul24_fa4_20_or0 = 0;
|
|
uint8_t s_arrmul24_and5_20 = 0;
|
|
uint8_t s_arrmul24_fa5_20_xor0 = 0;
|
|
uint8_t s_arrmul24_fa5_20_and0 = 0;
|
|
uint8_t s_arrmul24_fa5_20_xor1 = 0;
|
|
uint8_t s_arrmul24_fa5_20_and1 = 0;
|
|
uint8_t s_arrmul24_fa5_20_or0 = 0;
|
|
uint8_t s_arrmul24_and6_20 = 0;
|
|
uint8_t s_arrmul24_fa6_20_xor0 = 0;
|
|
uint8_t s_arrmul24_fa6_20_and0 = 0;
|
|
uint8_t s_arrmul24_fa6_20_xor1 = 0;
|
|
uint8_t s_arrmul24_fa6_20_and1 = 0;
|
|
uint8_t s_arrmul24_fa6_20_or0 = 0;
|
|
uint8_t s_arrmul24_and7_20 = 0;
|
|
uint8_t s_arrmul24_fa7_20_xor0 = 0;
|
|
uint8_t s_arrmul24_fa7_20_and0 = 0;
|
|
uint8_t s_arrmul24_fa7_20_xor1 = 0;
|
|
uint8_t s_arrmul24_fa7_20_and1 = 0;
|
|
uint8_t s_arrmul24_fa7_20_or0 = 0;
|
|
uint8_t s_arrmul24_and8_20 = 0;
|
|
uint8_t s_arrmul24_fa8_20_xor0 = 0;
|
|
uint8_t s_arrmul24_fa8_20_and0 = 0;
|
|
uint8_t s_arrmul24_fa8_20_xor1 = 0;
|
|
uint8_t s_arrmul24_fa8_20_and1 = 0;
|
|
uint8_t s_arrmul24_fa8_20_or0 = 0;
|
|
uint8_t s_arrmul24_and9_20 = 0;
|
|
uint8_t s_arrmul24_fa9_20_xor0 = 0;
|
|
uint8_t s_arrmul24_fa9_20_and0 = 0;
|
|
uint8_t s_arrmul24_fa9_20_xor1 = 0;
|
|
uint8_t s_arrmul24_fa9_20_and1 = 0;
|
|
uint8_t s_arrmul24_fa9_20_or0 = 0;
|
|
uint8_t s_arrmul24_and10_20 = 0;
|
|
uint8_t s_arrmul24_fa10_20_xor0 = 0;
|
|
uint8_t s_arrmul24_fa10_20_and0 = 0;
|
|
uint8_t s_arrmul24_fa10_20_xor1 = 0;
|
|
uint8_t s_arrmul24_fa10_20_and1 = 0;
|
|
uint8_t s_arrmul24_fa10_20_or0 = 0;
|
|
uint8_t s_arrmul24_and11_20 = 0;
|
|
uint8_t s_arrmul24_fa11_20_xor0 = 0;
|
|
uint8_t s_arrmul24_fa11_20_and0 = 0;
|
|
uint8_t s_arrmul24_fa11_20_xor1 = 0;
|
|
uint8_t s_arrmul24_fa11_20_and1 = 0;
|
|
uint8_t s_arrmul24_fa11_20_or0 = 0;
|
|
uint8_t s_arrmul24_and12_20 = 0;
|
|
uint8_t s_arrmul24_fa12_20_xor0 = 0;
|
|
uint8_t s_arrmul24_fa12_20_and0 = 0;
|
|
uint8_t s_arrmul24_fa12_20_xor1 = 0;
|
|
uint8_t s_arrmul24_fa12_20_and1 = 0;
|
|
uint8_t s_arrmul24_fa12_20_or0 = 0;
|
|
uint8_t s_arrmul24_and13_20 = 0;
|
|
uint8_t s_arrmul24_fa13_20_xor0 = 0;
|
|
uint8_t s_arrmul24_fa13_20_and0 = 0;
|
|
uint8_t s_arrmul24_fa13_20_xor1 = 0;
|
|
uint8_t s_arrmul24_fa13_20_and1 = 0;
|
|
uint8_t s_arrmul24_fa13_20_or0 = 0;
|
|
uint8_t s_arrmul24_and14_20 = 0;
|
|
uint8_t s_arrmul24_fa14_20_xor0 = 0;
|
|
uint8_t s_arrmul24_fa14_20_and0 = 0;
|
|
uint8_t s_arrmul24_fa14_20_xor1 = 0;
|
|
uint8_t s_arrmul24_fa14_20_and1 = 0;
|
|
uint8_t s_arrmul24_fa14_20_or0 = 0;
|
|
uint8_t s_arrmul24_and15_20 = 0;
|
|
uint8_t s_arrmul24_fa15_20_xor0 = 0;
|
|
uint8_t s_arrmul24_fa15_20_and0 = 0;
|
|
uint8_t s_arrmul24_fa15_20_xor1 = 0;
|
|
uint8_t s_arrmul24_fa15_20_and1 = 0;
|
|
uint8_t s_arrmul24_fa15_20_or0 = 0;
|
|
uint8_t s_arrmul24_and16_20 = 0;
|
|
uint8_t s_arrmul24_fa16_20_xor0 = 0;
|
|
uint8_t s_arrmul24_fa16_20_and0 = 0;
|
|
uint8_t s_arrmul24_fa16_20_xor1 = 0;
|
|
uint8_t s_arrmul24_fa16_20_and1 = 0;
|
|
uint8_t s_arrmul24_fa16_20_or0 = 0;
|
|
uint8_t s_arrmul24_and17_20 = 0;
|
|
uint8_t s_arrmul24_fa17_20_xor0 = 0;
|
|
uint8_t s_arrmul24_fa17_20_and0 = 0;
|
|
uint8_t s_arrmul24_fa17_20_xor1 = 0;
|
|
uint8_t s_arrmul24_fa17_20_and1 = 0;
|
|
uint8_t s_arrmul24_fa17_20_or0 = 0;
|
|
uint8_t s_arrmul24_and18_20 = 0;
|
|
uint8_t s_arrmul24_fa18_20_xor0 = 0;
|
|
uint8_t s_arrmul24_fa18_20_and0 = 0;
|
|
uint8_t s_arrmul24_fa18_20_xor1 = 0;
|
|
uint8_t s_arrmul24_fa18_20_and1 = 0;
|
|
uint8_t s_arrmul24_fa18_20_or0 = 0;
|
|
uint8_t s_arrmul24_and19_20 = 0;
|
|
uint8_t s_arrmul24_fa19_20_xor0 = 0;
|
|
uint8_t s_arrmul24_fa19_20_and0 = 0;
|
|
uint8_t s_arrmul24_fa19_20_xor1 = 0;
|
|
uint8_t s_arrmul24_fa19_20_and1 = 0;
|
|
uint8_t s_arrmul24_fa19_20_or0 = 0;
|
|
uint8_t s_arrmul24_and20_20 = 0;
|
|
uint8_t s_arrmul24_fa20_20_xor0 = 0;
|
|
uint8_t s_arrmul24_fa20_20_and0 = 0;
|
|
uint8_t s_arrmul24_fa20_20_xor1 = 0;
|
|
uint8_t s_arrmul24_fa20_20_and1 = 0;
|
|
uint8_t s_arrmul24_fa20_20_or0 = 0;
|
|
uint8_t s_arrmul24_and21_20 = 0;
|
|
uint8_t s_arrmul24_fa21_20_xor0 = 0;
|
|
uint8_t s_arrmul24_fa21_20_and0 = 0;
|
|
uint8_t s_arrmul24_fa21_20_xor1 = 0;
|
|
uint8_t s_arrmul24_fa21_20_and1 = 0;
|
|
uint8_t s_arrmul24_fa21_20_or0 = 0;
|
|
uint8_t s_arrmul24_and22_20 = 0;
|
|
uint8_t s_arrmul24_fa22_20_xor0 = 0;
|
|
uint8_t s_arrmul24_fa22_20_and0 = 0;
|
|
uint8_t s_arrmul24_fa22_20_xor1 = 0;
|
|
uint8_t s_arrmul24_fa22_20_and1 = 0;
|
|
uint8_t s_arrmul24_fa22_20_or0 = 0;
|
|
uint8_t s_arrmul24_nand23_20 = 0;
|
|
uint8_t s_arrmul24_fa23_20_xor0 = 0;
|
|
uint8_t s_arrmul24_fa23_20_and0 = 0;
|
|
uint8_t s_arrmul24_fa23_20_xor1 = 0;
|
|
uint8_t s_arrmul24_fa23_20_and1 = 0;
|
|
uint8_t s_arrmul24_fa23_20_or0 = 0;
|
|
uint8_t s_arrmul24_and0_21 = 0;
|
|
uint8_t s_arrmul24_ha0_21_xor0 = 0;
|
|
uint8_t s_arrmul24_ha0_21_and0 = 0;
|
|
uint8_t s_arrmul24_and1_21 = 0;
|
|
uint8_t s_arrmul24_fa1_21_xor0 = 0;
|
|
uint8_t s_arrmul24_fa1_21_and0 = 0;
|
|
uint8_t s_arrmul24_fa1_21_xor1 = 0;
|
|
uint8_t s_arrmul24_fa1_21_and1 = 0;
|
|
uint8_t s_arrmul24_fa1_21_or0 = 0;
|
|
uint8_t s_arrmul24_and2_21 = 0;
|
|
uint8_t s_arrmul24_fa2_21_xor0 = 0;
|
|
uint8_t s_arrmul24_fa2_21_and0 = 0;
|
|
uint8_t s_arrmul24_fa2_21_xor1 = 0;
|
|
uint8_t s_arrmul24_fa2_21_and1 = 0;
|
|
uint8_t s_arrmul24_fa2_21_or0 = 0;
|
|
uint8_t s_arrmul24_and3_21 = 0;
|
|
uint8_t s_arrmul24_fa3_21_xor0 = 0;
|
|
uint8_t s_arrmul24_fa3_21_and0 = 0;
|
|
uint8_t s_arrmul24_fa3_21_xor1 = 0;
|
|
uint8_t s_arrmul24_fa3_21_and1 = 0;
|
|
uint8_t s_arrmul24_fa3_21_or0 = 0;
|
|
uint8_t s_arrmul24_and4_21 = 0;
|
|
uint8_t s_arrmul24_fa4_21_xor0 = 0;
|
|
uint8_t s_arrmul24_fa4_21_and0 = 0;
|
|
uint8_t s_arrmul24_fa4_21_xor1 = 0;
|
|
uint8_t s_arrmul24_fa4_21_and1 = 0;
|
|
uint8_t s_arrmul24_fa4_21_or0 = 0;
|
|
uint8_t s_arrmul24_and5_21 = 0;
|
|
uint8_t s_arrmul24_fa5_21_xor0 = 0;
|
|
uint8_t s_arrmul24_fa5_21_and0 = 0;
|
|
uint8_t s_arrmul24_fa5_21_xor1 = 0;
|
|
uint8_t s_arrmul24_fa5_21_and1 = 0;
|
|
uint8_t s_arrmul24_fa5_21_or0 = 0;
|
|
uint8_t s_arrmul24_and6_21 = 0;
|
|
uint8_t s_arrmul24_fa6_21_xor0 = 0;
|
|
uint8_t s_arrmul24_fa6_21_and0 = 0;
|
|
uint8_t s_arrmul24_fa6_21_xor1 = 0;
|
|
uint8_t s_arrmul24_fa6_21_and1 = 0;
|
|
uint8_t s_arrmul24_fa6_21_or0 = 0;
|
|
uint8_t s_arrmul24_and7_21 = 0;
|
|
uint8_t s_arrmul24_fa7_21_xor0 = 0;
|
|
uint8_t s_arrmul24_fa7_21_and0 = 0;
|
|
uint8_t s_arrmul24_fa7_21_xor1 = 0;
|
|
uint8_t s_arrmul24_fa7_21_and1 = 0;
|
|
uint8_t s_arrmul24_fa7_21_or0 = 0;
|
|
uint8_t s_arrmul24_and8_21 = 0;
|
|
uint8_t s_arrmul24_fa8_21_xor0 = 0;
|
|
uint8_t s_arrmul24_fa8_21_and0 = 0;
|
|
uint8_t s_arrmul24_fa8_21_xor1 = 0;
|
|
uint8_t s_arrmul24_fa8_21_and1 = 0;
|
|
uint8_t s_arrmul24_fa8_21_or0 = 0;
|
|
uint8_t s_arrmul24_and9_21 = 0;
|
|
uint8_t s_arrmul24_fa9_21_xor0 = 0;
|
|
uint8_t s_arrmul24_fa9_21_and0 = 0;
|
|
uint8_t s_arrmul24_fa9_21_xor1 = 0;
|
|
uint8_t s_arrmul24_fa9_21_and1 = 0;
|
|
uint8_t s_arrmul24_fa9_21_or0 = 0;
|
|
uint8_t s_arrmul24_and10_21 = 0;
|
|
uint8_t s_arrmul24_fa10_21_xor0 = 0;
|
|
uint8_t s_arrmul24_fa10_21_and0 = 0;
|
|
uint8_t s_arrmul24_fa10_21_xor1 = 0;
|
|
uint8_t s_arrmul24_fa10_21_and1 = 0;
|
|
uint8_t s_arrmul24_fa10_21_or0 = 0;
|
|
uint8_t s_arrmul24_and11_21 = 0;
|
|
uint8_t s_arrmul24_fa11_21_xor0 = 0;
|
|
uint8_t s_arrmul24_fa11_21_and0 = 0;
|
|
uint8_t s_arrmul24_fa11_21_xor1 = 0;
|
|
uint8_t s_arrmul24_fa11_21_and1 = 0;
|
|
uint8_t s_arrmul24_fa11_21_or0 = 0;
|
|
uint8_t s_arrmul24_and12_21 = 0;
|
|
uint8_t s_arrmul24_fa12_21_xor0 = 0;
|
|
uint8_t s_arrmul24_fa12_21_and0 = 0;
|
|
uint8_t s_arrmul24_fa12_21_xor1 = 0;
|
|
uint8_t s_arrmul24_fa12_21_and1 = 0;
|
|
uint8_t s_arrmul24_fa12_21_or0 = 0;
|
|
uint8_t s_arrmul24_and13_21 = 0;
|
|
uint8_t s_arrmul24_fa13_21_xor0 = 0;
|
|
uint8_t s_arrmul24_fa13_21_and0 = 0;
|
|
uint8_t s_arrmul24_fa13_21_xor1 = 0;
|
|
uint8_t s_arrmul24_fa13_21_and1 = 0;
|
|
uint8_t s_arrmul24_fa13_21_or0 = 0;
|
|
uint8_t s_arrmul24_and14_21 = 0;
|
|
uint8_t s_arrmul24_fa14_21_xor0 = 0;
|
|
uint8_t s_arrmul24_fa14_21_and0 = 0;
|
|
uint8_t s_arrmul24_fa14_21_xor1 = 0;
|
|
uint8_t s_arrmul24_fa14_21_and1 = 0;
|
|
uint8_t s_arrmul24_fa14_21_or0 = 0;
|
|
uint8_t s_arrmul24_and15_21 = 0;
|
|
uint8_t s_arrmul24_fa15_21_xor0 = 0;
|
|
uint8_t s_arrmul24_fa15_21_and0 = 0;
|
|
uint8_t s_arrmul24_fa15_21_xor1 = 0;
|
|
uint8_t s_arrmul24_fa15_21_and1 = 0;
|
|
uint8_t s_arrmul24_fa15_21_or0 = 0;
|
|
uint8_t s_arrmul24_and16_21 = 0;
|
|
uint8_t s_arrmul24_fa16_21_xor0 = 0;
|
|
uint8_t s_arrmul24_fa16_21_and0 = 0;
|
|
uint8_t s_arrmul24_fa16_21_xor1 = 0;
|
|
uint8_t s_arrmul24_fa16_21_and1 = 0;
|
|
uint8_t s_arrmul24_fa16_21_or0 = 0;
|
|
uint8_t s_arrmul24_and17_21 = 0;
|
|
uint8_t s_arrmul24_fa17_21_xor0 = 0;
|
|
uint8_t s_arrmul24_fa17_21_and0 = 0;
|
|
uint8_t s_arrmul24_fa17_21_xor1 = 0;
|
|
uint8_t s_arrmul24_fa17_21_and1 = 0;
|
|
uint8_t s_arrmul24_fa17_21_or0 = 0;
|
|
uint8_t s_arrmul24_and18_21 = 0;
|
|
uint8_t s_arrmul24_fa18_21_xor0 = 0;
|
|
uint8_t s_arrmul24_fa18_21_and0 = 0;
|
|
uint8_t s_arrmul24_fa18_21_xor1 = 0;
|
|
uint8_t s_arrmul24_fa18_21_and1 = 0;
|
|
uint8_t s_arrmul24_fa18_21_or0 = 0;
|
|
uint8_t s_arrmul24_and19_21 = 0;
|
|
uint8_t s_arrmul24_fa19_21_xor0 = 0;
|
|
uint8_t s_arrmul24_fa19_21_and0 = 0;
|
|
uint8_t s_arrmul24_fa19_21_xor1 = 0;
|
|
uint8_t s_arrmul24_fa19_21_and1 = 0;
|
|
uint8_t s_arrmul24_fa19_21_or0 = 0;
|
|
uint8_t s_arrmul24_and20_21 = 0;
|
|
uint8_t s_arrmul24_fa20_21_xor0 = 0;
|
|
uint8_t s_arrmul24_fa20_21_and0 = 0;
|
|
uint8_t s_arrmul24_fa20_21_xor1 = 0;
|
|
uint8_t s_arrmul24_fa20_21_and1 = 0;
|
|
uint8_t s_arrmul24_fa20_21_or0 = 0;
|
|
uint8_t s_arrmul24_and21_21 = 0;
|
|
uint8_t s_arrmul24_fa21_21_xor0 = 0;
|
|
uint8_t s_arrmul24_fa21_21_and0 = 0;
|
|
uint8_t s_arrmul24_fa21_21_xor1 = 0;
|
|
uint8_t s_arrmul24_fa21_21_and1 = 0;
|
|
uint8_t s_arrmul24_fa21_21_or0 = 0;
|
|
uint8_t s_arrmul24_and22_21 = 0;
|
|
uint8_t s_arrmul24_fa22_21_xor0 = 0;
|
|
uint8_t s_arrmul24_fa22_21_and0 = 0;
|
|
uint8_t s_arrmul24_fa22_21_xor1 = 0;
|
|
uint8_t s_arrmul24_fa22_21_and1 = 0;
|
|
uint8_t s_arrmul24_fa22_21_or0 = 0;
|
|
uint8_t s_arrmul24_nand23_21 = 0;
|
|
uint8_t s_arrmul24_fa23_21_xor0 = 0;
|
|
uint8_t s_arrmul24_fa23_21_and0 = 0;
|
|
uint8_t s_arrmul24_fa23_21_xor1 = 0;
|
|
uint8_t s_arrmul24_fa23_21_and1 = 0;
|
|
uint8_t s_arrmul24_fa23_21_or0 = 0;
|
|
uint8_t s_arrmul24_and0_22 = 0;
|
|
uint8_t s_arrmul24_ha0_22_xor0 = 0;
|
|
uint8_t s_arrmul24_ha0_22_and0 = 0;
|
|
uint8_t s_arrmul24_and1_22 = 0;
|
|
uint8_t s_arrmul24_fa1_22_xor0 = 0;
|
|
uint8_t s_arrmul24_fa1_22_and0 = 0;
|
|
uint8_t s_arrmul24_fa1_22_xor1 = 0;
|
|
uint8_t s_arrmul24_fa1_22_and1 = 0;
|
|
uint8_t s_arrmul24_fa1_22_or0 = 0;
|
|
uint8_t s_arrmul24_and2_22 = 0;
|
|
uint8_t s_arrmul24_fa2_22_xor0 = 0;
|
|
uint8_t s_arrmul24_fa2_22_and0 = 0;
|
|
uint8_t s_arrmul24_fa2_22_xor1 = 0;
|
|
uint8_t s_arrmul24_fa2_22_and1 = 0;
|
|
uint8_t s_arrmul24_fa2_22_or0 = 0;
|
|
uint8_t s_arrmul24_and3_22 = 0;
|
|
uint8_t s_arrmul24_fa3_22_xor0 = 0;
|
|
uint8_t s_arrmul24_fa3_22_and0 = 0;
|
|
uint8_t s_arrmul24_fa3_22_xor1 = 0;
|
|
uint8_t s_arrmul24_fa3_22_and1 = 0;
|
|
uint8_t s_arrmul24_fa3_22_or0 = 0;
|
|
uint8_t s_arrmul24_and4_22 = 0;
|
|
uint8_t s_arrmul24_fa4_22_xor0 = 0;
|
|
uint8_t s_arrmul24_fa4_22_and0 = 0;
|
|
uint8_t s_arrmul24_fa4_22_xor1 = 0;
|
|
uint8_t s_arrmul24_fa4_22_and1 = 0;
|
|
uint8_t s_arrmul24_fa4_22_or0 = 0;
|
|
uint8_t s_arrmul24_and5_22 = 0;
|
|
uint8_t s_arrmul24_fa5_22_xor0 = 0;
|
|
uint8_t s_arrmul24_fa5_22_and0 = 0;
|
|
uint8_t s_arrmul24_fa5_22_xor1 = 0;
|
|
uint8_t s_arrmul24_fa5_22_and1 = 0;
|
|
uint8_t s_arrmul24_fa5_22_or0 = 0;
|
|
uint8_t s_arrmul24_and6_22 = 0;
|
|
uint8_t s_arrmul24_fa6_22_xor0 = 0;
|
|
uint8_t s_arrmul24_fa6_22_and0 = 0;
|
|
uint8_t s_arrmul24_fa6_22_xor1 = 0;
|
|
uint8_t s_arrmul24_fa6_22_and1 = 0;
|
|
uint8_t s_arrmul24_fa6_22_or0 = 0;
|
|
uint8_t s_arrmul24_and7_22 = 0;
|
|
uint8_t s_arrmul24_fa7_22_xor0 = 0;
|
|
uint8_t s_arrmul24_fa7_22_and0 = 0;
|
|
uint8_t s_arrmul24_fa7_22_xor1 = 0;
|
|
uint8_t s_arrmul24_fa7_22_and1 = 0;
|
|
uint8_t s_arrmul24_fa7_22_or0 = 0;
|
|
uint8_t s_arrmul24_and8_22 = 0;
|
|
uint8_t s_arrmul24_fa8_22_xor0 = 0;
|
|
uint8_t s_arrmul24_fa8_22_and0 = 0;
|
|
uint8_t s_arrmul24_fa8_22_xor1 = 0;
|
|
uint8_t s_arrmul24_fa8_22_and1 = 0;
|
|
uint8_t s_arrmul24_fa8_22_or0 = 0;
|
|
uint8_t s_arrmul24_and9_22 = 0;
|
|
uint8_t s_arrmul24_fa9_22_xor0 = 0;
|
|
uint8_t s_arrmul24_fa9_22_and0 = 0;
|
|
uint8_t s_arrmul24_fa9_22_xor1 = 0;
|
|
uint8_t s_arrmul24_fa9_22_and1 = 0;
|
|
uint8_t s_arrmul24_fa9_22_or0 = 0;
|
|
uint8_t s_arrmul24_and10_22 = 0;
|
|
uint8_t s_arrmul24_fa10_22_xor0 = 0;
|
|
uint8_t s_arrmul24_fa10_22_and0 = 0;
|
|
uint8_t s_arrmul24_fa10_22_xor1 = 0;
|
|
uint8_t s_arrmul24_fa10_22_and1 = 0;
|
|
uint8_t s_arrmul24_fa10_22_or0 = 0;
|
|
uint8_t s_arrmul24_and11_22 = 0;
|
|
uint8_t s_arrmul24_fa11_22_xor0 = 0;
|
|
uint8_t s_arrmul24_fa11_22_and0 = 0;
|
|
uint8_t s_arrmul24_fa11_22_xor1 = 0;
|
|
uint8_t s_arrmul24_fa11_22_and1 = 0;
|
|
uint8_t s_arrmul24_fa11_22_or0 = 0;
|
|
uint8_t s_arrmul24_and12_22 = 0;
|
|
uint8_t s_arrmul24_fa12_22_xor0 = 0;
|
|
uint8_t s_arrmul24_fa12_22_and0 = 0;
|
|
uint8_t s_arrmul24_fa12_22_xor1 = 0;
|
|
uint8_t s_arrmul24_fa12_22_and1 = 0;
|
|
uint8_t s_arrmul24_fa12_22_or0 = 0;
|
|
uint8_t s_arrmul24_and13_22 = 0;
|
|
uint8_t s_arrmul24_fa13_22_xor0 = 0;
|
|
uint8_t s_arrmul24_fa13_22_and0 = 0;
|
|
uint8_t s_arrmul24_fa13_22_xor1 = 0;
|
|
uint8_t s_arrmul24_fa13_22_and1 = 0;
|
|
uint8_t s_arrmul24_fa13_22_or0 = 0;
|
|
uint8_t s_arrmul24_and14_22 = 0;
|
|
uint8_t s_arrmul24_fa14_22_xor0 = 0;
|
|
uint8_t s_arrmul24_fa14_22_and0 = 0;
|
|
uint8_t s_arrmul24_fa14_22_xor1 = 0;
|
|
uint8_t s_arrmul24_fa14_22_and1 = 0;
|
|
uint8_t s_arrmul24_fa14_22_or0 = 0;
|
|
uint8_t s_arrmul24_and15_22 = 0;
|
|
uint8_t s_arrmul24_fa15_22_xor0 = 0;
|
|
uint8_t s_arrmul24_fa15_22_and0 = 0;
|
|
uint8_t s_arrmul24_fa15_22_xor1 = 0;
|
|
uint8_t s_arrmul24_fa15_22_and1 = 0;
|
|
uint8_t s_arrmul24_fa15_22_or0 = 0;
|
|
uint8_t s_arrmul24_and16_22 = 0;
|
|
uint8_t s_arrmul24_fa16_22_xor0 = 0;
|
|
uint8_t s_arrmul24_fa16_22_and0 = 0;
|
|
uint8_t s_arrmul24_fa16_22_xor1 = 0;
|
|
uint8_t s_arrmul24_fa16_22_and1 = 0;
|
|
uint8_t s_arrmul24_fa16_22_or0 = 0;
|
|
uint8_t s_arrmul24_and17_22 = 0;
|
|
uint8_t s_arrmul24_fa17_22_xor0 = 0;
|
|
uint8_t s_arrmul24_fa17_22_and0 = 0;
|
|
uint8_t s_arrmul24_fa17_22_xor1 = 0;
|
|
uint8_t s_arrmul24_fa17_22_and1 = 0;
|
|
uint8_t s_arrmul24_fa17_22_or0 = 0;
|
|
uint8_t s_arrmul24_and18_22 = 0;
|
|
uint8_t s_arrmul24_fa18_22_xor0 = 0;
|
|
uint8_t s_arrmul24_fa18_22_and0 = 0;
|
|
uint8_t s_arrmul24_fa18_22_xor1 = 0;
|
|
uint8_t s_arrmul24_fa18_22_and1 = 0;
|
|
uint8_t s_arrmul24_fa18_22_or0 = 0;
|
|
uint8_t s_arrmul24_and19_22 = 0;
|
|
uint8_t s_arrmul24_fa19_22_xor0 = 0;
|
|
uint8_t s_arrmul24_fa19_22_and0 = 0;
|
|
uint8_t s_arrmul24_fa19_22_xor1 = 0;
|
|
uint8_t s_arrmul24_fa19_22_and1 = 0;
|
|
uint8_t s_arrmul24_fa19_22_or0 = 0;
|
|
uint8_t s_arrmul24_and20_22 = 0;
|
|
uint8_t s_arrmul24_fa20_22_xor0 = 0;
|
|
uint8_t s_arrmul24_fa20_22_and0 = 0;
|
|
uint8_t s_arrmul24_fa20_22_xor1 = 0;
|
|
uint8_t s_arrmul24_fa20_22_and1 = 0;
|
|
uint8_t s_arrmul24_fa20_22_or0 = 0;
|
|
uint8_t s_arrmul24_and21_22 = 0;
|
|
uint8_t s_arrmul24_fa21_22_xor0 = 0;
|
|
uint8_t s_arrmul24_fa21_22_and0 = 0;
|
|
uint8_t s_arrmul24_fa21_22_xor1 = 0;
|
|
uint8_t s_arrmul24_fa21_22_and1 = 0;
|
|
uint8_t s_arrmul24_fa21_22_or0 = 0;
|
|
uint8_t s_arrmul24_and22_22 = 0;
|
|
uint8_t s_arrmul24_fa22_22_xor0 = 0;
|
|
uint8_t s_arrmul24_fa22_22_and0 = 0;
|
|
uint8_t s_arrmul24_fa22_22_xor1 = 0;
|
|
uint8_t s_arrmul24_fa22_22_and1 = 0;
|
|
uint8_t s_arrmul24_fa22_22_or0 = 0;
|
|
uint8_t s_arrmul24_nand23_22 = 0;
|
|
uint8_t s_arrmul24_fa23_22_xor0 = 0;
|
|
uint8_t s_arrmul24_fa23_22_and0 = 0;
|
|
uint8_t s_arrmul24_fa23_22_xor1 = 0;
|
|
uint8_t s_arrmul24_fa23_22_and1 = 0;
|
|
uint8_t s_arrmul24_fa23_22_or0 = 0;
|
|
uint8_t s_arrmul24_nand0_23 = 0;
|
|
uint8_t s_arrmul24_ha0_23_xor0 = 0;
|
|
uint8_t s_arrmul24_ha0_23_and0 = 0;
|
|
uint8_t s_arrmul24_nand1_23 = 0;
|
|
uint8_t s_arrmul24_fa1_23_xor0 = 0;
|
|
uint8_t s_arrmul24_fa1_23_and0 = 0;
|
|
uint8_t s_arrmul24_fa1_23_xor1 = 0;
|
|
uint8_t s_arrmul24_fa1_23_and1 = 0;
|
|
uint8_t s_arrmul24_fa1_23_or0 = 0;
|
|
uint8_t s_arrmul24_nand2_23 = 0;
|
|
uint8_t s_arrmul24_fa2_23_xor0 = 0;
|
|
uint8_t s_arrmul24_fa2_23_and0 = 0;
|
|
uint8_t s_arrmul24_fa2_23_xor1 = 0;
|
|
uint8_t s_arrmul24_fa2_23_and1 = 0;
|
|
uint8_t s_arrmul24_fa2_23_or0 = 0;
|
|
uint8_t s_arrmul24_nand3_23 = 0;
|
|
uint8_t s_arrmul24_fa3_23_xor0 = 0;
|
|
uint8_t s_arrmul24_fa3_23_and0 = 0;
|
|
uint8_t s_arrmul24_fa3_23_xor1 = 0;
|
|
uint8_t s_arrmul24_fa3_23_and1 = 0;
|
|
uint8_t s_arrmul24_fa3_23_or0 = 0;
|
|
uint8_t s_arrmul24_nand4_23 = 0;
|
|
uint8_t s_arrmul24_fa4_23_xor0 = 0;
|
|
uint8_t s_arrmul24_fa4_23_and0 = 0;
|
|
uint8_t s_arrmul24_fa4_23_xor1 = 0;
|
|
uint8_t s_arrmul24_fa4_23_and1 = 0;
|
|
uint8_t s_arrmul24_fa4_23_or0 = 0;
|
|
uint8_t s_arrmul24_nand5_23 = 0;
|
|
uint8_t s_arrmul24_fa5_23_xor0 = 0;
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|
uint8_t s_arrmul24_fa5_23_and0 = 0;
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uint8_t s_arrmul24_fa5_23_xor1 = 0;
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uint8_t s_arrmul24_fa5_23_and1 = 0;
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|
uint8_t s_arrmul24_fa5_23_or0 = 0;
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|
uint8_t s_arrmul24_nand6_23 = 0;
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uint8_t s_arrmul24_fa6_23_xor0 = 0;
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uint8_t s_arrmul24_fa6_23_and0 = 0;
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|
uint8_t s_arrmul24_fa6_23_xor1 = 0;
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|
uint8_t s_arrmul24_fa6_23_and1 = 0;
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uint8_t s_arrmul24_fa6_23_or0 = 0;
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uint8_t s_arrmul24_nand7_23 = 0;
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uint8_t s_arrmul24_fa7_23_xor0 = 0;
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|
uint8_t s_arrmul24_fa7_23_and0 = 0;
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|
uint8_t s_arrmul24_fa7_23_xor1 = 0;
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|
uint8_t s_arrmul24_fa7_23_and1 = 0;
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uint8_t s_arrmul24_fa7_23_or0 = 0;
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|
uint8_t s_arrmul24_nand8_23 = 0;
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|
uint8_t s_arrmul24_fa8_23_xor0 = 0;
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uint8_t s_arrmul24_fa8_23_and0 = 0;
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|
uint8_t s_arrmul24_fa8_23_xor1 = 0;
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|
uint8_t s_arrmul24_fa8_23_and1 = 0;
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uint8_t s_arrmul24_fa8_23_or0 = 0;
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|
uint8_t s_arrmul24_nand9_23 = 0;
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uint8_t s_arrmul24_fa9_23_xor0 = 0;
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uint8_t s_arrmul24_fa9_23_and0 = 0;
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uint8_t s_arrmul24_fa9_23_xor1 = 0;
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|
uint8_t s_arrmul24_fa9_23_and1 = 0;
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uint8_t s_arrmul24_fa9_23_or0 = 0;
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uint8_t s_arrmul24_nand10_23 = 0;
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uint8_t s_arrmul24_fa10_23_xor0 = 0;
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|
uint8_t s_arrmul24_fa10_23_and0 = 0;
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uint8_t s_arrmul24_fa10_23_xor1 = 0;
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uint8_t s_arrmul24_fa10_23_and1 = 0;
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uint8_t s_arrmul24_fa10_23_or0 = 0;
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|
uint8_t s_arrmul24_nand11_23 = 0;
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|
uint8_t s_arrmul24_fa11_23_xor0 = 0;
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|
uint8_t s_arrmul24_fa11_23_and0 = 0;
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|
uint8_t s_arrmul24_fa11_23_xor1 = 0;
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|
uint8_t s_arrmul24_fa11_23_and1 = 0;
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|
uint8_t s_arrmul24_fa11_23_or0 = 0;
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|
uint8_t s_arrmul24_nand12_23 = 0;
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|
uint8_t s_arrmul24_fa12_23_xor0 = 0;
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|
uint8_t s_arrmul24_fa12_23_and0 = 0;
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|
uint8_t s_arrmul24_fa12_23_xor1 = 0;
|
|
uint8_t s_arrmul24_fa12_23_and1 = 0;
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|
uint8_t s_arrmul24_fa12_23_or0 = 0;
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|
uint8_t s_arrmul24_nand13_23 = 0;
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|
uint8_t s_arrmul24_fa13_23_xor0 = 0;
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|
uint8_t s_arrmul24_fa13_23_and0 = 0;
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|
uint8_t s_arrmul24_fa13_23_xor1 = 0;
|
|
uint8_t s_arrmul24_fa13_23_and1 = 0;
|
|
uint8_t s_arrmul24_fa13_23_or0 = 0;
|
|
uint8_t s_arrmul24_nand14_23 = 0;
|
|
uint8_t s_arrmul24_fa14_23_xor0 = 0;
|
|
uint8_t s_arrmul24_fa14_23_and0 = 0;
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|
uint8_t s_arrmul24_fa14_23_xor1 = 0;
|
|
uint8_t s_arrmul24_fa14_23_and1 = 0;
|
|
uint8_t s_arrmul24_fa14_23_or0 = 0;
|
|
uint8_t s_arrmul24_nand15_23 = 0;
|
|
uint8_t s_arrmul24_fa15_23_xor0 = 0;
|
|
uint8_t s_arrmul24_fa15_23_and0 = 0;
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|
uint8_t s_arrmul24_fa15_23_xor1 = 0;
|
|
uint8_t s_arrmul24_fa15_23_and1 = 0;
|
|
uint8_t s_arrmul24_fa15_23_or0 = 0;
|
|
uint8_t s_arrmul24_nand16_23 = 0;
|
|
uint8_t s_arrmul24_fa16_23_xor0 = 0;
|
|
uint8_t s_arrmul24_fa16_23_and0 = 0;
|
|
uint8_t s_arrmul24_fa16_23_xor1 = 0;
|
|
uint8_t s_arrmul24_fa16_23_and1 = 0;
|
|
uint8_t s_arrmul24_fa16_23_or0 = 0;
|
|
uint8_t s_arrmul24_nand17_23 = 0;
|
|
uint8_t s_arrmul24_fa17_23_xor0 = 0;
|
|
uint8_t s_arrmul24_fa17_23_and0 = 0;
|
|
uint8_t s_arrmul24_fa17_23_xor1 = 0;
|
|
uint8_t s_arrmul24_fa17_23_and1 = 0;
|
|
uint8_t s_arrmul24_fa17_23_or0 = 0;
|
|
uint8_t s_arrmul24_nand18_23 = 0;
|
|
uint8_t s_arrmul24_fa18_23_xor0 = 0;
|
|
uint8_t s_arrmul24_fa18_23_and0 = 0;
|
|
uint8_t s_arrmul24_fa18_23_xor1 = 0;
|
|
uint8_t s_arrmul24_fa18_23_and1 = 0;
|
|
uint8_t s_arrmul24_fa18_23_or0 = 0;
|
|
uint8_t s_arrmul24_nand19_23 = 0;
|
|
uint8_t s_arrmul24_fa19_23_xor0 = 0;
|
|
uint8_t s_arrmul24_fa19_23_and0 = 0;
|
|
uint8_t s_arrmul24_fa19_23_xor1 = 0;
|
|
uint8_t s_arrmul24_fa19_23_and1 = 0;
|
|
uint8_t s_arrmul24_fa19_23_or0 = 0;
|
|
uint8_t s_arrmul24_nand20_23 = 0;
|
|
uint8_t s_arrmul24_fa20_23_xor0 = 0;
|
|
uint8_t s_arrmul24_fa20_23_and0 = 0;
|
|
uint8_t s_arrmul24_fa20_23_xor1 = 0;
|
|
uint8_t s_arrmul24_fa20_23_and1 = 0;
|
|
uint8_t s_arrmul24_fa20_23_or0 = 0;
|
|
uint8_t s_arrmul24_nand21_23 = 0;
|
|
uint8_t s_arrmul24_fa21_23_xor0 = 0;
|
|
uint8_t s_arrmul24_fa21_23_and0 = 0;
|
|
uint8_t s_arrmul24_fa21_23_xor1 = 0;
|
|
uint8_t s_arrmul24_fa21_23_and1 = 0;
|
|
uint8_t s_arrmul24_fa21_23_or0 = 0;
|
|
uint8_t s_arrmul24_nand22_23 = 0;
|
|
uint8_t s_arrmul24_fa22_23_xor0 = 0;
|
|
uint8_t s_arrmul24_fa22_23_and0 = 0;
|
|
uint8_t s_arrmul24_fa22_23_xor1 = 0;
|
|
uint8_t s_arrmul24_fa22_23_and1 = 0;
|
|
uint8_t s_arrmul24_fa22_23_or0 = 0;
|
|
uint8_t s_arrmul24_and23_23 = 0;
|
|
uint8_t s_arrmul24_fa23_23_xor0 = 0;
|
|
uint8_t s_arrmul24_fa23_23_and0 = 0;
|
|
uint8_t s_arrmul24_fa23_23_xor1 = 0;
|
|
uint8_t s_arrmul24_fa23_23_and1 = 0;
|
|
uint8_t s_arrmul24_fa23_23_or0 = 0;
|
|
uint8_t s_arrmul24_xor24_23 = 0;
|
|
|
|
s_arrmul24_and0_0 = ((a >> 0) & 0x01) & ((b >> 0) & 0x01);
|
|
s_arrmul24_and1_0 = ((a >> 1) & 0x01) & ((b >> 0) & 0x01);
|
|
s_arrmul24_and2_0 = ((a >> 2) & 0x01) & ((b >> 0) & 0x01);
|
|
s_arrmul24_and3_0 = ((a >> 3) & 0x01) & ((b >> 0) & 0x01);
|
|
s_arrmul24_and4_0 = ((a >> 4) & 0x01) & ((b >> 0) & 0x01);
|
|
s_arrmul24_and5_0 = ((a >> 5) & 0x01) & ((b >> 0) & 0x01);
|
|
s_arrmul24_and6_0 = ((a >> 6) & 0x01) & ((b >> 0) & 0x01);
|
|
s_arrmul24_and7_0 = ((a >> 7) & 0x01) & ((b >> 0) & 0x01);
|
|
s_arrmul24_and8_0 = ((a >> 8) & 0x01) & ((b >> 0) & 0x01);
|
|
s_arrmul24_and9_0 = ((a >> 9) & 0x01) & ((b >> 0) & 0x01);
|
|
s_arrmul24_and10_0 = ((a >> 10) & 0x01) & ((b >> 0) & 0x01);
|
|
s_arrmul24_and11_0 = ((a >> 11) & 0x01) & ((b >> 0) & 0x01);
|
|
s_arrmul24_and12_0 = ((a >> 12) & 0x01) & ((b >> 0) & 0x01);
|
|
s_arrmul24_and13_0 = ((a >> 13) & 0x01) & ((b >> 0) & 0x01);
|
|
s_arrmul24_and14_0 = ((a >> 14) & 0x01) & ((b >> 0) & 0x01);
|
|
s_arrmul24_and15_0 = ((a >> 15) & 0x01) & ((b >> 0) & 0x01);
|
|
s_arrmul24_and16_0 = ((a >> 16) & 0x01) & ((b >> 0) & 0x01);
|
|
s_arrmul24_and17_0 = ((a >> 17) & 0x01) & ((b >> 0) & 0x01);
|
|
s_arrmul24_and18_0 = ((a >> 18) & 0x01) & ((b >> 0) & 0x01);
|
|
s_arrmul24_and19_0 = ((a >> 19) & 0x01) & ((b >> 0) & 0x01);
|
|
s_arrmul24_and20_0 = ((a >> 20) & 0x01) & ((b >> 0) & 0x01);
|
|
s_arrmul24_and21_0 = ((a >> 21) & 0x01) & ((b >> 0) & 0x01);
|
|
s_arrmul24_and22_0 = ((a >> 22) & 0x01) & ((b >> 0) & 0x01);
|
|
s_arrmul24_nand23_0 = ~(((a >> 23) & 0x01) & ((b >> 0) & 0x01)) & 0x01;
|
|
s_arrmul24_and0_1 = ((a >> 0) & 0x01) & ((b >> 1) & 0x01);
|
|
s_arrmul24_ha0_1_xor0 = ((s_arrmul24_and0_1 >> 0) & 0x01) ^ ((s_arrmul24_and1_0 >> 0) & 0x01);
|
|
s_arrmul24_ha0_1_and0 = ((s_arrmul24_and0_1 >> 0) & 0x01) & ((s_arrmul24_and1_0 >> 0) & 0x01);
|
|
s_arrmul24_and1_1 = ((a >> 1) & 0x01) & ((b >> 1) & 0x01);
|
|
s_arrmul24_fa1_1_xor0 = ((s_arrmul24_and1_1 >> 0) & 0x01) ^ ((s_arrmul24_and2_0 >> 0) & 0x01);
|
|
s_arrmul24_fa1_1_and0 = ((s_arrmul24_and1_1 >> 0) & 0x01) & ((s_arrmul24_and2_0 >> 0) & 0x01);
|
|
s_arrmul24_fa1_1_xor1 = ((s_arrmul24_fa1_1_xor0 >> 0) & 0x01) ^ ((s_arrmul24_ha0_1_and0 >> 0) & 0x01);
|
|
s_arrmul24_fa1_1_and1 = ((s_arrmul24_fa1_1_xor0 >> 0) & 0x01) & ((s_arrmul24_ha0_1_and0 >> 0) & 0x01);
|
|
s_arrmul24_fa1_1_or0 = ((s_arrmul24_fa1_1_and0 >> 0) & 0x01) | ((s_arrmul24_fa1_1_and1 >> 0) & 0x01);
|
|
s_arrmul24_and2_1 = ((a >> 2) & 0x01) & ((b >> 1) & 0x01);
|
|
s_arrmul24_fa2_1_xor0 = ((s_arrmul24_and2_1 >> 0) & 0x01) ^ ((s_arrmul24_and3_0 >> 0) & 0x01);
|
|
s_arrmul24_fa2_1_and0 = ((s_arrmul24_and2_1 >> 0) & 0x01) & ((s_arrmul24_and3_0 >> 0) & 0x01);
|
|
s_arrmul24_fa2_1_xor1 = ((s_arrmul24_fa2_1_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa1_1_or0 >> 0) & 0x01);
|
|
s_arrmul24_fa2_1_and1 = ((s_arrmul24_fa2_1_xor0 >> 0) & 0x01) & ((s_arrmul24_fa1_1_or0 >> 0) & 0x01);
|
|
s_arrmul24_fa2_1_or0 = ((s_arrmul24_fa2_1_and0 >> 0) & 0x01) | ((s_arrmul24_fa2_1_and1 >> 0) & 0x01);
|
|
s_arrmul24_and3_1 = ((a >> 3) & 0x01) & ((b >> 1) & 0x01);
|
|
s_arrmul24_fa3_1_xor0 = ((s_arrmul24_and3_1 >> 0) & 0x01) ^ ((s_arrmul24_and4_0 >> 0) & 0x01);
|
|
s_arrmul24_fa3_1_and0 = ((s_arrmul24_and3_1 >> 0) & 0x01) & ((s_arrmul24_and4_0 >> 0) & 0x01);
|
|
s_arrmul24_fa3_1_xor1 = ((s_arrmul24_fa3_1_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa2_1_or0 >> 0) & 0x01);
|
|
s_arrmul24_fa3_1_and1 = ((s_arrmul24_fa3_1_xor0 >> 0) & 0x01) & ((s_arrmul24_fa2_1_or0 >> 0) & 0x01);
|
|
s_arrmul24_fa3_1_or0 = ((s_arrmul24_fa3_1_and0 >> 0) & 0x01) | ((s_arrmul24_fa3_1_and1 >> 0) & 0x01);
|
|
s_arrmul24_and4_1 = ((a >> 4) & 0x01) & ((b >> 1) & 0x01);
|
|
s_arrmul24_fa4_1_xor0 = ((s_arrmul24_and4_1 >> 0) & 0x01) ^ ((s_arrmul24_and5_0 >> 0) & 0x01);
|
|
s_arrmul24_fa4_1_and0 = ((s_arrmul24_and4_1 >> 0) & 0x01) & ((s_arrmul24_and5_0 >> 0) & 0x01);
|
|
s_arrmul24_fa4_1_xor1 = ((s_arrmul24_fa4_1_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa3_1_or0 >> 0) & 0x01);
|
|
s_arrmul24_fa4_1_and1 = ((s_arrmul24_fa4_1_xor0 >> 0) & 0x01) & ((s_arrmul24_fa3_1_or0 >> 0) & 0x01);
|
|
s_arrmul24_fa4_1_or0 = ((s_arrmul24_fa4_1_and0 >> 0) & 0x01) | ((s_arrmul24_fa4_1_and1 >> 0) & 0x01);
|
|
s_arrmul24_and5_1 = ((a >> 5) & 0x01) & ((b >> 1) & 0x01);
|
|
s_arrmul24_fa5_1_xor0 = ((s_arrmul24_and5_1 >> 0) & 0x01) ^ ((s_arrmul24_and6_0 >> 0) & 0x01);
|
|
s_arrmul24_fa5_1_and0 = ((s_arrmul24_and5_1 >> 0) & 0x01) & ((s_arrmul24_and6_0 >> 0) & 0x01);
|
|
s_arrmul24_fa5_1_xor1 = ((s_arrmul24_fa5_1_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa4_1_or0 >> 0) & 0x01);
|
|
s_arrmul24_fa5_1_and1 = ((s_arrmul24_fa5_1_xor0 >> 0) & 0x01) & ((s_arrmul24_fa4_1_or0 >> 0) & 0x01);
|
|
s_arrmul24_fa5_1_or0 = ((s_arrmul24_fa5_1_and0 >> 0) & 0x01) | ((s_arrmul24_fa5_1_and1 >> 0) & 0x01);
|
|
s_arrmul24_and6_1 = ((a >> 6) & 0x01) & ((b >> 1) & 0x01);
|
|
s_arrmul24_fa6_1_xor0 = ((s_arrmul24_and6_1 >> 0) & 0x01) ^ ((s_arrmul24_and7_0 >> 0) & 0x01);
|
|
s_arrmul24_fa6_1_and0 = ((s_arrmul24_and6_1 >> 0) & 0x01) & ((s_arrmul24_and7_0 >> 0) & 0x01);
|
|
s_arrmul24_fa6_1_xor1 = ((s_arrmul24_fa6_1_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa5_1_or0 >> 0) & 0x01);
|
|
s_arrmul24_fa6_1_and1 = ((s_arrmul24_fa6_1_xor0 >> 0) & 0x01) & ((s_arrmul24_fa5_1_or0 >> 0) & 0x01);
|
|
s_arrmul24_fa6_1_or0 = ((s_arrmul24_fa6_1_and0 >> 0) & 0x01) | ((s_arrmul24_fa6_1_and1 >> 0) & 0x01);
|
|
s_arrmul24_and7_1 = ((a >> 7) & 0x01) & ((b >> 1) & 0x01);
|
|
s_arrmul24_fa7_1_xor0 = ((s_arrmul24_and7_1 >> 0) & 0x01) ^ ((s_arrmul24_and8_0 >> 0) & 0x01);
|
|
s_arrmul24_fa7_1_and0 = ((s_arrmul24_and7_1 >> 0) & 0x01) & ((s_arrmul24_and8_0 >> 0) & 0x01);
|
|
s_arrmul24_fa7_1_xor1 = ((s_arrmul24_fa7_1_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa6_1_or0 >> 0) & 0x01);
|
|
s_arrmul24_fa7_1_and1 = ((s_arrmul24_fa7_1_xor0 >> 0) & 0x01) & ((s_arrmul24_fa6_1_or0 >> 0) & 0x01);
|
|
s_arrmul24_fa7_1_or0 = ((s_arrmul24_fa7_1_and0 >> 0) & 0x01) | ((s_arrmul24_fa7_1_and1 >> 0) & 0x01);
|
|
s_arrmul24_and8_1 = ((a >> 8) & 0x01) & ((b >> 1) & 0x01);
|
|
s_arrmul24_fa8_1_xor0 = ((s_arrmul24_and8_1 >> 0) & 0x01) ^ ((s_arrmul24_and9_0 >> 0) & 0x01);
|
|
s_arrmul24_fa8_1_and0 = ((s_arrmul24_and8_1 >> 0) & 0x01) & ((s_arrmul24_and9_0 >> 0) & 0x01);
|
|
s_arrmul24_fa8_1_xor1 = ((s_arrmul24_fa8_1_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa7_1_or0 >> 0) & 0x01);
|
|
s_arrmul24_fa8_1_and1 = ((s_arrmul24_fa8_1_xor0 >> 0) & 0x01) & ((s_arrmul24_fa7_1_or0 >> 0) & 0x01);
|
|
s_arrmul24_fa8_1_or0 = ((s_arrmul24_fa8_1_and0 >> 0) & 0x01) | ((s_arrmul24_fa8_1_and1 >> 0) & 0x01);
|
|
s_arrmul24_and9_1 = ((a >> 9) & 0x01) & ((b >> 1) & 0x01);
|
|
s_arrmul24_fa9_1_xor0 = ((s_arrmul24_and9_1 >> 0) & 0x01) ^ ((s_arrmul24_and10_0 >> 0) & 0x01);
|
|
s_arrmul24_fa9_1_and0 = ((s_arrmul24_and9_1 >> 0) & 0x01) & ((s_arrmul24_and10_0 >> 0) & 0x01);
|
|
s_arrmul24_fa9_1_xor1 = ((s_arrmul24_fa9_1_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa8_1_or0 >> 0) & 0x01);
|
|
s_arrmul24_fa9_1_and1 = ((s_arrmul24_fa9_1_xor0 >> 0) & 0x01) & ((s_arrmul24_fa8_1_or0 >> 0) & 0x01);
|
|
s_arrmul24_fa9_1_or0 = ((s_arrmul24_fa9_1_and0 >> 0) & 0x01) | ((s_arrmul24_fa9_1_and1 >> 0) & 0x01);
|
|
s_arrmul24_and10_1 = ((a >> 10) & 0x01) & ((b >> 1) & 0x01);
|
|
s_arrmul24_fa10_1_xor0 = ((s_arrmul24_and10_1 >> 0) & 0x01) ^ ((s_arrmul24_and11_0 >> 0) & 0x01);
|
|
s_arrmul24_fa10_1_and0 = ((s_arrmul24_and10_1 >> 0) & 0x01) & ((s_arrmul24_and11_0 >> 0) & 0x01);
|
|
s_arrmul24_fa10_1_xor1 = ((s_arrmul24_fa10_1_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa9_1_or0 >> 0) & 0x01);
|
|
s_arrmul24_fa10_1_and1 = ((s_arrmul24_fa10_1_xor0 >> 0) & 0x01) & ((s_arrmul24_fa9_1_or0 >> 0) & 0x01);
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s_arrmul24_fa10_1_or0 = ((s_arrmul24_fa10_1_and0 >> 0) & 0x01) | ((s_arrmul24_fa10_1_and1 >> 0) & 0x01);
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s_arrmul24_and11_1 = ((a >> 11) & 0x01) & ((b >> 1) & 0x01);
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s_arrmul24_fa11_1_xor0 = ((s_arrmul24_and11_1 >> 0) & 0x01) ^ ((s_arrmul24_and12_0 >> 0) & 0x01);
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s_arrmul24_fa11_1_and0 = ((s_arrmul24_and11_1 >> 0) & 0x01) & ((s_arrmul24_and12_0 >> 0) & 0x01);
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s_arrmul24_fa11_1_xor1 = ((s_arrmul24_fa11_1_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa10_1_or0 >> 0) & 0x01);
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s_arrmul24_fa11_1_and1 = ((s_arrmul24_fa11_1_xor0 >> 0) & 0x01) & ((s_arrmul24_fa10_1_or0 >> 0) & 0x01);
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s_arrmul24_fa11_1_or0 = ((s_arrmul24_fa11_1_and0 >> 0) & 0x01) | ((s_arrmul24_fa11_1_and1 >> 0) & 0x01);
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s_arrmul24_and12_1 = ((a >> 12) & 0x01) & ((b >> 1) & 0x01);
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s_arrmul24_fa12_1_xor0 = ((s_arrmul24_and12_1 >> 0) & 0x01) ^ ((s_arrmul24_and13_0 >> 0) & 0x01);
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s_arrmul24_fa12_1_and0 = ((s_arrmul24_and12_1 >> 0) & 0x01) & ((s_arrmul24_and13_0 >> 0) & 0x01);
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s_arrmul24_fa12_1_xor1 = ((s_arrmul24_fa12_1_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa11_1_or0 >> 0) & 0x01);
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s_arrmul24_fa12_1_and1 = ((s_arrmul24_fa12_1_xor0 >> 0) & 0x01) & ((s_arrmul24_fa11_1_or0 >> 0) & 0x01);
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s_arrmul24_fa12_1_or0 = ((s_arrmul24_fa12_1_and0 >> 0) & 0x01) | ((s_arrmul24_fa12_1_and1 >> 0) & 0x01);
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s_arrmul24_and13_1 = ((a >> 13) & 0x01) & ((b >> 1) & 0x01);
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s_arrmul24_fa13_1_xor0 = ((s_arrmul24_and13_1 >> 0) & 0x01) ^ ((s_arrmul24_and14_0 >> 0) & 0x01);
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s_arrmul24_fa13_1_and0 = ((s_arrmul24_and13_1 >> 0) & 0x01) & ((s_arrmul24_and14_0 >> 0) & 0x01);
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s_arrmul24_fa13_1_xor1 = ((s_arrmul24_fa13_1_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa12_1_or0 >> 0) & 0x01);
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s_arrmul24_fa13_1_and1 = ((s_arrmul24_fa13_1_xor0 >> 0) & 0x01) & ((s_arrmul24_fa12_1_or0 >> 0) & 0x01);
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s_arrmul24_fa13_1_or0 = ((s_arrmul24_fa13_1_and0 >> 0) & 0x01) | ((s_arrmul24_fa13_1_and1 >> 0) & 0x01);
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s_arrmul24_and14_1 = ((a >> 14) & 0x01) & ((b >> 1) & 0x01);
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s_arrmul24_fa14_1_xor0 = ((s_arrmul24_and14_1 >> 0) & 0x01) ^ ((s_arrmul24_and15_0 >> 0) & 0x01);
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s_arrmul24_fa14_1_and0 = ((s_arrmul24_and14_1 >> 0) & 0x01) & ((s_arrmul24_and15_0 >> 0) & 0x01);
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s_arrmul24_fa14_1_xor1 = ((s_arrmul24_fa14_1_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa13_1_or0 >> 0) & 0x01);
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s_arrmul24_fa14_1_and1 = ((s_arrmul24_fa14_1_xor0 >> 0) & 0x01) & ((s_arrmul24_fa13_1_or0 >> 0) & 0x01);
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s_arrmul24_fa14_1_or0 = ((s_arrmul24_fa14_1_and0 >> 0) & 0x01) | ((s_arrmul24_fa14_1_and1 >> 0) & 0x01);
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s_arrmul24_and15_1 = ((a >> 15) & 0x01) & ((b >> 1) & 0x01);
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s_arrmul24_fa15_1_xor0 = ((s_arrmul24_and15_1 >> 0) & 0x01) ^ ((s_arrmul24_and16_0 >> 0) & 0x01);
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s_arrmul24_fa15_1_and0 = ((s_arrmul24_and15_1 >> 0) & 0x01) & ((s_arrmul24_and16_0 >> 0) & 0x01);
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s_arrmul24_fa15_1_xor1 = ((s_arrmul24_fa15_1_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa14_1_or0 >> 0) & 0x01);
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s_arrmul24_fa15_1_and1 = ((s_arrmul24_fa15_1_xor0 >> 0) & 0x01) & ((s_arrmul24_fa14_1_or0 >> 0) & 0x01);
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s_arrmul24_fa15_1_or0 = ((s_arrmul24_fa15_1_and0 >> 0) & 0x01) | ((s_arrmul24_fa15_1_and1 >> 0) & 0x01);
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s_arrmul24_and16_1 = ((a >> 16) & 0x01) & ((b >> 1) & 0x01);
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s_arrmul24_fa16_1_xor0 = ((s_arrmul24_and16_1 >> 0) & 0x01) ^ ((s_arrmul24_and17_0 >> 0) & 0x01);
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s_arrmul24_fa16_1_and0 = ((s_arrmul24_and16_1 >> 0) & 0x01) & ((s_arrmul24_and17_0 >> 0) & 0x01);
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s_arrmul24_fa16_1_xor1 = ((s_arrmul24_fa16_1_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa15_1_or0 >> 0) & 0x01);
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s_arrmul24_fa16_1_and1 = ((s_arrmul24_fa16_1_xor0 >> 0) & 0x01) & ((s_arrmul24_fa15_1_or0 >> 0) & 0x01);
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s_arrmul24_fa16_1_or0 = ((s_arrmul24_fa16_1_and0 >> 0) & 0x01) | ((s_arrmul24_fa16_1_and1 >> 0) & 0x01);
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s_arrmul24_and17_1 = ((a >> 17) & 0x01) & ((b >> 1) & 0x01);
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s_arrmul24_fa17_1_xor0 = ((s_arrmul24_and17_1 >> 0) & 0x01) ^ ((s_arrmul24_and18_0 >> 0) & 0x01);
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s_arrmul24_fa17_1_and0 = ((s_arrmul24_and17_1 >> 0) & 0x01) & ((s_arrmul24_and18_0 >> 0) & 0x01);
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s_arrmul24_fa17_1_xor1 = ((s_arrmul24_fa17_1_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa16_1_or0 >> 0) & 0x01);
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s_arrmul24_fa17_1_and1 = ((s_arrmul24_fa17_1_xor0 >> 0) & 0x01) & ((s_arrmul24_fa16_1_or0 >> 0) & 0x01);
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s_arrmul24_fa17_1_or0 = ((s_arrmul24_fa17_1_and0 >> 0) & 0x01) | ((s_arrmul24_fa17_1_and1 >> 0) & 0x01);
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s_arrmul24_and18_1 = ((a >> 18) & 0x01) & ((b >> 1) & 0x01);
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s_arrmul24_fa18_1_xor0 = ((s_arrmul24_and18_1 >> 0) & 0x01) ^ ((s_arrmul24_and19_0 >> 0) & 0x01);
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s_arrmul24_fa18_1_and0 = ((s_arrmul24_and18_1 >> 0) & 0x01) & ((s_arrmul24_and19_0 >> 0) & 0x01);
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s_arrmul24_fa18_1_xor1 = ((s_arrmul24_fa18_1_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa17_1_or0 >> 0) & 0x01);
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s_arrmul24_fa18_1_and1 = ((s_arrmul24_fa18_1_xor0 >> 0) & 0x01) & ((s_arrmul24_fa17_1_or0 >> 0) & 0x01);
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s_arrmul24_fa18_1_or0 = ((s_arrmul24_fa18_1_and0 >> 0) & 0x01) | ((s_arrmul24_fa18_1_and1 >> 0) & 0x01);
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s_arrmul24_and19_1 = ((a >> 19) & 0x01) & ((b >> 1) & 0x01);
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s_arrmul24_fa19_1_xor0 = ((s_arrmul24_and19_1 >> 0) & 0x01) ^ ((s_arrmul24_and20_0 >> 0) & 0x01);
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s_arrmul24_fa19_1_and0 = ((s_arrmul24_and19_1 >> 0) & 0x01) & ((s_arrmul24_and20_0 >> 0) & 0x01);
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s_arrmul24_fa19_1_xor1 = ((s_arrmul24_fa19_1_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa18_1_or0 >> 0) & 0x01);
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s_arrmul24_fa19_1_and1 = ((s_arrmul24_fa19_1_xor0 >> 0) & 0x01) & ((s_arrmul24_fa18_1_or0 >> 0) & 0x01);
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s_arrmul24_fa19_1_or0 = ((s_arrmul24_fa19_1_and0 >> 0) & 0x01) | ((s_arrmul24_fa19_1_and1 >> 0) & 0x01);
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s_arrmul24_and20_1 = ((a >> 20) & 0x01) & ((b >> 1) & 0x01);
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s_arrmul24_fa20_1_xor0 = ((s_arrmul24_and20_1 >> 0) & 0x01) ^ ((s_arrmul24_and21_0 >> 0) & 0x01);
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s_arrmul24_fa20_1_and0 = ((s_arrmul24_and20_1 >> 0) & 0x01) & ((s_arrmul24_and21_0 >> 0) & 0x01);
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s_arrmul24_fa20_1_xor1 = ((s_arrmul24_fa20_1_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa19_1_or0 >> 0) & 0x01);
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s_arrmul24_fa20_1_and1 = ((s_arrmul24_fa20_1_xor0 >> 0) & 0x01) & ((s_arrmul24_fa19_1_or0 >> 0) & 0x01);
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s_arrmul24_fa20_1_or0 = ((s_arrmul24_fa20_1_and0 >> 0) & 0x01) | ((s_arrmul24_fa20_1_and1 >> 0) & 0x01);
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s_arrmul24_and21_1 = ((a >> 21) & 0x01) & ((b >> 1) & 0x01);
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s_arrmul24_fa21_1_xor0 = ((s_arrmul24_and21_1 >> 0) & 0x01) ^ ((s_arrmul24_and22_0 >> 0) & 0x01);
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s_arrmul24_fa21_1_and0 = ((s_arrmul24_and21_1 >> 0) & 0x01) & ((s_arrmul24_and22_0 >> 0) & 0x01);
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s_arrmul24_fa21_1_xor1 = ((s_arrmul24_fa21_1_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa20_1_or0 >> 0) & 0x01);
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s_arrmul24_fa21_1_and1 = ((s_arrmul24_fa21_1_xor0 >> 0) & 0x01) & ((s_arrmul24_fa20_1_or0 >> 0) & 0x01);
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s_arrmul24_fa21_1_or0 = ((s_arrmul24_fa21_1_and0 >> 0) & 0x01) | ((s_arrmul24_fa21_1_and1 >> 0) & 0x01);
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s_arrmul24_and22_1 = ((a >> 22) & 0x01) & ((b >> 1) & 0x01);
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s_arrmul24_fa22_1_xor0 = ((s_arrmul24_and22_1 >> 0) & 0x01) ^ ((s_arrmul24_nand23_0 >> 0) & 0x01);
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s_arrmul24_fa22_1_and0 = ((s_arrmul24_and22_1 >> 0) & 0x01) & ((s_arrmul24_nand23_0 >> 0) & 0x01);
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s_arrmul24_fa22_1_xor1 = ((s_arrmul24_fa22_1_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa21_1_or0 >> 0) & 0x01);
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s_arrmul24_fa22_1_and1 = ((s_arrmul24_fa22_1_xor0 >> 0) & 0x01) & ((s_arrmul24_fa21_1_or0 >> 0) & 0x01);
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s_arrmul24_fa22_1_or0 = ((s_arrmul24_fa22_1_and0 >> 0) & 0x01) | ((s_arrmul24_fa22_1_and1 >> 0) & 0x01);
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s_arrmul24_nand23_1 = ~(((a >> 23) & 0x01) & ((b >> 1) & 0x01)) & 0x01;
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s_arrmul24_fa23_1_xor0 = ~(((s_arrmul24_nand23_1 >> 0) & 0x01)) & 0x01;
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s_arrmul24_fa23_1_xor1 = ((s_arrmul24_fa23_1_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa22_1_or0 >> 0) & 0x01);
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s_arrmul24_fa23_1_and1 = ((s_arrmul24_fa23_1_xor0 >> 0) & 0x01) & ((s_arrmul24_fa22_1_or0 >> 0) & 0x01);
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s_arrmul24_fa23_1_or0 = ((s_arrmul24_nand23_1 >> 0) & 0x01) | ((s_arrmul24_fa23_1_and1 >> 0) & 0x01);
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s_arrmul24_and0_2 = ((a >> 0) & 0x01) & ((b >> 2) & 0x01);
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s_arrmul24_ha0_2_xor0 = ((s_arrmul24_and0_2 >> 0) & 0x01) ^ ((s_arrmul24_fa1_1_xor1 >> 0) & 0x01);
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s_arrmul24_ha0_2_and0 = ((s_arrmul24_and0_2 >> 0) & 0x01) & ((s_arrmul24_fa1_1_xor1 >> 0) & 0x01);
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s_arrmul24_and1_2 = ((a >> 1) & 0x01) & ((b >> 2) & 0x01);
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s_arrmul24_fa1_2_xor0 = ((s_arrmul24_and1_2 >> 0) & 0x01) ^ ((s_arrmul24_fa2_1_xor1 >> 0) & 0x01);
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s_arrmul24_fa1_2_and0 = ((s_arrmul24_and1_2 >> 0) & 0x01) & ((s_arrmul24_fa2_1_xor1 >> 0) & 0x01);
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s_arrmul24_fa1_2_xor1 = ((s_arrmul24_fa1_2_xor0 >> 0) & 0x01) ^ ((s_arrmul24_ha0_2_and0 >> 0) & 0x01);
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s_arrmul24_fa1_2_and1 = ((s_arrmul24_fa1_2_xor0 >> 0) & 0x01) & ((s_arrmul24_ha0_2_and0 >> 0) & 0x01);
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s_arrmul24_fa1_2_or0 = ((s_arrmul24_fa1_2_and0 >> 0) & 0x01) | ((s_arrmul24_fa1_2_and1 >> 0) & 0x01);
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s_arrmul24_and2_2 = ((a >> 2) & 0x01) & ((b >> 2) & 0x01);
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s_arrmul24_fa2_2_xor0 = ((s_arrmul24_and2_2 >> 0) & 0x01) ^ ((s_arrmul24_fa3_1_xor1 >> 0) & 0x01);
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s_arrmul24_fa2_2_and0 = ((s_arrmul24_and2_2 >> 0) & 0x01) & ((s_arrmul24_fa3_1_xor1 >> 0) & 0x01);
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s_arrmul24_fa2_2_xor1 = ((s_arrmul24_fa2_2_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa1_2_or0 >> 0) & 0x01);
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s_arrmul24_fa2_2_and1 = ((s_arrmul24_fa2_2_xor0 >> 0) & 0x01) & ((s_arrmul24_fa1_2_or0 >> 0) & 0x01);
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s_arrmul24_fa2_2_or0 = ((s_arrmul24_fa2_2_and0 >> 0) & 0x01) | ((s_arrmul24_fa2_2_and1 >> 0) & 0x01);
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s_arrmul24_and3_2 = ((a >> 3) & 0x01) & ((b >> 2) & 0x01);
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s_arrmul24_fa3_2_xor0 = ((s_arrmul24_and3_2 >> 0) & 0x01) ^ ((s_arrmul24_fa4_1_xor1 >> 0) & 0x01);
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s_arrmul24_fa3_2_and0 = ((s_arrmul24_and3_2 >> 0) & 0x01) & ((s_arrmul24_fa4_1_xor1 >> 0) & 0x01);
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s_arrmul24_fa3_2_xor1 = ((s_arrmul24_fa3_2_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa2_2_or0 >> 0) & 0x01);
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s_arrmul24_fa3_2_and1 = ((s_arrmul24_fa3_2_xor0 >> 0) & 0x01) & ((s_arrmul24_fa2_2_or0 >> 0) & 0x01);
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s_arrmul24_fa3_2_or0 = ((s_arrmul24_fa3_2_and0 >> 0) & 0x01) | ((s_arrmul24_fa3_2_and1 >> 0) & 0x01);
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s_arrmul24_and4_2 = ((a >> 4) & 0x01) & ((b >> 2) & 0x01);
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s_arrmul24_fa4_2_xor0 = ((s_arrmul24_and4_2 >> 0) & 0x01) ^ ((s_arrmul24_fa5_1_xor1 >> 0) & 0x01);
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s_arrmul24_fa4_2_and0 = ((s_arrmul24_and4_2 >> 0) & 0x01) & ((s_arrmul24_fa5_1_xor1 >> 0) & 0x01);
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s_arrmul24_fa4_2_xor1 = ((s_arrmul24_fa4_2_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa3_2_or0 >> 0) & 0x01);
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s_arrmul24_fa4_2_and1 = ((s_arrmul24_fa4_2_xor0 >> 0) & 0x01) & ((s_arrmul24_fa3_2_or0 >> 0) & 0x01);
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s_arrmul24_fa4_2_or0 = ((s_arrmul24_fa4_2_and0 >> 0) & 0x01) | ((s_arrmul24_fa4_2_and1 >> 0) & 0x01);
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s_arrmul24_and5_2 = ((a >> 5) & 0x01) & ((b >> 2) & 0x01);
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s_arrmul24_fa5_2_xor0 = ((s_arrmul24_and5_2 >> 0) & 0x01) ^ ((s_arrmul24_fa6_1_xor1 >> 0) & 0x01);
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s_arrmul24_fa5_2_and0 = ((s_arrmul24_and5_2 >> 0) & 0x01) & ((s_arrmul24_fa6_1_xor1 >> 0) & 0x01);
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s_arrmul24_fa5_2_xor1 = ((s_arrmul24_fa5_2_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa4_2_or0 >> 0) & 0x01);
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s_arrmul24_fa5_2_and1 = ((s_arrmul24_fa5_2_xor0 >> 0) & 0x01) & ((s_arrmul24_fa4_2_or0 >> 0) & 0x01);
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s_arrmul24_fa5_2_or0 = ((s_arrmul24_fa5_2_and0 >> 0) & 0x01) | ((s_arrmul24_fa5_2_and1 >> 0) & 0x01);
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s_arrmul24_and6_2 = ((a >> 6) & 0x01) & ((b >> 2) & 0x01);
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s_arrmul24_fa6_2_xor0 = ((s_arrmul24_and6_2 >> 0) & 0x01) ^ ((s_arrmul24_fa7_1_xor1 >> 0) & 0x01);
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s_arrmul24_fa6_2_and0 = ((s_arrmul24_and6_2 >> 0) & 0x01) & ((s_arrmul24_fa7_1_xor1 >> 0) & 0x01);
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s_arrmul24_fa6_2_xor1 = ((s_arrmul24_fa6_2_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa5_2_or0 >> 0) & 0x01);
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s_arrmul24_fa6_2_and1 = ((s_arrmul24_fa6_2_xor0 >> 0) & 0x01) & ((s_arrmul24_fa5_2_or0 >> 0) & 0x01);
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s_arrmul24_fa6_2_or0 = ((s_arrmul24_fa6_2_and0 >> 0) & 0x01) | ((s_arrmul24_fa6_2_and1 >> 0) & 0x01);
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s_arrmul24_and7_2 = ((a >> 7) & 0x01) & ((b >> 2) & 0x01);
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s_arrmul24_fa7_2_xor0 = ((s_arrmul24_and7_2 >> 0) & 0x01) ^ ((s_arrmul24_fa8_1_xor1 >> 0) & 0x01);
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s_arrmul24_fa7_2_and0 = ((s_arrmul24_and7_2 >> 0) & 0x01) & ((s_arrmul24_fa8_1_xor1 >> 0) & 0x01);
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s_arrmul24_fa7_2_xor1 = ((s_arrmul24_fa7_2_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa6_2_or0 >> 0) & 0x01);
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s_arrmul24_fa7_2_and1 = ((s_arrmul24_fa7_2_xor0 >> 0) & 0x01) & ((s_arrmul24_fa6_2_or0 >> 0) & 0x01);
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s_arrmul24_fa7_2_or0 = ((s_arrmul24_fa7_2_and0 >> 0) & 0x01) | ((s_arrmul24_fa7_2_and1 >> 0) & 0x01);
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s_arrmul24_and8_2 = ((a >> 8) & 0x01) & ((b >> 2) & 0x01);
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s_arrmul24_fa8_2_xor0 = ((s_arrmul24_and8_2 >> 0) & 0x01) ^ ((s_arrmul24_fa9_1_xor1 >> 0) & 0x01);
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s_arrmul24_fa8_2_and0 = ((s_arrmul24_and8_2 >> 0) & 0x01) & ((s_arrmul24_fa9_1_xor1 >> 0) & 0x01);
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s_arrmul24_fa8_2_xor1 = ((s_arrmul24_fa8_2_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa7_2_or0 >> 0) & 0x01);
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s_arrmul24_fa8_2_and1 = ((s_arrmul24_fa8_2_xor0 >> 0) & 0x01) & ((s_arrmul24_fa7_2_or0 >> 0) & 0x01);
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s_arrmul24_fa8_2_or0 = ((s_arrmul24_fa8_2_and0 >> 0) & 0x01) | ((s_arrmul24_fa8_2_and1 >> 0) & 0x01);
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s_arrmul24_and9_2 = ((a >> 9) & 0x01) & ((b >> 2) & 0x01);
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s_arrmul24_fa9_2_xor0 = ((s_arrmul24_and9_2 >> 0) & 0x01) ^ ((s_arrmul24_fa10_1_xor1 >> 0) & 0x01);
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s_arrmul24_fa9_2_and0 = ((s_arrmul24_and9_2 >> 0) & 0x01) & ((s_arrmul24_fa10_1_xor1 >> 0) & 0x01);
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s_arrmul24_fa9_2_xor1 = ((s_arrmul24_fa9_2_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa8_2_or0 >> 0) & 0x01);
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s_arrmul24_fa9_2_and1 = ((s_arrmul24_fa9_2_xor0 >> 0) & 0x01) & ((s_arrmul24_fa8_2_or0 >> 0) & 0x01);
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s_arrmul24_fa9_2_or0 = ((s_arrmul24_fa9_2_and0 >> 0) & 0x01) | ((s_arrmul24_fa9_2_and1 >> 0) & 0x01);
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s_arrmul24_and10_2 = ((a >> 10) & 0x01) & ((b >> 2) & 0x01);
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s_arrmul24_fa10_2_xor0 = ((s_arrmul24_and10_2 >> 0) & 0x01) ^ ((s_arrmul24_fa11_1_xor1 >> 0) & 0x01);
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s_arrmul24_fa10_2_and0 = ((s_arrmul24_and10_2 >> 0) & 0x01) & ((s_arrmul24_fa11_1_xor1 >> 0) & 0x01);
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s_arrmul24_fa10_2_xor1 = ((s_arrmul24_fa10_2_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa9_2_or0 >> 0) & 0x01);
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s_arrmul24_fa10_2_and1 = ((s_arrmul24_fa10_2_xor0 >> 0) & 0x01) & ((s_arrmul24_fa9_2_or0 >> 0) & 0x01);
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s_arrmul24_fa10_2_or0 = ((s_arrmul24_fa10_2_and0 >> 0) & 0x01) | ((s_arrmul24_fa10_2_and1 >> 0) & 0x01);
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s_arrmul24_and11_2 = ((a >> 11) & 0x01) & ((b >> 2) & 0x01);
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s_arrmul24_fa11_2_xor0 = ((s_arrmul24_and11_2 >> 0) & 0x01) ^ ((s_arrmul24_fa12_1_xor1 >> 0) & 0x01);
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s_arrmul24_fa11_2_and0 = ((s_arrmul24_and11_2 >> 0) & 0x01) & ((s_arrmul24_fa12_1_xor1 >> 0) & 0x01);
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s_arrmul24_fa11_2_xor1 = ((s_arrmul24_fa11_2_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa10_2_or0 >> 0) & 0x01);
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s_arrmul24_fa11_2_and1 = ((s_arrmul24_fa11_2_xor0 >> 0) & 0x01) & ((s_arrmul24_fa10_2_or0 >> 0) & 0x01);
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s_arrmul24_fa11_2_or0 = ((s_arrmul24_fa11_2_and0 >> 0) & 0x01) | ((s_arrmul24_fa11_2_and1 >> 0) & 0x01);
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s_arrmul24_and12_2 = ((a >> 12) & 0x01) & ((b >> 2) & 0x01);
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s_arrmul24_fa12_2_xor0 = ((s_arrmul24_and12_2 >> 0) & 0x01) ^ ((s_arrmul24_fa13_1_xor1 >> 0) & 0x01);
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s_arrmul24_fa12_2_and0 = ((s_arrmul24_and12_2 >> 0) & 0x01) & ((s_arrmul24_fa13_1_xor1 >> 0) & 0x01);
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s_arrmul24_fa12_2_xor1 = ((s_arrmul24_fa12_2_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa11_2_or0 >> 0) & 0x01);
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s_arrmul24_fa12_2_and1 = ((s_arrmul24_fa12_2_xor0 >> 0) & 0x01) & ((s_arrmul24_fa11_2_or0 >> 0) & 0x01);
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s_arrmul24_fa12_2_or0 = ((s_arrmul24_fa12_2_and0 >> 0) & 0x01) | ((s_arrmul24_fa12_2_and1 >> 0) & 0x01);
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s_arrmul24_and13_2 = ((a >> 13) & 0x01) & ((b >> 2) & 0x01);
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s_arrmul24_fa13_2_xor0 = ((s_arrmul24_and13_2 >> 0) & 0x01) ^ ((s_arrmul24_fa14_1_xor1 >> 0) & 0x01);
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s_arrmul24_fa13_2_and0 = ((s_arrmul24_and13_2 >> 0) & 0x01) & ((s_arrmul24_fa14_1_xor1 >> 0) & 0x01);
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s_arrmul24_fa13_2_xor1 = ((s_arrmul24_fa13_2_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa12_2_or0 >> 0) & 0x01);
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s_arrmul24_fa13_2_and1 = ((s_arrmul24_fa13_2_xor0 >> 0) & 0x01) & ((s_arrmul24_fa12_2_or0 >> 0) & 0x01);
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s_arrmul24_fa13_2_or0 = ((s_arrmul24_fa13_2_and0 >> 0) & 0x01) | ((s_arrmul24_fa13_2_and1 >> 0) & 0x01);
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s_arrmul24_and14_2 = ((a >> 14) & 0x01) & ((b >> 2) & 0x01);
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s_arrmul24_fa14_2_xor0 = ((s_arrmul24_and14_2 >> 0) & 0x01) ^ ((s_arrmul24_fa15_1_xor1 >> 0) & 0x01);
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s_arrmul24_fa14_2_and0 = ((s_arrmul24_and14_2 >> 0) & 0x01) & ((s_arrmul24_fa15_1_xor1 >> 0) & 0x01);
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s_arrmul24_fa14_2_xor1 = ((s_arrmul24_fa14_2_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa13_2_or0 >> 0) & 0x01);
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s_arrmul24_fa14_2_and1 = ((s_arrmul24_fa14_2_xor0 >> 0) & 0x01) & ((s_arrmul24_fa13_2_or0 >> 0) & 0x01);
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s_arrmul24_fa14_2_or0 = ((s_arrmul24_fa14_2_and0 >> 0) & 0x01) | ((s_arrmul24_fa14_2_and1 >> 0) & 0x01);
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s_arrmul24_and15_2 = ((a >> 15) & 0x01) & ((b >> 2) & 0x01);
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s_arrmul24_fa15_2_xor0 = ((s_arrmul24_and15_2 >> 0) & 0x01) ^ ((s_arrmul24_fa16_1_xor1 >> 0) & 0x01);
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s_arrmul24_fa15_2_and0 = ((s_arrmul24_and15_2 >> 0) & 0x01) & ((s_arrmul24_fa16_1_xor1 >> 0) & 0x01);
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s_arrmul24_fa15_2_xor1 = ((s_arrmul24_fa15_2_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa14_2_or0 >> 0) & 0x01);
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s_arrmul24_fa15_2_and1 = ((s_arrmul24_fa15_2_xor0 >> 0) & 0x01) & ((s_arrmul24_fa14_2_or0 >> 0) & 0x01);
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s_arrmul24_fa15_2_or0 = ((s_arrmul24_fa15_2_and0 >> 0) & 0x01) | ((s_arrmul24_fa15_2_and1 >> 0) & 0x01);
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s_arrmul24_and16_2 = ((a >> 16) & 0x01) & ((b >> 2) & 0x01);
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s_arrmul24_fa16_2_xor0 = ((s_arrmul24_and16_2 >> 0) & 0x01) ^ ((s_arrmul24_fa17_1_xor1 >> 0) & 0x01);
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s_arrmul24_fa16_2_and0 = ((s_arrmul24_and16_2 >> 0) & 0x01) & ((s_arrmul24_fa17_1_xor1 >> 0) & 0x01);
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s_arrmul24_fa16_2_xor1 = ((s_arrmul24_fa16_2_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa15_2_or0 >> 0) & 0x01);
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s_arrmul24_fa16_2_and1 = ((s_arrmul24_fa16_2_xor0 >> 0) & 0x01) & ((s_arrmul24_fa15_2_or0 >> 0) & 0x01);
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s_arrmul24_fa16_2_or0 = ((s_arrmul24_fa16_2_and0 >> 0) & 0x01) | ((s_arrmul24_fa16_2_and1 >> 0) & 0x01);
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s_arrmul24_and17_2 = ((a >> 17) & 0x01) & ((b >> 2) & 0x01);
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s_arrmul24_fa17_2_xor0 = ((s_arrmul24_and17_2 >> 0) & 0x01) ^ ((s_arrmul24_fa18_1_xor1 >> 0) & 0x01);
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s_arrmul24_fa17_2_and0 = ((s_arrmul24_and17_2 >> 0) & 0x01) & ((s_arrmul24_fa18_1_xor1 >> 0) & 0x01);
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s_arrmul24_fa17_2_xor1 = ((s_arrmul24_fa17_2_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa16_2_or0 >> 0) & 0x01);
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s_arrmul24_fa17_2_and1 = ((s_arrmul24_fa17_2_xor0 >> 0) & 0x01) & ((s_arrmul24_fa16_2_or0 >> 0) & 0x01);
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s_arrmul24_fa17_2_or0 = ((s_arrmul24_fa17_2_and0 >> 0) & 0x01) | ((s_arrmul24_fa17_2_and1 >> 0) & 0x01);
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s_arrmul24_and18_2 = ((a >> 18) & 0x01) & ((b >> 2) & 0x01);
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s_arrmul24_fa18_2_xor0 = ((s_arrmul24_and18_2 >> 0) & 0x01) ^ ((s_arrmul24_fa19_1_xor1 >> 0) & 0x01);
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s_arrmul24_fa18_2_and0 = ((s_arrmul24_and18_2 >> 0) & 0x01) & ((s_arrmul24_fa19_1_xor1 >> 0) & 0x01);
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s_arrmul24_fa18_2_xor1 = ((s_arrmul24_fa18_2_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa17_2_or0 >> 0) & 0x01);
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s_arrmul24_fa18_2_and1 = ((s_arrmul24_fa18_2_xor0 >> 0) & 0x01) & ((s_arrmul24_fa17_2_or0 >> 0) & 0x01);
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s_arrmul24_fa18_2_or0 = ((s_arrmul24_fa18_2_and0 >> 0) & 0x01) | ((s_arrmul24_fa18_2_and1 >> 0) & 0x01);
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s_arrmul24_and19_2 = ((a >> 19) & 0x01) & ((b >> 2) & 0x01);
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s_arrmul24_fa19_2_xor0 = ((s_arrmul24_and19_2 >> 0) & 0x01) ^ ((s_arrmul24_fa20_1_xor1 >> 0) & 0x01);
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s_arrmul24_fa19_2_and0 = ((s_arrmul24_and19_2 >> 0) & 0x01) & ((s_arrmul24_fa20_1_xor1 >> 0) & 0x01);
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s_arrmul24_fa19_2_xor1 = ((s_arrmul24_fa19_2_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa18_2_or0 >> 0) & 0x01);
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s_arrmul24_fa19_2_and1 = ((s_arrmul24_fa19_2_xor0 >> 0) & 0x01) & ((s_arrmul24_fa18_2_or0 >> 0) & 0x01);
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s_arrmul24_fa19_2_or0 = ((s_arrmul24_fa19_2_and0 >> 0) & 0x01) | ((s_arrmul24_fa19_2_and1 >> 0) & 0x01);
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s_arrmul24_and20_2 = ((a >> 20) & 0x01) & ((b >> 2) & 0x01);
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s_arrmul24_fa20_2_xor0 = ((s_arrmul24_and20_2 >> 0) & 0x01) ^ ((s_arrmul24_fa21_1_xor1 >> 0) & 0x01);
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s_arrmul24_fa20_2_and0 = ((s_arrmul24_and20_2 >> 0) & 0x01) & ((s_arrmul24_fa21_1_xor1 >> 0) & 0x01);
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s_arrmul24_fa20_2_xor1 = ((s_arrmul24_fa20_2_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa19_2_or0 >> 0) & 0x01);
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s_arrmul24_fa20_2_and1 = ((s_arrmul24_fa20_2_xor0 >> 0) & 0x01) & ((s_arrmul24_fa19_2_or0 >> 0) & 0x01);
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s_arrmul24_fa20_2_or0 = ((s_arrmul24_fa20_2_and0 >> 0) & 0x01) | ((s_arrmul24_fa20_2_and1 >> 0) & 0x01);
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s_arrmul24_and21_2 = ((a >> 21) & 0x01) & ((b >> 2) & 0x01);
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s_arrmul24_fa21_2_xor0 = ((s_arrmul24_and21_2 >> 0) & 0x01) ^ ((s_arrmul24_fa22_1_xor1 >> 0) & 0x01);
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s_arrmul24_fa21_2_and0 = ((s_arrmul24_and21_2 >> 0) & 0x01) & ((s_arrmul24_fa22_1_xor1 >> 0) & 0x01);
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s_arrmul24_fa21_2_xor1 = ((s_arrmul24_fa21_2_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa20_2_or0 >> 0) & 0x01);
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s_arrmul24_fa21_2_and1 = ((s_arrmul24_fa21_2_xor0 >> 0) & 0x01) & ((s_arrmul24_fa20_2_or0 >> 0) & 0x01);
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s_arrmul24_fa21_2_or0 = ((s_arrmul24_fa21_2_and0 >> 0) & 0x01) | ((s_arrmul24_fa21_2_and1 >> 0) & 0x01);
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s_arrmul24_and22_2 = ((a >> 22) & 0x01) & ((b >> 2) & 0x01);
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s_arrmul24_fa22_2_xor0 = ((s_arrmul24_and22_2 >> 0) & 0x01) ^ ((s_arrmul24_fa23_1_xor1 >> 0) & 0x01);
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s_arrmul24_fa22_2_and0 = ((s_arrmul24_and22_2 >> 0) & 0x01) & ((s_arrmul24_fa23_1_xor1 >> 0) & 0x01);
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s_arrmul24_fa22_2_xor1 = ((s_arrmul24_fa22_2_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa21_2_or0 >> 0) & 0x01);
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s_arrmul24_fa22_2_and1 = ((s_arrmul24_fa22_2_xor0 >> 0) & 0x01) & ((s_arrmul24_fa21_2_or0 >> 0) & 0x01);
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s_arrmul24_fa22_2_or0 = ((s_arrmul24_fa22_2_and0 >> 0) & 0x01) | ((s_arrmul24_fa22_2_and1 >> 0) & 0x01);
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s_arrmul24_nand23_2 = ~(((a >> 23) & 0x01) & ((b >> 2) & 0x01)) & 0x01;
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s_arrmul24_fa23_2_xor0 = ((s_arrmul24_nand23_2 >> 0) & 0x01) ^ ((s_arrmul24_fa23_1_or0 >> 0) & 0x01);
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s_arrmul24_fa23_2_and0 = ((s_arrmul24_nand23_2 >> 0) & 0x01) & ((s_arrmul24_fa23_1_or0 >> 0) & 0x01);
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s_arrmul24_fa23_2_xor1 = ((s_arrmul24_fa23_2_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa22_2_or0 >> 0) & 0x01);
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s_arrmul24_fa23_2_and1 = ((s_arrmul24_fa23_2_xor0 >> 0) & 0x01) & ((s_arrmul24_fa22_2_or0 >> 0) & 0x01);
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s_arrmul24_fa23_2_or0 = ((s_arrmul24_fa23_2_and0 >> 0) & 0x01) | ((s_arrmul24_fa23_2_and1 >> 0) & 0x01);
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s_arrmul24_and0_3 = ((a >> 0) & 0x01) & ((b >> 3) & 0x01);
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s_arrmul24_ha0_3_xor0 = ((s_arrmul24_and0_3 >> 0) & 0x01) ^ ((s_arrmul24_fa1_2_xor1 >> 0) & 0x01);
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s_arrmul24_ha0_3_and0 = ((s_arrmul24_and0_3 >> 0) & 0x01) & ((s_arrmul24_fa1_2_xor1 >> 0) & 0x01);
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s_arrmul24_and1_3 = ((a >> 1) & 0x01) & ((b >> 3) & 0x01);
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s_arrmul24_fa1_3_xor0 = ((s_arrmul24_and1_3 >> 0) & 0x01) ^ ((s_arrmul24_fa2_2_xor1 >> 0) & 0x01);
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s_arrmul24_fa1_3_and0 = ((s_arrmul24_and1_3 >> 0) & 0x01) & ((s_arrmul24_fa2_2_xor1 >> 0) & 0x01);
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s_arrmul24_fa1_3_xor1 = ((s_arrmul24_fa1_3_xor0 >> 0) & 0x01) ^ ((s_arrmul24_ha0_3_and0 >> 0) & 0x01);
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s_arrmul24_fa1_3_and1 = ((s_arrmul24_fa1_3_xor0 >> 0) & 0x01) & ((s_arrmul24_ha0_3_and0 >> 0) & 0x01);
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s_arrmul24_fa1_3_or0 = ((s_arrmul24_fa1_3_and0 >> 0) & 0x01) | ((s_arrmul24_fa1_3_and1 >> 0) & 0x01);
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s_arrmul24_and2_3 = ((a >> 2) & 0x01) & ((b >> 3) & 0x01);
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s_arrmul24_fa2_3_xor0 = ((s_arrmul24_and2_3 >> 0) & 0x01) ^ ((s_arrmul24_fa3_2_xor1 >> 0) & 0x01);
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s_arrmul24_fa2_3_and0 = ((s_arrmul24_and2_3 >> 0) & 0x01) & ((s_arrmul24_fa3_2_xor1 >> 0) & 0x01);
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s_arrmul24_fa2_3_xor1 = ((s_arrmul24_fa2_3_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa1_3_or0 >> 0) & 0x01);
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s_arrmul24_fa2_3_and1 = ((s_arrmul24_fa2_3_xor0 >> 0) & 0x01) & ((s_arrmul24_fa1_3_or0 >> 0) & 0x01);
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s_arrmul24_fa2_3_or0 = ((s_arrmul24_fa2_3_and0 >> 0) & 0x01) | ((s_arrmul24_fa2_3_and1 >> 0) & 0x01);
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s_arrmul24_and3_3 = ((a >> 3) & 0x01) & ((b >> 3) & 0x01);
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s_arrmul24_fa3_3_xor0 = ((s_arrmul24_and3_3 >> 0) & 0x01) ^ ((s_arrmul24_fa4_2_xor1 >> 0) & 0x01);
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s_arrmul24_fa3_3_and0 = ((s_arrmul24_and3_3 >> 0) & 0x01) & ((s_arrmul24_fa4_2_xor1 >> 0) & 0x01);
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s_arrmul24_fa3_3_xor1 = ((s_arrmul24_fa3_3_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa2_3_or0 >> 0) & 0x01);
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s_arrmul24_fa3_3_and1 = ((s_arrmul24_fa3_3_xor0 >> 0) & 0x01) & ((s_arrmul24_fa2_3_or0 >> 0) & 0x01);
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s_arrmul24_fa3_3_or0 = ((s_arrmul24_fa3_3_and0 >> 0) & 0x01) | ((s_arrmul24_fa3_3_and1 >> 0) & 0x01);
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s_arrmul24_and4_3 = ((a >> 4) & 0x01) & ((b >> 3) & 0x01);
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s_arrmul24_fa4_3_xor0 = ((s_arrmul24_and4_3 >> 0) & 0x01) ^ ((s_arrmul24_fa5_2_xor1 >> 0) & 0x01);
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s_arrmul24_fa4_3_and0 = ((s_arrmul24_and4_3 >> 0) & 0x01) & ((s_arrmul24_fa5_2_xor1 >> 0) & 0x01);
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s_arrmul24_fa4_3_xor1 = ((s_arrmul24_fa4_3_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa3_3_or0 >> 0) & 0x01);
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s_arrmul24_fa4_3_and1 = ((s_arrmul24_fa4_3_xor0 >> 0) & 0x01) & ((s_arrmul24_fa3_3_or0 >> 0) & 0x01);
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s_arrmul24_fa4_3_or0 = ((s_arrmul24_fa4_3_and0 >> 0) & 0x01) | ((s_arrmul24_fa4_3_and1 >> 0) & 0x01);
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s_arrmul24_and5_3 = ((a >> 5) & 0x01) & ((b >> 3) & 0x01);
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s_arrmul24_fa5_3_xor0 = ((s_arrmul24_and5_3 >> 0) & 0x01) ^ ((s_arrmul24_fa6_2_xor1 >> 0) & 0x01);
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s_arrmul24_fa5_3_and0 = ((s_arrmul24_and5_3 >> 0) & 0x01) & ((s_arrmul24_fa6_2_xor1 >> 0) & 0x01);
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s_arrmul24_fa5_3_xor1 = ((s_arrmul24_fa5_3_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa4_3_or0 >> 0) & 0x01);
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s_arrmul24_fa5_3_and1 = ((s_arrmul24_fa5_3_xor0 >> 0) & 0x01) & ((s_arrmul24_fa4_3_or0 >> 0) & 0x01);
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s_arrmul24_fa5_3_or0 = ((s_arrmul24_fa5_3_and0 >> 0) & 0x01) | ((s_arrmul24_fa5_3_and1 >> 0) & 0x01);
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s_arrmul24_and6_3 = ((a >> 6) & 0x01) & ((b >> 3) & 0x01);
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s_arrmul24_fa6_3_xor0 = ((s_arrmul24_and6_3 >> 0) & 0x01) ^ ((s_arrmul24_fa7_2_xor1 >> 0) & 0x01);
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s_arrmul24_fa6_3_and0 = ((s_arrmul24_and6_3 >> 0) & 0x01) & ((s_arrmul24_fa7_2_xor1 >> 0) & 0x01);
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s_arrmul24_fa6_3_xor1 = ((s_arrmul24_fa6_3_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa5_3_or0 >> 0) & 0x01);
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s_arrmul24_fa6_3_and1 = ((s_arrmul24_fa6_3_xor0 >> 0) & 0x01) & ((s_arrmul24_fa5_3_or0 >> 0) & 0x01);
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s_arrmul24_fa6_3_or0 = ((s_arrmul24_fa6_3_and0 >> 0) & 0x01) | ((s_arrmul24_fa6_3_and1 >> 0) & 0x01);
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s_arrmul24_and7_3 = ((a >> 7) & 0x01) & ((b >> 3) & 0x01);
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s_arrmul24_fa7_3_xor0 = ((s_arrmul24_and7_3 >> 0) & 0x01) ^ ((s_arrmul24_fa8_2_xor1 >> 0) & 0x01);
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s_arrmul24_fa7_3_and0 = ((s_arrmul24_and7_3 >> 0) & 0x01) & ((s_arrmul24_fa8_2_xor1 >> 0) & 0x01);
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s_arrmul24_fa7_3_xor1 = ((s_arrmul24_fa7_3_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa6_3_or0 >> 0) & 0x01);
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s_arrmul24_fa7_3_and1 = ((s_arrmul24_fa7_3_xor0 >> 0) & 0x01) & ((s_arrmul24_fa6_3_or0 >> 0) & 0x01);
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s_arrmul24_fa7_3_or0 = ((s_arrmul24_fa7_3_and0 >> 0) & 0x01) | ((s_arrmul24_fa7_3_and1 >> 0) & 0x01);
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s_arrmul24_and8_3 = ((a >> 8) & 0x01) & ((b >> 3) & 0x01);
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s_arrmul24_fa8_3_xor0 = ((s_arrmul24_and8_3 >> 0) & 0x01) ^ ((s_arrmul24_fa9_2_xor1 >> 0) & 0x01);
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s_arrmul24_fa8_3_and0 = ((s_arrmul24_and8_3 >> 0) & 0x01) & ((s_arrmul24_fa9_2_xor1 >> 0) & 0x01);
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s_arrmul24_fa8_3_xor1 = ((s_arrmul24_fa8_3_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa7_3_or0 >> 0) & 0x01);
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s_arrmul24_fa8_3_and1 = ((s_arrmul24_fa8_3_xor0 >> 0) & 0x01) & ((s_arrmul24_fa7_3_or0 >> 0) & 0x01);
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s_arrmul24_fa8_3_or0 = ((s_arrmul24_fa8_3_and0 >> 0) & 0x01) | ((s_arrmul24_fa8_3_and1 >> 0) & 0x01);
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s_arrmul24_and9_3 = ((a >> 9) & 0x01) & ((b >> 3) & 0x01);
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s_arrmul24_fa9_3_xor0 = ((s_arrmul24_and9_3 >> 0) & 0x01) ^ ((s_arrmul24_fa10_2_xor1 >> 0) & 0x01);
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s_arrmul24_fa9_3_and0 = ((s_arrmul24_and9_3 >> 0) & 0x01) & ((s_arrmul24_fa10_2_xor1 >> 0) & 0x01);
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s_arrmul24_fa9_3_xor1 = ((s_arrmul24_fa9_3_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa8_3_or0 >> 0) & 0x01);
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s_arrmul24_fa9_3_and1 = ((s_arrmul24_fa9_3_xor0 >> 0) & 0x01) & ((s_arrmul24_fa8_3_or0 >> 0) & 0x01);
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s_arrmul24_fa9_3_or0 = ((s_arrmul24_fa9_3_and0 >> 0) & 0x01) | ((s_arrmul24_fa9_3_and1 >> 0) & 0x01);
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s_arrmul24_and10_3 = ((a >> 10) & 0x01) & ((b >> 3) & 0x01);
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s_arrmul24_fa10_3_xor0 = ((s_arrmul24_and10_3 >> 0) & 0x01) ^ ((s_arrmul24_fa11_2_xor1 >> 0) & 0x01);
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s_arrmul24_fa10_3_and0 = ((s_arrmul24_and10_3 >> 0) & 0x01) & ((s_arrmul24_fa11_2_xor1 >> 0) & 0x01);
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s_arrmul24_fa10_3_xor1 = ((s_arrmul24_fa10_3_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa9_3_or0 >> 0) & 0x01);
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s_arrmul24_fa10_3_and1 = ((s_arrmul24_fa10_3_xor0 >> 0) & 0x01) & ((s_arrmul24_fa9_3_or0 >> 0) & 0x01);
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s_arrmul24_fa10_3_or0 = ((s_arrmul24_fa10_3_and0 >> 0) & 0x01) | ((s_arrmul24_fa10_3_and1 >> 0) & 0x01);
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s_arrmul24_and11_3 = ((a >> 11) & 0x01) & ((b >> 3) & 0x01);
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s_arrmul24_fa11_3_xor0 = ((s_arrmul24_and11_3 >> 0) & 0x01) ^ ((s_arrmul24_fa12_2_xor1 >> 0) & 0x01);
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s_arrmul24_fa11_3_and0 = ((s_arrmul24_and11_3 >> 0) & 0x01) & ((s_arrmul24_fa12_2_xor1 >> 0) & 0x01);
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s_arrmul24_fa11_3_xor1 = ((s_arrmul24_fa11_3_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa10_3_or0 >> 0) & 0x01);
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s_arrmul24_fa11_3_and1 = ((s_arrmul24_fa11_3_xor0 >> 0) & 0x01) & ((s_arrmul24_fa10_3_or0 >> 0) & 0x01);
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s_arrmul24_fa11_3_or0 = ((s_arrmul24_fa11_3_and0 >> 0) & 0x01) | ((s_arrmul24_fa11_3_and1 >> 0) & 0x01);
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s_arrmul24_and12_3 = ((a >> 12) & 0x01) & ((b >> 3) & 0x01);
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s_arrmul24_fa12_3_xor0 = ((s_arrmul24_and12_3 >> 0) & 0x01) ^ ((s_arrmul24_fa13_2_xor1 >> 0) & 0x01);
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s_arrmul24_fa12_3_and0 = ((s_arrmul24_and12_3 >> 0) & 0x01) & ((s_arrmul24_fa13_2_xor1 >> 0) & 0x01);
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s_arrmul24_fa12_3_xor1 = ((s_arrmul24_fa12_3_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa11_3_or0 >> 0) & 0x01);
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s_arrmul24_fa12_3_and1 = ((s_arrmul24_fa12_3_xor0 >> 0) & 0x01) & ((s_arrmul24_fa11_3_or0 >> 0) & 0x01);
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s_arrmul24_fa12_3_or0 = ((s_arrmul24_fa12_3_and0 >> 0) & 0x01) | ((s_arrmul24_fa12_3_and1 >> 0) & 0x01);
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s_arrmul24_and13_3 = ((a >> 13) & 0x01) & ((b >> 3) & 0x01);
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s_arrmul24_fa13_3_xor0 = ((s_arrmul24_and13_3 >> 0) & 0x01) ^ ((s_arrmul24_fa14_2_xor1 >> 0) & 0x01);
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s_arrmul24_fa13_3_and0 = ((s_arrmul24_and13_3 >> 0) & 0x01) & ((s_arrmul24_fa14_2_xor1 >> 0) & 0x01);
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s_arrmul24_fa13_3_xor1 = ((s_arrmul24_fa13_3_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa12_3_or0 >> 0) & 0x01);
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s_arrmul24_fa13_3_and1 = ((s_arrmul24_fa13_3_xor0 >> 0) & 0x01) & ((s_arrmul24_fa12_3_or0 >> 0) & 0x01);
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s_arrmul24_fa13_3_or0 = ((s_arrmul24_fa13_3_and0 >> 0) & 0x01) | ((s_arrmul24_fa13_3_and1 >> 0) & 0x01);
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s_arrmul24_and14_3 = ((a >> 14) & 0x01) & ((b >> 3) & 0x01);
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s_arrmul24_fa14_3_xor0 = ((s_arrmul24_and14_3 >> 0) & 0x01) ^ ((s_arrmul24_fa15_2_xor1 >> 0) & 0x01);
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s_arrmul24_fa14_3_and0 = ((s_arrmul24_and14_3 >> 0) & 0x01) & ((s_arrmul24_fa15_2_xor1 >> 0) & 0x01);
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s_arrmul24_fa14_3_xor1 = ((s_arrmul24_fa14_3_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa13_3_or0 >> 0) & 0x01);
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s_arrmul24_fa14_3_and1 = ((s_arrmul24_fa14_3_xor0 >> 0) & 0x01) & ((s_arrmul24_fa13_3_or0 >> 0) & 0x01);
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s_arrmul24_fa14_3_or0 = ((s_arrmul24_fa14_3_and0 >> 0) & 0x01) | ((s_arrmul24_fa14_3_and1 >> 0) & 0x01);
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s_arrmul24_and15_3 = ((a >> 15) & 0x01) & ((b >> 3) & 0x01);
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s_arrmul24_fa15_3_xor0 = ((s_arrmul24_and15_3 >> 0) & 0x01) ^ ((s_arrmul24_fa16_2_xor1 >> 0) & 0x01);
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s_arrmul24_fa15_3_and0 = ((s_arrmul24_and15_3 >> 0) & 0x01) & ((s_arrmul24_fa16_2_xor1 >> 0) & 0x01);
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s_arrmul24_fa15_3_xor1 = ((s_arrmul24_fa15_3_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa14_3_or0 >> 0) & 0x01);
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s_arrmul24_fa15_3_and1 = ((s_arrmul24_fa15_3_xor0 >> 0) & 0x01) & ((s_arrmul24_fa14_3_or0 >> 0) & 0x01);
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s_arrmul24_fa15_3_or0 = ((s_arrmul24_fa15_3_and0 >> 0) & 0x01) | ((s_arrmul24_fa15_3_and1 >> 0) & 0x01);
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s_arrmul24_and16_3 = ((a >> 16) & 0x01) & ((b >> 3) & 0x01);
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s_arrmul24_fa16_3_xor0 = ((s_arrmul24_and16_3 >> 0) & 0x01) ^ ((s_arrmul24_fa17_2_xor1 >> 0) & 0x01);
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s_arrmul24_fa16_3_and0 = ((s_arrmul24_and16_3 >> 0) & 0x01) & ((s_arrmul24_fa17_2_xor1 >> 0) & 0x01);
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s_arrmul24_fa16_3_xor1 = ((s_arrmul24_fa16_3_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa15_3_or0 >> 0) & 0x01);
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s_arrmul24_fa16_3_and1 = ((s_arrmul24_fa16_3_xor0 >> 0) & 0x01) & ((s_arrmul24_fa15_3_or0 >> 0) & 0x01);
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s_arrmul24_fa16_3_or0 = ((s_arrmul24_fa16_3_and0 >> 0) & 0x01) | ((s_arrmul24_fa16_3_and1 >> 0) & 0x01);
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s_arrmul24_and17_3 = ((a >> 17) & 0x01) & ((b >> 3) & 0x01);
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s_arrmul24_fa17_3_xor0 = ((s_arrmul24_and17_3 >> 0) & 0x01) ^ ((s_arrmul24_fa18_2_xor1 >> 0) & 0x01);
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s_arrmul24_fa17_3_and0 = ((s_arrmul24_and17_3 >> 0) & 0x01) & ((s_arrmul24_fa18_2_xor1 >> 0) & 0x01);
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s_arrmul24_fa17_3_xor1 = ((s_arrmul24_fa17_3_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa16_3_or0 >> 0) & 0x01);
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s_arrmul24_fa17_3_and1 = ((s_arrmul24_fa17_3_xor0 >> 0) & 0x01) & ((s_arrmul24_fa16_3_or0 >> 0) & 0x01);
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s_arrmul24_fa17_3_or0 = ((s_arrmul24_fa17_3_and0 >> 0) & 0x01) | ((s_arrmul24_fa17_3_and1 >> 0) & 0x01);
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s_arrmul24_and18_3 = ((a >> 18) & 0x01) & ((b >> 3) & 0x01);
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s_arrmul24_fa18_3_xor0 = ((s_arrmul24_and18_3 >> 0) & 0x01) ^ ((s_arrmul24_fa19_2_xor1 >> 0) & 0x01);
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s_arrmul24_fa18_3_and0 = ((s_arrmul24_and18_3 >> 0) & 0x01) & ((s_arrmul24_fa19_2_xor1 >> 0) & 0x01);
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s_arrmul24_fa18_3_xor1 = ((s_arrmul24_fa18_3_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa17_3_or0 >> 0) & 0x01);
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s_arrmul24_fa18_3_and1 = ((s_arrmul24_fa18_3_xor0 >> 0) & 0x01) & ((s_arrmul24_fa17_3_or0 >> 0) & 0x01);
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s_arrmul24_fa18_3_or0 = ((s_arrmul24_fa18_3_and0 >> 0) & 0x01) | ((s_arrmul24_fa18_3_and1 >> 0) & 0x01);
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s_arrmul24_and19_3 = ((a >> 19) & 0x01) & ((b >> 3) & 0x01);
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s_arrmul24_fa19_3_xor0 = ((s_arrmul24_and19_3 >> 0) & 0x01) ^ ((s_arrmul24_fa20_2_xor1 >> 0) & 0x01);
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s_arrmul24_fa19_3_and0 = ((s_arrmul24_and19_3 >> 0) & 0x01) & ((s_arrmul24_fa20_2_xor1 >> 0) & 0x01);
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s_arrmul24_fa19_3_xor1 = ((s_arrmul24_fa19_3_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa18_3_or0 >> 0) & 0x01);
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s_arrmul24_fa19_3_and1 = ((s_arrmul24_fa19_3_xor0 >> 0) & 0x01) & ((s_arrmul24_fa18_3_or0 >> 0) & 0x01);
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s_arrmul24_fa19_3_or0 = ((s_arrmul24_fa19_3_and0 >> 0) & 0x01) | ((s_arrmul24_fa19_3_and1 >> 0) & 0x01);
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s_arrmul24_and20_3 = ((a >> 20) & 0x01) & ((b >> 3) & 0x01);
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s_arrmul24_fa20_3_xor0 = ((s_arrmul24_and20_3 >> 0) & 0x01) ^ ((s_arrmul24_fa21_2_xor1 >> 0) & 0x01);
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s_arrmul24_fa20_3_and0 = ((s_arrmul24_and20_3 >> 0) & 0x01) & ((s_arrmul24_fa21_2_xor1 >> 0) & 0x01);
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s_arrmul24_fa20_3_xor1 = ((s_arrmul24_fa20_3_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa19_3_or0 >> 0) & 0x01);
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s_arrmul24_fa20_3_and1 = ((s_arrmul24_fa20_3_xor0 >> 0) & 0x01) & ((s_arrmul24_fa19_3_or0 >> 0) & 0x01);
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s_arrmul24_fa20_3_or0 = ((s_arrmul24_fa20_3_and0 >> 0) & 0x01) | ((s_arrmul24_fa20_3_and1 >> 0) & 0x01);
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s_arrmul24_and21_3 = ((a >> 21) & 0x01) & ((b >> 3) & 0x01);
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s_arrmul24_fa21_3_xor0 = ((s_arrmul24_and21_3 >> 0) & 0x01) ^ ((s_arrmul24_fa22_2_xor1 >> 0) & 0x01);
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s_arrmul24_fa21_3_and0 = ((s_arrmul24_and21_3 >> 0) & 0x01) & ((s_arrmul24_fa22_2_xor1 >> 0) & 0x01);
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s_arrmul24_fa21_3_xor1 = ((s_arrmul24_fa21_3_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa20_3_or0 >> 0) & 0x01);
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s_arrmul24_fa21_3_and1 = ((s_arrmul24_fa21_3_xor0 >> 0) & 0x01) & ((s_arrmul24_fa20_3_or0 >> 0) & 0x01);
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s_arrmul24_fa21_3_or0 = ((s_arrmul24_fa21_3_and0 >> 0) & 0x01) | ((s_arrmul24_fa21_3_and1 >> 0) & 0x01);
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s_arrmul24_and22_3 = ((a >> 22) & 0x01) & ((b >> 3) & 0x01);
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s_arrmul24_fa22_3_xor0 = ((s_arrmul24_and22_3 >> 0) & 0x01) ^ ((s_arrmul24_fa23_2_xor1 >> 0) & 0x01);
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s_arrmul24_fa22_3_and0 = ((s_arrmul24_and22_3 >> 0) & 0x01) & ((s_arrmul24_fa23_2_xor1 >> 0) & 0x01);
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s_arrmul24_fa22_3_xor1 = ((s_arrmul24_fa22_3_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa21_3_or0 >> 0) & 0x01);
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s_arrmul24_fa22_3_and1 = ((s_arrmul24_fa22_3_xor0 >> 0) & 0x01) & ((s_arrmul24_fa21_3_or0 >> 0) & 0x01);
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s_arrmul24_fa22_3_or0 = ((s_arrmul24_fa22_3_and0 >> 0) & 0x01) | ((s_arrmul24_fa22_3_and1 >> 0) & 0x01);
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s_arrmul24_nand23_3 = ~(((a >> 23) & 0x01) & ((b >> 3) & 0x01)) & 0x01;
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s_arrmul24_fa23_3_xor0 = ((s_arrmul24_nand23_3 >> 0) & 0x01) ^ ((s_arrmul24_fa23_2_or0 >> 0) & 0x01);
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s_arrmul24_fa23_3_and0 = ((s_arrmul24_nand23_3 >> 0) & 0x01) & ((s_arrmul24_fa23_2_or0 >> 0) & 0x01);
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s_arrmul24_fa23_3_xor1 = ((s_arrmul24_fa23_3_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa22_3_or0 >> 0) & 0x01);
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s_arrmul24_fa23_3_and1 = ((s_arrmul24_fa23_3_xor0 >> 0) & 0x01) & ((s_arrmul24_fa22_3_or0 >> 0) & 0x01);
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s_arrmul24_fa23_3_or0 = ((s_arrmul24_fa23_3_and0 >> 0) & 0x01) | ((s_arrmul24_fa23_3_and1 >> 0) & 0x01);
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s_arrmul24_and0_4 = ((a >> 0) & 0x01) & ((b >> 4) & 0x01);
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s_arrmul24_ha0_4_xor0 = ((s_arrmul24_and0_4 >> 0) & 0x01) ^ ((s_arrmul24_fa1_3_xor1 >> 0) & 0x01);
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s_arrmul24_ha0_4_and0 = ((s_arrmul24_and0_4 >> 0) & 0x01) & ((s_arrmul24_fa1_3_xor1 >> 0) & 0x01);
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s_arrmul24_and1_4 = ((a >> 1) & 0x01) & ((b >> 4) & 0x01);
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s_arrmul24_fa1_4_xor0 = ((s_arrmul24_and1_4 >> 0) & 0x01) ^ ((s_arrmul24_fa2_3_xor1 >> 0) & 0x01);
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s_arrmul24_fa1_4_and0 = ((s_arrmul24_and1_4 >> 0) & 0x01) & ((s_arrmul24_fa2_3_xor1 >> 0) & 0x01);
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s_arrmul24_fa1_4_xor1 = ((s_arrmul24_fa1_4_xor0 >> 0) & 0x01) ^ ((s_arrmul24_ha0_4_and0 >> 0) & 0x01);
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s_arrmul24_fa1_4_and1 = ((s_arrmul24_fa1_4_xor0 >> 0) & 0x01) & ((s_arrmul24_ha0_4_and0 >> 0) & 0x01);
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s_arrmul24_fa1_4_or0 = ((s_arrmul24_fa1_4_and0 >> 0) & 0x01) | ((s_arrmul24_fa1_4_and1 >> 0) & 0x01);
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s_arrmul24_and2_4 = ((a >> 2) & 0x01) & ((b >> 4) & 0x01);
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s_arrmul24_fa2_4_xor0 = ((s_arrmul24_and2_4 >> 0) & 0x01) ^ ((s_arrmul24_fa3_3_xor1 >> 0) & 0x01);
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s_arrmul24_fa2_4_and0 = ((s_arrmul24_and2_4 >> 0) & 0x01) & ((s_arrmul24_fa3_3_xor1 >> 0) & 0x01);
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s_arrmul24_fa2_4_xor1 = ((s_arrmul24_fa2_4_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa1_4_or0 >> 0) & 0x01);
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s_arrmul24_fa2_4_and1 = ((s_arrmul24_fa2_4_xor0 >> 0) & 0x01) & ((s_arrmul24_fa1_4_or0 >> 0) & 0x01);
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s_arrmul24_fa2_4_or0 = ((s_arrmul24_fa2_4_and0 >> 0) & 0x01) | ((s_arrmul24_fa2_4_and1 >> 0) & 0x01);
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s_arrmul24_and3_4 = ((a >> 3) & 0x01) & ((b >> 4) & 0x01);
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s_arrmul24_fa3_4_xor0 = ((s_arrmul24_and3_4 >> 0) & 0x01) ^ ((s_arrmul24_fa4_3_xor1 >> 0) & 0x01);
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s_arrmul24_fa3_4_and0 = ((s_arrmul24_and3_4 >> 0) & 0x01) & ((s_arrmul24_fa4_3_xor1 >> 0) & 0x01);
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s_arrmul24_fa3_4_xor1 = ((s_arrmul24_fa3_4_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa2_4_or0 >> 0) & 0x01);
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s_arrmul24_fa3_4_and1 = ((s_arrmul24_fa3_4_xor0 >> 0) & 0x01) & ((s_arrmul24_fa2_4_or0 >> 0) & 0x01);
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s_arrmul24_fa3_4_or0 = ((s_arrmul24_fa3_4_and0 >> 0) & 0x01) | ((s_arrmul24_fa3_4_and1 >> 0) & 0x01);
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s_arrmul24_and4_4 = ((a >> 4) & 0x01) & ((b >> 4) & 0x01);
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s_arrmul24_fa4_4_xor0 = ((s_arrmul24_and4_4 >> 0) & 0x01) ^ ((s_arrmul24_fa5_3_xor1 >> 0) & 0x01);
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s_arrmul24_fa4_4_and0 = ((s_arrmul24_and4_4 >> 0) & 0x01) & ((s_arrmul24_fa5_3_xor1 >> 0) & 0x01);
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s_arrmul24_fa4_4_xor1 = ((s_arrmul24_fa4_4_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa3_4_or0 >> 0) & 0x01);
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s_arrmul24_fa4_4_and1 = ((s_arrmul24_fa4_4_xor0 >> 0) & 0x01) & ((s_arrmul24_fa3_4_or0 >> 0) & 0x01);
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s_arrmul24_fa4_4_or0 = ((s_arrmul24_fa4_4_and0 >> 0) & 0x01) | ((s_arrmul24_fa4_4_and1 >> 0) & 0x01);
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s_arrmul24_and5_4 = ((a >> 5) & 0x01) & ((b >> 4) & 0x01);
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s_arrmul24_fa5_4_xor0 = ((s_arrmul24_and5_4 >> 0) & 0x01) ^ ((s_arrmul24_fa6_3_xor1 >> 0) & 0x01);
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s_arrmul24_fa5_4_and0 = ((s_arrmul24_and5_4 >> 0) & 0x01) & ((s_arrmul24_fa6_3_xor1 >> 0) & 0x01);
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s_arrmul24_fa5_4_xor1 = ((s_arrmul24_fa5_4_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa4_4_or0 >> 0) & 0x01);
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s_arrmul24_fa5_4_and1 = ((s_arrmul24_fa5_4_xor0 >> 0) & 0x01) & ((s_arrmul24_fa4_4_or0 >> 0) & 0x01);
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s_arrmul24_fa5_4_or0 = ((s_arrmul24_fa5_4_and0 >> 0) & 0x01) | ((s_arrmul24_fa5_4_and1 >> 0) & 0x01);
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s_arrmul24_and6_4 = ((a >> 6) & 0x01) & ((b >> 4) & 0x01);
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s_arrmul24_fa6_4_xor0 = ((s_arrmul24_and6_4 >> 0) & 0x01) ^ ((s_arrmul24_fa7_3_xor1 >> 0) & 0x01);
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s_arrmul24_fa6_4_and0 = ((s_arrmul24_and6_4 >> 0) & 0x01) & ((s_arrmul24_fa7_3_xor1 >> 0) & 0x01);
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s_arrmul24_fa6_4_xor1 = ((s_arrmul24_fa6_4_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa5_4_or0 >> 0) & 0x01);
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s_arrmul24_fa6_4_and1 = ((s_arrmul24_fa6_4_xor0 >> 0) & 0x01) & ((s_arrmul24_fa5_4_or0 >> 0) & 0x01);
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s_arrmul24_fa6_4_or0 = ((s_arrmul24_fa6_4_and0 >> 0) & 0x01) | ((s_arrmul24_fa6_4_and1 >> 0) & 0x01);
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s_arrmul24_and7_4 = ((a >> 7) & 0x01) & ((b >> 4) & 0x01);
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s_arrmul24_fa7_4_xor0 = ((s_arrmul24_and7_4 >> 0) & 0x01) ^ ((s_arrmul24_fa8_3_xor1 >> 0) & 0x01);
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s_arrmul24_fa7_4_and0 = ((s_arrmul24_and7_4 >> 0) & 0x01) & ((s_arrmul24_fa8_3_xor1 >> 0) & 0x01);
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s_arrmul24_fa7_4_xor1 = ((s_arrmul24_fa7_4_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa6_4_or0 >> 0) & 0x01);
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s_arrmul24_fa7_4_and1 = ((s_arrmul24_fa7_4_xor0 >> 0) & 0x01) & ((s_arrmul24_fa6_4_or0 >> 0) & 0x01);
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s_arrmul24_fa7_4_or0 = ((s_arrmul24_fa7_4_and0 >> 0) & 0x01) | ((s_arrmul24_fa7_4_and1 >> 0) & 0x01);
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s_arrmul24_and8_4 = ((a >> 8) & 0x01) & ((b >> 4) & 0x01);
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s_arrmul24_fa8_4_xor0 = ((s_arrmul24_and8_4 >> 0) & 0x01) ^ ((s_arrmul24_fa9_3_xor1 >> 0) & 0x01);
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s_arrmul24_fa8_4_and0 = ((s_arrmul24_and8_4 >> 0) & 0x01) & ((s_arrmul24_fa9_3_xor1 >> 0) & 0x01);
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s_arrmul24_fa8_4_xor1 = ((s_arrmul24_fa8_4_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa7_4_or0 >> 0) & 0x01);
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s_arrmul24_fa8_4_and1 = ((s_arrmul24_fa8_4_xor0 >> 0) & 0x01) & ((s_arrmul24_fa7_4_or0 >> 0) & 0x01);
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s_arrmul24_fa8_4_or0 = ((s_arrmul24_fa8_4_and0 >> 0) & 0x01) | ((s_arrmul24_fa8_4_and1 >> 0) & 0x01);
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s_arrmul24_and9_4 = ((a >> 9) & 0x01) & ((b >> 4) & 0x01);
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s_arrmul24_fa9_4_xor0 = ((s_arrmul24_and9_4 >> 0) & 0x01) ^ ((s_arrmul24_fa10_3_xor1 >> 0) & 0x01);
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s_arrmul24_fa9_4_and0 = ((s_arrmul24_and9_4 >> 0) & 0x01) & ((s_arrmul24_fa10_3_xor1 >> 0) & 0x01);
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s_arrmul24_fa9_4_xor1 = ((s_arrmul24_fa9_4_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa8_4_or0 >> 0) & 0x01);
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s_arrmul24_fa9_4_and1 = ((s_arrmul24_fa9_4_xor0 >> 0) & 0x01) & ((s_arrmul24_fa8_4_or0 >> 0) & 0x01);
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s_arrmul24_fa9_4_or0 = ((s_arrmul24_fa9_4_and0 >> 0) & 0x01) | ((s_arrmul24_fa9_4_and1 >> 0) & 0x01);
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s_arrmul24_and10_4 = ((a >> 10) & 0x01) & ((b >> 4) & 0x01);
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s_arrmul24_fa10_4_xor0 = ((s_arrmul24_and10_4 >> 0) & 0x01) ^ ((s_arrmul24_fa11_3_xor1 >> 0) & 0x01);
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s_arrmul24_fa10_4_and0 = ((s_arrmul24_and10_4 >> 0) & 0x01) & ((s_arrmul24_fa11_3_xor1 >> 0) & 0x01);
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s_arrmul24_fa10_4_xor1 = ((s_arrmul24_fa10_4_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa9_4_or0 >> 0) & 0x01);
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s_arrmul24_fa10_4_and1 = ((s_arrmul24_fa10_4_xor0 >> 0) & 0x01) & ((s_arrmul24_fa9_4_or0 >> 0) & 0x01);
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s_arrmul24_fa10_4_or0 = ((s_arrmul24_fa10_4_and0 >> 0) & 0x01) | ((s_arrmul24_fa10_4_and1 >> 0) & 0x01);
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s_arrmul24_and11_4 = ((a >> 11) & 0x01) & ((b >> 4) & 0x01);
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s_arrmul24_fa11_4_xor0 = ((s_arrmul24_and11_4 >> 0) & 0x01) ^ ((s_arrmul24_fa12_3_xor1 >> 0) & 0x01);
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s_arrmul24_fa11_4_and0 = ((s_arrmul24_and11_4 >> 0) & 0x01) & ((s_arrmul24_fa12_3_xor1 >> 0) & 0x01);
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s_arrmul24_fa11_4_xor1 = ((s_arrmul24_fa11_4_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa10_4_or0 >> 0) & 0x01);
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s_arrmul24_fa11_4_and1 = ((s_arrmul24_fa11_4_xor0 >> 0) & 0x01) & ((s_arrmul24_fa10_4_or0 >> 0) & 0x01);
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s_arrmul24_fa11_4_or0 = ((s_arrmul24_fa11_4_and0 >> 0) & 0x01) | ((s_arrmul24_fa11_4_and1 >> 0) & 0x01);
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s_arrmul24_and12_4 = ((a >> 12) & 0x01) & ((b >> 4) & 0x01);
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s_arrmul24_fa12_4_xor0 = ((s_arrmul24_and12_4 >> 0) & 0x01) ^ ((s_arrmul24_fa13_3_xor1 >> 0) & 0x01);
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s_arrmul24_fa12_4_and0 = ((s_arrmul24_and12_4 >> 0) & 0x01) & ((s_arrmul24_fa13_3_xor1 >> 0) & 0x01);
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s_arrmul24_fa12_4_xor1 = ((s_arrmul24_fa12_4_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa11_4_or0 >> 0) & 0x01);
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s_arrmul24_fa12_4_and1 = ((s_arrmul24_fa12_4_xor0 >> 0) & 0x01) & ((s_arrmul24_fa11_4_or0 >> 0) & 0x01);
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s_arrmul24_fa12_4_or0 = ((s_arrmul24_fa12_4_and0 >> 0) & 0x01) | ((s_arrmul24_fa12_4_and1 >> 0) & 0x01);
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s_arrmul24_and13_4 = ((a >> 13) & 0x01) & ((b >> 4) & 0x01);
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s_arrmul24_fa13_4_xor0 = ((s_arrmul24_and13_4 >> 0) & 0x01) ^ ((s_arrmul24_fa14_3_xor1 >> 0) & 0x01);
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s_arrmul24_fa13_4_and0 = ((s_arrmul24_and13_4 >> 0) & 0x01) & ((s_arrmul24_fa14_3_xor1 >> 0) & 0x01);
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s_arrmul24_fa13_4_xor1 = ((s_arrmul24_fa13_4_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa12_4_or0 >> 0) & 0x01);
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s_arrmul24_fa13_4_and1 = ((s_arrmul24_fa13_4_xor0 >> 0) & 0x01) & ((s_arrmul24_fa12_4_or0 >> 0) & 0x01);
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s_arrmul24_fa13_4_or0 = ((s_arrmul24_fa13_4_and0 >> 0) & 0x01) | ((s_arrmul24_fa13_4_and1 >> 0) & 0x01);
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s_arrmul24_and14_4 = ((a >> 14) & 0x01) & ((b >> 4) & 0x01);
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s_arrmul24_fa14_4_xor0 = ((s_arrmul24_and14_4 >> 0) & 0x01) ^ ((s_arrmul24_fa15_3_xor1 >> 0) & 0x01);
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s_arrmul24_fa14_4_and0 = ((s_arrmul24_and14_4 >> 0) & 0x01) & ((s_arrmul24_fa15_3_xor1 >> 0) & 0x01);
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s_arrmul24_fa14_4_xor1 = ((s_arrmul24_fa14_4_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa13_4_or0 >> 0) & 0x01);
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s_arrmul24_fa14_4_and1 = ((s_arrmul24_fa14_4_xor0 >> 0) & 0x01) & ((s_arrmul24_fa13_4_or0 >> 0) & 0x01);
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s_arrmul24_fa14_4_or0 = ((s_arrmul24_fa14_4_and0 >> 0) & 0x01) | ((s_arrmul24_fa14_4_and1 >> 0) & 0x01);
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s_arrmul24_and15_4 = ((a >> 15) & 0x01) & ((b >> 4) & 0x01);
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s_arrmul24_fa15_4_xor0 = ((s_arrmul24_and15_4 >> 0) & 0x01) ^ ((s_arrmul24_fa16_3_xor1 >> 0) & 0x01);
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s_arrmul24_fa15_4_and0 = ((s_arrmul24_and15_4 >> 0) & 0x01) & ((s_arrmul24_fa16_3_xor1 >> 0) & 0x01);
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s_arrmul24_fa15_4_xor1 = ((s_arrmul24_fa15_4_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa14_4_or0 >> 0) & 0x01);
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s_arrmul24_fa15_4_and1 = ((s_arrmul24_fa15_4_xor0 >> 0) & 0x01) & ((s_arrmul24_fa14_4_or0 >> 0) & 0x01);
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s_arrmul24_fa15_4_or0 = ((s_arrmul24_fa15_4_and0 >> 0) & 0x01) | ((s_arrmul24_fa15_4_and1 >> 0) & 0x01);
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s_arrmul24_and16_4 = ((a >> 16) & 0x01) & ((b >> 4) & 0x01);
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s_arrmul24_fa16_4_xor0 = ((s_arrmul24_and16_4 >> 0) & 0x01) ^ ((s_arrmul24_fa17_3_xor1 >> 0) & 0x01);
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s_arrmul24_fa16_4_and0 = ((s_arrmul24_and16_4 >> 0) & 0x01) & ((s_arrmul24_fa17_3_xor1 >> 0) & 0x01);
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s_arrmul24_fa16_4_xor1 = ((s_arrmul24_fa16_4_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa15_4_or0 >> 0) & 0x01);
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s_arrmul24_fa16_4_and1 = ((s_arrmul24_fa16_4_xor0 >> 0) & 0x01) & ((s_arrmul24_fa15_4_or0 >> 0) & 0x01);
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s_arrmul24_fa16_4_or0 = ((s_arrmul24_fa16_4_and0 >> 0) & 0x01) | ((s_arrmul24_fa16_4_and1 >> 0) & 0x01);
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s_arrmul24_and17_4 = ((a >> 17) & 0x01) & ((b >> 4) & 0x01);
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s_arrmul24_fa17_4_xor0 = ((s_arrmul24_and17_4 >> 0) & 0x01) ^ ((s_arrmul24_fa18_3_xor1 >> 0) & 0x01);
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s_arrmul24_fa17_4_and0 = ((s_arrmul24_and17_4 >> 0) & 0x01) & ((s_arrmul24_fa18_3_xor1 >> 0) & 0x01);
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s_arrmul24_fa17_4_xor1 = ((s_arrmul24_fa17_4_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa16_4_or0 >> 0) & 0x01);
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s_arrmul24_fa17_4_and1 = ((s_arrmul24_fa17_4_xor0 >> 0) & 0x01) & ((s_arrmul24_fa16_4_or0 >> 0) & 0x01);
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s_arrmul24_fa17_4_or0 = ((s_arrmul24_fa17_4_and0 >> 0) & 0x01) | ((s_arrmul24_fa17_4_and1 >> 0) & 0x01);
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s_arrmul24_and18_4 = ((a >> 18) & 0x01) & ((b >> 4) & 0x01);
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s_arrmul24_fa18_4_xor0 = ((s_arrmul24_and18_4 >> 0) & 0x01) ^ ((s_arrmul24_fa19_3_xor1 >> 0) & 0x01);
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s_arrmul24_fa18_4_and0 = ((s_arrmul24_and18_4 >> 0) & 0x01) & ((s_arrmul24_fa19_3_xor1 >> 0) & 0x01);
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s_arrmul24_fa18_4_xor1 = ((s_arrmul24_fa18_4_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa17_4_or0 >> 0) & 0x01);
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s_arrmul24_fa18_4_and1 = ((s_arrmul24_fa18_4_xor0 >> 0) & 0x01) & ((s_arrmul24_fa17_4_or0 >> 0) & 0x01);
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s_arrmul24_fa18_4_or0 = ((s_arrmul24_fa18_4_and0 >> 0) & 0x01) | ((s_arrmul24_fa18_4_and1 >> 0) & 0x01);
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s_arrmul24_and19_4 = ((a >> 19) & 0x01) & ((b >> 4) & 0x01);
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s_arrmul24_fa19_4_xor0 = ((s_arrmul24_and19_4 >> 0) & 0x01) ^ ((s_arrmul24_fa20_3_xor1 >> 0) & 0x01);
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s_arrmul24_fa19_4_and0 = ((s_arrmul24_and19_4 >> 0) & 0x01) & ((s_arrmul24_fa20_3_xor1 >> 0) & 0x01);
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s_arrmul24_fa19_4_xor1 = ((s_arrmul24_fa19_4_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa18_4_or0 >> 0) & 0x01);
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s_arrmul24_fa19_4_and1 = ((s_arrmul24_fa19_4_xor0 >> 0) & 0x01) & ((s_arrmul24_fa18_4_or0 >> 0) & 0x01);
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s_arrmul24_fa19_4_or0 = ((s_arrmul24_fa19_4_and0 >> 0) & 0x01) | ((s_arrmul24_fa19_4_and1 >> 0) & 0x01);
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s_arrmul24_and20_4 = ((a >> 20) & 0x01) & ((b >> 4) & 0x01);
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s_arrmul24_fa20_4_xor0 = ((s_arrmul24_and20_4 >> 0) & 0x01) ^ ((s_arrmul24_fa21_3_xor1 >> 0) & 0x01);
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s_arrmul24_fa20_4_and0 = ((s_arrmul24_and20_4 >> 0) & 0x01) & ((s_arrmul24_fa21_3_xor1 >> 0) & 0x01);
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s_arrmul24_fa20_4_xor1 = ((s_arrmul24_fa20_4_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa19_4_or0 >> 0) & 0x01);
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s_arrmul24_fa20_4_and1 = ((s_arrmul24_fa20_4_xor0 >> 0) & 0x01) & ((s_arrmul24_fa19_4_or0 >> 0) & 0x01);
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s_arrmul24_fa20_4_or0 = ((s_arrmul24_fa20_4_and0 >> 0) & 0x01) | ((s_arrmul24_fa20_4_and1 >> 0) & 0x01);
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s_arrmul24_and21_4 = ((a >> 21) & 0x01) & ((b >> 4) & 0x01);
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s_arrmul24_fa21_4_xor0 = ((s_arrmul24_and21_4 >> 0) & 0x01) ^ ((s_arrmul24_fa22_3_xor1 >> 0) & 0x01);
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s_arrmul24_fa21_4_and0 = ((s_arrmul24_and21_4 >> 0) & 0x01) & ((s_arrmul24_fa22_3_xor1 >> 0) & 0x01);
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s_arrmul24_fa21_4_xor1 = ((s_arrmul24_fa21_4_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa20_4_or0 >> 0) & 0x01);
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s_arrmul24_fa21_4_and1 = ((s_arrmul24_fa21_4_xor0 >> 0) & 0x01) & ((s_arrmul24_fa20_4_or0 >> 0) & 0x01);
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s_arrmul24_fa21_4_or0 = ((s_arrmul24_fa21_4_and0 >> 0) & 0x01) | ((s_arrmul24_fa21_4_and1 >> 0) & 0x01);
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s_arrmul24_and22_4 = ((a >> 22) & 0x01) & ((b >> 4) & 0x01);
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s_arrmul24_fa22_4_xor0 = ((s_arrmul24_and22_4 >> 0) & 0x01) ^ ((s_arrmul24_fa23_3_xor1 >> 0) & 0x01);
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s_arrmul24_fa22_4_and0 = ((s_arrmul24_and22_4 >> 0) & 0x01) & ((s_arrmul24_fa23_3_xor1 >> 0) & 0x01);
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s_arrmul24_fa22_4_xor1 = ((s_arrmul24_fa22_4_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa21_4_or0 >> 0) & 0x01);
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s_arrmul24_fa22_4_and1 = ((s_arrmul24_fa22_4_xor0 >> 0) & 0x01) & ((s_arrmul24_fa21_4_or0 >> 0) & 0x01);
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s_arrmul24_fa22_4_or0 = ((s_arrmul24_fa22_4_and0 >> 0) & 0x01) | ((s_arrmul24_fa22_4_and1 >> 0) & 0x01);
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s_arrmul24_nand23_4 = ~(((a >> 23) & 0x01) & ((b >> 4) & 0x01)) & 0x01;
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s_arrmul24_fa23_4_xor0 = ((s_arrmul24_nand23_4 >> 0) & 0x01) ^ ((s_arrmul24_fa23_3_or0 >> 0) & 0x01);
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s_arrmul24_fa23_4_and0 = ((s_arrmul24_nand23_4 >> 0) & 0x01) & ((s_arrmul24_fa23_3_or0 >> 0) & 0x01);
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s_arrmul24_fa23_4_xor1 = ((s_arrmul24_fa23_4_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa22_4_or0 >> 0) & 0x01);
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s_arrmul24_fa23_4_and1 = ((s_arrmul24_fa23_4_xor0 >> 0) & 0x01) & ((s_arrmul24_fa22_4_or0 >> 0) & 0x01);
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s_arrmul24_fa23_4_or0 = ((s_arrmul24_fa23_4_and0 >> 0) & 0x01) | ((s_arrmul24_fa23_4_and1 >> 0) & 0x01);
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s_arrmul24_and0_5 = ((a >> 0) & 0x01) & ((b >> 5) & 0x01);
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s_arrmul24_ha0_5_xor0 = ((s_arrmul24_and0_5 >> 0) & 0x01) ^ ((s_arrmul24_fa1_4_xor1 >> 0) & 0x01);
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s_arrmul24_ha0_5_and0 = ((s_arrmul24_and0_5 >> 0) & 0x01) & ((s_arrmul24_fa1_4_xor1 >> 0) & 0x01);
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s_arrmul24_and1_5 = ((a >> 1) & 0x01) & ((b >> 5) & 0x01);
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s_arrmul24_fa1_5_xor0 = ((s_arrmul24_and1_5 >> 0) & 0x01) ^ ((s_arrmul24_fa2_4_xor1 >> 0) & 0x01);
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s_arrmul24_fa1_5_and0 = ((s_arrmul24_and1_5 >> 0) & 0x01) & ((s_arrmul24_fa2_4_xor1 >> 0) & 0x01);
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s_arrmul24_fa1_5_xor1 = ((s_arrmul24_fa1_5_xor0 >> 0) & 0x01) ^ ((s_arrmul24_ha0_5_and0 >> 0) & 0x01);
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s_arrmul24_fa1_5_and1 = ((s_arrmul24_fa1_5_xor0 >> 0) & 0x01) & ((s_arrmul24_ha0_5_and0 >> 0) & 0x01);
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s_arrmul24_fa1_5_or0 = ((s_arrmul24_fa1_5_and0 >> 0) & 0x01) | ((s_arrmul24_fa1_5_and1 >> 0) & 0x01);
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s_arrmul24_and2_5 = ((a >> 2) & 0x01) & ((b >> 5) & 0x01);
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s_arrmul24_fa2_5_xor0 = ((s_arrmul24_and2_5 >> 0) & 0x01) ^ ((s_arrmul24_fa3_4_xor1 >> 0) & 0x01);
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s_arrmul24_fa2_5_and0 = ((s_arrmul24_and2_5 >> 0) & 0x01) & ((s_arrmul24_fa3_4_xor1 >> 0) & 0x01);
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s_arrmul24_fa2_5_xor1 = ((s_arrmul24_fa2_5_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa1_5_or0 >> 0) & 0x01);
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s_arrmul24_fa2_5_and1 = ((s_arrmul24_fa2_5_xor0 >> 0) & 0x01) & ((s_arrmul24_fa1_5_or0 >> 0) & 0x01);
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s_arrmul24_fa2_5_or0 = ((s_arrmul24_fa2_5_and0 >> 0) & 0x01) | ((s_arrmul24_fa2_5_and1 >> 0) & 0x01);
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s_arrmul24_and3_5 = ((a >> 3) & 0x01) & ((b >> 5) & 0x01);
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s_arrmul24_fa3_5_xor0 = ((s_arrmul24_and3_5 >> 0) & 0x01) ^ ((s_arrmul24_fa4_4_xor1 >> 0) & 0x01);
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s_arrmul24_fa3_5_and0 = ((s_arrmul24_and3_5 >> 0) & 0x01) & ((s_arrmul24_fa4_4_xor1 >> 0) & 0x01);
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s_arrmul24_fa3_5_xor1 = ((s_arrmul24_fa3_5_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa2_5_or0 >> 0) & 0x01);
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s_arrmul24_fa3_5_and1 = ((s_arrmul24_fa3_5_xor0 >> 0) & 0x01) & ((s_arrmul24_fa2_5_or0 >> 0) & 0x01);
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s_arrmul24_fa3_5_or0 = ((s_arrmul24_fa3_5_and0 >> 0) & 0x01) | ((s_arrmul24_fa3_5_and1 >> 0) & 0x01);
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s_arrmul24_and4_5 = ((a >> 4) & 0x01) & ((b >> 5) & 0x01);
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s_arrmul24_fa4_5_xor0 = ((s_arrmul24_and4_5 >> 0) & 0x01) ^ ((s_arrmul24_fa5_4_xor1 >> 0) & 0x01);
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s_arrmul24_fa4_5_and0 = ((s_arrmul24_and4_5 >> 0) & 0x01) & ((s_arrmul24_fa5_4_xor1 >> 0) & 0x01);
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s_arrmul24_fa4_5_xor1 = ((s_arrmul24_fa4_5_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa3_5_or0 >> 0) & 0x01);
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s_arrmul24_fa4_5_and1 = ((s_arrmul24_fa4_5_xor0 >> 0) & 0x01) & ((s_arrmul24_fa3_5_or0 >> 0) & 0x01);
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s_arrmul24_fa4_5_or0 = ((s_arrmul24_fa4_5_and0 >> 0) & 0x01) | ((s_arrmul24_fa4_5_and1 >> 0) & 0x01);
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s_arrmul24_and5_5 = ((a >> 5) & 0x01) & ((b >> 5) & 0x01);
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s_arrmul24_fa5_5_xor0 = ((s_arrmul24_and5_5 >> 0) & 0x01) ^ ((s_arrmul24_fa6_4_xor1 >> 0) & 0x01);
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s_arrmul24_fa5_5_and0 = ((s_arrmul24_and5_5 >> 0) & 0x01) & ((s_arrmul24_fa6_4_xor1 >> 0) & 0x01);
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s_arrmul24_fa5_5_xor1 = ((s_arrmul24_fa5_5_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa4_5_or0 >> 0) & 0x01);
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s_arrmul24_fa5_5_and1 = ((s_arrmul24_fa5_5_xor0 >> 0) & 0x01) & ((s_arrmul24_fa4_5_or0 >> 0) & 0x01);
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s_arrmul24_fa5_5_or0 = ((s_arrmul24_fa5_5_and0 >> 0) & 0x01) | ((s_arrmul24_fa5_5_and1 >> 0) & 0x01);
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s_arrmul24_and6_5 = ((a >> 6) & 0x01) & ((b >> 5) & 0x01);
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s_arrmul24_fa6_5_xor0 = ((s_arrmul24_and6_5 >> 0) & 0x01) ^ ((s_arrmul24_fa7_4_xor1 >> 0) & 0x01);
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s_arrmul24_fa6_5_and0 = ((s_arrmul24_and6_5 >> 0) & 0x01) & ((s_arrmul24_fa7_4_xor1 >> 0) & 0x01);
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s_arrmul24_fa6_5_xor1 = ((s_arrmul24_fa6_5_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa5_5_or0 >> 0) & 0x01);
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s_arrmul24_fa6_5_and1 = ((s_arrmul24_fa6_5_xor0 >> 0) & 0x01) & ((s_arrmul24_fa5_5_or0 >> 0) & 0x01);
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s_arrmul24_fa6_5_or0 = ((s_arrmul24_fa6_5_and0 >> 0) & 0x01) | ((s_arrmul24_fa6_5_and1 >> 0) & 0x01);
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s_arrmul24_and7_5 = ((a >> 7) & 0x01) & ((b >> 5) & 0x01);
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s_arrmul24_fa7_5_xor0 = ((s_arrmul24_and7_5 >> 0) & 0x01) ^ ((s_arrmul24_fa8_4_xor1 >> 0) & 0x01);
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s_arrmul24_fa7_5_and0 = ((s_arrmul24_and7_5 >> 0) & 0x01) & ((s_arrmul24_fa8_4_xor1 >> 0) & 0x01);
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s_arrmul24_fa7_5_xor1 = ((s_arrmul24_fa7_5_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa6_5_or0 >> 0) & 0x01);
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s_arrmul24_fa7_5_and1 = ((s_arrmul24_fa7_5_xor0 >> 0) & 0x01) & ((s_arrmul24_fa6_5_or0 >> 0) & 0x01);
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s_arrmul24_fa7_5_or0 = ((s_arrmul24_fa7_5_and0 >> 0) & 0x01) | ((s_arrmul24_fa7_5_and1 >> 0) & 0x01);
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s_arrmul24_and8_5 = ((a >> 8) & 0x01) & ((b >> 5) & 0x01);
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s_arrmul24_fa8_5_xor0 = ((s_arrmul24_and8_5 >> 0) & 0x01) ^ ((s_arrmul24_fa9_4_xor1 >> 0) & 0x01);
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s_arrmul24_fa8_5_and0 = ((s_arrmul24_and8_5 >> 0) & 0x01) & ((s_arrmul24_fa9_4_xor1 >> 0) & 0x01);
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s_arrmul24_fa8_5_xor1 = ((s_arrmul24_fa8_5_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa7_5_or0 >> 0) & 0x01);
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s_arrmul24_fa8_5_and1 = ((s_arrmul24_fa8_5_xor0 >> 0) & 0x01) & ((s_arrmul24_fa7_5_or0 >> 0) & 0x01);
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s_arrmul24_fa8_5_or0 = ((s_arrmul24_fa8_5_and0 >> 0) & 0x01) | ((s_arrmul24_fa8_5_and1 >> 0) & 0x01);
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s_arrmul24_and9_5 = ((a >> 9) & 0x01) & ((b >> 5) & 0x01);
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s_arrmul24_fa9_5_xor0 = ((s_arrmul24_and9_5 >> 0) & 0x01) ^ ((s_arrmul24_fa10_4_xor1 >> 0) & 0x01);
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s_arrmul24_fa9_5_and0 = ((s_arrmul24_and9_5 >> 0) & 0x01) & ((s_arrmul24_fa10_4_xor1 >> 0) & 0x01);
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s_arrmul24_fa9_5_xor1 = ((s_arrmul24_fa9_5_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa8_5_or0 >> 0) & 0x01);
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s_arrmul24_fa9_5_and1 = ((s_arrmul24_fa9_5_xor0 >> 0) & 0x01) & ((s_arrmul24_fa8_5_or0 >> 0) & 0x01);
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s_arrmul24_fa9_5_or0 = ((s_arrmul24_fa9_5_and0 >> 0) & 0x01) | ((s_arrmul24_fa9_5_and1 >> 0) & 0x01);
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s_arrmul24_and10_5 = ((a >> 10) & 0x01) & ((b >> 5) & 0x01);
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s_arrmul24_fa10_5_xor0 = ((s_arrmul24_and10_5 >> 0) & 0x01) ^ ((s_arrmul24_fa11_4_xor1 >> 0) & 0x01);
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s_arrmul24_fa10_5_and0 = ((s_arrmul24_and10_5 >> 0) & 0x01) & ((s_arrmul24_fa11_4_xor1 >> 0) & 0x01);
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s_arrmul24_fa10_5_xor1 = ((s_arrmul24_fa10_5_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa9_5_or0 >> 0) & 0x01);
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s_arrmul24_fa10_5_and1 = ((s_arrmul24_fa10_5_xor0 >> 0) & 0x01) & ((s_arrmul24_fa9_5_or0 >> 0) & 0x01);
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s_arrmul24_fa10_5_or0 = ((s_arrmul24_fa10_5_and0 >> 0) & 0x01) | ((s_arrmul24_fa10_5_and1 >> 0) & 0x01);
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s_arrmul24_and11_5 = ((a >> 11) & 0x01) & ((b >> 5) & 0x01);
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s_arrmul24_fa11_5_xor0 = ((s_arrmul24_and11_5 >> 0) & 0x01) ^ ((s_arrmul24_fa12_4_xor1 >> 0) & 0x01);
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s_arrmul24_fa11_5_and0 = ((s_arrmul24_and11_5 >> 0) & 0x01) & ((s_arrmul24_fa12_4_xor1 >> 0) & 0x01);
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s_arrmul24_fa11_5_xor1 = ((s_arrmul24_fa11_5_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa10_5_or0 >> 0) & 0x01);
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s_arrmul24_fa11_5_and1 = ((s_arrmul24_fa11_5_xor0 >> 0) & 0x01) & ((s_arrmul24_fa10_5_or0 >> 0) & 0x01);
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s_arrmul24_fa11_5_or0 = ((s_arrmul24_fa11_5_and0 >> 0) & 0x01) | ((s_arrmul24_fa11_5_and1 >> 0) & 0x01);
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s_arrmul24_and12_5 = ((a >> 12) & 0x01) & ((b >> 5) & 0x01);
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s_arrmul24_fa12_5_xor0 = ((s_arrmul24_and12_5 >> 0) & 0x01) ^ ((s_arrmul24_fa13_4_xor1 >> 0) & 0x01);
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s_arrmul24_fa12_5_and0 = ((s_arrmul24_and12_5 >> 0) & 0x01) & ((s_arrmul24_fa13_4_xor1 >> 0) & 0x01);
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s_arrmul24_fa12_5_xor1 = ((s_arrmul24_fa12_5_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa11_5_or0 >> 0) & 0x01);
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s_arrmul24_fa12_5_and1 = ((s_arrmul24_fa12_5_xor0 >> 0) & 0x01) & ((s_arrmul24_fa11_5_or0 >> 0) & 0x01);
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s_arrmul24_fa12_5_or0 = ((s_arrmul24_fa12_5_and0 >> 0) & 0x01) | ((s_arrmul24_fa12_5_and1 >> 0) & 0x01);
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s_arrmul24_and13_5 = ((a >> 13) & 0x01) & ((b >> 5) & 0x01);
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s_arrmul24_fa13_5_xor0 = ((s_arrmul24_and13_5 >> 0) & 0x01) ^ ((s_arrmul24_fa14_4_xor1 >> 0) & 0x01);
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s_arrmul24_fa13_5_and0 = ((s_arrmul24_and13_5 >> 0) & 0x01) & ((s_arrmul24_fa14_4_xor1 >> 0) & 0x01);
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s_arrmul24_fa13_5_xor1 = ((s_arrmul24_fa13_5_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa12_5_or0 >> 0) & 0x01);
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s_arrmul24_fa13_5_and1 = ((s_arrmul24_fa13_5_xor0 >> 0) & 0x01) & ((s_arrmul24_fa12_5_or0 >> 0) & 0x01);
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s_arrmul24_fa13_5_or0 = ((s_arrmul24_fa13_5_and0 >> 0) & 0x01) | ((s_arrmul24_fa13_5_and1 >> 0) & 0x01);
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s_arrmul24_and14_5 = ((a >> 14) & 0x01) & ((b >> 5) & 0x01);
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s_arrmul24_fa14_5_xor0 = ((s_arrmul24_and14_5 >> 0) & 0x01) ^ ((s_arrmul24_fa15_4_xor1 >> 0) & 0x01);
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s_arrmul24_fa14_5_and0 = ((s_arrmul24_and14_5 >> 0) & 0x01) & ((s_arrmul24_fa15_4_xor1 >> 0) & 0x01);
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s_arrmul24_fa14_5_xor1 = ((s_arrmul24_fa14_5_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa13_5_or0 >> 0) & 0x01);
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s_arrmul24_fa14_5_and1 = ((s_arrmul24_fa14_5_xor0 >> 0) & 0x01) & ((s_arrmul24_fa13_5_or0 >> 0) & 0x01);
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s_arrmul24_fa14_5_or0 = ((s_arrmul24_fa14_5_and0 >> 0) & 0x01) | ((s_arrmul24_fa14_5_and1 >> 0) & 0x01);
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s_arrmul24_and15_5 = ((a >> 15) & 0x01) & ((b >> 5) & 0x01);
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s_arrmul24_fa15_5_xor0 = ((s_arrmul24_and15_5 >> 0) & 0x01) ^ ((s_arrmul24_fa16_4_xor1 >> 0) & 0x01);
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s_arrmul24_fa15_5_and0 = ((s_arrmul24_and15_5 >> 0) & 0x01) & ((s_arrmul24_fa16_4_xor1 >> 0) & 0x01);
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s_arrmul24_fa15_5_xor1 = ((s_arrmul24_fa15_5_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa14_5_or0 >> 0) & 0x01);
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s_arrmul24_fa15_5_and1 = ((s_arrmul24_fa15_5_xor0 >> 0) & 0x01) & ((s_arrmul24_fa14_5_or0 >> 0) & 0x01);
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s_arrmul24_fa15_5_or0 = ((s_arrmul24_fa15_5_and0 >> 0) & 0x01) | ((s_arrmul24_fa15_5_and1 >> 0) & 0x01);
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s_arrmul24_and16_5 = ((a >> 16) & 0x01) & ((b >> 5) & 0x01);
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s_arrmul24_fa16_5_xor0 = ((s_arrmul24_and16_5 >> 0) & 0x01) ^ ((s_arrmul24_fa17_4_xor1 >> 0) & 0x01);
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s_arrmul24_fa16_5_and0 = ((s_arrmul24_and16_5 >> 0) & 0x01) & ((s_arrmul24_fa17_4_xor1 >> 0) & 0x01);
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s_arrmul24_fa16_5_xor1 = ((s_arrmul24_fa16_5_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa15_5_or0 >> 0) & 0x01);
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s_arrmul24_fa16_5_and1 = ((s_arrmul24_fa16_5_xor0 >> 0) & 0x01) & ((s_arrmul24_fa15_5_or0 >> 0) & 0x01);
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s_arrmul24_fa16_5_or0 = ((s_arrmul24_fa16_5_and0 >> 0) & 0x01) | ((s_arrmul24_fa16_5_and1 >> 0) & 0x01);
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s_arrmul24_and17_5 = ((a >> 17) & 0x01) & ((b >> 5) & 0x01);
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s_arrmul24_fa17_5_xor0 = ((s_arrmul24_and17_5 >> 0) & 0x01) ^ ((s_arrmul24_fa18_4_xor1 >> 0) & 0x01);
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s_arrmul24_fa17_5_and0 = ((s_arrmul24_and17_5 >> 0) & 0x01) & ((s_arrmul24_fa18_4_xor1 >> 0) & 0x01);
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s_arrmul24_fa17_5_xor1 = ((s_arrmul24_fa17_5_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa16_5_or0 >> 0) & 0x01);
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s_arrmul24_fa17_5_and1 = ((s_arrmul24_fa17_5_xor0 >> 0) & 0x01) & ((s_arrmul24_fa16_5_or0 >> 0) & 0x01);
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s_arrmul24_fa17_5_or0 = ((s_arrmul24_fa17_5_and0 >> 0) & 0x01) | ((s_arrmul24_fa17_5_and1 >> 0) & 0x01);
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s_arrmul24_and18_5 = ((a >> 18) & 0x01) & ((b >> 5) & 0x01);
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s_arrmul24_fa18_5_xor0 = ((s_arrmul24_and18_5 >> 0) & 0x01) ^ ((s_arrmul24_fa19_4_xor1 >> 0) & 0x01);
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s_arrmul24_fa18_5_and0 = ((s_arrmul24_and18_5 >> 0) & 0x01) & ((s_arrmul24_fa19_4_xor1 >> 0) & 0x01);
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s_arrmul24_fa18_5_xor1 = ((s_arrmul24_fa18_5_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa17_5_or0 >> 0) & 0x01);
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s_arrmul24_fa18_5_and1 = ((s_arrmul24_fa18_5_xor0 >> 0) & 0x01) & ((s_arrmul24_fa17_5_or0 >> 0) & 0x01);
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s_arrmul24_fa18_5_or0 = ((s_arrmul24_fa18_5_and0 >> 0) & 0x01) | ((s_arrmul24_fa18_5_and1 >> 0) & 0x01);
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s_arrmul24_and19_5 = ((a >> 19) & 0x01) & ((b >> 5) & 0x01);
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s_arrmul24_fa19_5_xor0 = ((s_arrmul24_and19_5 >> 0) & 0x01) ^ ((s_arrmul24_fa20_4_xor1 >> 0) & 0x01);
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s_arrmul24_fa19_5_and0 = ((s_arrmul24_and19_5 >> 0) & 0x01) & ((s_arrmul24_fa20_4_xor1 >> 0) & 0x01);
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s_arrmul24_fa19_5_xor1 = ((s_arrmul24_fa19_5_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa18_5_or0 >> 0) & 0x01);
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s_arrmul24_fa19_5_and1 = ((s_arrmul24_fa19_5_xor0 >> 0) & 0x01) & ((s_arrmul24_fa18_5_or0 >> 0) & 0x01);
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s_arrmul24_fa19_5_or0 = ((s_arrmul24_fa19_5_and0 >> 0) & 0x01) | ((s_arrmul24_fa19_5_and1 >> 0) & 0x01);
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s_arrmul24_and20_5 = ((a >> 20) & 0x01) & ((b >> 5) & 0x01);
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s_arrmul24_fa20_5_xor0 = ((s_arrmul24_and20_5 >> 0) & 0x01) ^ ((s_arrmul24_fa21_4_xor1 >> 0) & 0x01);
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s_arrmul24_fa20_5_and0 = ((s_arrmul24_and20_5 >> 0) & 0x01) & ((s_arrmul24_fa21_4_xor1 >> 0) & 0x01);
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s_arrmul24_fa20_5_xor1 = ((s_arrmul24_fa20_5_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa19_5_or0 >> 0) & 0x01);
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s_arrmul24_fa20_5_and1 = ((s_arrmul24_fa20_5_xor0 >> 0) & 0x01) & ((s_arrmul24_fa19_5_or0 >> 0) & 0x01);
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s_arrmul24_fa20_5_or0 = ((s_arrmul24_fa20_5_and0 >> 0) & 0x01) | ((s_arrmul24_fa20_5_and1 >> 0) & 0x01);
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s_arrmul24_and21_5 = ((a >> 21) & 0x01) & ((b >> 5) & 0x01);
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s_arrmul24_fa21_5_xor0 = ((s_arrmul24_and21_5 >> 0) & 0x01) ^ ((s_arrmul24_fa22_4_xor1 >> 0) & 0x01);
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s_arrmul24_fa21_5_and0 = ((s_arrmul24_and21_5 >> 0) & 0x01) & ((s_arrmul24_fa22_4_xor1 >> 0) & 0x01);
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s_arrmul24_fa21_5_xor1 = ((s_arrmul24_fa21_5_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa20_5_or0 >> 0) & 0x01);
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s_arrmul24_fa21_5_and1 = ((s_arrmul24_fa21_5_xor0 >> 0) & 0x01) & ((s_arrmul24_fa20_5_or0 >> 0) & 0x01);
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s_arrmul24_fa21_5_or0 = ((s_arrmul24_fa21_5_and0 >> 0) & 0x01) | ((s_arrmul24_fa21_5_and1 >> 0) & 0x01);
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s_arrmul24_and22_5 = ((a >> 22) & 0x01) & ((b >> 5) & 0x01);
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s_arrmul24_fa22_5_xor0 = ((s_arrmul24_and22_5 >> 0) & 0x01) ^ ((s_arrmul24_fa23_4_xor1 >> 0) & 0x01);
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s_arrmul24_fa22_5_and0 = ((s_arrmul24_and22_5 >> 0) & 0x01) & ((s_arrmul24_fa23_4_xor1 >> 0) & 0x01);
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s_arrmul24_fa22_5_xor1 = ((s_arrmul24_fa22_5_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa21_5_or0 >> 0) & 0x01);
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s_arrmul24_fa22_5_and1 = ((s_arrmul24_fa22_5_xor0 >> 0) & 0x01) & ((s_arrmul24_fa21_5_or0 >> 0) & 0x01);
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s_arrmul24_fa22_5_or0 = ((s_arrmul24_fa22_5_and0 >> 0) & 0x01) | ((s_arrmul24_fa22_5_and1 >> 0) & 0x01);
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s_arrmul24_nand23_5 = ~(((a >> 23) & 0x01) & ((b >> 5) & 0x01)) & 0x01;
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s_arrmul24_fa23_5_xor0 = ((s_arrmul24_nand23_5 >> 0) & 0x01) ^ ((s_arrmul24_fa23_4_or0 >> 0) & 0x01);
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s_arrmul24_fa23_5_and0 = ((s_arrmul24_nand23_5 >> 0) & 0x01) & ((s_arrmul24_fa23_4_or0 >> 0) & 0x01);
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s_arrmul24_fa23_5_xor1 = ((s_arrmul24_fa23_5_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa22_5_or0 >> 0) & 0x01);
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s_arrmul24_fa23_5_and1 = ((s_arrmul24_fa23_5_xor0 >> 0) & 0x01) & ((s_arrmul24_fa22_5_or0 >> 0) & 0x01);
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s_arrmul24_fa23_5_or0 = ((s_arrmul24_fa23_5_and0 >> 0) & 0x01) | ((s_arrmul24_fa23_5_and1 >> 0) & 0x01);
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s_arrmul24_and0_6 = ((a >> 0) & 0x01) & ((b >> 6) & 0x01);
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s_arrmul24_ha0_6_xor0 = ((s_arrmul24_and0_6 >> 0) & 0x01) ^ ((s_arrmul24_fa1_5_xor1 >> 0) & 0x01);
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s_arrmul24_ha0_6_and0 = ((s_arrmul24_and0_6 >> 0) & 0x01) & ((s_arrmul24_fa1_5_xor1 >> 0) & 0x01);
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s_arrmul24_and1_6 = ((a >> 1) & 0x01) & ((b >> 6) & 0x01);
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s_arrmul24_fa1_6_xor0 = ((s_arrmul24_and1_6 >> 0) & 0x01) ^ ((s_arrmul24_fa2_5_xor1 >> 0) & 0x01);
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s_arrmul24_fa1_6_and0 = ((s_arrmul24_and1_6 >> 0) & 0x01) & ((s_arrmul24_fa2_5_xor1 >> 0) & 0x01);
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s_arrmul24_fa1_6_xor1 = ((s_arrmul24_fa1_6_xor0 >> 0) & 0x01) ^ ((s_arrmul24_ha0_6_and0 >> 0) & 0x01);
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s_arrmul24_fa1_6_and1 = ((s_arrmul24_fa1_6_xor0 >> 0) & 0x01) & ((s_arrmul24_ha0_6_and0 >> 0) & 0x01);
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s_arrmul24_fa1_6_or0 = ((s_arrmul24_fa1_6_and0 >> 0) & 0x01) | ((s_arrmul24_fa1_6_and1 >> 0) & 0x01);
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s_arrmul24_and2_6 = ((a >> 2) & 0x01) & ((b >> 6) & 0x01);
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s_arrmul24_fa2_6_xor0 = ((s_arrmul24_and2_6 >> 0) & 0x01) ^ ((s_arrmul24_fa3_5_xor1 >> 0) & 0x01);
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s_arrmul24_fa2_6_and0 = ((s_arrmul24_and2_6 >> 0) & 0x01) & ((s_arrmul24_fa3_5_xor1 >> 0) & 0x01);
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s_arrmul24_fa2_6_xor1 = ((s_arrmul24_fa2_6_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa1_6_or0 >> 0) & 0x01);
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s_arrmul24_fa2_6_and1 = ((s_arrmul24_fa2_6_xor0 >> 0) & 0x01) & ((s_arrmul24_fa1_6_or0 >> 0) & 0x01);
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s_arrmul24_fa2_6_or0 = ((s_arrmul24_fa2_6_and0 >> 0) & 0x01) | ((s_arrmul24_fa2_6_and1 >> 0) & 0x01);
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s_arrmul24_and3_6 = ((a >> 3) & 0x01) & ((b >> 6) & 0x01);
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s_arrmul24_fa3_6_xor0 = ((s_arrmul24_and3_6 >> 0) & 0x01) ^ ((s_arrmul24_fa4_5_xor1 >> 0) & 0x01);
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s_arrmul24_fa3_6_and0 = ((s_arrmul24_and3_6 >> 0) & 0x01) & ((s_arrmul24_fa4_5_xor1 >> 0) & 0x01);
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s_arrmul24_fa3_6_xor1 = ((s_arrmul24_fa3_6_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa2_6_or0 >> 0) & 0x01);
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s_arrmul24_fa3_6_and1 = ((s_arrmul24_fa3_6_xor0 >> 0) & 0x01) & ((s_arrmul24_fa2_6_or0 >> 0) & 0x01);
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s_arrmul24_fa3_6_or0 = ((s_arrmul24_fa3_6_and0 >> 0) & 0x01) | ((s_arrmul24_fa3_6_and1 >> 0) & 0x01);
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s_arrmul24_and4_6 = ((a >> 4) & 0x01) & ((b >> 6) & 0x01);
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s_arrmul24_fa4_6_xor0 = ((s_arrmul24_and4_6 >> 0) & 0x01) ^ ((s_arrmul24_fa5_5_xor1 >> 0) & 0x01);
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s_arrmul24_fa4_6_and0 = ((s_arrmul24_and4_6 >> 0) & 0x01) & ((s_arrmul24_fa5_5_xor1 >> 0) & 0x01);
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s_arrmul24_fa4_6_xor1 = ((s_arrmul24_fa4_6_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa3_6_or0 >> 0) & 0x01);
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s_arrmul24_fa4_6_and1 = ((s_arrmul24_fa4_6_xor0 >> 0) & 0x01) & ((s_arrmul24_fa3_6_or0 >> 0) & 0x01);
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s_arrmul24_fa4_6_or0 = ((s_arrmul24_fa4_6_and0 >> 0) & 0x01) | ((s_arrmul24_fa4_6_and1 >> 0) & 0x01);
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s_arrmul24_and5_6 = ((a >> 5) & 0x01) & ((b >> 6) & 0x01);
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s_arrmul24_fa5_6_xor0 = ((s_arrmul24_and5_6 >> 0) & 0x01) ^ ((s_arrmul24_fa6_5_xor1 >> 0) & 0x01);
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s_arrmul24_fa5_6_and0 = ((s_arrmul24_and5_6 >> 0) & 0x01) & ((s_arrmul24_fa6_5_xor1 >> 0) & 0x01);
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s_arrmul24_fa5_6_xor1 = ((s_arrmul24_fa5_6_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa4_6_or0 >> 0) & 0x01);
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s_arrmul24_fa5_6_and1 = ((s_arrmul24_fa5_6_xor0 >> 0) & 0x01) & ((s_arrmul24_fa4_6_or0 >> 0) & 0x01);
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s_arrmul24_fa5_6_or0 = ((s_arrmul24_fa5_6_and0 >> 0) & 0x01) | ((s_arrmul24_fa5_6_and1 >> 0) & 0x01);
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s_arrmul24_and6_6 = ((a >> 6) & 0x01) & ((b >> 6) & 0x01);
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s_arrmul24_fa6_6_xor0 = ((s_arrmul24_and6_6 >> 0) & 0x01) ^ ((s_arrmul24_fa7_5_xor1 >> 0) & 0x01);
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s_arrmul24_fa6_6_and0 = ((s_arrmul24_and6_6 >> 0) & 0x01) & ((s_arrmul24_fa7_5_xor1 >> 0) & 0x01);
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s_arrmul24_fa6_6_xor1 = ((s_arrmul24_fa6_6_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa5_6_or0 >> 0) & 0x01);
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s_arrmul24_fa6_6_and1 = ((s_arrmul24_fa6_6_xor0 >> 0) & 0x01) & ((s_arrmul24_fa5_6_or0 >> 0) & 0x01);
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s_arrmul24_fa6_6_or0 = ((s_arrmul24_fa6_6_and0 >> 0) & 0x01) | ((s_arrmul24_fa6_6_and1 >> 0) & 0x01);
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s_arrmul24_and7_6 = ((a >> 7) & 0x01) & ((b >> 6) & 0x01);
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s_arrmul24_fa7_6_xor0 = ((s_arrmul24_and7_6 >> 0) & 0x01) ^ ((s_arrmul24_fa8_5_xor1 >> 0) & 0x01);
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s_arrmul24_fa7_6_and0 = ((s_arrmul24_and7_6 >> 0) & 0x01) & ((s_arrmul24_fa8_5_xor1 >> 0) & 0x01);
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s_arrmul24_fa7_6_xor1 = ((s_arrmul24_fa7_6_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa6_6_or0 >> 0) & 0x01);
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s_arrmul24_fa7_6_and1 = ((s_arrmul24_fa7_6_xor0 >> 0) & 0x01) & ((s_arrmul24_fa6_6_or0 >> 0) & 0x01);
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s_arrmul24_fa7_6_or0 = ((s_arrmul24_fa7_6_and0 >> 0) & 0x01) | ((s_arrmul24_fa7_6_and1 >> 0) & 0x01);
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s_arrmul24_and8_6 = ((a >> 8) & 0x01) & ((b >> 6) & 0x01);
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s_arrmul24_fa8_6_xor0 = ((s_arrmul24_and8_6 >> 0) & 0x01) ^ ((s_arrmul24_fa9_5_xor1 >> 0) & 0x01);
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s_arrmul24_fa8_6_and0 = ((s_arrmul24_and8_6 >> 0) & 0x01) & ((s_arrmul24_fa9_5_xor1 >> 0) & 0x01);
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s_arrmul24_fa8_6_xor1 = ((s_arrmul24_fa8_6_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa7_6_or0 >> 0) & 0x01);
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s_arrmul24_fa8_6_and1 = ((s_arrmul24_fa8_6_xor0 >> 0) & 0x01) & ((s_arrmul24_fa7_6_or0 >> 0) & 0x01);
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s_arrmul24_fa8_6_or0 = ((s_arrmul24_fa8_6_and0 >> 0) & 0x01) | ((s_arrmul24_fa8_6_and1 >> 0) & 0x01);
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s_arrmul24_and9_6 = ((a >> 9) & 0x01) & ((b >> 6) & 0x01);
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s_arrmul24_fa9_6_xor0 = ((s_arrmul24_and9_6 >> 0) & 0x01) ^ ((s_arrmul24_fa10_5_xor1 >> 0) & 0x01);
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s_arrmul24_fa9_6_and0 = ((s_arrmul24_and9_6 >> 0) & 0x01) & ((s_arrmul24_fa10_5_xor1 >> 0) & 0x01);
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s_arrmul24_fa9_6_xor1 = ((s_arrmul24_fa9_6_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa8_6_or0 >> 0) & 0x01);
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s_arrmul24_fa9_6_and1 = ((s_arrmul24_fa9_6_xor0 >> 0) & 0x01) & ((s_arrmul24_fa8_6_or0 >> 0) & 0x01);
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s_arrmul24_fa9_6_or0 = ((s_arrmul24_fa9_6_and0 >> 0) & 0x01) | ((s_arrmul24_fa9_6_and1 >> 0) & 0x01);
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s_arrmul24_and10_6 = ((a >> 10) & 0x01) & ((b >> 6) & 0x01);
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s_arrmul24_fa10_6_xor0 = ((s_arrmul24_and10_6 >> 0) & 0x01) ^ ((s_arrmul24_fa11_5_xor1 >> 0) & 0x01);
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s_arrmul24_fa10_6_and0 = ((s_arrmul24_and10_6 >> 0) & 0x01) & ((s_arrmul24_fa11_5_xor1 >> 0) & 0x01);
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s_arrmul24_fa10_6_xor1 = ((s_arrmul24_fa10_6_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa9_6_or0 >> 0) & 0x01);
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s_arrmul24_fa10_6_and1 = ((s_arrmul24_fa10_6_xor0 >> 0) & 0x01) & ((s_arrmul24_fa9_6_or0 >> 0) & 0x01);
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s_arrmul24_fa10_6_or0 = ((s_arrmul24_fa10_6_and0 >> 0) & 0x01) | ((s_arrmul24_fa10_6_and1 >> 0) & 0x01);
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s_arrmul24_and11_6 = ((a >> 11) & 0x01) & ((b >> 6) & 0x01);
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s_arrmul24_fa11_6_xor0 = ((s_arrmul24_and11_6 >> 0) & 0x01) ^ ((s_arrmul24_fa12_5_xor1 >> 0) & 0x01);
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s_arrmul24_fa11_6_and0 = ((s_arrmul24_and11_6 >> 0) & 0x01) & ((s_arrmul24_fa12_5_xor1 >> 0) & 0x01);
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s_arrmul24_fa11_6_xor1 = ((s_arrmul24_fa11_6_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa10_6_or0 >> 0) & 0x01);
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s_arrmul24_fa11_6_and1 = ((s_arrmul24_fa11_6_xor0 >> 0) & 0x01) & ((s_arrmul24_fa10_6_or0 >> 0) & 0x01);
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s_arrmul24_fa11_6_or0 = ((s_arrmul24_fa11_6_and0 >> 0) & 0x01) | ((s_arrmul24_fa11_6_and1 >> 0) & 0x01);
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s_arrmul24_and12_6 = ((a >> 12) & 0x01) & ((b >> 6) & 0x01);
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s_arrmul24_fa12_6_xor0 = ((s_arrmul24_and12_6 >> 0) & 0x01) ^ ((s_arrmul24_fa13_5_xor1 >> 0) & 0x01);
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s_arrmul24_fa12_6_and0 = ((s_arrmul24_and12_6 >> 0) & 0x01) & ((s_arrmul24_fa13_5_xor1 >> 0) & 0x01);
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s_arrmul24_fa12_6_xor1 = ((s_arrmul24_fa12_6_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa11_6_or0 >> 0) & 0x01);
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s_arrmul24_fa12_6_and1 = ((s_arrmul24_fa12_6_xor0 >> 0) & 0x01) & ((s_arrmul24_fa11_6_or0 >> 0) & 0x01);
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s_arrmul24_fa12_6_or0 = ((s_arrmul24_fa12_6_and0 >> 0) & 0x01) | ((s_arrmul24_fa12_6_and1 >> 0) & 0x01);
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s_arrmul24_and13_6 = ((a >> 13) & 0x01) & ((b >> 6) & 0x01);
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s_arrmul24_fa13_6_xor0 = ((s_arrmul24_and13_6 >> 0) & 0x01) ^ ((s_arrmul24_fa14_5_xor1 >> 0) & 0x01);
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s_arrmul24_fa13_6_and0 = ((s_arrmul24_and13_6 >> 0) & 0x01) & ((s_arrmul24_fa14_5_xor1 >> 0) & 0x01);
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s_arrmul24_fa13_6_xor1 = ((s_arrmul24_fa13_6_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa12_6_or0 >> 0) & 0x01);
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s_arrmul24_fa13_6_and1 = ((s_arrmul24_fa13_6_xor0 >> 0) & 0x01) & ((s_arrmul24_fa12_6_or0 >> 0) & 0x01);
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s_arrmul24_fa13_6_or0 = ((s_arrmul24_fa13_6_and0 >> 0) & 0x01) | ((s_arrmul24_fa13_6_and1 >> 0) & 0x01);
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s_arrmul24_and14_6 = ((a >> 14) & 0x01) & ((b >> 6) & 0x01);
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s_arrmul24_fa14_6_xor0 = ((s_arrmul24_and14_6 >> 0) & 0x01) ^ ((s_arrmul24_fa15_5_xor1 >> 0) & 0x01);
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s_arrmul24_fa14_6_and0 = ((s_arrmul24_and14_6 >> 0) & 0x01) & ((s_arrmul24_fa15_5_xor1 >> 0) & 0x01);
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s_arrmul24_fa14_6_xor1 = ((s_arrmul24_fa14_6_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa13_6_or0 >> 0) & 0x01);
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s_arrmul24_fa14_6_and1 = ((s_arrmul24_fa14_6_xor0 >> 0) & 0x01) & ((s_arrmul24_fa13_6_or0 >> 0) & 0x01);
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s_arrmul24_fa14_6_or0 = ((s_arrmul24_fa14_6_and0 >> 0) & 0x01) | ((s_arrmul24_fa14_6_and1 >> 0) & 0x01);
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s_arrmul24_and15_6 = ((a >> 15) & 0x01) & ((b >> 6) & 0x01);
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s_arrmul24_fa15_6_xor0 = ((s_arrmul24_and15_6 >> 0) & 0x01) ^ ((s_arrmul24_fa16_5_xor1 >> 0) & 0x01);
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s_arrmul24_fa15_6_and0 = ((s_arrmul24_and15_6 >> 0) & 0x01) & ((s_arrmul24_fa16_5_xor1 >> 0) & 0x01);
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s_arrmul24_fa15_6_xor1 = ((s_arrmul24_fa15_6_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa14_6_or0 >> 0) & 0x01);
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s_arrmul24_fa15_6_and1 = ((s_arrmul24_fa15_6_xor0 >> 0) & 0x01) & ((s_arrmul24_fa14_6_or0 >> 0) & 0x01);
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s_arrmul24_fa15_6_or0 = ((s_arrmul24_fa15_6_and0 >> 0) & 0x01) | ((s_arrmul24_fa15_6_and1 >> 0) & 0x01);
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s_arrmul24_and16_6 = ((a >> 16) & 0x01) & ((b >> 6) & 0x01);
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s_arrmul24_fa16_6_xor0 = ((s_arrmul24_and16_6 >> 0) & 0x01) ^ ((s_arrmul24_fa17_5_xor1 >> 0) & 0x01);
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s_arrmul24_fa16_6_and0 = ((s_arrmul24_and16_6 >> 0) & 0x01) & ((s_arrmul24_fa17_5_xor1 >> 0) & 0x01);
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s_arrmul24_fa16_6_xor1 = ((s_arrmul24_fa16_6_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa15_6_or0 >> 0) & 0x01);
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s_arrmul24_fa16_6_and1 = ((s_arrmul24_fa16_6_xor0 >> 0) & 0x01) & ((s_arrmul24_fa15_6_or0 >> 0) & 0x01);
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s_arrmul24_fa16_6_or0 = ((s_arrmul24_fa16_6_and0 >> 0) & 0x01) | ((s_arrmul24_fa16_6_and1 >> 0) & 0x01);
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s_arrmul24_and17_6 = ((a >> 17) & 0x01) & ((b >> 6) & 0x01);
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s_arrmul24_fa17_6_xor0 = ((s_arrmul24_and17_6 >> 0) & 0x01) ^ ((s_arrmul24_fa18_5_xor1 >> 0) & 0x01);
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s_arrmul24_fa17_6_and0 = ((s_arrmul24_and17_6 >> 0) & 0x01) & ((s_arrmul24_fa18_5_xor1 >> 0) & 0x01);
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s_arrmul24_fa17_6_xor1 = ((s_arrmul24_fa17_6_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa16_6_or0 >> 0) & 0x01);
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s_arrmul24_fa17_6_and1 = ((s_arrmul24_fa17_6_xor0 >> 0) & 0x01) & ((s_arrmul24_fa16_6_or0 >> 0) & 0x01);
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s_arrmul24_fa17_6_or0 = ((s_arrmul24_fa17_6_and0 >> 0) & 0x01) | ((s_arrmul24_fa17_6_and1 >> 0) & 0x01);
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s_arrmul24_and18_6 = ((a >> 18) & 0x01) & ((b >> 6) & 0x01);
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s_arrmul24_fa18_6_xor0 = ((s_arrmul24_and18_6 >> 0) & 0x01) ^ ((s_arrmul24_fa19_5_xor1 >> 0) & 0x01);
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s_arrmul24_fa18_6_and0 = ((s_arrmul24_and18_6 >> 0) & 0x01) & ((s_arrmul24_fa19_5_xor1 >> 0) & 0x01);
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s_arrmul24_fa18_6_xor1 = ((s_arrmul24_fa18_6_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa17_6_or0 >> 0) & 0x01);
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s_arrmul24_fa18_6_and1 = ((s_arrmul24_fa18_6_xor0 >> 0) & 0x01) & ((s_arrmul24_fa17_6_or0 >> 0) & 0x01);
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s_arrmul24_fa18_6_or0 = ((s_arrmul24_fa18_6_and0 >> 0) & 0x01) | ((s_arrmul24_fa18_6_and1 >> 0) & 0x01);
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s_arrmul24_and19_6 = ((a >> 19) & 0x01) & ((b >> 6) & 0x01);
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s_arrmul24_fa19_6_xor0 = ((s_arrmul24_and19_6 >> 0) & 0x01) ^ ((s_arrmul24_fa20_5_xor1 >> 0) & 0x01);
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s_arrmul24_fa19_6_and0 = ((s_arrmul24_and19_6 >> 0) & 0x01) & ((s_arrmul24_fa20_5_xor1 >> 0) & 0x01);
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s_arrmul24_fa19_6_xor1 = ((s_arrmul24_fa19_6_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa18_6_or0 >> 0) & 0x01);
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s_arrmul24_fa19_6_and1 = ((s_arrmul24_fa19_6_xor0 >> 0) & 0x01) & ((s_arrmul24_fa18_6_or0 >> 0) & 0x01);
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s_arrmul24_fa19_6_or0 = ((s_arrmul24_fa19_6_and0 >> 0) & 0x01) | ((s_arrmul24_fa19_6_and1 >> 0) & 0x01);
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s_arrmul24_and20_6 = ((a >> 20) & 0x01) & ((b >> 6) & 0x01);
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s_arrmul24_fa20_6_xor0 = ((s_arrmul24_and20_6 >> 0) & 0x01) ^ ((s_arrmul24_fa21_5_xor1 >> 0) & 0x01);
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s_arrmul24_fa20_6_and0 = ((s_arrmul24_and20_6 >> 0) & 0x01) & ((s_arrmul24_fa21_5_xor1 >> 0) & 0x01);
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s_arrmul24_fa20_6_xor1 = ((s_arrmul24_fa20_6_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa19_6_or0 >> 0) & 0x01);
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s_arrmul24_fa20_6_and1 = ((s_arrmul24_fa20_6_xor0 >> 0) & 0x01) & ((s_arrmul24_fa19_6_or0 >> 0) & 0x01);
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s_arrmul24_fa20_6_or0 = ((s_arrmul24_fa20_6_and0 >> 0) & 0x01) | ((s_arrmul24_fa20_6_and1 >> 0) & 0x01);
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s_arrmul24_and21_6 = ((a >> 21) & 0x01) & ((b >> 6) & 0x01);
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s_arrmul24_fa21_6_xor0 = ((s_arrmul24_and21_6 >> 0) & 0x01) ^ ((s_arrmul24_fa22_5_xor1 >> 0) & 0x01);
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s_arrmul24_fa21_6_and0 = ((s_arrmul24_and21_6 >> 0) & 0x01) & ((s_arrmul24_fa22_5_xor1 >> 0) & 0x01);
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s_arrmul24_fa21_6_xor1 = ((s_arrmul24_fa21_6_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa20_6_or0 >> 0) & 0x01);
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s_arrmul24_fa21_6_and1 = ((s_arrmul24_fa21_6_xor0 >> 0) & 0x01) & ((s_arrmul24_fa20_6_or0 >> 0) & 0x01);
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s_arrmul24_fa21_6_or0 = ((s_arrmul24_fa21_6_and0 >> 0) & 0x01) | ((s_arrmul24_fa21_6_and1 >> 0) & 0x01);
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s_arrmul24_and22_6 = ((a >> 22) & 0x01) & ((b >> 6) & 0x01);
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s_arrmul24_fa22_6_xor0 = ((s_arrmul24_and22_6 >> 0) & 0x01) ^ ((s_arrmul24_fa23_5_xor1 >> 0) & 0x01);
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s_arrmul24_fa22_6_and0 = ((s_arrmul24_and22_6 >> 0) & 0x01) & ((s_arrmul24_fa23_5_xor1 >> 0) & 0x01);
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s_arrmul24_fa22_6_xor1 = ((s_arrmul24_fa22_6_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa21_6_or0 >> 0) & 0x01);
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s_arrmul24_fa22_6_and1 = ((s_arrmul24_fa22_6_xor0 >> 0) & 0x01) & ((s_arrmul24_fa21_6_or0 >> 0) & 0x01);
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s_arrmul24_fa22_6_or0 = ((s_arrmul24_fa22_6_and0 >> 0) & 0x01) | ((s_arrmul24_fa22_6_and1 >> 0) & 0x01);
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s_arrmul24_nand23_6 = ~(((a >> 23) & 0x01) & ((b >> 6) & 0x01)) & 0x01;
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s_arrmul24_fa23_6_xor0 = ((s_arrmul24_nand23_6 >> 0) & 0x01) ^ ((s_arrmul24_fa23_5_or0 >> 0) & 0x01);
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s_arrmul24_fa23_6_and0 = ((s_arrmul24_nand23_6 >> 0) & 0x01) & ((s_arrmul24_fa23_5_or0 >> 0) & 0x01);
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s_arrmul24_fa23_6_xor1 = ((s_arrmul24_fa23_6_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa22_6_or0 >> 0) & 0x01);
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s_arrmul24_fa23_6_and1 = ((s_arrmul24_fa23_6_xor0 >> 0) & 0x01) & ((s_arrmul24_fa22_6_or0 >> 0) & 0x01);
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s_arrmul24_fa23_6_or0 = ((s_arrmul24_fa23_6_and0 >> 0) & 0x01) | ((s_arrmul24_fa23_6_and1 >> 0) & 0x01);
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s_arrmul24_and0_7 = ((a >> 0) & 0x01) & ((b >> 7) & 0x01);
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s_arrmul24_ha0_7_xor0 = ((s_arrmul24_and0_7 >> 0) & 0x01) ^ ((s_arrmul24_fa1_6_xor1 >> 0) & 0x01);
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s_arrmul24_ha0_7_and0 = ((s_arrmul24_and0_7 >> 0) & 0x01) & ((s_arrmul24_fa1_6_xor1 >> 0) & 0x01);
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s_arrmul24_and1_7 = ((a >> 1) & 0x01) & ((b >> 7) & 0x01);
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s_arrmul24_fa1_7_xor0 = ((s_arrmul24_and1_7 >> 0) & 0x01) ^ ((s_arrmul24_fa2_6_xor1 >> 0) & 0x01);
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s_arrmul24_fa1_7_and0 = ((s_arrmul24_and1_7 >> 0) & 0x01) & ((s_arrmul24_fa2_6_xor1 >> 0) & 0x01);
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s_arrmul24_fa1_7_xor1 = ((s_arrmul24_fa1_7_xor0 >> 0) & 0x01) ^ ((s_arrmul24_ha0_7_and0 >> 0) & 0x01);
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s_arrmul24_fa1_7_and1 = ((s_arrmul24_fa1_7_xor0 >> 0) & 0x01) & ((s_arrmul24_ha0_7_and0 >> 0) & 0x01);
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s_arrmul24_fa1_7_or0 = ((s_arrmul24_fa1_7_and0 >> 0) & 0x01) | ((s_arrmul24_fa1_7_and1 >> 0) & 0x01);
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s_arrmul24_and2_7 = ((a >> 2) & 0x01) & ((b >> 7) & 0x01);
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s_arrmul24_fa2_7_xor0 = ((s_arrmul24_and2_7 >> 0) & 0x01) ^ ((s_arrmul24_fa3_6_xor1 >> 0) & 0x01);
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s_arrmul24_fa2_7_and0 = ((s_arrmul24_and2_7 >> 0) & 0x01) & ((s_arrmul24_fa3_6_xor1 >> 0) & 0x01);
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s_arrmul24_fa2_7_xor1 = ((s_arrmul24_fa2_7_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa1_7_or0 >> 0) & 0x01);
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s_arrmul24_fa2_7_and1 = ((s_arrmul24_fa2_7_xor0 >> 0) & 0x01) & ((s_arrmul24_fa1_7_or0 >> 0) & 0x01);
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s_arrmul24_fa2_7_or0 = ((s_arrmul24_fa2_7_and0 >> 0) & 0x01) | ((s_arrmul24_fa2_7_and1 >> 0) & 0x01);
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s_arrmul24_and3_7 = ((a >> 3) & 0x01) & ((b >> 7) & 0x01);
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s_arrmul24_fa3_7_xor0 = ((s_arrmul24_and3_7 >> 0) & 0x01) ^ ((s_arrmul24_fa4_6_xor1 >> 0) & 0x01);
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s_arrmul24_fa3_7_and0 = ((s_arrmul24_and3_7 >> 0) & 0x01) & ((s_arrmul24_fa4_6_xor1 >> 0) & 0x01);
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s_arrmul24_fa3_7_xor1 = ((s_arrmul24_fa3_7_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa2_7_or0 >> 0) & 0x01);
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s_arrmul24_fa3_7_and1 = ((s_arrmul24_fa3_7_xor0 >> 0) & 0x01) & ((s_arrmul24_fa2_7_or0 >> 0) & 0x01);
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s_arrmul24_fa3_7_or0 = ((s_arrmul24_fa3_7_and0 >> 0) & 0x01) | ((s_arrmul24_fa3_7_and1 >> 0) & 0x01);
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s_arrmul24_and4_7 = ((a >> 4) & 0x01) & ((b >> 7) & 0x01);
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s_arrmul24_fa4_7_xor0 = ((s_arrmul24_and4_7 >> 0) & 0x01) ^ ((s_arrmul24_fa5_6_xor1 >> 0) & 0x01);
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s_arrmul24_fa4_7_and0 = ((s_arrmul24_and4_7 >> 0) & 0x01) & ((s_arrmul24_fa5_6_xor1 >> 0) & 0x01);
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s_arrmul24_fa4_7_xor1 = ((s_arrmul24_fa4_7_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa3_7_or0 >> 0) & 0x01);
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s_arrmul24_fa4_7_and1 = ((s_arrmul24_fa4_7_xor0 >> 0) & 0x01) & ((s_arrmul24_fa3_7_or0 >> 0) & 0x01);
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s_arrmul24_fa4_7_or0 = ((s_arrmul24_fa4_7_and0 >> 0) & 0x01) | ((s_arrmul24_fa4_7_and1 >> 0) & 0x01);
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s_arrmul24_and5_7 = ((a >> 5) & 0x01) & ((b >> 7) & 0x01);
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s_arrmul24_fa5_7_xor0 = ((s_arrmul24_and5_7 >> 0) & 0x01) ^ ((s_arrmul24_fa6_6_xor1 >> 0) & 0x01);
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s_arrmul24_fa5_7_and0 = ((s_arrmul24_and5_7 >> 0) & 0x01) & ((s_arrmul24_fa6_6_xor1 >> 0) & 0x01);
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s_arrmul24_fa5_7_xor1 = ((s_arrmul24_fa5_7_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa4_7_or0 >> 0) & 0x01);
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s_arrmul24_fa5_7_and1 = ((s_arrmul24_fa5_7_xor0 >> 0) & 0x01) & ((s_arrmul24_fa4_7_or0 >> 0) & 0x01);
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s_arrmul24_fa5_7_or0 = ((s_arrmul24_fa5_7_and0 >> 0) & 0x01) | ((s_arrmul24_fa5_7_and1 >> 0) & 0x01);
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s_arrmul24_and6_7 = ((a >> 6) & 0x01) & ((b >> 7) & 0x01);
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s_arrmul24_fa6_7_xor0 = ((s_arrmul24_and6_7 >> 0) & 0x01) ^ ((s_arrmul24_fa7_6_xor1 >> 0) & 0x01);
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s_arrmul24_fa6_7_and0 = ((s_arrmul24_and6_7 >> 0) & 0x01) & ((s_arrmul24_fa7_6_xor1 >> 0) & 0x01);
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s_arrmul24_fa6_7_xor1 = ((s_arrmul24_fa6_7_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa5_7_or0 >> 0) & 0x01);
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s_arrmul24_fa6_7_and1 = ((s_arrmul24_fa6_7_xor0 >> 0) & 0x01) & ((s_arrmul24_fa5_7_or0 >> 0) & 0x01);
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s_arrmul24_fa6_7_or0 = ((s_arrmul24_fa6_7_and0 >> 0) & 0x01) | ((s_arrmul24_fa6_7_and1 >> 0) & 0x01);
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s_arrmul24_and7_7 = ((a >> 7) & 0x01) & ((b >> 7) & 0x01);
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s_arrmul24_fa7_7_xor0 = ((s_arrmul24_and7_7 >> 0) & 0x01) ^ ((s_arrmul24_fa8_6_xor1 >> 0) & 0x01);
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s_arrmul24_fa7_7_and0 = ((s_arrmul24_and7_7 >> 0) & 0x01) & ((s_arrmul24_fa8_6_xor1 >> 0) & 0x01);
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s_arrmul24_fa7_7_xor1 = ((s_arrmul24_fa7_7_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa6_7_or0 >> 0) & 0x01);
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s_arrmul24_fa7_7_and1 = ((s_arrmul24_fa7_7_xor0 >> 0) & 0x01) & ((s_arrmul24_fa6_7_or0 >> 0) & 0x01);
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s_arrmul24_fa7_7_or0 = ((s_arrmul24_fa7_7_and0 >> 0) & 0x01) | ((s_arrmul24_fa7_7_and1 >> 0) & 0x01);
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s_arrmul24_and8_7 = ((a >> 8) & 0x01) & ((b >> 7) & 0x01);
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s_arrmul24_fa8_7_xor0 = ((s_arrmul24_and8_7 >> 0) & 0x01) ^ ((s_arrmul24_fa9_6_xor1 >> 0) & 0x01);
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s_arrmul24_fa8_7_and0 = ((s_arrmul24_and8_7 >> 0) & 0x01) & ((s_arrmul24_fa9_6_xor1 >> 0) & 0x01);
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s_arrmul24_fa8_7_xor1 = ((s_arrmul24_fa8_7_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa7_7_or0 >> 0) & 0x01);
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s_arrmul24_fa8_7_and1 = ((s_arrmul24_fa8_7_xor0 >> 0) & 0x01) & ((s_arrmul24_fa7_7_or0 >> 0) & 0x01);
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s_arrmul24_fa8_7_or0 = ((s_arrmul24_fa8_7_and0 >> 0) & 0x01) | ((s_arrmul24_fa8_7_and1 >> 0) & 0x01);
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s_arrmul24_and9_7 = ((a >> 9) & 0x01) & ((b >> 7) & 0x01);
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s_arrmul24_fa9_7_xor0 = ((s_arrmul24_and9_7 >> 0) & 0x01) ^ ((s_arrmul24_fa10_6_xor1 >> 0) & 0x01);
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s_arrmul24_fa9_7_and0 = ((s_arrmul24_and9_7 >> 0) & 0x01) & ((s_arrmul24_fa10_6_xor1 >> 0) & 0x01);
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s_arrmul24_fa9_7_xor1 = ((s_arrmul24_fa9_7_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa8_7_or0 >> 0) & 0x01);
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s_arrmul24_fa9_7_and1 = ((s_arrmul24_fa9_7_xor0 >> 0) & 0x01) & ((s_arrmul24_fa8_7_or0 >> 0) & 0x01);
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s_arrmul24_fa9_7_or0 = ((s_arrmul24_fa9_7_and0 >> 0) & 0x01) | ((s_arrmul24_fa9_7_and1 >> 0) & 0x01);
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s_arrmul24_and10_7 = ((a >> 10) & 0x01) & ((b >> 7) & 0x01);
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s_arrmul24_fa10_7_xor0 = ((s_arrmul24_and10_7 >> 0) & 0x01) ^ ((s_arrmul24_fa11_6_xor1 >> 0) & 0x01);
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s_arrmul24_fa10_7_and0 = ((s_arrmul24_and10_7 >> 0) & 0x01) & ((s_arrmul24_fa11_6_xor1 >> 0) & 0x01);
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s_arrmul24_fa10_7_xor1 = ((s_arrmul24_fa10_7_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa9_7_or0 >> 0) & 0x01);
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s_arrmul24_fa10_7_and1 = ((s_arrmul24_fa10_7_xor0 >> 0) & 0x01) & ((s_arrmul24_fa9_7_or0 >> 0) & 0x01);
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s_arrmul24_fa10_7_or0 = ((s_arrmul24_fa10_7_and0 >> 0) & 0x01) | ((s_arrmul24_fa10_7_and1 >> 0) & 0x01);
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s_arrmul24_and11_7 = ((a >> 11) & 0x01) & ((b >> 7) & 0x01);
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s_arrmul24_fa11_7_xor0 = ((s_arrmul24_and11_7 >> 0) & 0x01) ^ ((s_arrmul24_fa12_6_xor1 >> 0) & 0x01);
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s_arrmul24_fa11_7_and0 = ((s_arrmul24_and11_7 >> 0) & 0x01) & ((s_arrmul24_fa12_6_xor1 >> 0) & 0x01);
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s_arrmul24_fa11_7_xor1 = ((s_arrmul24_fa11_7_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa10_7_or0 >> 0) & 0x01);
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s_arrmul24_fa11_7_and1 = ((s_arrmul24_fa11_7_xor0 >> 0) & 0x01) & ((s_arrmul24_fa10_7_or0 >> 0) & 0x01);
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s_arrmul24_fa11_7_or0 = ((s_arrmul24_fa11_7_and0 >> 0) & 0x01) | ((s_arrmul24_fa11_7_and1 >> 0) & 0x01);
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s_arrmul24_and12_7 = ((a >> 12) & 0x01) & ((b >> 7) & 0x01);
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s_arrmul24_fa12_7_xor0 = ((s_arrmul24_and12_7 >> 0) & 0x01) ^ ((s_arrmul24_fa13_6_xor1 >> 0) & 0x01);
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s_arrmul24_fa12_7_and0 = ((s_arrmul24_and12_7 >> 0) & 0x01) & ((s_arrmul24_fa13_6_xor1 >> 0) & 0x01);
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s_arrmul24_fa12_7_xor1 = ((s_arrmul24_fa12_7_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa11_7_or0 >> 0) & 0x01);
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s_arrmul24_fa12_7_and1 = ((s_arrmul24_fa12_7_xor0 >> 0) & 0x01) & ((s_arrmul24_fa11_7_or0 >> 0) & 0x01);
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s_arrmul24_fa12_7_or0 = ((s_arrmul24_fa12_7_and0 >> 0) & 0x01) | ((s_arrmul24_fa12_7_and1 >> 0) & 0x01);
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s_arrmul24_and13_7 = ((a >> 13) & 0x01) & ((b >> 7) & 0x01);
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s_arrmul24_fa13_7_xor0 = ((s_arrmul24_and13_7 >> 0) & 0x01) ^ ((s_arrmul24_fa14_6_xor1 >> 0) & 0x01);
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s_arrmul24_fa13_7_and0 = ((s_arrmul24_and13_7 >> 0) & 0x01) & ((s_arrmul24_fa14_6_xor1 >> 0) & 0x01);
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s_arrmul24_fa13_7_xor1 = ((s_arrmul24_fa13_7_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa12_7_or0 >> 0) & 0x01);
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s_arrmul24_fa13_7_and1 = ((s_arrmul24_fa13_7_xor0 >> 0) & 0x01) & ((s_arrmul24_fa12_7_or0 >> 0) & 0x01);
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s_arrmul24_fa13_7_or0 = ((s_arrmul24_fa13_7_and0 >> 0) & 0x01) | ((s_arrmul24_fa13_7_and1 >> 0) & 0x01);
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s_arrmul24_and14_7 = ((a >> 14) & 0x01) & ((b >> 7) & 0x01);
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s_arrmul24_fa14_7_xor0 = ((s_arrmul24_and14_7 >> 0) & 0x01) ^ ((s_arrmul24_fa15_6_xor1 >> 0) & 0x01);
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s_arrmul24_fa14_7_and0 = ((s_arrmul24_and14_7 >> 0) & 0x01) & ((s_arrmul24_fa15_6_xor1 >> 0) & 0x01);
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s_arrmul24_fa14_7_xor1 = ((s_arrmul24_fa14_7_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa13_7_or0 >> 0) & 0x01);
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s_arrmul24_fa14_7_and1 = ((s_arrmul24_fa14_7_xor0 >> 0) & 0x01) & ((s_arrmul24_fa13_7_or0 >> 0) & 0x01);
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s_arrmul24_fa14_7_or0 = ((s_arrmul24_fa14_7_and0 >> 0) & 0x01) | ((s_arrmul24_fa14_7_and1 >> 0) & 0x01);
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s_arrmul24_and15_7 = ((a >> 15) & 0x01) & ((b >> 7) & 0x01);
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s_arrmul24_fa15_7_xor0 = ((s_arrmul24_and15_7 >> 0) & 0x01) ^ ((s_arrmul24_fa16_6_xor1 >> 0) & 0x01);
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s_arrmul24_fa15_7_and0 = ((s_arrmul24_and15_7 >> 0) & 0x01) & ((s_arrmul24_fa16_6_xor1 >> 0) & 0x01);
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s_arrmul24_fa15_7_xor1 = ((s_arrmul24_fa15_7_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa14_7_or0 >> 0) & 0x01);
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s_arrmul24_fa15_7_and1 = ((s_arrmul24_fa15_7_xor0 >> 0) & 0x01) & ((s_arrmul24_fa14_7_or0 >> 0) & 0x01);
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s_arrmul24_fa15_7_or0 = ((s_arrmul24_fa15_7_and0 >> 0) & 0x01) | ((s_arrmul24_fa15_7_and1 >> 0) & 0x01);
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s_arrmul24_and16_7 = ((a >> 16) & 0x01) & ((b >> 7) & 0x01);
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s_arrmul24_fa16_7_xor0 = ((s_arrmul24_and16_7 >> 0) & 0x01) ^ ((s_arrmul24_fa17_6_xor1 >> 0) & 0x01);
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s_arrmul24_fa16_7_and0 = ((s_arrmul24_and16_7 >> 0) & 0x01) & ((s_arrmul24_fa17_6_xor1 >> 0) & 0x01);
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s_arrmul24_fa16_7_xor1 = ((s_arrmul24_fa16_7_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa15_7_or0 >> 0) & 0x01);
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s_arrmul24_fa16_7_and1 = ((s_arrmul24_fa16_7_xor0 >> 0) & 0x01) & ((s_arrmul24_fa15_7_or0 >> 0) & 0x01);
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s_arrmul24_fa16_7_or0 = ((s_arrmul24_fa16_7_and0 >> 0) & 0x01) | ((s_arrmul24_fa16_7_and1 >> 0) & 0x01);
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s_arrmul24_and17_7 = ((a >> 17) & 0x01) & ((b >> 7) & 0x01);
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s_arrmul24_fa17_7_xor0 = ((s_arrmul24_and17_7 >> 0) & 0x01) ^ ((s_arrmul24_fa18_6_xor1 >> 0) & 0x01);
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s_arrmul24_fa17_7_and0 = ((s_arrmul24_and17_7 >> 0) & 0x01) & ((s_arrmul24_fa18_6_xor1 >> 0) & 0x01);
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s_arrmul24_fa17_7_xor1 = ((s_arrmul24_fa17_7_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa16_7_or0 >> 0) & 0x01);
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s_arrmul24_fa17_7_and1 = ((s_arrmul24_fa17_7_xor0 >> 0) & 0x01) & ((s_arrmul24_fa16_7_or0 >> 0) & 0x01);
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s_arrmul24_fa17_7_or0 = ((s_arrmul24_fa17_7_and0 >> 0) & 0x01) | ((s_arrmul24_fa17_7_and1 >> 0) & 0x01);
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s_arrmul24_and18_7 = ((a >> 18) & 0x01) & ((b >> 7) & 0x01);
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s_arrmul24_fa18_7_xor0 = ((s_arrmul24_and18_7 >> 0) & 0x01) ^ ((s_arrmul24_fa19_6_xor1 >> 0) & 0x01);
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s_arrmul24_fa18_7_and0 = ((s_arrmul24_and18_7 >> 0) & 0x01) & ((s_arrmul24_fa19_6_xor1 >> 0) & 0x01);
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s_arrmul24_fa18_7_xor1 = ((s_arrmul24_fa18_7_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa17_7_or0 >> 0) & 0x01);
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s_arrmul24_fa18_7_and1 = ((s_arrmul24_fa18_7_xor0 >> 0) & 0x01) & ((s_arrmul24_fa17_7_or0 >> 0) & 0x01);
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s_arrmul24_fa18_7_or0 = ((s_arrmul24_fa18_7_and0 >> 0) & 0x01) | ((s_arrmul24_fa18_7_and1 >> 0) & 0x01);
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s_arrmul24_and19_7 = ((a >> 19) & 0x01) & ((b >> 7) & 0x01);
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s_arrmul24_fa19_7_xor0 = ((s_arrmul24_and19_7 >> 0) & 0x01) ^ ((s_arrmul24_fa20_6_xor1 >> 0) & 0x01);
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s_arrmul24_fa19_7_and0 = ((s_arrmul24_and19_7 >> 0) & 0x01) & ((s_arrmul24_fa20_6_xor1 >> 0) & 0x01);
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s_arrmul24_fa19_7_xor1 = ((s_arrmul24_fa19_7_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa18_7_or0 >> 0) & 0x01);
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s_arrmul24_fa19_7_and1 = ((s_arrmul24_fa19_7_xor0 >> 0) & 0x01) & ((s_arrmul24_fa18_7_or0 >> 0) & 0x01);
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s_arrmul24_fa19_7_or0 = ((s_arrmul24_fa19_7_and0 >> 0) & 0x01) | ((s_arrmul24_fa19_7_and1 >> 0) & 0x01);
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s_arrmul24_and20_7 = ((a >> 20) & 0x01) & ((b >> 7) & 0x01);
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s_arrmul24_fa20_7_xor0 = ((s_arrmul24_and20_7 >> 0) & 0x01) ^ ((s_arrmul24_fa21_6_xor1 >> 0) & 0x01);
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s_arrmul24_fa20_7_and0 = ((s_arrmul24_and20_7 >> 0) & 0x01) & ((s_arrmul24_fa21_6_xor1 >> 0) & 0x01);
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s_arrmul24_fa20_7_xor1 = ((s_arrmul24_fa20_7_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa19_7_or0 >> 0) & 0x01);
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s_arrmul24_fa20_7_and1 = ((s_arrmul24_fa20_7_xor0 >> 0) & 0x01) & ((s_arrmul24_fa19_7_or0 >> 0) & 0x01);
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s_arrmul24_fa20_7_or0 = ((s_arrmul24_fa20_7_and0 >> 0) & 0x01) | ((s_arrmul24_fa20_7_and1 >> 0) & 0x01);
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s_arrmul24_and21_7 = ((a >> 21) & 0x01) & ((b >> 7) & 0x01);
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s_arrmul24_fa21_7_xor0 = ((s_arrmul24_and21_7 >> 0) & 0x01) ^ ((s_arrmul24_fa22_6_xor1 >> 0) & 0x01);
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s_arrmul24_fa21_7_and0 = ((s_arrmul24_and21_7 >> 0) & 0x01) & ((s_arrmul24_fa22_6_xor1 >> 0) & 0x01);
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s_arrmul24_fa21_7_xor1 = ((s_arrmul24_fa21_7_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa20_7_or0 >> 0) & 0x01);
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s_arrmul24_fa21_7_and1 = ((s_arrmul24_fa21_7_xor0 >> 0) & 0x01) & ((s_arrmul24_fa20_7_or0 >> 0) & 0x01);
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s_arrmul24_fa21_7_or0 = ((s_arrmul24_fa21_7_and0 >> 0) & 0x01) | ((s_arrmul24_fa21_7_and1 >> 0) & 0x01);
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s_arrmul24_and22_7 = ((a >> 22) & 0x01) & ((b >> 7) & 0x01);
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s_arrmul24_fa22_7_xor0 = ((s_arrmul24_and22_7 >> 0) & 0x01) ^ ((s_arrmul24_fa23_6_xor1 >> 0) & 0x01);
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s_arrmul24_fa22_7_and0 = ((s_arrmul24_and22_7 >> 0) & 0x01) & ((s_arrmul24_fa23_6_xor1 >> 0) & 0x01);
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s_arrmul24_fa22_7_xor1 = ((s_arrmul24_fa22_7_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa21_7_or0 >> 0) & 0x01);
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s_arrmul24_fa22_7_and1 = ((s_arrmul24_fa22_7_xor0 >> 0) & 0x01) & ((s_arrmul24_fa21_7_or0 >> 0) & 0x01);
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s_arrmul24_fa22_7_or0 = ((s_arrmul24_fa22_7_and0 >> 0) & 0x01) | ((s_arrmul24_fa22_7_and1 >> 0) & 0x01);
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s_arrmul24_nand23_7 = ~(((a >> 23) & 0x01) & ((b >> 7) & 0x01)) & 0x01;
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s_arrmul24_fa23_7_xor0 = ((s_arrmul24_nand23_7 >> 0) & 0x01) ^ ((s_arrmul24_fa23_6_or0 >> 0) & 0x01);
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s_arrmul24_fa23_7_and0 = ((s_arrmul24_nand23_7 >> 0) & 0x01) & ((s_arrmul24_fa23_6_or0 >> 0) & 0x01);
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s_arrmul24_fa23_7_xor1 = ((s_arrmul24_fa23_7_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa22_7_or0 >> 0) & 0x01);
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s_arrmul24_fa23_7_and1 = ((s_arrmul24_fa23_7_xor0 >> 0) & 0x01) & ((s_arrmul24_fa22_7_or0 >> 0) & 0x01);
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s_arrmul24_fa23_7_or0 = ((s_arrmul24_fa23_7_and0 >> 0) & 0x01) | ((s_arrmul24_fa23_7_and1 >> 0) & 0x01);
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s_arrmul24_and0_8 = ((a >> 0) & 0x01) & ((b >> 8) & 0x01);
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s_arrmul24_ha0_8_xor0 = ((s_arrmul24_and0_8 >> 0) & 0x01) ^ ((s_arrmul24_fa1_7_xor1 >> 0) & 0x01);
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s_arrmul24_ha0_8_and0 = ((s_arrmul24_and0_8 >> 0) & 0x01) & ((s_arrmul24_fa1_7_xor1 >> 0) & 0x01);
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s_arrmul24_and1_8 = ((a >> 1) & 0x01) & ((b >> 8) & 0x01);
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s_arrmul24_fa1_8_xor0 = ((s_arrmul24_and1_8 >> 0) & 0x01) ^ ((s_arrmul24_fa2_7_xor1 >> 0) & 0x01);
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s_arrmul24_fa1_8_and0 = ((s_arrmul24_and1_8 >> 0) & 0x01) & ((s_arrmul24_fa2_7_xor1 >> 0) & 0x01);
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s_arrmul24_fa1_8_xor1 = ((s_arrmul24_fa1_8_xor0 >> 0) & 0x01) ^ ((s_arrmul24_ha0_8_and0 >> 0) & 0x01);
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s_arrmul24_fa1_8_and1 = ((s_arrmul24_fa1_8_xor0 >> 0) & 0x01) & ((s_arrmul24_ha0_8_and0 >> 0) & 0x01);
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s_arrmul24_fa1_8_or0 = ((s_arrmul24_fa1_8_and0 >> 0) & 0x01) | ((s_arrmul24_fa1_8_and1 >> 0) & 0x01);
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s_arrmul24_and2_8 = ((a >> 2) & 0x01) & ((b >> 8) & 0x01);
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s_arrmul24_fa2_8_xor0 = ((s_arrmul24_and2_8 >> 0) & 0x01) ^ ((s_arrmul24_fa3_7_xor1 >> 0) & 0x01);
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s_arrmul24_fa2_8_and0 = ((s_arrmul24_and2_8 >> 0) & 0x01) & ((s_arrmul24_fa3_7_xor1 >> 0) & 0x01);
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s_arrmul24_fa2_8_xor1 = ((s_arrmul24_fa2_8_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa1_8_or0 >> 0) & 0x01);
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s_arrmul24_fa2_8_and1 = ((s_arrmul24_fa2_8_xor0 >> 0) & 0x01) & ((s_arrmul24_fa1_8_or0 >> 0) & 0x01);
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s_arrmul24_fa2_8_or0 = ((s_arrmul24_fa2_8_and0 >> 0) & 0x01) | ((s_arrmul24_fa2_8_and1 >> 0) & 0x01);
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s_arrmul24_and3_8 = ((a >> 3) & 0x01) & ((b >> 8) & 0x01);
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s_arrmul24_fa3_8_xor0 = ((s_arrmul24_and3_8 >> 0) & 0x01) ^ ((s_arrmul24_fa4_7_xor1 >> 0) & 0x01);
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s_arrmul24_fa3_8_and0 = ((s_arrmul24_and3_8 >> 0) & 0x01) & ((s_arrmul24_fa4_7_xor1 >> 0) & 0x01);
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s_arrmul24_fa3_8_xor1 = ((s_arrmul24_fa3_8_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa2_8_or0 >> 0) & 0x01);
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s_arrmul24_fa3_8_and1 = ((s_arrmul24_fa3_8_xor0 >> 0) & 0x01) & ((s_arrmul24_fa2_8_or0 >> 0) & 0x01);
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s_arrmul24_fa3_8_or0 = ((s_arrmul24_fa3_8_and0 >> 0) & 0x01) | ((s_arrmul24_fa3_8_and1 >> 0) & 0x01);
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s_arrmul24_and4_8 = ((a >> 4) & 0x01) & ((b >> 8) & 0x01);
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s_arrmul24_fa4_8_xor0 = ((s_arrmul24_and4_8 >> 0) & 0x01) ^ ((s_arrmul24_fa5_7_xor1 >> 0) & 0x01);
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s_arrmul24_fa4_8_and0 = ((s_arrmul24_and4_8 >> 0) & 0x01) & ((s_arrmul24_fa5_7_xor1 >> 0) & 0x01);
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s_arrmul24_fa4_8_xor1 = ((s_arrmul24_fa4_8_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa3_8_or0 >> 0) & 0x01);
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s_arrmul24_fa4_8_and1 = ((s_arrmul24_fa4_8_xor0 >> 0) & 0x01) & ((s_arrmul24_fa3_8_or0 >> 0) & 0x01);
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s_arrmul24_fa4_8_or0 = ((s_arrmul24_fa4_8_and0 >> 0) & 0x01) | ((s_arrmul24_fa4_8_and1 >> 0) & 0x01);
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s_arrmul24_and5_8 = ((a >> 5) & 0x01) & ((b >> 8) & 0x01);
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s_arrmul24_fa5_8_xor0 = ((s_arrmul24_and5_8 >> 0) & 0x01) ^ ((s_arrmul24_fa6_7_xor1 >> 0) & 0x01);
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s_arrmul24_fa5_8_and0 = ((s_arrmul24_and5_8 >> 0) & 0x01) & ((s_arrmul24_fa6_7_xor1 >> 0) & 0x01);
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s_arrmul24_fa5_8_xor1 = ((s_arrmul24_fa5_8_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa4_8_or0 >> 0) & 0x01);
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s_arrmul24_fa5_8_and1 = ((s_arrmul24_fa5_8_xor0 >> 0) & 0x01) & ((s_arrmul24_fa4_8_or0 >> 0) & 0x01);
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s_arrmul24_fa5_8_or0 = ((s_arrmul24_fa5_8_and0 >> 0) & 0x01) | ((s_arrmul24_fa5_8_and1 >> 0) & 0x01);
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s_arrmul24_and6_8 = ((a >> 6) & 0x01) & ((b >> 8) & 0x01);
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s_arrmul24_fa6_8_xor0 = ((s_arrmul24_and6_8 >> 0) & 0x01) ^ ((s_arrmul24_fa7_7_xor1 >> 0) & 0x01);
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s_arrmul24_fa6_8_and0 = ((s_arrmul24_and6_8 >> 0) & 0x01) & ((s_arrmul24_fa7_7_xor1 >> 0) & 0x01);
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s_arrmul24_fa6_8_xor1 = ((s_arrmul24_fa6_8_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa5_8_or0 >> 0) & 0x01);
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s_arrmul24_fa6_8_and1 = ((s_arrmul24_fa6_8_xor0 >> 0) & 0x01) & ((s_arrmul24_fa5_8_or0 >> 0) & 0x01);
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s_arrmul24_fa6_8_or0 = ((s_arrmul24_fa6_8_and0 >> 0) & 0x01) | ((s_arrmul24_fa6_8_and1 >> 0) & 0x01);
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s_arrmul24_and7_8 = ((a >> 7) & 0x01) & ((b >> 8) & 0x01);
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s_arrmul24_fa7_8_xor0 = ((s_arrmul24_and7_8 >> 0) & 0x01) ^ ((s_arrmul24_fa8_7_xor1 >> 0) & 0x01);
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s_arrmul24_fa7_8_and0 = ((s_arrmul24_and7_8 >> 0) & 0x01) & ((s_arrmul24_fa8_7_xor1 >> 0) & 0x01);
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s_arrmul24_fa7_8_xor1 = ((s_arrmul24_fa7_8_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa6_8_or0 >> 0) & 0x01);
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s_arrmul24_fa7_8_and1 = ((s_arrmul24_fa7_8_xor0 >> 0) & 0x01) & ((s_arrmul24_fa6_8_or0 >> 0) & 0x01);
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s_arrmul24_fa7_8_or0 = ((s_arrmul24_fa7_8_and0 >> 0) & 0x01) | ((s_arrmul24_fa7_8_and1 >> 0) & 0x01);
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s_arrmul24_and8_8 = ((a >> 8) & 0x01) & ((b >> 8) & 0x01);
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s_arrmul24_fa8_8_xor0 = ((s_arrmul24_and8_8 >> 0) & 0x01) ^ ((s_arrmul24_fa9_7_xor1 >> 0) & 0x01);
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s_arrmul24_fa8_8_and0 = ((s_arrmul24_and8_8 >> 0) & 0x01) & ((s_arrmul24_fa9_7_xor1 >> 0) & 0x01);
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s_arrmul24_fa8_8_xor1 = ((s_arrmul24_fa8_8_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa7_8_or0 >> 0) & 0x01);
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s_arrmul24_fa8_8_and1 = ((s_arrmul24_fa8_8_xor0 >> 0) & 0x01) & ((s_arrmul24_fa7_8_or0 >> 0) & 0x01);
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s_arrmul24_fa8_8_or0 = ((s_arrmul24_fa8_8_and0 >> 0) & 0x01) | ((s_arrmul24_fa8_8_and1 >> 0) & 0x01);
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s_arrmul24_and9_8 = ((a >> 9) & 0x01) & ((b >> 8) & 0x01);
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s_arrmul24_fa9_8_xor0 = ((s_arrmul24_and9_8 >> 0) & 0x01) ^ ((s_arrmul24_fa10_7_xor1 >> 0) & 0x01);
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s_arrmul24_fa9_8_and0 = ((s_arrmul24_and9_8 >> 0) & 0x01) & ((s_arrmul24_fa10_7_xor1 >> 0) & 0x01);
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s_arrmul24_fa9_8_xor1 = ((s_arrmul24_fa9_8_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa8_8_or0 >> 0) & 0x01);
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s_arrmul24_fa9_8_and1 = ((s_arrmul24_fa9_8_xor0 >> 0) & 0x01) & ((s_arrmul24_fa8_8_or0 >> 0) & 0x01);
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s_arrmul24_fa9_8_or0 = ((s_arrmul24_fa9_8_and0 >> 0) & 0x01) | ((s_arrmul24_fa9_8_and1 >> 0) & 0x01);
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s_arrmul24_and10_8 = ((a >> 10) & 0x01) & ((b >> 8) & 0x01);
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s_arrmul24_fa10_8_xor0 = ((s_arrmul24_and10_8 >> 0) & 0x01) ^ ((s_arrmul24_fa11_7_xor1 >> 0) & 0x01);
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s_arrmul24_fa10_8_and0 = ((s_arrmul24_and10_8 >> 0) & 0x01) & ((s_arrmul24_fa11_7_xor1 >> 0) & 0x01);
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s_arrmul24_fa10_8_xor1 = ((s_arrmul24_fa10_8_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa9_8_or0 >> 0) & 0x01);
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s_arrmul24_fa10_8_and1 = ((s_arrmul24_fa10_8_xor0 >> 0) & 0x01) & ((s_arrmul24_fa9_8_or0 >> 0) & 0x01);
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s_arrmul24_fa10_8_or0 = ((s_arrmul24_fa10_8_and0 >> 0) & 0x01) | ((s_arrmul24_fa10_8_and1 >> 0) & 0x01);
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s_arrmul24_and11_8 = ((a >> 11) & 0x01) & ((b >> 8) & 0x01);
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s_arrmul24_fa11_8_xor0 = ((s_arrmul24_and11_8 >> 0) & 0x01) ^ ((s_arrmul24_fa12_7_xor1 >> 0) & 0x01);
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s_arrmul24_fa11_8_and0 = ((s_arrmul24_and11_8 >> 0) & 0x01) & ((s_arrmul24_fa12_7_xor1 >> 0) & 0x01);
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s_arrmul24_fa11_8_xor1 = ((s_arrmul24_fa11_8_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa10_8_or0 >> 0) & 0x01);
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s_arrmul24_fa11_8_and1 = ((s_arrmul24_fa11_8_xor0 >> 0) & 0x01) & ((s_arrmul24_fa10_8_or0 >> 0) & 0x01);
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s_arrmul24_fa11_8_or0 = ((s_arrmul24_fa11_8_and0 >> 0) & 0x01) | ((s_arrmul24_fa11_8_and1 >> 0) & 0x01);
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s_arrmul24_and12_8 = ((a >> 12) & 0x01) & ((b >> 8) & 0x01);
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s_arrmul24_fa12_8_xor0 = ((s_arrmul24_and12_8 >> 0) & 0x01) ^ ((s_arrmul24_fa13_7_xor1 >> 0) & 0x01);
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s_arrmul24_fa12_8_and0 = ((s_arrmul24_and12_8 >> 0) & 0x01) & ((s_arrmul24_fa13_7_xor1 >> 0) & 0x01);
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s_arrmul24_fa12_8_xor1 = ((s_arrmul24_fa12_8_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa11_8_or0 >> 0) & 0x01);
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s_arrmul24_fa12_8_and1 = ((s_arrmul24_fa12_8_xor0 >> 0) & 0x01) & ((s_arrmul24_fa11_8_or0 >> 0) & 0x01);
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s_arrmul24_fa12_8_or0 = ((s_arrmul24_fa12_8_and0 >> 0) & 0x01) | ((s_arrmul24_fa12_8_and1 >> 0) & 0x01);
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s_arrmul24_and13_8 = ((a >> 13) & 0x01) & ((b >> 8) & 0x01);
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s_arrmul24_fa13_8_xor0 = ((s_arrmul24_and13_8 >> 0) & 0x01) ^ ((s_arrmul24_fa14_7_xor1 >> 0) & 0x01);
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s_arrmul24_fa13_8_and0 = ((s_arrmul24_and13_8 >> 0) & 0x01) & ((s_arrmul24_fa14_7_xor1 >> 0) & 0x01);
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s_arrmul24_fa13_8_xor1 = ((s_arrmul24_fa13_8_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa12_8_or0 >> 0) & 0x01);
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s_arrmul24_fa13_8_and1 = ((s_arrmul24_fa13_8_xor0 >> 0) & 0x01) & ((s_arrmul24_fa12_8_or0 >> 0) & 0x01);
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s_arrmul24_fa13_8_or0 = ((s_arrmul24_fa13_8_and0 >> 0) & 0x01) | ((s_arrmul24_fa13_8_and1 >> 0) & 0x01);
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s_arrmul24_and14_8 = ((a >> 14) & 0x01) & ((b >> 8) & 0x01);
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s_arrmul24_fa14_8_xor0 = ((s_arrmul24_and14_8 >> 0) & 0x01) ^ ((s_arrmul24_fa15_7_xor1 >> 0) & 0x01);
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s_arrmul24_fa14_8_and0 = ((s_arrmul24_and14_8 >> 0) & 0x01) & ((s_arrmul24_fa15_7_xor1 >> 0) & 0x01);
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s_arrmul24_fa14_8_xor1 = ((s_arrmul24_fa14_8_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa13_8_or0 >> 0) & 0x01);
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s_arrmul24_fa14_8_and1 = ((s_arrmul24_fa14_8_xor0 >> 0) & 0x01) & ((s_arrmul24_fa13_8_or0 >> 0) & 0x01);
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s_arrmul24_fa14_8_or0 = ((s_arrmul24_fa14_8_and0 >> 0) & 0x01) | ((s_arrmul24_fa14_8_and1 >> 0) & 0x01);
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s_arrmul24_and15_8 = ((a >> 15) & 0x01) & ((b >> 8) & 0x01);
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s_arrmul24_fa15_8_xor0 = ((s_arrmul24_and15_8 >> 0) & 0x01) ^ ((s_arrmul24_fa16_7_xor1 >> 0) & 0x01);
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s_arrmul24_fa15_8_and0 = ((s_arrmul24_and15_8 >> 0) & 0x01) & ((s_arrmul24_fa16_7_xor1 >> 0) & 0x01);
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s_arrmul24_fa15_8_xor1 = ((s_arrmul24_fa15_8_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa14_8_or0 >> 0) & 0x01);
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s_arrmul24_fa15_8_and1 = ((s_arrmul24_fa15_8_xor0 >> 0) & 0x01) & ((s_arrmul24_fa14_8_or0 >> 0) & 0x01);
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s_arrmul24_fa15_8_or0 = ((s_arrmul24_fa15_8_and0 >> 0) & 0x01) | ((s_arrmul24_fa15_8_and1 >> 0) & 0x01);
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s_arrmul24_and16_8 = ((a >> 16) & 0x01) & ((b >> 8) & 0x01);
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s_arrmul24_fa16_8_xor0 = ((s_arrmul24_and16_8 >> 0) & 0x01) ^ ((s_arrmul24_fa17_7_xor1 >> 0) & 0x01);
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s_arrmul24_fa16_8_and0 = ((s_arrmul24_and16_8 >> 0) & 0x01) & ((s_arrmul24_fa17_7_xor1 >> 0) & 0x01);
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s_arrmul24_fa16_8_xor1 = ((s_arrmul24_fa16_8_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa15_8_or0 >> 0) & 0x01);
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s_arrmul24_fa16_8_and1 = ((s_arrmul24_fa16_8_xor0 >> 0) & 0x01) & ((s_arrmul24_fa15_8_or0 >> 0) & 0x01);
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s_arrmul24_fa16_8_or0 = ((s_arrmul24_fa16_8_and0 >> 0) & 0x01) | ((s_arrmul24_fa16_8_and1 >> 0) & 0x01);
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s_arrmul24_and17_8 = ((a >> 17) & 0x01) & ((b >> 8) & 0x01);
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s_arrmul24_fa17_8_xor0 = ((s_arrmul24_and17_8 >> 0) & 0x01) ^ ((s_arrmul24_fa18_7_xor1 >> 0) & 0x01);
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s_arrmul24_fa17_8_and0 = ((s_arrmul24_and17_8 >> 0) & 0x01) & ((s_arrmul24_fa18_7_xor1 >> 0) & 0x01);
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s_arrmul24_fa17_8_xor1 = ((s_arrmul24_fa17_8_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa16_8_or0 >> 0) & 0x01);
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s_arrmul24_fa17_8_and1 = ((s_arrmul24_fa17_8_xor0 >> 0) & 0x01) & ((s_arrmul24_fa16_8_or0 >> 0) & 0x01);
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s_arrmul24_fa17_8_or0 = ((s_arrmul24_fa17_8_and0 >> 0) & 0x01) | ((s_arrmul24_fa17_8_and1 >> 0) & 0x01);
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s_arrmul24_and18_8 = ((a >> 18) & 0x01) & ((b >> 8) & 0x01);
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s_arrmul24_fa18_8_xor0 = ((s_arrmul24_and18_8 >> 0) & 0x01) ^ ((s_arrmul24_fa19_7_xor1 >> 0) & 0x01);
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s_arrmul24_fa18_8_and0 = ((s_arrmul24_and18_8 >> 0) & 0x01) & ((s_arrmul24_fa19_7_xor1 >> 0) & 0x01);
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s_arrmul24_fa18_8_xor1 = ((s_arrmul24_fa18_8_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa17_8_or0 >> 0) & 0x01);
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s_arrmul24_fa18_8_and1 = ((s_arrmul24_fa18_8_xor0 >> 0) & 0x01) & ((s_arrmul24_fa17_8_or0 >> 0) & 0x01);
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s_arrmul24_fa18_8_or0 = ((s_arrmul24_fa18_8_and0 >> 0) & 0x01) | ((s_arrmul24_fa18_8_and1 >> 0) & 0x01);
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s_arrmul24_and19_8 = ((a >> 19) & 0x01) & ((b >> 8) & 0x01);
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s_arrmul24_fa19_8_xor0 = ((s_arrmul24_and19_8 >> 0) & 0x01) ^ ((s_arrmul24_fa20_7_xor1 >> 0) & 0x01);
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s_arrmul24_fa19_8_and0 = ((s_arrmul24_and19_8 >> 0) & 0x01) & ((s_arrmul24_fa20_7_xor1 >> 0) & 0x01);
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s_arrmul24_fa19_8_xor1 = ((s_arrmul24_fa19_8_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa18_8_or0 >> 0) & 0x01);
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s_arrmul24_fa19_8_and1 = ((s_arrmul24_fa19_8_xor0 >> 0) & 0x01) & ((s_arrmul24_fa18_8_or0 >> 0) & 0x01);
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s_arrmul24_fa19_8_or0 = ((s_arrmul24_fa19_8_and0 >> 0) & 0x01) | ((s_arrmul24_fa19_8_and1 >> 0) & 0x01);
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s_arrmul24_and20_8 = ((a >> 20) & 0x01) & ((b >> 8) & 0x01);
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s_arrmul24_fa20_8_xor0 = ((s_arrmul24_and20_8 >> 0) & 0x01) ^ ((s_arrmul24_fa21_7_xor1 >> 0) & 0x01);
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s_arrmul24_fa20_8_and0 = ((s_arrmul24_and20_8 >> 0) & 0x01) & ((s_arrmul24_fa21_7_xor1 >> 0) & 0x01);
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s_arrmul24_fa20_8_xor1 = ((s_arrmul24_fa20_8_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa19_8_or0 >> 0) & 0x01);
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s_arrmul24_fa20_8_and1 = ((s_arrmul24_fa20_8_xor0 >> 0) & 0x01) & ((s_arrmul24_fa19_8_or0 >> 0) & 0x01);
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s_arrmul24_fa20_8_or0 = ((s_arrmul24_fa20_8_and0 >> 0) & 0x01) | ((s_arrmul24_fa20_8_and1 >> 0) & 0x01);
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s_arrmul24_and21_8 = ((a >> 21) & 0x01) & ((b >> 8) & 0x01);
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s_arrmul24_fa21_8_xor0 = ((s_arrmul24_and21_8 >> 0) & 0x01) ^ ((s_arrmul24_fa22_7_xor1 >> 0) & 0x01);
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s_arrmul24_fa21_8_and0 = ((s_arrmul24_and21_8 >> 0) & 0x01) & ((s_arrmul24_fa22_7_xor1 >> 0) & 0x01);
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s_arrmul24_fa21_8_xor1 = ((s_arrmul24_fa21_8_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa20_8_or0 >> 0) & 0x01);
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s_arrmul24_fa21_8_and1 = ((s_arrmul24_fa21_8_xor0 >> 0) & 0x01) & ((s_arrmul24_fa20_8_or0 >> 0) & 0x01);
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s_arrmul24_fa21_8_or0 = ((s_arrmul24_fa21_8_and0 >> 0) & 0x01) | ((s_arrmul24_fa21_8_and1 >> 0) & 0x01);
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s_arrmul24_and22_8 = ((a >> 22) & 0x01) & ((b >> 8) & 0x01);
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s_arrmul24_fa22_8_xor0 = ((s_arrmul24_and22_8 >> 0) & 0x01) ^ ((s_arrmul24_fa23_7_xor1 >> 0) & 0x01);
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s_arrmul24_fa22_8_and0 = ((s_arrmul24_and22_8 >> 0) & 0x01) & ((s_arrmul24_fa23_7_xor1 >> 0) & 0x01);
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s_arrmul24_fa22_8_xor1 = ((s_arrmul24_fa22_8_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa21_8_or0 >> 0) & 0x01);
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s_arrmul24_fa22_8_and1 = ((s_arrmul24_fa22_8_xor0 >> 0) & 0x01) & ((s_arrmul24_fa21_8_or0 >> 0) & 0x01);
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s_arrmul24_fa22_8_or0 = ((s_arrmul24_fa22_8_and0 >> 0) & 0x01) | ((s_arrmul24_fa22_8_and1 >> 0) & 0x01);
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s_arrmul24_nand23_8 = ~(((a >> 23) & 0x01) & ((b >> 8) & 0x01)) & 0x01;
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s_arrmul24_fa23_8_xor0 = ((s_arrmul24_nand23_8 >> 0) & 0x01) ^ ((s_arrmul24_fa23_7_or0 >> 0) & 0x01);
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s_arrmul24_fa23_8_and0 = ((s_arrmul24_nand23_8 >> 0) & 0x01) & ((s_arrmul24_fa23_7_or0 >> 0) & 0x01);
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s_arrmul24_fa23_8_xor1 = ((s_arrmul24_fa23_8_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa22_8_or0 >> 0) & 0x01);
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s_arrmul24_fa23_8_and1 = ((s_arrmul24_fa23_8_xor0 >> 0) & 0x01) & ((s_arrmul24_fa22_8_or0 >> 0) & 0x01);
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s_arrmul24_fa23_8_or0 = ((s_arrmul24_fa23_8_and0 >> 0) & 0x01) | ((s_arrmul24_fa23_8_and1 >> 0) & 0x01);
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s_arrmul24_and0_9 = ((a >> 0) & 0x01) & ((b >> 9) & 0x01);
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s_arrmul24_ha0_9_xor0 = ((s_arrmul24_and0_9 >> 0) & 0x01) ^ ((s_arrmul24_fa1_8_xor1 >> 0) & 0x01);
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s_arrmul24_ha0_9_and0 = ((s_arrmul24_and0_9 >> 0) & 0x01) & ((s_arrmul24_fa1_8_xor1 >> 0) & 0x01);
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s_arrmul24_and1_9 = ((a >> 1) & 0x01) & ((b >> 9) & 0x01);
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s_arrmul24_fa1_9_xor0 = ((s_arrmul24_and1_9 >> 0) & 0x01) ^ ((s_arrmul24_fa2_8_xor1 >> 0) & 0x01);
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s_arrmul24_fa1_9_and0 = ((s_arrmul24_and1_9 >> 0) & 0x01) & ((s_arrmul24_fa2_8_xor1 >> 0) & 0x01);
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s_arrmul24_fa1_9_xor1 = ((s_arrmul24_fa1_9_xor0 >> 0) & 0x01) ^ ((s_arrmul24_ha0_9_and0 >> 0) & 0x01);
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s_arrmul24_fa1_9_and1 = ((s_arrmul24_fa1_9_xor0 >> 0) & 0x01) & ((s_arrmul24_ha0_9_and0 >> 0) & 0x01);
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s_arrmul24_fa1_9_or0 = ((s_arrmul24_fa1_9_and0 >> 0) & 0x01) | ((s_arrmul24_fa1_9_and1 >> 0) & 0x01);
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s_arrmul24_and2_9 = ((a >> 2) & 0x01) & ((b >> 9) & 0x01);
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s_arrmul24_fa2_9_xor0 = ((s_arrmul24_and2_9 >> 0) & 0x01) ^ ((s_arrmul24_fa3_8_xor1 >> 0) & 0x01);
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s_arrmul24_fa2_9_and0 = ((s_arrmul24_and2_9 >> 0) & 0x01) & ((s_arrmul24_fa3_8_xor1 >> 0) & 0x01);
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s_arrmul24_fa2_9_xor1 = ((s_arrmul24_fa2_9_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa1_9_or0 >> 0) & 0x01);
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s_arrmul24_fa2_9_and1 = ((s_arrmul24_fa2_9_xor0 >> 0) & 0x01) & ((s_arrmul24_fa1_9_or0 >> 0) & 0x01);
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s_arrmul24_fa2_9_or0 = ((s_arrmul24_fa2_9_and0 >> 0) & 0x01) | ((s_arrmul24_fa2_9_and1 >> 0) & 0x01);
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s_arrmul24_and3_9 = ((a >> 3) & 0x01) & ((b >> 9) & 0x01);
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s_arrmul24_fa3_9_xor0 = ((s_arrmul24_and3_9 >> 0) & 0x01) ^ ((s_arrmul24_fa4_8_xor1 >> 0) & 0x01);
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s_arrmul24_fa3_9_and0 = ((s_arrmul24_and3_9 >> 0) & 0x01) & ((s_arrmul24_fa4_8_xor1 >> 0) & 0x01);
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s_arrmul24_fa3_9_xor1 = ((s_arrmul24_fa3_9_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa2_9_or0 >> 0) & 0x01);
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s_arrmul24_fa3_9_and1 = ((s_arrmul24_fa3_9_xor0 >> 0) & 0x01) & ((s_arrmul24_fa2_9_or0 >> 0) & 0x01);
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s_arrmul24_fa3_9_or0 = ((s_arrmul24_fa3_9_and0 >> 0) & 0x01) | ((s_arrmul24_fa3_9_and1 >> 0) & 0x01);
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s_arrmul24_and4_9 = ((a >> 4) & 0x01) & ((b >> 9) & 0x01);
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s_arrmul24_fa4_9_xor0 = ((s_arrmul24_and4_9 >> 0) & 0x01) ^ ((s_arrmul24_fa5_8_xor1 >> 0) & 0x01);
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s_arrmul24_fa4_9_and0 = ((s_arrmul24_and4_9 >> 0) & 0x01) & ((s_arrmul24_fa5_8_xor1 >> 0) & 0x01);
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s_arrmul24_fa4_9_xor1 = ((s_arrmul24_fa4_9_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa3_9_or0 >> 0) & 0x01);
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s_arrmul24_fa4_9_and1 = ((s_arrmul24_fa4_9_xor0 >> 0) & 0x01) & ((s_arrmul24_fa3_9_or0 >> 0) & 0x01);
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s_arrmul24_fa4_9_or0 = ((s_arrmul24_fa4_9_and0 >> 0) & 0x01) | ((s_arrmul24_fa4_9_and1 >> 0) & 0x01);
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s_arrmul24_and5_9 = ((a >> 5) & 0x01) & ((b >> 9) & 0x01);
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s_arrmul24_fa5_9_xor0 = ((s_arrmul24_and5_9 >> 0) & 0x01) ^ ((s_arrmul24_fa6_8_xor1 >> 0) & 0x01);
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s_arrmul24_fa5_9_and0 = ((s_arrmul24_and5_9 >> 0) & 0x01) & ((s_arrmul24_fa6_8_xor1 >> 0) & 0x01);
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s_arrmul24_fa5_9_xor1 = ((s_arrmul24_fa5_9_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa4_9_or0 >> 0) & 0x01);
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s_arrmul24_fa5_9_and1 = ((s_arrmul24_fa5_9_xor0 >> 0) & 0x01) & ((s_arrmul24_fa4_9_or0 >> 0) & 0x01);
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s_arrmul24_fa5_9_or0 = ((s_arrmul24_fa5_9_and0 >> 0) & 0x01) | ((s_arrmul24_fa5_9_and1 >> 0) & 0x01);
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s_arrmul24_and6_9 = ((a >> 6) & 0x01) & ((b >> 9) & 0x01);
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s_arrmul24_fa6_9_xor0 = ((s_arrmul24_and6_9 >> 0) & 0x01) ^ ((s_arrmul24_fa7_8_xor1 >> 0) & 0x01);
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s_arrmul24_fa6_9_and0 = ((s_arrmul24_and6_9 >> 0) & 0x01) & ((s_arrmul24_fa7_8_xor1 >> 0) & 0x01);
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s_arrmul24_fa6_9_xor1 = ((s_arrmul24_fa6_9_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa5_9_or0 >> 0) & 0x01);
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s_arrmul24_fa6_9_and1 = ((s_arrmul24_fa6_9_xor0 >> 0) & 0x01) & ((s_arrmul24_fa5_9_or0 >> 0) & 0x01);
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s_arrmul24_fa6_9_or0 = ((s_arrmul24_fa6_9_and0 >> 0) & 0x01) | ((s_arrmul24_fa6_9_and1 >> 0) & 0x01);
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s_arrmul24_and7_9 = ((a >> 7) & 0x01) & ((b >> 9) & 0x01);
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s_arrmul24_fa7_9_xor0 = ((s_arrmul24_and7_9 >> 0) & 0x01) ^ ((s_arrmul24_fa8_8_xor1 >> 0) & 0x01);
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s_arrmul24_fa7_9_and0 = ((s_arrmul24_and7_9 >> 0) & 0x01) & ((s_arrmul24_fa8_8_xor1 >> 0) & 0x01);
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s_arrmul24_fa7_9_xor1 = ((s_arrmul24_fa7_9_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa6_9_or0 >> 0) & 0x01);
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s_arrmul24_fa7_9_and1 = ((s_arrmul24_fa7_9_xor0 >> 0) & 0x01) & ((s_arrmul24_fa6_9_or0 >> 0) & 0x01);
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s_arrmul24_fa7_9_or0 = ((s_arrmul24_fa7_9_and0 >> 0) & 0x01) | ((s_arrmul24_fa7_9_and1 >> 0) & 0x01);
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s_arrmul24_and8_9 = ((a >> 8) & 0x01) & ((b >> 9) & 0x01);
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s_arrmul24_fa8_9_xor0 = ((s_arrmul24_and8_9 >> 0) & 0x01) ^ ((s_arrmul24_fa9_8_xor1 >> 0) & 0x01);
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s_arrmul24_fa8_9_and0 = ((s_arrmul24_and8_9 >> 0) & 0x01) & ((s_arrmul24_fa9_8_xor1 >> 0) & 0x01);
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s_arrmul24_fa8_9_xor1 = ((s_arrmul24_fa8_9_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa7_9_or0 >> 0) & 0x01);
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s_arrmul24_fa8_9_and1 = ((s_arrmul24_fa8_9_xor0 >> 0) & 0x01) & ((s_arrmul24_fa7_9_or0 >> 0) & 0x01);
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s_arrmul24_fa8_9_or0 = ((s_arrmul24_fa8_9_and0 >> 0) & 0x01) | ((s_arrmul24_fa8_9_and1 >> 0) & 0x01);
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s_arrmul24_and9_9 = ((a >> 9) & 0x01) & ((b >> 9) & 0x01);
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s_arrmul24_fa9_9_xor0 = ((s_arrmul24_and9_9 >> 0) & 0x01) ^ ((s_arrmul24_fa10_8_xor1 >> 0) & 0x01);
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s_arrmul24_fa9_9_and0 = ((s_arrmul24_and9_9 >> 0) & 0x01) & ((s_arrmul24_fa10_8_xor1 >> 0) & 0x01);
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s_arrmul24_fa9_9_xor1 = ((s_arrmul24_fa9_9_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa8_9_or0 >> 0) & 0x01);
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s_arrmul24_fa9_9_and1 = ((s_arrmul24_fa9_9_xor0 >> 0) & 0x01) & ((s_arrmul24_fa8_9_or0 >> 0) & 0x01);
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s_arrmul24_fa9_9_or0 = ((s_arrmul24_fa9_9_and0 >> 0) & 0x01) | ((s_arrmul24_fa9_9_and1 >> 0) & 0x01);
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s_arrmul24_and10_9 = ((a >> 10) & 0x01) & ((b >> 9) & 0x01);
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s_arrmul24_fa10_9_xor0 = ((s_arrmul24_and10_9 >> 0) & 0x01) ^ ((s_arrmul24_fa11_8_xor1 >> 0) & 0x01);
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s_arrmul24_fa10_9_and0 = ((s_arrmul24_and10_9 >> 0) & 0x01) & ((s_arrmul24_fa11_8_xor1 >> 0) & 0x01);
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s_arrmul24_fa10_9_xor1 = ((s_arrmul24_fa10_9_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa9_9_or0 >> 0) & 0x01);
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s_arrmul24_fa10_9_and1 = ((s_arrmul24_fa10_9_xor0 >> 0) & 0x01) & ((s_arrmul24_fa9_9_or0 >> 0) & 0x01);
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s_arrmul24_fa10_9_or0 = ((s_arrmul24_fa10_9_and0 >> 0) & 0x01) | ((s_arrmul24_fa10_9_and1 >> 0) & 0x01);
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s_arrmul24_and11_9 = ((a >> 11) & 0x01) & ((b >> 9) & 0x01);
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s_arrmul24_fa11_9_xor0 = ((s_arrmul24_and11_9 >> 0) & 0x01) ^ ((s_arrmul24_fa12_8_xor1 >> 0) & 0x01);
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s_arrmul24_fa11_9_and0 = ((s_arrmul24_and11_9 >> 0) & 0x01) & ((s_arrmul24_fa12_8_xor1 >> 0) & 0x01);
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s_arrmul24_fa11_9_xor1 = ((s_arrmul24_fa11_9_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa10_9_or0 >> 0) & 0x01);
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s_arrmul24_fa11_9_and1 = ((s_arrmul24_fa11_9_xor0 >> 0) & 0x01) & ((s_arrmul24_fa10_9_or0 >> 0) & 0x01);
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s_arrmul24_fa11_9_or0 = ((s_arrmul24_fa11_9_and0 >> 0) & 0x01) | ((s_arrmul24_fa11_9_and1 >> 0) & 0x01);
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s_arrmul24_and12_9 = ((a >> 12) & 0x01) & ((b >> 9) & 0x01);
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s_arrmul24_fa12_9_xor0 = ((s_arrmul24_and12_9 >> 0) & 0x01) ^ ((s_arrmul24_fa13_8_xor1 >> 0) & 0x01);
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s_arrmul24_fa12_9_and0 = ((s_arrmul24_and12_9 >> 0) & 0x01) & ((s_arrmul24_fa13_8_xor1 >> 0) & 0x01);
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s_arrmul24_fa12_9_xor1 = ((s_arrmul24_fa12_9_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa11_9_or0 >> 0) & 0x01);
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s_arrmul24_fa12_9_and1 = ((s_arrmul24_fa12_9_xor0 >> 0) & 0x01) & ((s_arrmul24_fa11_9_or0 >> 0) & 0x01);
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s_arrmul24_fa12_9_or0 = ((s_arrmul24_fa12_9_and0 >> 0) & 0x01) | ((s_arrmul24_fa12_9_and1 >> 0) & 0x01);
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s_arrmul24_and13_9 = ((a >> 13) & 0x01) & ((b >> 9) & 0x01);
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s_arrmul24_fa13_9_xor0 = ((s_arrmul24_and13_9 >> 0) & 0x01) ^ ((s_arrmul24_fa14_8_xor1 >> 0) & 0x01);
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s_arrmul24_fa13_9_and0 = ((s_arrmul24_and13_9 >> 0) & 0x01) & ((s_arrmul24_fa14_8_xor1 >> 0) & 0x01);
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s_arrmul24_fa13_9_xor1 = ((s_arrmul24_fa13_9_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa12_9_or0 >> 0) & 0x01);
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s_arrmul24_fa13_9_and1 = ((s_arrmul24_fa13_9_xor0 >> 0) & 0x01) & ((s_arrmul24_fa12_9_or0 >> 0) & 0x01);
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s_arrmul24_fa13_9_or0 = ((s_arrmul24_fa13_9_and0 >> 0) & 0x01) | ((s_arrmul24_fa13_9_and1 >> 0) & 0x01);
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s_arrmul24_and14_9 = ((a >> 14) & 0x01) & ((b >> 9) & 0x01);
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s_arrmul24_fa14_9_xor0 = ((s_arrmul24_and14_9 >> 0) & 0x01) ^ ((s_arrmul24_fa15_8_xor1 >> 0) & 0x01);
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s_arrmul24_fa14_9_and0 = ((s_arrmul24_and14_9 >> 0) & 0x01) & ((s_arrmul24_fa15_8_xor1 >> 0) & 0x01);
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s_arrmul24_fa14_9_xor1 = ((s_arrmul24_fa14_9_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa13_9_or0 >> 0) & 0x01);
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s_arrmul24_fa14_9_and1 = ((s_arrmul24_fa14_9_xor0 >> 0) & 0x01) & ((s_arrmul24_fa13_9_or0 >> 0) & 0x01);
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s_arrmul24_fa14_9_or0 = ((s_arrmul24_fa14_9_and0 >> 0) & 0x01) | ((s_arrmul24_fa14_9_and1 >> 0) & 0x01);
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s_arrmul24_and15_9 = ((a >> 15) & 0x01) & ((b >> 9) & 0x01);
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s_arrmul24_fa15_9_xor0 = ((s_arrmul24_and15_9 >> 0) & 0x01) ^ ((s_arrmul24_fa16_8_xor1 >> 0) & 0x01);
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s_arrmul24_fa15_9_and0 = ((s_arrmul24_and15_9 >> 0) & 0x01) & ((s_arrmul24_fa16_8_xor1 >> 0) & 0x01);
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s_arrmul24_fa15_9_xor1 = ((s_arrmul24_fa15_9_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa14_9_or0 >> 0) & 0x01);
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s_arrmul24_fa15_9_and1 = ((s_arrmul24_fa15_9_xor0 >> 0) & 0x01) & ((s_arrmul24_fa14_9_or0 >> 0) & 0x01);
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s_arrmul24_fa15_9_or0 = ((s_arrmul24_fa15_9_and0 >> 0) & 0x01) | ((s_arrmul24_fa15_9_and1 >> 0) & 0x01);
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s_arrmul24_and16_9 = ((a >> 16) & 0x01) & ((b >> 9) & 0x01);
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s_arrmul24_fa16_9_xor0 = ((s_arrmul24_and16_9 >> 0) & 0x01) ^ ((s_arrmul24_fa17_8_xor1 >> 0) & 0x01);
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s_arrmul24_fa16_9_and0 = ((s_arrmul24_and16_9 >> 0) & 0x01) & ((s_arrmul24_fa17_8_xor1 >> 0) & 0x01);
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s_arrmul24_fa16_9_xor1 = ((s_arrmul24_fa16_9_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa15_9_or0 >> 0) & 0x01);
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s_arrmul24_fa16_9_and1 = ((s_arrmul24_fa16_9_xor0 >> 0) & 0x01) & ((s_arrmul24_fa15_9_or0 >> 0) & 0x01);
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s_arrmul24_fa16_9_or0 = ((s_arrmul24_fa16_9_and0 >> 0) & 0x01) | ((s_arrmul24_fa16_9_and1 >> 0) & 0x01);
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s_arrmul24_and17_9 = ((a >> 17) & 0x01) & ((b >> 9) & 0x01);
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s_arrmul24_fa17_9_xor0 = ((s_arrmul24_and17_9 >> 0) & 0x01) ^ ((s_arrmul24_fa18_8_xor1 >> 0) & 0x01);
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s_arrmul24_fa17_9_and0 = ((s_arrmul24_and17_9 >> 0) & 0x01) & ((s_arrmul24_fa18_8_xor1 >> 0) & 0x01);
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s_arrmul24_fa17_9_xor1 = ((s_arrmul24_fa17_9_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa16_9_or0 >> 0) & 0x01);
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s_arrmul24_fa17_9_and1 = ((s_arrmul24_fa17_9_xor0 >> 0) & 0x01) & ((s_arrmul24_fa16_9_or0 >> 0) & 0x01);
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s_arrmul24_fa17_9_or0 = ((s_arrmul24_fa17_9_and0 >> 0) & 0x01) | ((s_arrmul24_fa17_9_and1 >> 0) & 0x01);
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s_arrmul24_and18_9 = ((a >> 18) & 0x01) & ((b >> 9) & 0x01);
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s_arrmul24_fa18_9_xor0 = ((s_arrmul24_and18_9 >> 0) & 0x01) ^ ((s_arrmul24_fa19_8_xor1 >> 0) & 0x01);
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s_arrmul24_fa18_9_and0 = ((s_arrmul24_and18_9 >> 0) & 0x01) & ((s_arrmul24_fa19_8_xor1 >> 0) & 0x01);
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s_arrmul24_fa18_9_xor1 = ((s_arrmul24_fa18_9_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa17_9_or0 >> 0) & 0x01);
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s_arrmul24_fa18_9_and1 = ((s_arrmul24_fa18_9_xor0 >> 0) & 0x01) & ((s_arrmul24_fa17_9_or0 >> 0) & 0x01);
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s_arrmul24_fa18_9_or0 = ((s_arrmul24_fa18_9_and0 >> 0) & 0x01) | ((s_arrmul24_fa18_9_and1 >> 0) & 0x01);
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s_arrmul24_and19_9 = ((a >> 19) & 0x01) & ((b >> 9) & 0x01);
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s_arrmul24_fa19_9_xor0 = ((s_arrmul24_and19_9 >> 0) & 0x01) ^ ((s_arrmul24_fa20_8_xor1 >> 0) & 0x01);
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s_arrmul24_fa19_9_and0 = ((s_arrmul24_and19_9 >> 0) & 0x01) & ((s_arrmul24_fa20_8_xor1 >> 0) & 0x01);
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s_arrmul24_fa19_9_xor1 = ((s_arrmul24_fa19_9_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa18_9_or0 >> 0) & 0x01);
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s_arrmul24_fa19_9_and1 = ((s_arrmul24_fa19_9_xor0 >> 0) & 0x01) & ((s_arrmul24_fa18_9_or0 >> 0) & 0x01);
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s_arrmul24_fa19_9_or0 = ((s_arrmul24_fa19_9_and0 >> 0) & 0x01) | ((s_arrmul24_fa19_9_and1 >> 0) & 0x01);
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s_arrmul24_and20_9 = ((a >> 20) & 0x01) & ((b >> 9) & 0x01);
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s_arrmul24_fa20_9_xor0 = ((s_arrmul24_and20_9 >> 0) & 0x01) ^ ((s_arrmul24_fa21_8_xor1 >> 0) & 0x01);
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s_arrmul24_fa20_9_and0 = ((s_arrmul24_and20_9 >> 0) & 0x01) & ((s_arrmul24_fa21_8_xor1 >> 0) & 0x01);
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s_arrmul24_fa20_9_xor1 = ((s_arrmul24_fa20_9_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa19_9_or0 >> 0) & 0x01);
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s_arrmul24_fa20_9_and1 = ((s_arrmul24_fa20_9_xor0 >> 0) & 0x01) & ((s_arrmul24_fa19_9_or0 >> 0) & 0x01);
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s_arrmul24_fa20_9_or0 = ((s_arrmul24_fa20_9_and0 >> 0) & 0x01) | ((s_arrmul24_fa20_9_and1 >> 0) & 0x01);
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s_arrmul24_and21_9 = ((a >> 21) & 0x01) & ((b >> 9) & 0x01);
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s_arrmul24_fa21_9_xor0 = ((s_arrmul24_and21_9 >> 0) & 0x01) ^ ((s_arrmul24_fa22_8_xor1 >> 0) & 0x01);
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s_arrmul24_fa21_9_and0 = ((s_arrmul24_and21_9 >> 0) & 0x01) & ((s_arrmul24_fa22_8_xor1 >> 0) & 0x01);
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s_arrmul24_fa21_9_xor1 = ((s_arrmul24_fa21_9_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa20_9_or0 >> 0) & 0x01);
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s_arrmul24_fa21_9_and1 = ((s_arrmul24_fa21_9_xor0 >> 0) & 0x01) & ((s_arrmul24_fa20_9_or0 >> 0) & 0x01);
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s_arrmul24_fa21_9_or0 = ((s_arrmul24_fa21_9_and0 >> 0) & 0x01) | ((s_arrmul24_fa21_9_and1 >> 0) & 0x01);
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s_arrmul24_and22_9 = ((a >> 22) & 0x01) & ((b >> 9) & 0x01);
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s_arrmul24_fa22_9_xor0 = ((s_arrmul24_and22_9 >> 0) & 0x01) ^ ((s_arrmul24_fa23_8_xor1 >> 0) & 0x01);
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s_arrmul24_fa22_9_and0 = ((s_arrmul24_and22_9 >> 0) & 0x01) & ((s_arrmul24_fa23_8_xor1 >> 0) & 0x01);
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s_arrmul24_fa22_9_xor1 = ((s_arrmul24_fa22_9_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa21_9_or0 >> 0) & 0x01);
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s_arrmul24_fa22_9_and1 = ((s_arrmul24_fa22_9_xor0 >> 0) & 0x01) & ((s_arrmul24_fa21_9_or0 >> 0) & 0x01);
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s_arrmul24_fa22_9_or0 = ((s_arrmul24_fa22_9_and0 >> 0) & 0x01) | ((s_arrmul24_fa22_9_and1 >> 0) & 0x01);
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s_arrmul24_nand23_9 = ~(((a >> 23) & 0x01) & ((b >> 9) & 0x01)) & 0x01;
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s_arrmul24_fa23_9_xor0 = ((s_arrmul24_nand23_9 >> 0) & 0x01) ^ ((s_arrmul24_fa23_8_or0 >> 0) & 0x01);
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s_arrmul24_fa23_9_and0 = ((s_arrmul24_nand23_9 >> 0) & 0x01) & ((s_arrmul24_fa23_8_or0 >> 0) & 0x01);
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s_arrmul24_fa23_9_xor1 = ((s_arrmul24_fa23_9_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa22_9_or0 >> 0) & 0x01);
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s_arrmul24_fa23_9_and1 = ((s_arrmul24_fa23_9_xor0 >> 0) & 0x01) & ((s_arrmul24_fa22_9_or0 >> 0) & 0x01);
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s_arrmul24_fa23_9_or0 = ((s_arrmul24_fa23_9_and0 >> 0) & 0x01) | ((s_arrmul24_fa23_9_and1 >> 0) & 0x01);
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s_arrmul24_and0_10 = ((a >> 0) & 0x01) & ((b >> 10) & 0x01);
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s_arrmul24_ha0_10_xor0 = ((s_arrmul24_and0_10 >> 0) & 0x01) ^ ((s_arrmul24_fa1_9_xor1 >> 0) & 0x01);
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s_arrmul24_ha0_10_and0 = ((s_arrmul24_and0_10 >> 0) & 0x01) & ((s_arrmul24_fa1_9_xor1 >> 0) & 0x01);
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s_arrmul24_and1_10 = ((a >> 1) & 0x01) & ((b >> 10) & 0x01);
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s_arrmul24_fa1_10_xor0 = ((s_arrmul24_and1_10 >> 0) & 0x01) ^ ((s_arrmul24_fa2_9_xor1 >> 0) & 0x01);
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s_arrmul24_fa1_10_and0 = ((s_arrmul24_and1_10 >> 0) & 0x01) & ((s_arrmul24_fa2_9_xor1 >> 0) & 0x01);
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s_arrmul24_fa1_10_xor1 = ((s_arrmul24_fa1_10_xor0 >> 0) & 0x01) ^ ((s_arrmul24_ha0_10_and0 >> 0) & 0x01);
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s_arrmul24_fa1_10_and1 = ((s_arrmul24_fa1_10_xor0 >> 0) & 0x01) & ((s_arrmul24_ha0_10_and0 >> 0) & 0x01);
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s_arrmul24_fa1_10_or0 = ((s_arrmul24_fa1_10_and0 >> 0) & 0x01) | ((s_arrmul24_fa1_10_and1 >> 0) & 0x01);
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s_arrmul24_and2_10 = ((a >> 2) & 0x01) & ((b >> 10) & 0x01);
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s_arrmul24_fa2_10_xor0 = ((s_arrmul24_and2_10 >> 0) & 0x01) ^ ((s_arrmul24_fa3_9_xor1 >> 0) & 0x01);
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s_arrmul24_fa2_10_and0 = ((s_arrmul24_and2_10 >> 0) & 0x01) & ((s_arrmul24_fa3_9_xor1 >> 0) & 0x01);
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s_arrmul24_fa2_10_xor1 = ((s_arrmul24_fa2_10_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa1_10_or0 >> 0) & 0x01);
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s_arrmul24_fa2_10_and1 = ((s_arrmul24_fa2_10_xor0 >> 0) & 0x01) & ((s_arrmul24_fa1_10_or0 >> 0) & 0x01);
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s_arrmul24_fa2_10_or0 = ((s_arrmul24_fa2_10_and0 >> 0) & 0x01) | ((s_arrmul24_fa2_10_and1 >> 0) & 0x01);
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s_arrmul24_and3_10 = ((a >> 3) & 0x01) & ((b >> 10) & 0x01);
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s_arrmul24_fa3_10_xor0 = ((s_arrmul24_and3_10 >> 0) & 0x01) ^ ((s_arrmul24_fa4_9_xor1 >> 0) & 0x01);
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s_arrmul24_fa3_10_and0 = ((s_arrmul24_and3_10 >> 0) & 0x01) & ((s_arrmul24_fa4_9_xor1 >> 0) & 0x01);
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s_arrmul24_fa3_10_xor1 = ((s_arrmul24_fa3_10_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa2_10_or0 >> 0) & 0x01);
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s_arrmul24_fa3_10_and1 = ((s_arrmul24_fa3_10_xor0 >> 0) & 0x01) & ((s_arrmul24_fa2_10_or0 >> 0) & 0x01);
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s_arrmul24_fa3_10_or0 = ((s_arrmul24_fa3_10_and0 >> 0) & 0x01) | ((s_arrmul24_fa3_10_and1 >> 0) & 0x01);
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s_arrmul24_and4_10 = ((a >> 4) & 0x01) & ((b >> 10) & 0x01);
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s_arrmul24_fa4_10_xor0 = ((s_arrmul24_and4_10 >> 0) & 0x01) ^ ((s_arrmul24_fa5_9_xor1 >> 0) & 0x01);
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s_arrmul24_fa4_10_and0 = ((s_arrmul24_and4_10 >> 0) & 0x01) & ((s_arrmul24_fa5_9_xor1 >> 0) & 0x01);
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s_arrmul24_fa4_10_xor1 = ((s_arrmul24_fa4_10_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa3_10_or0 >> 0) & 0x01);
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s_arrmul24_fa4_10_and1 = ((s_arrmul24_fa4_10_xor0 >> 0) & 0x01) & ((s_arrmul24_fa3_10_or0 >> 0) & 0x01);
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s_arrmul24_fa4_10_or0 = ((s_arrmul24_fa4_10_and0 >> 0) & 0x01) | ((s_arrmul24_fa4_10_and1 >> 0) & 0x01);
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s_arrmul24_and5_10 = ((a >> 5) & 0x01) & ((b >> 10) & 0x01);
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s_arrmul24_fa5_10_xor0 = ((s_arrmul24_and5_10 >> 0) & 0x01) ^ ((s_arrmul24_fa6_9_xor1 >> 0) & 0x01);
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s_arrmul24_fa5_10_and0 = ((s_arrmul24_and5_10 >> 0) & 0x01) & ((s_arrmul24_fa6_9_xor1 >> 0) & 0x01);
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s_arrmul24_fa5_10_xor1 = ((s_arrmul24_fa5_10_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa4_10_or0 >> 0) & 0x01);
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s_arrmul24_fa5_10_and1 = ((s_arrmul24_fa5_10_xor0 >> 0) & 0x01) & ((s_arrmul24_fa4_10_or0 >> 0) & 0x01);
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s_arrmul24_fa5_10_or0 = ((s_arrmul24_fa5_10_and0 >> 0) & 0x01) | ((s_arrmul24_fa5_10_and1 >> 0) & 0x01);
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s_arrmul24_and6_10 = ((a >> 6) & 0x01) & ((b >> 10) & 0x01);
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s_arrmul24_fa6_10_xor0 = ((s_arrmul24_and6_10 >> 0) & 0x01) ^ ((s_arrmul24_fa7_9_xor1 >> 0) & 0x01);
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s_arrmul24_fa6_10_and0 = ((s_arrmul24_and6_10 >> 0) & 0x01) & ((s_arrmul24_fa7_9_xor1 >> 0) & 0x01);
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s_arrmul24_fa6_10_xor1 = ((s_arrmul24_fa6_10_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa5_10_or0 >> 0) & 0x01);
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s_arrmul24_fa6_10_and1 = ((s_arrmul24_fa6_10_xor0 >> 0) & 0x01) & ((s_arrmul24_fa5_10_or0 >> 0) & 0x01);
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s_arrmul24_fa6_10_or0 = ((s_arrmul24_fa6_10_and0 >> 0) & 0x01) | ((s_arrmul24_fa6_10_and1 >> 0) & 0x01);
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s_arrmul24_and7_10 = ((a >> 7) & 0x01) & ((b >> 10) & 0x01);
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s_arrmul24_fa7_10_xor0 = ((s_arrmul24_and7_10 >> 0) & 0x01) ^ ((s_arrmul24_fa8_9_xor1 >> 0) & 0x01);
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s_arrmul24_fa7_10_and0 = ((s_arrmul24_and7_10 >> 0) & 0x01) & ((s_arrmul24_fa8_9_xor1 >> 0) & 0x01);
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s_arrmul24_fa7_10_xor1 = ((s_arrmul24_fa7_10_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa6_10_or0 >> 0) & 0x01);
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s_arrmul24_fa7_10_and1 = ((s_arrmul24_fa7_10_xor0 >> 0) & 0x01) & ((s_arrmul24_fa6_10_or0 >> 0) & 0x01);
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s_arrmul24_fa7_10_or0 = ((s_arrmul24_fa7_10_and0 >> 0) & 0x01) | ((s_arrmul24_fa7_10_and1 >> 0) & 0x01);
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s_arrmul24_and8_10 = ((a >> 8) & 0x01) & ((b >> 10) & 0x01);
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s_arrmul24_fa8_10_xor0 = ((s_arrmul24_and8_10 >> 0) & 0x01) ^ ((s_arrmul24_fa9_9_xor1 >> 0) & 0x01);
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s_arrmul24_fa8_10_and0 = ((s_arrmul24_and8_10 >> 0) & 0x01) & ((s_arrmul24_fa9_9_xor1 >> 0) & 0x01);
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s_arrmul24_fa8_10_xor1 = ((s_arrmul24_fa8_10_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa7_10_or0 >> 0) & 0x01);
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s_arrmul24_fa8_10_and1 = ((s_arrmul24_fa8_10_xor0 >> 0) & 0x01) & ((s_arrmul24_fa7_10_or0 >> 0) & 0x01);
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s_arrmul24_fa8_10_or0 = ((s_arrmul24_fa8_10_and0 >> 0) & 0x01) | ((s_arrmul24_fa8_10_and1 >> 0) & 0x01);
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s_arrmul24_and9_10 = ((a >> 9) & 0x01) & ((b >> 10) & 0x01);
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s_arrmul24_fa9_10_xor0 = ((s_arrmul24_and9_10 >> 0) & 0x01) ^ ((s_arrmul24_fa10_9_xor1 >> 0) & 0x01);
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s_arrmul24_fa9_10_and0 = ((s_arrmul24_and9_10 >> 0) & 0x01) & ((s_arrmul24_fa10_9_xor1 >> 0) & 0x01);
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s_arrmul24_fa9_10_xor1 = ((s_arrmul24_fa9_10_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa8_10_or0 >> 0) & 0x01);
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s_arrmul24_fa9_10_and1 = ((s_arrmul24_fa9_10_xor0 >> 0) & 0x01) & ((s_arrmul24_fa8_10_or0 >> 0) & 0x01);
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s_arrmul24_fa9_10_or0 = ((s_arrmul24_fa9_10_and0 >> 0) & 0x01) | ((s_arrmul24_fa9_10_and1 >> 0) & 0x01);
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s_arrmul24_and10_10 = ((a >> 10) & 0x01) & ((b >> 10) & 0x01);
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s_arrmul24_fa10_10_xor0 = ((s_arrmul24_and10_10 >> 0) & 0x01) ^ ((s_arrmul24_fa11_9_xor1 >> 0) & 0x01);
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s_arrmul24_fa10_10_and0 = ((s_arrmul24_and10_10 >> 0) & 0x01) & ((s_arrmul24_fa11_9_xor1 >> 0) & 0x01);
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s_arrmul24_fa10_10_xor1 = ((s_arrmul24_fa10_10_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa9_10_or0 >> 0) & 0x01);
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s_arrmul24_fa10_10_and1 = ((s_arrmul24_fa10_10_xor0 >> 0) & 0x01) & ((s_arrmul24_fa9_10_or0 >> 0) & 0x01);
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s_arrmul24_fa10_10_or0 = ((s_arrmul24_fa10_10_and0 >> 0) & 0x01) | ((s_arrmul24_fa10_10_and1 >> 0) & 0x01);
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s_arrmul24_and11_10 = ((a >> 11) & 0x01) & ((b >> 10) & 0x01);
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s_arrmul24_fa11_10_xor0 = ((s_arrmul24_and11_10 >> 0) & 0x01) ^ ((s_arrmul24_fa12_9_xor1 >> 0) & 0x01);
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s_arrmul24_fa11_10_and0 = ((s_arrmul24_and11_10 >> 0) & 0x01) & ((s_arrmul24_fa12_9_xor1 >> 0) & 0x01);
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s_arrmul24_fa11_10_xor1 = ((s_arrmul24_fa11_10_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa10_10_or0 >> 0) & 0x01);
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s_arrmul24_fa11_10_and1 = ((s_arrmul24_fa11_10_xor0 >> 0) & 0x01) & ((s_arrmul24_fa10_10_or0 >> 0) & 0x01);
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s_arrmul24_fa11_10_or0 = ((s_arrmul24_fa11_10_and0 >> 0) & 0x01) | ((s_arrmul24_fa11_10_and1 >> 0) & 0x01);
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s_arrmul24_and12_10 = ((a >> 12) & 0x01) & ((b >> 10) & 0x01);
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s_arrmul24_fa12_10_xor0 = ((s_arrmul24_and12_10 >> 0) & 0x01) ^ ((s_arrmul24_fa13_9_xor1 >> 0) & 0x01);
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s_arrmul24_fa12_10_and0 = ((s_arrmul24_and12_10 >> 0) & 0x01) & ((s_arrmul24_fa13_9_xor1 >> 0) & 0x01);
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s_arrmul24_fa12_10_xor1 = ((s_arrmul24_fa12_10_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa11_10_or0 >> 0) & 0x01);
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s_arrmul24_fa12_10_and1 = ((s_arrmul24_fa12_10_xor0 >> 0) & 0x01) & ((s_arrmul24_fa11_10_or0 >> 0) & 0x01);
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s_arrmul24_fa12_10_or0 = ((s_arrmul24_fa12_10_and0 >> 0) & 0x01) | ((s_arrmul24_fa12_10_and1 >> 0) & 0x01);
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s_arrmul24_and13_10 = ((a >> 13) & 0x01) & ((b >> 10) & 0x01);
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s_arrmul24_fa13_10_xor0 = ((s_arrmul24_and13_10 >> 0) & 0x01) ^ ((s_arrmul24_fa14_9_xor1 >> 0) & 0x01);
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s_arrmul24_fa13_10_and0 = ((s_arrmul24_and13_10 >> 0) & 0x01) & ((s_arrmul24_fa14_9_xor1 >> 0) & 0x01);
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s_arrmul24_fa13_10_xor1 = ((s_arrmul24_fa13_10_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa12_10_or0 >> 0) & 0x01);
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s_arrmul24_fa13_10_and1 = ((s_arrmul24_fa13_10_xor0 >> 0) & 0x01) & ((s_arrmul24_fa12_10_or0 >> 0) & 0x01);
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s_arrmul24_fa13_10_or0 = ((s_arrmul24_fa13_10_and0 >> 0) & 0x01) | ((s_arrmul24_fa13_10_and1 >> 0) & 0x01);
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s_arrmul24_and14_10 = ((a >> 14) & 0x01) & ((b >> 10) & 0x01);
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s_arrmul24_fa14_10_xor0 = ((s_arrmul24_and14_10 >> 0) & 0x01) ^ ((s_arrmul24_fa15_9_xor1 >> 0) & 0x01);
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s_arrmul24_fa14_10_and0 = ((s_arrmul24_and14_10 >> 0) & 0x01) & ((s_arrmul24_fa15_9_xor1 >> 0) & 0x01);
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s_arrmul24_fa14_10_xor1 = ((s_arrmul24_fa14_10_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa13_10_or0 >> 0) & 0x01);
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s_arrmul24_fa14_10_and1 = ((s_arrmul24_fa14_10_xor0 >> 0) & 0x01) & ((s_arrmul24_fa13_10_or0 >> 0) & 0x01);
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s_arrmul24_fa14_10_or0 = ((s_arrmul24_fa14_10_and0 >> 0) & 0x01) | ((s_arrmul24_fa14_10_and1 >> 0) & 0x01);
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s_arrmul24_and15_10 = ((a >> 15) & 0x01) & ((b >> 10) & 0x01);
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s_arrmul24_fa15_10_xor0 = ((s_arrmul24_and15_10 >> 0) & 0x01) ^ ((s_arrmul24_fa16_9_xor1 >> 0) & 0x01);
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s_arrmul24_fa15_10_and0 = ((s_arrmul24_and15_10 >> 0) & 0x01) & ((s_arrmul24_fa16_9_xor1 >> 0) & 0x01);
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s_arrmul24_fa15_10_xor1 = ((s_arrmul24_fa15_10_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa14_10_or0 >> 0) & 0x01);
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s_arrmul24_fa15_10_and1 = ((s_arrmul24_fa15_10_xor0 >> 0) & 0x01) & ((s_arrmul24_fa14_10_or0 >> 0) & 0x01);
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s_arrmul24_fa15_10_or0 = ((s_arrmul24_fa15_10_and0 >> 0) & 0x01) | ((s_arrmul24_fa15_10_and1 >> 0) & 0x01);
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s_arrmul24_and16_10 = ((a >> 16) & 0x01) & ((b >> 10) & 0x01);
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s_arrmul24_fa16_10_xor0 = ((s_arrmul24_and16_10 >> 0) & 0x01) ^ ((s_arrmul24_fa17_9_xor1 >> 0) & 0x01);
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s_arrmul24_fa16_10_and0 = ((s_arrmul24_and16_10 >> 0) & 0x01) & ((s_arrmul24_fa17_9_xor1 >> 0) & 0x01);
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s_arrmul24_fa16_10_xor1 = ((s_arrmul24_fa16_10_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa15_10_or0 >> 0) & 0x01);
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s_arrmul24_fa16_10_and1 = ((s_arrmul24_fa16_10_xor0 >> 0) & 0x01) & ((s_arrmul24_fa15_10_or0 >> 0) & 0x01);
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s_arrmul24_fa16_10_or0 = ((s_arrmul24_fa16_10_and0 >> 0) & 0x01) | ((s_arrmul24_fa16_10_and1 >> 0) & 0x01);
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s_arrmul24_and17_10 = ((a >> 17) & 0x01) & ((b >> 10) & 0x01);
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s_arrmul24_fa17_10_xor0 = ((s_arrmul24_and17_10 >> 0) & 0x01) ^ ((s_arrmul24_fa18_9_xor1 >> 0) & 0x01);
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s_arrmul24_fa17_10_and0 = ((s_arrmul24_and17_10 >> 0) & 0x01) & ((s_arrmul24_fa18_9_xor1 >> 0) & 0x01);
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s_arrmul24_fa17_10_xor1 = ((s_arrmul24_fa17_10_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa16_10_or0 >> 0) & 0x01);
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s_arrmul24_fa17_10_and1 = ((s_arrmul24_fa17_10_xor0 >> 0) & 0x01) & ((s_arrmul24_fa16_10_or0 >> 0) & 0x01);
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s_arrmul24_fa17_10_or0 = ((s_arrmul24_fa17_10_and0 >> 0) & 0x01) | ((s_arrmul24_fa17_10_and1 >> 0) & 0x01);
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s_arrmul24_and18_10 = ((a >> 18) & 0x01) & ((b >> 10) & 0x01);
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s_arrmul24_fa18_10_xor0 = ((s_arrmul24_and18_10 >> 0) & 0x01) ^ ((s_arrmul24_fa19_9_xor1 >> 0) & 0x01);
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s_arrmul24_fa18_10_and0 = ((s_arrmul24_and18_10 >> 0) & 0x01) & ((s_arrmul24_fa19_9_xor1 >> 0) & 0x01);
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s_arrmul24_fa18_10_xor1 = ((s_arrmul24_fa18_10_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa17_10_or0 >> 0) & 0x01);
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s_arrmul24_fa18_10_and1 = ((s_arrmul24_fa18_10_xor0 >> 0) & 0x01) & ((s_arrmul24_fa17_10_or0 >> 0) & 0x01);
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s_arrmul24_fa18_10_or0 = ((s_arrmul24_fa18_10_and0 >> 0) & 0x01) | ((s_arrmul24_fa18_10_and1 >> 0) & 0x01);
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s_arrmul24_and19_10 = ((a >> 19) & 0x01) & ((b >> 10) & 0x01);
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s_arrmul24_fa19_10_xor0 = ((s_arrmul24_and19_10 >> 0) & 0x01) ^ ((s_arrmul24_fa20_9_xor1 >> 0) & 0x01);
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s_arrmul24_fa19_10_and0 = ((s_arrmul24_and19_10 >> 0) & 0x01) & ((s_arrmul24_fa20_9_xor1 >> 0) & 0x01);
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s_arrmul24_fa19_10_xor1 = ((s_arrmul24_fa19_10_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa18_10_or0 >> 0) & 0x01);
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s_arrmul24_fa19_10_and1 = ((s_arrmul24_fa19_10_xor0 >> 0) & 0x01) & ((s_arrmul24_fa18_10_or0 >> 0) & 0x01);
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s_arrmul24_fa19_10_or0 = ((s_arrmul24_fa19_10_and0 >> 0) & 0x01) | ((s_arrmul24_fa19_10_and1 >> 0) & 0x01);
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s_arrmul24_and20_10 = ((a >> 20) & 0x01) & ((b >> 10) & 0x01);
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s_arrmul24_fa20_10_xor0 = ((s_arrmul24_and20_10 >> 0) & 0x01) ^ ((s_arrmul24_fa21_9_xor1 >> 0) & 0x01);
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s_arrmul24_fa20_10_and0 = ((s_arrmul24_and20_10 >> 0) & 0x01) & ((s_arrmul24_fa21_9_xor1 >> 0) & 0x01);
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s_arrmul24_fa20_10_xor1 = ((s_arrmul24_fa20_10_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa19_10_or0 >> 0) & 0x01);
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s_arrmul24_fa20_10_and1 = ((s_arrmul24_fa20_10_xor0 >> 0) & 0x01) & ((s_arrmul24_fa19_10_or0 >> 0) & 0x01);
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s_arrmul24_fa20_10_or0 = ((s_arrmul24_fa20_10_and0 >> 0) & 0x01) | ((s_arrmul24_fa20_10_and1 >> 0) & 0x01);
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s_arrmul24_and21_10 = ((a >> 21) & 0x01) & ((b >> 10) & 0x01);
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s_arrmul24_fa21_10_xor0 = ((s_arrmul24_and21_10 >> 0) & 0x01) ^ ((s_arrmul24_fa22_9_xor1 >> 0) & 0x01);
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s_arrmul24_fa21_10_and0 = ((s_arrmul24_and21_10 >> 0) & 0x01) & ((s_arrmul24_fa22_9_xor1 >> 0) & 0x01);
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s_arrmul24_fa21_10_xor1 = ((s_arrmul24_fa21_10_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa20_10_or0 >> 0) & 0x01);
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s_arrmul24_fa21_10_and1 = ((s_arrmul24_fa21_10_xor0 >> 0) & 0x01) & ((s_arrmul24_fa20_10_or0 >> 0) & 0x01);
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s_arrmul24_fa21_10_or0 = ((s_arrmul24_fa21_10_and0 >> 0) & 0x01) | ((s_arrmul24_fa21_10_and1 >> 0) & 0x01);
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s_arrmul24_and22_10 = ((a >> 22) & 0x01) & ((b >> 10) & 0x01);
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s_arrmul24_fa22_10_xor0 = ((s_arrmul24_and22_10 >> 0) & 0x01) ^ ((s_arrmul24_fa23_9_xor1 >> 0) & 0x01);
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s_arrmul24_fa22_10_and0 = ((s_arrmul24_and22_10 >> 0) & 0x01) & ((s_arrmul24_fa23_9_xor1 >> 0) & 0x01);
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s_arrmul24_fa22_10_xor1 = ((s_arrmul24_fa22_10_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa21_10_or0 >> 0) & 0x01);
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s_arrmul24_fa22_10_and1 = ((s_arrmul24_fa22_10_xor0 >> 0) & 0x01) & ((s_arrmul24_fa21_10_or0 >> 0) & 0x01);
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s_arrmul24_fa22_10_or0 = ((s_arrmul24_fa22_10_and0 >> 0) & 0x01) | ((s_arrmul24_fa22_10_and1 >> 0) & 0x01);
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s_arrmul24_nand23_10 = ~(((a >> 23) & 0x01) & ((b >> 10) & 0x01)) & 0x01;
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s_arrmul24_fa23_10_xor0 = ((s_arrmul24_nand23_10 >> 0) & 0x01) ^ ((s_arrmul24_fa23_9_or0 >> 0) & 0x01);
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s_arrmul24_fa23_10_and0 = ((s_arrmul24_nand23_10 >> 0) & 0x01) & ((s_arrmul24_fa23_9_or0 >> 0) & 0x01);
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s_arrmul24_fa23_10_xor1 = ((s_arrmul24_fa23_10_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa22_10_or0 >> 0) & 0x01);
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s_arrmul24_fa23_10_and1 = ((s_arrmul24_fa23_10_xor0 >> 0) & 0x01) & ((s_arrmul24_fa22_10_or0 >> 0) & 0x01);
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s_arrmul24_fa23_10_or0 = ((s_arrmul24_fa23_10_and0 >> 0) & 0x01) | ((s_arrmul24_fa23_10_and1 >> 0) & 0x01);
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s_arrmul24_and0_11 = ((a >> 0) & 0x01) & ((b >> 11) & 0x01);
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s_arrmul24_ha0_11_xor0 = ((s_arrmul24_and0_11 >> 0) & 0x01) ^ ((s_arrmul24_fa1_10_xor1 >> 0) & 0x01);
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s_arrmul24_ha0_11_and0 = ((s_arrmul24_and0_11 >> 0) & 0x01) & ((s_arrmul24_fa1_10_xor1 >> 0) & 0x01);
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s_arrmul24_and1_11 = ((a >> 1) & 0x01) & ((b >> 11) & 0x01);
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s_arrmul24_fa1_11_xor0 = ((s_arrmul24_and1_11 >> 0) & 0x01) ^ ((s_arrmul24_fa2_10_xor1 >> 0) & 0x01);
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s_arrmul24_fa1_11_and0 = ((s_arrmul24_and1_11 >> 0) & 0x01) & ((s_arrmul24_fa2_10_xor1 >> 0) & 0x01);
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s_arrmul24_fa1_11_xor1 = ((s_arrmul24_fa1_11_xor0 >> 0) & 0x01) ^ ((s_arrmul24_ha0_11_and0 >> 0) & 0x01);
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s_arrmul24_fa1_11_and1 = ((s_arrmul24_fa1_11_xor0 >> 0) & 0x01) & ((s_arrmul24_ha0_11_and0 >> 0) & 0x01);
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s_arrmul24_fa1_11_or0 = ((s_arrmul24_fa1_11_and0 >> 0) & 0x01) | ((s_arrmul24_fa1_11_and1 >> 0) & 0x01);
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s_arrmul24_and2_11 = ((a >> 2) & 0x01) & ((b >> 11) & 0x01);
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s_arrmul24_fa2_11_xor0 = ((s_arrmul24_and2_11 >> 0) & 0x01) ^ ((s_arrmul24_fa3_10_xor1 >> 0) & 0x01);
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s_arrmul24_fa2_11_and0 = ((s_arrmul24_and2_11 >> 0) & 0x01) & ((s_arrmul24_fa3_10_xor1 >> 0) & 0x01);
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s_arrmul24_fa2_11_xor1 = ((s_arrmul24_fa2_11_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa1_11_or0 >> 0) & 0x01);
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s_arrmul24_fa2_11_and1 = ((s_arrmul24_fa2_11_xor0 >> 0) & 0x01) & ((s_arrmul24_fa1_11_or0 >> 0) & 0x01);
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s_arrmul24_fa2_11_or0 = ((s_arrmul24_fa2_11_and0 >> 0) & 0x01) | ((s_arrmul24_fa2_11_and1 >> 0) & 0x01);
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s_arrmul24_and3_11 = ((a >> 3) & 0x01) & ((b >> 11) & 0x01);
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s_arrmul24_fa3_11_xor0 = ((s_arrmul24_and3_11 >> 0) & 0x01) ^ ((s_arrmul24_fa4_10_xor1 >> 0) & 0x01);
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s_arrmul24_fa3_11_and0 = ((s_arrmul24_and3_11 >> 0) & 0x01) & ((s_arrmul24_fa4_10_xor1 >> 0) & 0x01);
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s_arrmul24_fa3_11_xor1 = ((s_arrmul24_fa3_11_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa2_11_or0 >> 0) & 0x01);
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s_arrmul24_fa3_11_and1 = ((s_arrmul24_fa3_11_xor0 >> 0) & 0x01) & ((s_arrmul24_fa2_11_or0 >> 0) & 0x01);
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s_arrmul24_fa3_11_or0 = ((s_arrmul24_fa3_11_and0 >> 0) & 0x01) | ((s_arrmul24_fa3_11_and1 >> 0) & 0x01);
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s_arrmul24_and4_11 = ((a >> 4) & 0x01) & ((b >> 11) & 0x01);
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s_arrmul24_fa4_11_xor0 = ((s_arrmul24_and4_11 >> 0) & 0x01) ^ ((s_arrmul24_fa5_10_xor1 >> 0) & 0x01);
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s_arrmul24_fa4_11_and0 = ((s_arrmul24_and4_11 >> 0) & 0x01) & ((s_arrmul24_fa5_10_xor1 >> 0) & 0x01);
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s_arrmul24_fa4_11_xor1 = ((s_arrmul24_fa4_11_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa3_11_or0 >> 0) & 0x01);
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s_arrmul24_fa4_11_and1 = ((s_arrmul24_fa4_11_xor0 >> 0) & 0x01) & ((s_arrmul24_fa3_11_or0 >> 0) & 0x01);
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s_arrmul24_fa4_11_or0 = ((s_arrmul24_fa4_11_and0 >> 0) & 0x01) | ((s_arrmul24_fa4_11_and1 >> 0) & 0x01);
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s_arrmul24_and5_11 = ((a >> 5) & 0x01) & ((b >> 11) & 0x01);
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s_arrmul24_fa5_11_xor0 = ((s_arrmul24_and5_11 >> 0) & 0x01) ^ ((s_arrmul24_fa6_10_xor1 >> 0) & 0x01);
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s_arrmul24_fa5_11_and0 = ((s_arrmul24_and5_11 >> 0) & 0x01) & ((s_arrmul24_fa6_10_xor1 >> 0) & 0x01);
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s_arrmul24_fa5_11_xor1 = ((s_arrmul24_fa5_11_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa4_11_or0 >> 0) & 0x01);
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s_arrmul24_fa5_11_and1 = ((s_arrmul24_fa5_11_xor0 >> 0) & 0x01) & ((s_arrmul24_fa4_11_or0 >> 0) & 0x01);
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s_arrmul24_fa5_11_or0 = ((s_arrmul24_fa5_11_and0 >> 0) & 0x01) | ((s_arrmul24_fa5_11_and1 >> 0) & 0x01);
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s_arrmul24_and6_11 = ((a >> 6) & 0x01) & ((b >> 11) & 0x01);
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s_arrmul24_fa6_11_xor0 = ((s_arrmul24_and6_11 >> 0) & 0x01) ^ ((s_arrmul24_fa7_10_xor1 >> 0) & 0x01);
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s_arrmul24_fa6_11_and0 = ((s_arrmul24_and6_11 >> 0) & 0x01) & ((s_arrmul24_fa7_10_xor1 >> 0) & 0x01);
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s_arrmul24_fa6_11_xor1 = ((s_arrmul24_fa6_11_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa5_11_or0 >> 0) & 0x01);
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s_arrmul24_fa6_11_and1 = ((s_arrmul24_fa6_11_xor0 >> 0) & 0x01) & ((s_arrmul24_fa5_11_or0 >> 0) & 0x01);
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s_arrmul24_fa6_11_or0 = ((s_arrmul24_fa6_11_and0 >> 0) & 0x01) | ((s_arrmul24_fa6_11_and1 >> 0) & 0x01);
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s_arrmul24_and7_11 = ((a >> 7) & 0x01) & ((b >> 11) & 0x01);
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s_arrmul24_fa7_11_xor0 = ((s_arrmul24_and7_11 >> 0) & 0x01) ^ ((s_arrmul24_fa8_10_xor1 >> 0) & 0x01);
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s_arrmul24_fa7_11_and0 = ((s_arrmul24_and7_11 >> 0) & 0x01) & ((s_arrmul24_fa8_10_xor1 >> 0) & 0x01);
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s_arrmul24_fa7_11_xor1 = ((s_arrmul24_fa7_11_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa6_11_or0 >> 0) & 0x01);
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s_arrmul24_fa7_11_and1 = ((s_arrmul24_fa7_11_xor0 >> 0) & 0x01) & ((s_arrmul24_fa6_11_or0 >> 0) & 0x01);
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s_arrmul24_fa7_11_or0 = ((s_arrmul24_fa7_11_and0 >> 0) & 0x01) | ((s_arrmul24_fa7_11_and1 >> 0) & 0x01);
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s_arrmul24_and8_11 = ((a >> 8) & 0x01) & ((b >> 11) & 0x01);
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s_arrmul24_fa8_11_xor0 = ((s_arrmul24_and8_11 >> 0) & 0x01) ^ ((s_arrmul24_fa9_10_xor1 >> 0) & 0x01);
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s_arrmul24_fa8_11_and0 = ((s_arrmul24_and8_11 >> 0) & 0x01) & ((s_arrmul24_fa9_10_xor1 >> 0) & 0x01);
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s_arrmul24_fa8_11_xor1 = ((s_arrmul24_fa8_11_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa7_11_or0 >> 0) & 0x01);
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s_arrmul24_fa8_11_and1 = ((s_arrmul24_fa8_11_xor0 >> 0) & 0x01) & ((s_arrmul24_fa7_11_or0 >> 0) & 0x01);
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s_arrmul24_fa8_11_or0 = ((s_arrmul24_fa8_11_and0 >> 0) & 0x01) | ((s_arrmul24_fa8_11_and1 >> 0) & 0x01);
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s_arrmul24_and9_11 = ((a >> 9) & 0x01) & ((b >> 11) & 0x01);
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s_arrmul24_fa9_11_xor0 = ((s_arrmul24_and9_11 >> 0) & 0x01) ^ ((s_arrmul24_fa10_10_xor1 >> 0) & 0x01);
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s_arrmul24_fa9_11_and0 = ((s_arrmul24_and9_11 >> 0) & 0x01) & ((s_arrmul24_fa10_10_xor1 >> 0) & 0x01);
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s_arrmul24_fa9_11_xor1 = ((s_arrmul24_fa9_11_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa8_11_or0 >> 0) & 0x01);
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s_arrmul24_fa9_11_and1 = ((s_arrmul24_fa9_11_xor0 >> 0) & 0x01) & ((s_arrmul24_fa8_11_or0 >> 0) & 0x01);
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s_arrmul24_fa9_11_or0 = ((s_arrmul24_fa9_11_and0 >> 0) & 0x01) | ((s_arrmul24_fa9_11_and1 >> 0) & 0x01);
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s_arrmul24_and10_11 = ((a >> 10) & 0x01) & ((b >> 11) & 0x01);
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s_arrmul24_fa10_11_xor0 = ((s_arrmul24_and10_11 >> 0) & 0x01) ^ ((s_arrmul24_fa11_10_xor1 >> 0) & 0x01);
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s_arrmul24_fa10_11_and0 = ((s_arrmul24_and10_11 >> 0) & 0x01) & ((s_arrmul24_fa11_10_xor1 >> 0) & 0x01);
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s_arrmul24_fa10_11_xor1 = ((s_arrmul24_fa10_11_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa9_11_or0 >> 0) & 0x01);
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s_arrmul24_fa10_11_and1 = ((s_arrmul24_fa10_11_xor0 >> 0) & 0x01) & ((s_arrmul24_fa9_11_or0 >> 0) & 0x01);
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s_arrmul24_fa10_11_or0 = ((s_arrmul24_fa10_11_and0 >> 0) & 0x01) | ((s_arrmul24_fa10_11_and1 >> 0) & 0x01);
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s_arrmul24_and11_11 = ((a >> 11) & 0x01) & ((b >> 11) & 0x01);
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s_arrmul24_fa11_11_xor0 = ((s_arrmul24_and11_11 >> 0) & 0x01) ^ ((s_arrmul24_fa12_10_xor1 >> 0) & 0x01);
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s_arrmul24_fa11_11_and0 = ((s_arrmul24_and11_11 >> 0) & 0x01) & ((s_arrmul24_fa12_10_xor1 >> 0) & 0x01);
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s_arrmul24_fa11_11_xor1 = ((s_arrmul24_fa11_11_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa10_11_or0 >> 0) & 0x01);
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s_arrmul24_fa11_11_and1 = ((s_arrmul24_fa11_11_xor0 >> 0) & 0x01) & ((s_arrmul24_fa10_11_or0 >> 0) & 0x01);
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s_arrmul24_fa11_11_or0 = ((s_arrmul24_fa11_11_and0 >> 0) & 0x01) | ((s_arrmul24_fa11_11_and1 >> 0) & 0x01);
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s_arrmul24_and12_11 = ((a >> 12) & 0x01) & ((b >> 11) & 0x01);
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s_arrmul24_fa12_11_xor0 = ((s_arrmul24_and12_11 >> 0) & 0x01) ^ ((s_arrmul24_fa13_10_xor1 >> 0) & 0x01);
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s_arrmul24_fa12_11_and0 = ((s_arrmul24_and12_11 >> 0) & 0x01) & ((s_arrmul24_fa13_10_xor1 >> 0) & 0x01);
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s_arrmul24_fa12_11_xor1 = ((s_arrmul24_fa12_11_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa11_11_or0 >> 0) & 0x01);
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s_arrmul24_fa12_11_and1 = ((s_arrmul24_fa12_11_xor0 >> 0) & 0x01) & ((s_arrmul24_fa11_11_or0 >> 0) & 0x01);
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s_arrmul24_fa12_11_or0 = ((s_arrmul24_fa12_11_and0 >> 0) & 0x01) | ((s_arrmul24_fa12_11_and1 >> 0) & 0x01);
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s_arrmul24_and13_11 = ((a >> 13) & 0x01) & ((b >> 11) & 0x01);
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s_arrmul24_fa13_11_xor0 = ((s_arrmul24_and13_11 >> 0) & 0x01) ^ ((s_arrmul24_fa14_10_xor1 >> 0) & 0x01);
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s_arrmul24_fa13_11_and0 = ((s_arrmul24_and13_11 >> 0) & 0x01) & ((s_arrmul24_fa14_10_xor1 >> 0) & 0x01);
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s_arrmul24_fa13_11_xor1 = ((s_arrmul24_fa13_11_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa12_11_or0 >> 0) & 0x01);
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s_arrmul24_fa13_11_and1 = ((s_arrmul24_fa13_11_xor0 >> 0) & 0x01) & ((s_arrmul24_fa12_11_or0 >> 0) & 0x01);
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s_arrmul24_fa13_11_or0 = ((s_arrmul24_fa13_11_and0 >> 0) & 0x01) | ((s_arrmul24_fa13_11_and1 >> 0) & 0x01);
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s_arrmul24_and14_11 = ((a >> 14) & 0x01) & ((b >> 11) & 0x01);
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s_arrmul24_fa14_11_xor0 = ((s_arrmul24_and14_11 >> 0) & 0x01) ^ ((s_arrmul24_fa15_10_xor1 >> 0) & 0x01);
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s_arrmul24_fa14_11_and0 = ((s_arrmul24_and14_11 >> 0) & 0x01) & ((s_arrmul24_fa15_10_xor1 >> 0) & 0x01);
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s_arrmul24_fa14_11_xor1 = ((s_arrmul24_fa14_11_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa13_11_or0 >> 0) & 0x01);
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s_arrmul24_fa14_11_and1 = ((s_arrmul24_fa14_11_xor0 >> 0) & 0x01) & ((s_arrmul24_fa13_11_or0 >> 0) & 0x01);
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s_arrmul24_fa14_11_or0 = ((s_arrmul24_fa14_11_and0 >> 0) & 0x01) | ((s_arrmul24_fa14_11_and1 >> 0) & 0x01);
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s_arrmul24_and15_11 = ((a >> 15) & 0x01) & ((b >> 11) & 0x01);
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s_arrmul24_fa15_11_xor0 = ((s_arrmul24_and15_11 >> 0) & 0x01) ^ ((s_arrmul24_fa16_10_xor1 >> 0) & 0x01);
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s_arrmul24_fa15_11_and0 = ((s_arrmul24_and15_11 >> 0) & 0x01) & ((s_arrmul24_fa16_10_xor1 >> 0) & 0x01);
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s_arrmul24_fa15_11_xor1 = ((s_arrmul24_fa15_11_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa14_11_or0 >> 0) & 0x01);
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s_arrmul24_fa15_11_and1 = ((s_arrmul24_fa15_11_xor0 >> 0) & 0x01) & ((s_arrmul24_fa14_11_or0 >> 0) & 0x01);
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s_arrmul24_fa15_11_or0 = ((s_arrmul24_fa15_11_and0 >> 0) & 0x01) | ((s_arrmul24_fa15_11_and1 >> 0) & 0x01);
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s_arrmul24_and16_11 = ((a >> 16) & 0x01) & ((b >> 11) & 0x01);
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s_arrmul24_fa16_11_xor0 = ((s_arrmul24_and16_11 >> 0) & 0x01) ^ ((s_arrmul24_fa17_10_xor1 >> 0) & 0x01);
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s_arrmul24_fa16_11_and0 = ((s_arrmul24_and16_11 >> 0) & 0x01) & ((s_arrmul24_fa17_10_xor1 >> 0) & 0x01);
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s_arrmul24_fa16_11_xor1 = ((s_arrmul24_fa16_11_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa15_11_or0 >> 0) & 0x01);
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s_arrmul24_fa16_11_and1 = ((s_arrmul24_fa16_11_xor0 >> 0) & 0x01) & ((s_arrmul24_fa15_11_or0 >> 0) & 0x01);
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s_arrmul24_fa16_11_or0 = ((s_arrmul24_fa16_11_and0 >> 0) & 0x01) | ((s_arrmul24_fa16_11_and1 >> 0) & 0x01);
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s_arrmul24_and17_11 = ((a >> 17) & 0x01) & ((b >> 11) & 0x01);
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s_arrmul24_fa17_11_xor0 = ((s_arrmul24_and17_11 >> 0) & 0x01) ^ ((s_arrmul24_fa18_10_xor1 >> 0) & 0x01);
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s_arrmul24_fa17_11_and0 = ((s_arrmul24_and17_11 >> 0) & 0x01) & ((s_arrmul24_fa18_10_xor1 >> 0) & 0x01);
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s_arrmul24_fa17_11_xor1 = ((s_arrmul24_fa17_11_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa16_11_or0 >> 0) & 0x01);
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s_arrmul24_fa17_11_and1 = ((s_arrmul24_fa17_11_xor0 >> 0) & 0x01) & ((s_arrmul24_fa16_11_or0 >> 0) & 0x01);
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s_arrmul24_fa17_11_or0 = ((s_arrmul24_fa17_11_and0 >> 0) & 0x01) | ((s_arrmul24_fa17_11_and1 >> 0) & 0x01);
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s_arrmul24_and18_11 = ((a >> 18) & 0x01) & ((b >> 11) & 0x01);
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s_arrmul24_fa18_11_xor0 = ((s_arrmul24_and18_11 >> 0) & 0x01) ^ ((s_arrmul24_fa19_10_xor1 >> 0) & 0x01);
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s_arrmul24_fa18_11_and0 = ((s_arrmul24_and18_11 >> 0) & 0x01) & ((s_arrmul24_fa19_10_xor1 >> 0) & 0x01);
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s_arrmul24_fa18_11_xor1 = ((s_arrmul24_fa18_11_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa17_11_or0 >> 0) & 0x01);
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s_arrmul24_fa18_11_and1 = ((s_arrmul24_fa18_11_xor0 >> 0) & 0x01) & ((s_arrmul24_fa17_11_or0 >> 0) & 0x01);
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s_arrmul24_fa18_11_or0 = ((s_arrmul24_fa18_11_and0 >> 0) & 0x01) | ((s_arrmul24_fa18_11_and1 >> 0) & 0x01);
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s_arrmul24_and19_11 = ((a >> 19) & 0x01) & ((b >> 11) & 0x01);
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s_arrmul24_fa19_11_xor0 = ((s_arrmul24_and19_11 >> 0) & 0x01) ^ ((s_arrmul24_fa20_10_xor1 >> 0) & 0x01);
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s_arrmul24_fa19_11_and0 = ((s_arrmul24_and19_11 >> 0) & 0x01) & ((s_arrmul24_fa20_10_xor1 >> 0) & 0x01);
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s_arrmul24_fa19_11_xor1 = ((s_arrmul24_fa19_11_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa18_11_or0 >> 0) & 0x01);
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s_arrmul24_fa19_11_and1 = ((s_arrmul24_fa19_11_xor0 >> 0) & 0x01) & ((s_arrmul24_fa18_11_or0 >> 0) & 0x01);
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s_arrmul24_fa19_11_or0 = ((s_arrmul24_fa19_11_and0 >> 0) & 0x01) | ((s_arrmul24_fa19_11_and1 >> 0) & 0x01);
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s_arrmul24_and20_11 = ((a >> 20) & 0x01) & ((b >> 11) & 0x01);
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s_arrmul24_fa20_11_xor0 = ((s_arrmul24_and20_11 >> 0) & 0x01) ^ ((s_arrmul24_fa21_10_xor1 >> 0) & 0x01);
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s_arrmul24_fa20_11_and0 = ((s_arrmul24_and20_11 >> 0) & 0x01) & ((s_arrmul24_fa21_10_xor1 >> 0) & 0x01);
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s_arrmul24_fa20_11_xor1 = ((s_arrmul24_fa20_11_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa19_11_or0 >> 0) & 0x01);
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s_arrmul24_fa20_11_and1 = ((s_arrmul24_fa20_11_xor0 >> 0) & 0x01) & ((s_arrmul24_fa19_11_or0 >> 0) & 0x01);
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s_arrmul24_fa20_11_or0 = ((s_arrmul24_fa20_11_and0 >> 0) & 0x01) | ((s_arrmul24_fa20_11_and1 >> 0) & 0x01);
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s_arrmul24_and21_11 = ((a >> 21) & 0x01) & ((b >> 11) & 0x01);
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s_arrmul24_fa21_11_xor0 = ((s_arrmul24_and21_11 >> 0) & 0x01) ^ ((s_arrmul24_fa22_10_xor1 >> 0) & 0x01);
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s_arrmul24_fa21_11_and0 = ((s_arrmul24_and21_11 >> 0) & 0x01) & ((s_arrmul24_fa22_10_xor1 >> 0) & 0x01);
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s_arrmul24_fa21_11_xor1 = ((s_arrmul24_fa21_11_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa20_11_or0 >> 0) & 0x01);
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s_arrmul24_fa21_11_and1 = ((s_arrmul24_fa21_11_xor0 >> 0) & 0x01) & ((s_arrmul24_fa20_11_or0 >> 0) & 0x01);
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s_arrmul24_fa21_11_or0 = ((s_arrmul24_fa21_11_and0 >> 0) & 0x01) | ((s_arrmul24_fa21_11_and1 >> 0) & 0x01);
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s_arrmul24_and22_11 = ((a >> 22) & 0x01) & ((b >> 11) & 0x01);
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s_arrmul24_fa22_11_xor0 = ((s_arrmul24_and22_11 >> 0) & 0x01) ^ ((s_arrmul24_fa23_10_xor1 >> 0) & 0x01);
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s_arrmul24_fa22_11_and0 = ((s_arrmul24_and22_11 >> 0) & 0x01) & ((s_arrmul24_fa23_10_xor1 >> 0) & 0x01);
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s_arrmul24_fa22_11_xor1 = ((s_arrmul24_fa22_11_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa21_11_or0 >> 0) & 0x01);
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s_arrmul24_fa22_11_and1 = ((s_arrmul24_fa22_11_xor0 >> 0) & 0x01) & ((s_arrmul24_fa21_11_or0 >> 0) & 0x01);
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s_arrmul24_fa22_11_or0 = ((s_arrmul24_fa22_11_and0 >> 0) & 0x01) | ((s_arrmul24_fa22_11_and1 >> 0) & 0x01);
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s_arrmul24_nand23_11 = ~(((a >> 23) & 0x01) & ((b >> 11) & 0x01)) & 0x01;
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s_arrmul24_fa23_11_xor0 = ((s_arrmul24_nand23_11 >> 0) & 0x01) ^ ((s_arrmul24_fa23_10_or0 >> 0) & 0x01);
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s_arrmul24_fa23_11_and0 = ((s_arrmul24_nand23_11 >> 0) & 0x01) & ((s_arrmul24_fa23_10_or0 >> 0) & 0x01);
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s_arrmul24_fa23_11_xor1 = ((s_arrmul24_fa23_11_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa22_11_or0 >> 0) & 0x01);
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s_arrmul24_fa23_11_and1 = ((s_arrmul24_fa23_11_xor0 >> 0) & 0x01) & ((s_arrmul24_fa22_11_or0 >> 0) & 0x01);
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s_arrmul24_fa23_11_or0 = ((s_arrmul24_fa23_11_and0 >> 0) & 0x01) | ((s_arrmul24_fa23_11_and1 >> 0) & 0x01);
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s_arrmul24_and0_12 = ((a >> 0) & 0x01) & ((b >> 12) & 0x01);
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s_arrmul24_ha0_12_xor0 = ((s_arrmul24_and0_12 >> 0) & 0x01) ^ ((s_arrmul24_fa1_11_xor1 >> 0) & 0x01);
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s_arrmul24_ha0_12_and0 = ((s_arrmul24_and0_12 >> 0) & 0x01) & ((s_arrmul24_fa1_11_xor1 >> 0) & 0x01);
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s_arrmul24_and1_12 = ((a >> 1) & 0x01) & ((b >> 12) & 0x01);
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s_arrmul24_fa1_12_xor0 = ((s_arrmul24_and1_12 >> 0) & 0x01) ^ ((s_arrmul24_fa2_11_xor1 >> 0) & 0x01);
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s_arrmul24_fa1_12_and0 = ((s_arrmul24_and1_12 >> 0) & 0x01) & ((s_arrmul24_fa2_11_xor1 >> 0) & 0x01);
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s_arrmul24_fa1_12_xor1 = ((s_arrmul24_fa1_12_xor0 >> 0) & 0x01) ^ ((s_arrmul24_ha0_12_and0 >> 0) & 0x01);
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s_arrmul24_fa1_12_and1 = ((s_arrmul24_fa1_12_xor0 >> 0) & 0x01) & ((s_arrmul24_ha0_12_and0 >> 0) & 0x01);
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s_arrmul24_fa1_12_or0 = ((s_arrmul24_fa1_12_and0 >> 0) & 0x01) | ((s_arrmul24_fa1_12_and1 >> 0) & 0x01);
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s_arrmul24_and2_12 = ((a >> 2) & 0x01) & ((b >> 12) & 0x01);
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s_arrmul24_fa2_12_xor0 = ((s_arrmul24_and2_12 >> 0) & 0x01) ^ ((s_arrmul24_fa3_11_xor1 >> 0) & 0x01);
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s_arrmul24_fa2_12_and0 = ((s_arrmul24_and2_12 >> 0) & 0x01) & ((s_arrmul24_fa3_11_xor1 >> 0) & 0x01);
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s_arrmul24_fa2_12_xor1 = ((s_arrmul24_fa2_12_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa1_12_or0 >> 0) & 0x01);
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s_arrmul24_fa2_12_and1 = ((s_arrmul24_fa2_12_xor0 >> 0) & 0x01) & ((s_arrmul24_fa1_12_or0 >> 0) & 0x01);
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s_arrmul24_fa2_12_or0 = ((s_arrmul24_fa2_12_and0 >> 0) & 0x01) | ((s_arrmul24_fa2_12_and1 >> 0) & 0x01);
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s_arrmul24_and3_12 = ((a >> 3) & 0x01) & ((b >> 12) & 0x01);
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s_arrmul24_fa3_12_xor0 = ((s_arrmul24_and3_12 >> 0) & 0x01) ^ ((s_arrmul24_fa4_11_xor1 >> 0) & 0x01);
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s_arrmul24_fa3_12_and0 = ((s_arrmul24_and3_12 >> 0) & 0x01) & ((s_arrmul24_fa4_11_xor1 >> 0) & 0x01);
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s_arrmul24_fa3_12_xor1 = ((s_arrmul24_fa3_12_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa2_12_or0 >> 0) & 0x01);
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s_arrmul24_fa3_12_and1 = ((s_arrmul24_fa3_12_xor0 >> 0) & 0x01) & ((s_arrmul24_fa2_12_or0 >> 0) & 0x01);
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s_arrmul24_fa3_12_or0 = ((s_arrmul24_fa3_12_and0 >> 0) & 0x01) | ((s_arrmul24_fa3_12_and1 >> 0) & 0x01);
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s_arrmul24_and4_12 = ((a >> 4) & 0x01) & ((b >> 12) & 0x01);
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s_arrmul24_fa4_12_xor0 = ((s_arrmul24_and4_12 >> 0) & 0x01) ^ ((s_arrmul24_fa5_11_xor1 >> 0) & 0x01);
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s_arrmul24_fa4_12_and0 = ((s_arrmul24_and4_12 >> 0) & 0x01) & ((s_arrmul24_fa5_11_xor1 >> 0) & 0x01);
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s_arrmul24_fa4_12_xor1 = ((s_arrmul24_fa4_12_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa3_12_or0 >> 0) & 0x01);
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s_arrmul24_fa4_12_and1 = ((s_arrmul24_fa4_12_xor0 >> 0) & 0x01) & ((s_arrmul24_fa3_12_or0 >> 0) & 0x01);
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s_arrmul24_fa4_12_or0 = ((s_arrmul24_fa4_12_and0 >> 0) & 0x01) | ((s_arrmul24_fa4_12_and1 >> 0) & 0x01);
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s_arrmul24_and5_12 = ((a >> 5) & 0x01) & ((b >> 12) & 0x01);
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s_arrmul24_fa5_12_xor0 = ((s_arrmul24_and5_12 >> 0) & 0x01) ^ ((s_arrmul24_fa6_11_xor1 >> 0) & 0x01);
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s_arrmul24_fa5_12_and0 = ((s_arrmul24_and5_12 >> 0) & 0x01) & ((s_arrmul24_fa6_11_xor1 >> 0) & 0x01);
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s_arrmul24_fa5_12_xor1 = ((s_arrmul24_fa5_12_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa4_12_or0 >> 0) & 0x01);
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s_arrmul24_fa5_12_and1 = ((s_arrmul24_fa5_12_xor0 >> 0) & 0x01) & ((s_arrmul24_fa4_12_or0 >> 0) & 0x01);
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s_arrmul24_fa5_12_or0 = ((s_arrmul24_fa5_12_and0 >> 0) & 0x01) | ((s_arrmul24_fa5_12_and1 >> 0) & 0x01);
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s_arrmul24_and6_12 = ((a >> 6) & 0x01) & ((b >> 12) & 0x01);
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s_arrmul24_fa6_12_xor0 = ((s_arrmul24_and6_12 >> 0) & 0x01) ^ ((s_arrmul24_fa7_11_xor1 >> 0) & 0x01);
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s_arrmul24_fa6_12_and0 = ((s_arrmul24_and6_12 >> 0) & 0x01) & ((s_arrmul24_fa7_11_xor1 >> 0) & 0x01);
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s_arrmul24_fa6_12_xor1 = ((s_arrmul24_fa6_12_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa5_12_or0 >> 0) & 0x01);
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s_arrmul24_fa6_12_and1 = ((s_arrmul24_fa6_12_xor0 >> 0) & 0x01) & ((s_arrmul24_fa5_12_or0 >> 0) & 0x01);
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s_arrmul24_fa6_12_or0 = ((s_arrmul24_fa6_12_and0 >> 0) & 0x01) | ((s_arrmul24_fa6_12_and1 >> 0) & 0x01);
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s_arrmul24_and7_12 = ((a >> 7) & 0x01) & ((b >> 12) & 0x01);
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s_arrmul24_fa7_12_xor0 = ((s_arrmul24_and7_12 >> 0) & 0x01) ^ ((s_arrmul24_fa8_11_xor1 >> 0) & 0x01);
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s_arrmul24_fa7_12_and0 = ((s_arrmul24_and7_12 >> 0) & 0x01) & ((s_arrmul24_fa8_11_xor1 >> 0) & 0x01);
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s_arrmul24_fa7_12_xor1 = ((s_arrmul24_fa7_12_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa6_12_or0 >> 0) & 0x01);
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s_arrmul24_fa7_12_and1 = ((s_arrmul24_fa7_12_xor0 >> 0) & 0x01) & ((s_arrmul24_fa6_12_or0 >> 0) & 0x01);
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s_arrmul24_fa7_12_or0 = ((s_arrmul24_fa7_12_and0 >> 0) & 0x01) | ((s_arrmul24_fa7_12_and1 >> 0) & 0x01);
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s_arrmul24_and8_12 = ((a >> 8) & 0x01) & ((b >> 12) & 0x01);
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s_arrmul24_fa8_12_xor0 = ((s_arrmul24_and8_12 >> 0) & 0x01) ^ ((s_arrmul24_fa9_11_xor1 >> 0) & 0x01);
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s_arrmul24_fa8_12_and0 = ((s_arrmul24_and8_12 >> 0) & 0x01) & ((s_arrmul24_fa9_11_xor1 >> 0) & 0x01);
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s_arrmul24_fa8_12_xor1 = ((s_arrmul24_fa8_12_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa7_12_or0 >> 0) & 0x01);
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s_arrmul24_fa8_12_and1 = ((s_arrmul24_fa8_12_xor0 >> 0) & 0x01) & ((s_arrmul24_fa7_12_or0 >> 0) & 0x01);
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s_arrmul24_fa8_12_or0 = ((s_arrmul24_fa8_12_and0 >> 0) & 0x01) | ((s_arrmul24_fa8_12_and1 >> 0) & 0x01);
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s_arrmul24_and9_12 = ((a >> 9) & 0x01) & ((b >> 12) & 0x01);
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s_arrmul24_fa9_12_xor0 = ((s_arrmul24_and9_12 >> 0) & 0x01) ^ ((s_arrmul24_fa10_11_xor1 >> 0) & 0x01);
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s_arrmul24_fa9_12_and0 = ((s_arrmul24_and9_12 >> 0) & 0x01) & ((s_arrmul24_fa10_11_xor1 >> 0) & 0x01);
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s_arrmul24_fa9_12_xor1 = ((s_arrmul24_fa9_12_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa8_12_or0 >> 0) & 0x01);
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s_arrmul24_fa9_12_and1 = ((s_arrmul24_fa9_12_xor0 >> 0) & 0x01) & ((s_arrmul24_fa8_12_or0 >> 0) & 0x01);
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s_arrmul24_fa9_12_or0 = ((s_arrmul24_fa9_12_and0 >> 0) & 0x01) | ((s_arrmul24_fa9_12_and1 >> 0) & 0x01);
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s_arrmul24_and10_12 = ((a >> 10) & 0x01) & ((b >> 12) & 0x01);
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s_arrmul24_fa10_12_xor0 = ((s_arrmul24_and10_12 >> 0) & 0x01) ^ ((s_arrmul24_fa11_11_xor1 >> 0) & 0x01);
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s_arrmul24_fa10_12_and0 = ((s_arrmul24_and10_12 >> 0) & 0x01) & ((s_arrmul24_fa11_11_xor1 >> 0) & 0x01);
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s_arrmul24_fa10_12_xor1 = ((s_arrmul24_fa10_12_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa9_12_or0 >> 0) & 0x01);
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s_arrmul24_fa10_12_and1 = ((s_arrmul24_fa10_12_xor0 >> 0) & 0x01) & ((s_arrmul24_fa9_12_or0 >> 0) & 0x01);
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s_arrmul24_fa10_12_or0 = ((s_arrmul24_fa10_12_and0 >> 0) & 0x01) | ((s_arrmul24_fa10_12_and1 >> 0) & 0x01);
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s_arrmul24_and11_12 = ((a >> 11) & 0x01) & ((b >> 12) & 0x01);
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s_arrmul24_fa11_12_xor0 = ((s_arrmul24_and11_12 >> 0) & 0x01) ^ ((s_arrmul24_fa12_11_xor1 >> 0) & 0x01);
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s_arrmul24_fa11_12_and0 = ((s_arrmul24_and11_12 >> 0) & 0x01) & ((s_arrmul24_fa12_11_xor1 >> 0) & 0x01);
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s_arrmul24_fa11_12_xor1 = ((s_arrmul24_fa11_12_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa10_12_or0 >> 0) & 0x01);
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s_arrmul24_fa11_12_and1 = ((s_arrmul24_fa11_12_xor0 >> 0) & 0x01) & ((s_arrmul24_fa10_12_or0 >> 0) & 0x01);
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s_arrmul24_fa11_12_or0 = ((s_arrmul24_fa11_12_and0 >> 0) & 0x01) | ((s_arrmul24_fa11_12_and1 >> 0) & 0x01);
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s_arrmul24_and12_12 = ((a >> 12) & 0x01) & ((b >> 12) & 0x01);
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s_arrmul24_fa12_12_xor0 = ((s_arrmul24_and12_12 >> 0) & 0x01) ^ ((s_arrmul24_fa13_11_xor1 >> 0) & 0x01);
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s_arrmul24_fa12_12_and0 = ((s_arrmul24_and12_12 >> 0) & 0x01) & ((s_arrmul24_fa13_11_xor1 >> 0) & 0x01);
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s_arrmul24_fa12_12_xor1 = ((s_arrmul24_fa12_12_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa11_12_or0 >> 0) & 0x01);
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s_arrmul24_fa12_12_and1 = ((s_arrmul24_fa12_12_xor0 >> 0) & 0x01) & ((s_arrmul24_fa11_12_or0 >> 0) & 0x01);
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s_arrmul24_fa12_12_or0 = ((s_arrmul24_fa12_12_and0 >> 0) & 0x01) | ((s_arrmul24_fa12_12_and1 >> 0) & 0x01);
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s_arrmul24_and13_12 = ((a >> 13) & 0x01) & ((b >> 12) & 0x01);
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s_arrmul24_fa13_12_xor0 = ((s_arrmul24_and13_12 >> 0) & 0x01) ^ ((s_arrmul24_fa14_11_xor1 >> 0) & 0x01);
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s_arrmul24_fa13_12_and0 = ((s_arrmul24_and13_12 >> 0) & 0x01) & ((s_arrmul24_fa14_11_xor1 >> 0) & 0x01);
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s_arrmul24_fa13_12_xor1 = ((s_arrmul24_fa13_12_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa12_12_or0 >> 0) & 0x01);
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s_arrmul24_fa13_12_and1 = ((s_arrmul24_fa13_12_xor0 >> 0) & 0x01) & ((s_arrmul24_fa12_12_or0 >> 0) & 0x01);
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s_arrmul24_fa13_12_or0 = ((s_arrmul24_fa13_12_and0 >> 0) & 0x01) | ((s_arrmul24_fa13_12_and1 >> 0) & 0x01);
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s_arrmul24_and14_12 = ((a >> 14) & 0x01) & ((b >> 12) & 0x01);
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s_arrmul24_fa14_12_xor0 = ((s_arrmul24_and14_12 >> 0) & 0x01) ^ ((s_arrmul24_fa15_11_xor1 >> 0) & 0x01);
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s_arrmul24_fa14_12_and0 = ((s_arrmul24_and14_12 >> 0) & 0x01) & ((s_arrmul24_fa15_11_xor1 >> 0) & 0x01);
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s_arrmul24_fa14_12_xor1 = ((s_arrmul24_fa14_12_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa13_12_or0 >> 0) & 0x01);
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s_arrmul24_fa14_12_and1 = ((s_arrmul24_fa14_12_xor0 >> 0) & 0x01) & ((s_arrmul24_fa13_12_or0 >> 0) & 0x01);
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s_arrmul24_fa14_12_or0 = ((s_arrmul24_fa14_12_and0 >> 0) & 0x01) | ((s_arrmul24_fa14_12_and1 >> 0) & 0x01);
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s_arrmul24_and15_12 = ((a >> 15) & 0x01) & ((b >> 12) & 0x01);
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s_arrmul24_fa15_12_xor0 = ((s_arrmul24_and15_12 >> 0) & 0x01) ^ ((s_arrmul24_fa16_11_xor1 >> 0) & 0x01);
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s_arrmul24_fa15_12_and0 = ((s_arrmul24_and15_12 >> 0) & 0x01) & ((s_arrmul24_fa16_11_xor1 >> 0) & 0x01);
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s_arrmul24_fa15_12_xor1 = ((s_arrmul24_fa15_12_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa14_12_or0 >> 0) & 0x01);
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s_arrmul24_fa15_12_and1 = ((s_arrmul24_fa15_12_xor0 >> 0) & 0x01) & ((s_arrmul24_fa14_12_or0 >> 0) & 0x01);
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s_arrmul24_fa15_12_or0 = ((s_arrmul24_fa15_12_and0 >> 0) & 0x01) | ((s_arrmul24_fa15_12_and1 >> 0) & 0x01);
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s_arrmul24_and16_12 = ((a >> 16) & 0x01) & ((b >> 12) & 0x01);
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s_arrmul24_fa16_12_xor0 = ((s_arrmul24_and16_12 >> 0) & 0x01) ^ ((s_arrmul24_fa17_11_xor1 >> 0) & 0x01);
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s_arrmul24_fa16_12_and0 = ((s_arrmul24_and16_12 >> 0) & 0x01) & ((s_arrmul24_fa17_11_xor1 >> 0) & 0x01);
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s_arrmul24_fa16_12_xor1 = ((s_arrmul24_fa16_12_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa15_12_or0 >> 0) & 0x01);
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s_arrmul24_fa16_12_and1 = ((s_arrmul24_fa16_12_xor0 >> 0) & 0x01) & ((s_arrmul24_fa15_12_or0 >> 0) & 0x01);
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s_arrmul24_fa16_12_or0 = ((s_arrmul24_fa16_12_and0 >> 0) & 0x01) | ((s_arrmul24_fa16_12_and1 >> 0) & 0x01);
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s_arrmul24_and17_12 = ((a >> 17) & 0x01) & ((b >> 12) & 0x01);
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s_arrmul24_fa17_12_xor0 = ((s_arrmul24_and17_12 >> 0) & 0x01) ^ ((s_arrmul24_fa18_11_xor1 >> 0) & 0x01);
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s_arrmul24_fa17_12_and0 = ((s_arrmul24_and17_12 >> 0) & 0x01) & ((s_arrmul24_fa18_11_xor1 >> 0) & 0x01);
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s_arrmul24_fa17_12_xor1 = ((s_arrmul24_fa17_12_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa16_12_or0 >> 0) & 0x01);
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s_arrmul24_fa17_12_and1 = ((s_arrmul24_fa17_12_xor0 >> 0) & 0x01) & ((s_arrmul24_fa16_12_or0 >> 0) & 0x01);
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s_arrmul24_fa17_12_or0 = ((s_arrmul24_fa17_12_and0 >> 0) & 0x01) | ((s_arrmul24_fa17_12_and1 >> 0) & 0x01);
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s_arrmul24_and18_12 = ((a >> 18) & 0x01) & ((b >> 12) & 0x01);
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s_arrmul24_fa18_12_xor0 = ((s_arrmul24_and18_12 >> 0) & 0x01) ^ ((s_arrmul24_fa19_11_xor1 >> 0) & 0x01);
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s_arrmul24_fa18_12_and0 = ((s_arrmul24_and18_12 >> 0) & 0x01) & ((s_arrmul24_fa19_11_xor1 >> 0) & 0x01);
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s_arrmul24_fa18_12_xor1 = ((s_arrmul24_fa18_12_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa17_12_or0 >> 0) & 0x01);
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s_arrmul24_fa18_12_and1 = ((s_arrmul24_fa18_12_xor0 >> 0) & 0x01) & ((s_arrmul24_fa17_12_or0 >> 0) & 0x01);
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s_arrmul24_fa18_12_or0 = ((s_arrmul24_fa18_12_and0 >> 0) & 0x01) | ((s_arrmul24_fa18_12_and1 >> 0) & 0x01);
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s_arrmul24_and19_12 = ((a >> 19) & 0x01) & ((b >> 12) & 0x01);
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s_arrmul24_fa19_12_xor0 = ((s_arrmul24_and19_12 >> 0) & 0x01) ^ ((s_arrmul24_fa20_11_xor1 >> 0) & 0x01);
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s_arrmul24_fa19_12_and0 = ((s_arrmul24_and19_12 >> 0) & 0x01) & ((s_arrmul24_fa20_11_xor1 >> 0) & 0x01);
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s_arrmul24_fa19_12_xor1 = ((s_arrmul24_fa19_12_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa18_12_or0 >> 0) & 0x01);
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s_arrmul24_fa19_12_and1 = ((s_arrmul24_fa19_12_xor0 >> 0) & 0x01) & ((s_arrmul24_fa18_12_or0 >> 0) & 0x01);
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s_arrmul24_fa19_12_or0 = ((s_arrmul24_fa19_12_and0 >> 0) & 0x01) | ((s_arrmul24_fa19_12_and1 >> 0) & 0x01);
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s_arrmul24_and20_12 = ((a >> 20) & 0x01) & ((b >> 12) & 0x01);
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s_arrmul24_fa20_12_xor0 = ((s_arrmul24_and20_12 >> 0) & 0x01) ^ ((s_arrmul24_fa21_11_xor1 >> 0) & 0x01);
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s_arrmul24_fa20_12_and0 = ((s_arrmul24_and20_12 >> 0) & 0x01) & ((s_arrmul24_fa21_11_xor1 >> 0) & 0x01);
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s_arrmul24_fa20_12_xor1 = ((s_arrmul24_fa20_12_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa19_12_or0 >> 0) & 0x01);
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s_arrmul24_fa20_12_and1 = ((s_arrmul24_fa20_12_xor0 >> 0) & 0x01) & ((s_arrmul24_fa19_12_or0 >> 0) & 0x01);
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s_arrmul24_fa20_12_or0 = ((s_arrmul24_fa20_12_and0 >> 0) & 0x01) | ((s_arrmul24_fa20_12_and1 >> 0) & 0x01);
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s_arrmul24_and21_12 = ((a >> 21) & 0x01) & ((b >> 12) & 0x01);
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s_arrmul24_fa21_12_xor0 = ((s_arrmul24_and21_12 >> 0) & 0x01) ^ ((s_arrmul24_fa22_11_xor1 >> 0) & 0x01);
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s_arrmul24_fa21_12_and0 = ((s_arrmul24_and21_12 >> 0) & 0x01) & ((s_arrmul24_fa22_11_xor1 >> 0) & 0x01);
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s_arrmul24_fa21_12_xor1 = ((s_arrmul24_fa21_12_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa20_12_or0 >> 0) & 0x01);
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s_arrmul24_fa21_12_and1 = ((s_arrmul24_fa21_12_xor0 >> 0) & 0x01) & ((s_arrmul24_fa20_12_or0 >> 0) & 0x01);
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s_arrmul24_fa21_12_or0 = ((s_arrmul24_fa21_12_and0 >> 0) & 0x01) | ((s_arrmul24_fa21_12_and1 >> 0) & 0x01);
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s_arrmul24_and22_12 = ((a >> 22) & 0x01) & ((b >> 12) & 0x01);
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s_arrmul24_fa22_12_xor0 = ((s_arrmul24_and22_12 >> 0) & 0x01) ^ ((s_arrmul24_fa23_11_xor1 >> 0) & 0x01);
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s_arrmul24_fa22_12_and0 = ((s_arrmul24_and22_12 >> 0) & 0x01) & ((s_arrmul24_fa23_11_xor1 >> 0) & 0x01);
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s_arrmul24_fa22_12_xor1 = ((s_arrmul24_fa22_12_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa21_12_or0 >> 0) & 0x01);
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s_arrmul24_fa22_12_and1 = ((s_arrmul24_fa22_12_xor0 >> 0) & 0x01) & ((s_arrmul24_fa21_12_or0 >> 0) & 0x01);
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s_arrmul24_fa22_12_or0 = ((s_arrmul24_fa22_12_and0 >> 0) & 0x01) | ((s_arrmul24_fa22_12_and1 >> 0) & 0x01);
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s_arrmul24_nand23_12 = ~(((a >> 23) & 0x01) & ((b >> 12) & 0x01)) & 0x01;
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s_arrmul24_fa23_12_xor0 = ((s_arrmul24_nand23_12 >> 0) & 0x01) ^ ((s_arrmul24_fa23_11_or0 >> 0) & 0x01);
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s_arrmul24_fa23_12_and0 = ((s_arrmul24_nand23_12 >> 0) & 0x01) & ((s_arrmul24_fa23_11_or0 >> 0) & 0x01);
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s_arrmul24_fa23_12_xor1 = ((s_arrmul24_fa23_12_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa22_12_or0 >> 0) & 0x01);
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s_arrmul24_fa23_12_and1 = ((s_arrmul24_fa23_12_xor0 >> 0) & 0x01) & ((s_arrmul24_fa22_12_or0 >> 0) & 0x01);
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s_arrmul24_fa23_12_or0 = ((s_arrmul24_fa23_12_and0 >> 0) & 0x01) | ((s_arrmul24_fa23_12_and1 >> 0) & 0x01);
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s_arrmul24_and0_13 = ((a >> 0) & 0x01) & ((b >> 13) & 0x01);
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s_arrmul24_ha0_13_xor0 = ((s_arrmul24_and0_13 >> 0) & 0x01) ^ ((s_arrmul24_fa1_12_xor1 >> 0) & 0x01);
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s_arrmul24_ha0_13_and0 = ((s_arrmul24_and0_13 >> 0) & 0x01) & ((s_arrmul24_fa1_12_xor1 >> 0) & 0x01);
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s_arrmul24_and1_13 = ((a >> 1) & 0x01) & ((b >> 13) & 0x01);
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s_arrmul24_fa1_13_xor0 = ((s_arrmul24_and1_13 >> 0) & 0x01) ^ ((s_arrmul24_fa2_12_xor1 >> 0) & 0x01);
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s_arrmul24_fa1_13_and0 = ((s_arrmul24_and1_13 >> 0) & 0x01) & ((s_arrmul24_fa2_12_xor1 >> 0) & 0x01);
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s_arrmul24_fa1_13_xor1 = ((s_arrmul24_fa1_13_xor0 >> 0) & 0x01) ^ ((s_arrmul24_ha0_13_and0 >> 0) & 0x01);
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s_arrmul24_fa1_13_and1 = ((s_arrmul24_fa1_13_xor0 >> 0) & 0x01) & ((s_arrmul24_ha0_13_and0 >> 0) & 0x01);
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s_arrmul24_fa1_13_or0 = ((s_arrmul24_fa1_13_and0 >> 0) & 0x01) | ((s_arrmul24_fa1_13_and1 >> 0) & 0x01);
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s_arrmul24_and2_13 = ((a >> 2) & 0x01) & ((b >> 13) & 0x01);
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s_arrmul24_fa2_13_xor0 = ((s_arrmul24_and2_13 >> 0) & 0x01) ^ ((s_arrmul24_fa3_12_xor1 >> 0) & 0x01);
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s_arrmul24_fa2_13_and0 = ((s_arrmul24_and2_13 >> 0) & 0x01) & ((s_arrmul24_fa3_12_xor1 >> 0) & 0x01);
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s_arrmul24_fa2_13_xor1 = ((s_arrmul24_fa2_13_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa1_13_or0 >> 0) & 0x01);
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s_arrmul24_fa2_13_and1 = ((s_arrmul24_fa2_13_xor0 >> 0) & 0x01) & ((s_arrmul24_fa1_13_or0 >> 0) & 0x01);
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s_arrmul24_fa2_13_or0 = ((s_arrmul24_fa2_13_and0 >> 0) & 0x01) | ((s_arrmul24_fa2_13_and1 >> 0) & 0x01);
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s_arrmul24_and3_13 = ((a >> 3) & 0x01) & ((b >> 13) & 0x01);
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s_arrmul24_fa3_13_xor0 = ((s_arrmul24_and3_13 >> 0) & 0x01) ^ ((s_arrmul24_fa4_12_xor1 >> 0) & 0x01);
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s_arrmul24_fa3_13_and0 = ((s_arrmul24_and3_13 >> 0) & 0x01) & ((s_arrmul24_fa4_12_xor1 >> 0) & 0x01);
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s_arrmul24_fa3_13_xor1 = ((s_arrmul24_fa3_13_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa2_13_or0 >> 0) & 0x01);
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s_arrmul24_fa3_13_and1 = ((s_arrmul24_fa3_13_xor0 >> 0) & 0x01) & ((s_arrmul24_fa2_13_or0 >> 0) & 0x01);
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s_arrmul24_fa3_13_or0 = ((s_arrmul24_fa3_13_and0 >> 0) & 0x01) | ((s_arrmul24_fa3_13_and1 >> 0) & 0x01);
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s_arrmul24_and4_13 = ((a >> 4) & 0x01) & ((b >> 13) & 0x01);
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s_arrmul24_fa4_13_xor0 = ((s_arrmul24_and4_13 >> 0) & 0x01) ^ ((s_arrmul24_fa5_12_xor1 >> 0) & 0x01);
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s_arrmul24_fa4_13_and0 = ((s_arrmul24_and4_13 >> 0) & 0x01) & ((s_arrmul24_fa5_12_xor1 >> 0) & 0x01);
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s_arrmul24_fa4_13_xor1 = ((s_arrmul24_fa4_13_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa3_13_or0 >> 0) & 0x01);
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s_arrmul24_fa4_13_and1 = ((s_arrmul24_fa4_13_xor0 >> 0) & 0x01) & ((s_arrmul24_fa3_13_or0 >> 0) & 0x01);
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s_arrmul24_fa4_13_or0 = ((s_arrmul24_fa4_13_and0 >> 0) & 0x01) | ((s_arrmul24_fa4_13_and1 >> 0) & 0x01);
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s_arrmul24_and5_13 = ((a >> 5) & 0x01) & ((b >> 13) & 0x01);
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s_arrmul24_fa5_13_xor0 = ((s_arrmul24_and5_13 >> 0) & 0x01) ^ ((s_arrmul24_fa6_12_xor1 >> 0) & 0x01);
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s_arrmul24_fa5_13_and0 = ((s_arrmul24_and5_13 >> 0) & 0x01) & ((s_arrmul24_fa6_12_xor1 >> 0) & 0x01);
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s_arrmul24_fa5_13_xor1 = ((s_arrmul24_fa5_13_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa4_13_or0 >> 0) & 0x01);
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s_arrmul24_fa5_13_and1 = ((s_arrmul24_fa5_13_xor0 >> 0) & 0x01) & ((s_arrmul24_fa4_13_or0 >> 0) & 0x01);
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s_arrmul24_fa5_13_or0 = ((s_arrmul24_fa5_13_and0 >> 0) & 0x01) | ((s_arrmul24_fa5_13_and1 >> 0) & 0x01);
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s_arrmul24_and6_13 = ((a >> 6) & 0x01) & ((b >> 13) & 0x01);
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s_arrmul24_fa6_13_xor0 = ((s_arrmul24_and6_13 >> 0) & 0x01) ^ ((s_arrmul24_fa7_12_xor1 >> 0) & 0x01);
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s_arrmul24_fa6_13_and0 = ((s_arrmul24_and6_13 >> 0) & 0x01) & ((s_arrmul24_fa7_12_xor1 >> 0) & 0x01);
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s_arrmul24_fa6_13_xor1 = ((s_arrmul24_fa6_13_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa5_13_or0 >> 0) & 0x01);
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s_arrmul24_fa6_13_and1 = ((s_arrmul24_fa6_13_xor0 >> 0) & 0x01) & ((s_arrmul24_fa5_13_or0 >> 0) & 0x01);
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s_arrmul24_fa6_13_or0 = ((s_arrmul24_fa6_13_and0 >> 0) & 0x01) | ((s_arrmul24_fa6_13_and1 >> 0) & 0x01);
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s_arrmul24_and7_13 = ((a >> 7) & 0x01) & ((b >> 13) & 0x01);
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s_arrmul24_fa7_13_xor0 = ((s_arrmul24_and7_13 >> 0) & 0x01) ^ ((s_arrmul24_fa8_12_xor1 >> 0) & 0x01);
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s_arrmul24_fa7_13_and0 = ((s_arrmul24_and7_13 >> 0) & 0x01) & ((s_arrmul24_fa8_12_xor1 >> 0) & 0x01);
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s_arrmul24_fa7_13_xor1 = ((s_arrmul24_fa7_13_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa6_13_or0 >> 0) & 0x01);
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s_arrmul24_fa7_13_and1 = ((s_arrmul24_fa7_13_xor0 >> 0) & 0x01) & ((s_arrmul24_fa6_13_or0 >> 0) & 0x01);
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s_arrmul24_fa7_13_or0 = ((s_arrmul24_fa7_13_and0 >> 0) & 0x01) | ((s_arrmul24_fa7_13_and1 >> 0) & 0x01);
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s_arrmul24_and8_13 = ((a >> 8) & 0x01) & ((b >> 13) & 0x01);
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s_arrmul24_fa8_13_xor0 = ((s_arrmul24_and8_13 >> 0) & 0x01) ^ ((s_arrmul24_fa9_12_xor1 >> 0) & 0x01);
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s_arrmul24_fa8_13_and0 = ((s_arrmul24_and8_13 >> 0) & 0x01) & ((s_arrmul24_fa9_12_xor1 >> 0) & 0x01);
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s_arrmul24_fa8_13_xor1 = ((s_arrmul24_fa8_13_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa7_13_or0 >> 0) & 0x01);
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s_arrmul24_fa8_13_and1 = ((s_arrmul24_fa8_13_xor0 >> 0) & 0x01) & ((s_arrmul24_fa7_13_or0 >> 0) & 0x01);
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s_arrmul24_fa8_13_or0 = ((s_arrmul24_fa8_13_and0 >> 0) & 0x01) | ((s_arrmul24_fa8_13_and1 >> 0) & 0x01);
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s_arrmul24_and9_13 = ((a >> 9) & 0x01) & ((b >> 13) & 0x01);
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s_arrmul24_fa9_13_xor0 = ((s_arrmul24_and9_13 >> 0) & 0x01) ^ ((s_arrmul24_fa10_12_xor1 >> 0) & 0x01);
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s_arrmul24_fa9_13_and0 = ((s_arrmul24_and9_13 >> 0) & 0x01) & ((s_arrmul24_fa10_12_xor1 >> 0) & 0x01);
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s_arrmul24_fa9_13_xor1 = ((s_arrmul24_fa9_13_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa8_13_or0 >> 0) & 0x01);
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s_arrmul24_fa9_13_and1 = ((s_arrmul24_fa9_13_xor0 >> 0) & 0x01) & ((s_arrmul24_fa8_13_or0 >> 0) & 0x01);
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s_arrmul24_fa9_13_or0 = ((s_arrmul24_fa9_13_and0 >> 0) & 0x01) | ((s_arrmul24_fa9_13_and1 >> 0) & 0x01);
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s_arrmul24_and10_13 = ((a >> 10) & 0x01) & ((b >> 13) & 0x01);
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s_arrmul24_fa10_13_xor0 = ((s_arrmul24_and10_13 >> 0) & 0x01) ^ ((s_arrmul24_fa11_12_xor1 >> 0) & 0x01);
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s_arrmul24_fa10_13_and0 = ((s_arrmul24_and10_13 >> 0) & 0x01) & ((s_arrmul24_fa11_12_xor1 >> 0) & 0x01);
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s_arrmul24_fa10_13_xor1 = ((s_arrmul24_fa10_13_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa9_13_or0 >> 0) & 0x01);
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s_arrmul24_fa10_13_and1 = ((s_arrmul24_fa10_13_xor0 >> 0) & 0x01) & ((s_arrmul24_fa9_13_or0 >> 0) & 0x01);
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s_arrmul24_fa10_13_or0 = ((s_arrmul24_fa10_13_and0 >> 0) & 0x01) | ((s_arrmul24_fa10_13_and1 >> 0) & 0x01);
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s_arrmul24_and11_13 = ((a >> 11) & 0x01) & ((b >> 13) & 0x01);
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s_arrmul24_fa11_13_xor0 = ((s_arrmul24_and11_13 >> 0) & 0x01) ^ ((s_arrmul24_fa12_12_xor1 >> 0) & 0x01);
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s_arrmul24_fa11_13_and0 = ((s_arrmul24_and11_13 >> 0) & 0x01) & ((s_arrmul24_fa12_12_xor1 >> 0) & 0x01);
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s_arrmul24_fa11_13_xor1 = ((s_arrmul24_fa11_13_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa10_13_or0 >> 0) & 0x01);
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s_arrmul24_fa11_13_and1 = ((s_arrmul24_fa11_13_xor0 >> 0) & 0x01) & ((s_arrmul24_fa10_13_or0 >> 0) & 0x01);
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s_arrmul24_fa11_13_or0 = ((s_arrmul24_fa11_13_and0 >> 0) & 0x01) | ((s_arrmul24_fa11_13_and1 >> 0) & 0x01);
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s_arrmul24_and12_13 = ((a >> 12) & 0x01) & ((b >> 13) & 0x01);
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s_arrmul24_fa12_13_xor0 = ((s_arrmul24_and12_13 >> 0) & 0x01) ^ ((s_arrmul24_fa13_12_xor1 >> 0) & 0x01);
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s_arrmul24_fa12_13_and0 = ((s_arrmul24_and12_13 >> 0) & 0x01) & ((s_arrmul24_fa13_12_xor1 >> 0) & 0x01);
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s_arrmul24_fa12_13_xor1 = ((s_arrmul24_fa12_13_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa11_13_or0 >> 0) & 0x01);
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s_arrmul24_fa12_13_and1 = ((s_arrmul24_fa12_13_xor0 >> 0) & 0x01) & ((s_arrmul24_fa11_13_or0 >> 0) & 0x01);
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s_arrmul24_fa12_13_or0 = ((s_arrmul24_fa12_13_and0 >> 0) & 0x01) | ((s_arrmul24_fa12_13_and1 >> 0) & 0x01);
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s_arrmul24_and13_13 = ((a >> 13) & 0x01) & ((b >> 13) & 0x01);
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s_arrmul24_fa13_13_xor0 = ((s_arrmul24_and13_13 >> 0) & 0x01) ^ ((s_arrmul24_fa14_12_xor1 >> 0) & 0x01);
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s_arrmul24_fa13_13_and0 = ((s_arrmul24_and13_13 >> 0) & 0x01) & ((s_arrmul24_fa14_12_xor1 >> 0) & 0x01);
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s_arrmul24_fa13_13_xor1 = ((s_arrmul24_fa13_13_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa12_13_or0 >> 0) & 0x01);
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s_arrmul24_fa13_13_and1 = ((s_arrmul24_fa13_13_xor0 >> 0) & 0x01) & ((s_arrmul24_fa12_13_or0 >> 0) & 0x01);
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s_arrmul24_fa13_13_or0 = ((s_arrmul24_fa13_13_and0 >> 0) & 0x01) | ((s_arrmul24_fa13_13_and1 >> 0) & 0x01);
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s_arrmul24_and14_13 = ((a >> 14) & 0x01) & ((b >> 13) & 0x01);
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s_arrmul24_fa14_13_xor0 = ((s_arrmul24_and14_13 >> 0) & 0x01) ^ ((s_arrmul24_fa15_12_xor1 >> 0) & 0x01);
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s_arrmul24_fa14_13_and0 = ((s_arrmul24_and14_13 >> 0) & 0x01) & ((s_arrmul24_fa15_12_xor1 >> 0) & 0x01);
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s_arrmul24_fa14_13_xor1 = ((s_arrmul24_fa14_13_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa13_13_or0 >> 0) & 0x01);
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s_arrmul24_fa14_13_and1 = ((s_arrmul24_fa14_13_xor0 >> 0) & 0x01) & ((s_arrmul24_fa13_13_or0 >> 0) & 0x01);
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s_arrmul24_fa14_13_or0 = ((s_arrmul24_fa14_13_and0 >> 0) & 0x01) | ((s_arrmul24_fa14_13_and1 >> 0) & 0x01);
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s_arrmul24_and15_13 = ((a >> 15) & 0x01) & ((b >> 13) & 0x01);
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s_arrmul24_fa15_13_xor0 = ((s_arrmul24_and15_13 >> 0) & 0x01) ^ ((s_arrmul24_fa16_12_xor1 >> 0) & 0x01);
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s_arrmul24_fa15_13_and0 = ((s_arrmul24_and15_13 >> 0) & 0x01) & ((s_arrmul24_fa16_12_xor1 >> 0) & 0x01);
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s_arrmul24_fa15_13_xor1 = ((s_arrmul24_fa15_13_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa14_13_or0 >> 0) & 0x01);
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s_arrmul24_fa15_13_and1 = ((s_arrmul24_fa15_13_xor0 >> 0) & 0x01) & ((s_arrmul24_fa14_13_or0 >> 0) & 0x01);
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s_arrmul24_fa15_13_or0 = ((s_arrmul24_fa15_13_and0 >> 0) & 0x01) | ((s_arrmul24_fa15_13_and1 >> 0) & 0x01);
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s_arrmul24_and16_13 = ((a >> 16) & 0x01) & ((b >> 13) & 0x01);
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s_arrmul24_fa16_13_xor0 = ((s_arrmul24_and16_13 >> 0) & 0x01) ^ ((s_arrmul24_fa17_12_xor1 >> 0) & 0x01);
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s_arrmul24_fa16_13_and0 = ((s_arrmul24_and16_13 >> 0) & 0x01) & ((s_arrmul24_fa17_12_xor1 >> 0) & 0x01);
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s_arrmul24_fa16_13_xor1 = ((s_arrmul24_fa16_13_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa15_13_or0 >> 0) & 0x01);
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s_arrmul24_fa16_13_and1 = ((s_arrmul24_fa16_13_xor0 >> 0) & 0x01) & ((s_arrmul24_fa15_13_or0 >> 0) & 0x01);
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s_arrmul24_fa16_13_or0 = ((s_arrmul24_fa16_13_and0 >> 0) & 0x01) | ((s_arrmul24_fa16_13_and1 >> 0) & 0x01);
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s_arrmul24_and17_13 = ((a >> 17) & 0x01) & ((b >> 13) & 0x01);
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s_arrmul24_fa17_13_xor0 = ((s_arrmul24_and17_13 >> 0) & 0x01) ^ ((s_arrmul24_fa18_12_xor1 >> 0) & 0x01);
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s_arrmul24_fa17_13_and0 = ((s_arrmul24_and17_13 >> 0) & 0x01) & ((s_arrmul24_fa18_12_xor1 >> 0) & 0x01);
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s_arrmul24_fa17_13_xor1 = ((s_arrmul24_fa17_13_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa16_13_or0 >> 0) & 0x01);
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s_arrmul24_fa17_13_and1 = ((s_arrmul24_fa17_13_xor0 >> 0) & 0x01) & ((s_arrmul24_fa16_13_or0 >> 0) & 0x01);
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s_arrmul24_fa17_13_or0 = ((s_arrmul24_fa17_13_and0 >> 0) & 0x01) | ((s_arrmul24_fa17_13_and1 >> 0) & 0x01);
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s_arrmul24_and18_13 = ((a >> 18) & 0x01) & ((b >> 13) & 0x01);
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s_arrmul24_fa18_13_xor0 = ((s_arrmul24_and18_13 >> 0) & 0x01) ^ ((s_arrmul24_fa19_12_xor1 >> 0) & 0x01);
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s_arrmul24_fa18_13_and0 = ((s_arrmul24_and18_13 >> 0) & 0x01) & ((s_arrmul24_fa19_12_xor1 >> 0) & 0x01);
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s_arrmul24_fa18_13_xor1 = ((s_arrmul24_fa18_13_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa17_13_or0 >> 0) & 0x01);
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s_arrmul24_fa18_13_and1 = ((s_arrmul24_fa18_13_xor0 >> 0) & 0x01) & ((s_arrmul24_fa17_13_or0 >> 0) & 0x01);
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s_arrmul24_fa18_13_or0 = ((s_arrmul24_fa18_13_and0 >> 0) & 0x01) | ((s_arrmul24_fa18_13_and1 >> 0) & 0x01);
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s_arrmul24_and19_13 = ((a >> 19) & 0x01) & ((b >> 13) & 0x01);
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s_arrmul24_fa19_13_xor0 = ((s_arrmul24_and19_13 >> 0) & 0x01) ^ ((s_arrmul24_fa20_12_xor1 >> 0) & 0x01);
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s_arrmul24_fa19_13_and0 = ((s_arrmul24_and19_13 >> 0) & 0x01) & ((s_arrmul24_fa20_12_xor1 >> 0) & 0x01);
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s_arrmul24_fa19_13_xor1 = ((s_arrmul24_fa19_13_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa18_13_or0 >> 0) & 0x01);
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s_arrmul24_fa19_13_and1 = ((s_arrmul24_fa19_13_xor0 >> 0) & 0x01) & ((s_arrmul24_fa18_13_or0 >> 0) & 0x01);
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s_arrmul24_fa19_13_or0 = ((s_arrmul24_fa19_13_and0 >> 0) & 0x01) | ((s_arrmul24_fa19_13_and1 >> 0) & 0x01);
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s_arrmul24_and20_13 = ((a >> 20) & 0x01) & ((b >> 13) & 0x01);
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s_arrmul24_fa20_13_xor0 = ((s_arrmul24_and20_13 >> 0) & 0x01) ^ ((s_arrmul24_fa21_12_xor1 >> 0) & 0x01);
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s_arrmul24_fa20_13_and0 = ((s_arrmul24_and20_13 >> 0) & 0x01) & ((s_arrmul24_fa21_12_xor1 >> 0) & 0x01);
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s_arrmul24_fa20_13_xor1 = ((s_arrmul24_fa20_13_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa19_13_or0 >> 0) & 0x01);
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s_arrmul24_fa20_13_and1 = ((s_arrmul24_fa20_13_xor0 >> 0) & 0x01) & ((s_arrmul24_fa19_13_or0 >> 0) & 0x01);
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s_arrmul24_fa20_13_or0 = ((s_arrmul24_fa20_13_and0 >> 0) & 0x01) | ((s_arrmul24_fa20_13_and1 >> 0) & 0x01);
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s_arrmul24_and21_13 = ((a >> 21) & 0x01) & ((b >> 13) & 0x01);
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s_arrmul24_fa21_13_xor0 = ((s_arrmul24_and21_13 >> 0) & 0x01) ^ ((s_arrmul24_fa22_12_xor1 >> 0) & 0x01);
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s_arrmul24_fa21_13_and0 = ((s_arrmul24_and21_13 >> 0) & 0x01) & ((s_arrmul24_fa22_12_xor1 >> 0) & 0x01);
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s_arrmul24_fa21_13_xor1 = ((s_arrmul24_fa21_13_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa20_13_or0 >> 0) & 0x01);
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s_arrmul24_fa21_13_and1 = ((s_arrmul24_fa21_13_xor0 >> 0) & 0x01) & ((s_arrmul24_fa20_13_or0 >> 0) & 0x01);
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s_arrmul24_fa21_13_or0 = ((s_arrmul24_fa21_13_and0 >> 0) & 0x01) | ((s_arrmul24_fa21_13_and1 >> 0) & 0x01);
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s_arrmul24_and22_13 = ((a >> 22) & 0x01) & ((b >> 13) & 0x01);
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s_arrmul24_fa22_13_xor0 = ((s_arrmul24_and22_13 >> 0) & 0x01) ^ ((s_arrmul24_fa23_12_xor1 >> 0) & 0x01);
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s_arrmul24_fa22_13_and0 = ((s_arrmul24_and22_13 >> 0) & 0x01) & ((s_arrmul24_fa23_12_xor1 >> 0) & 0x01);
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s_arrmul24_fa22_13_xor1 = ((s_arrmul24_fa22_13_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa21_13_or0 >> 0) & 0x01);
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s_arrmul24_fa22_13_and1 = ((s_arrmul24_fa22_13_xor0 >> 0) & 0x01) & ((s_arrmul24_fa21_13_or0 >> 0) & 0x01);
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s_arrmul24_fa22_13_or0 = ((s_arrmul24_fa22_13_and0 >> 0) & 0x01) | ((s_arrmul24_fa22_13_and1 >> 0) & 0x01);
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s_arrmul24_nand23_13 = ~(((a >> 23) & 0x01) & ((b >> 13) & 0x01)) & 0x01;
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s_arrmul24_fa23_13_xor0 = ((s_arrmul24_nand23_13 >> 0) & 0x01) ^ ((s_arrmul24_fa23_12_or0 >> 0) & 0x01);
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s_arrmul24_fa23_13_and0 = ((s_arrmul24_nand23_13 >> 0) & 0x01) & ((s_arrmul24_fa23_12_or0 >> 0) & 0x01);
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s_arrmul24_fa23_13_xor1 = ((s_arrmul24_fa23_13_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa22_13_or0 >> 0) & 0x01);
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s_arrmul24_fa23_13_and1 = ((s_arrmul24_fa23_13_xor0 >> 0) & 0x01) & ((s_arrmul24_fa22_13_or0 >> 0) & 0x01);
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s_arrmul24_fa23_13_or0 = ((s_arrmul24_fa23_13_and0 >> 0) & 0x01) | ((s_arrmul24_fa23_13_and1 >> 0) & 0x01);
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s_arrmul24_and0_14 = ((a >> 0) & 0x01) & ((b >> 14) & 0x01);
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s_arrmul24_ha0_14_xor0 = ((s_arrmul24_and0_14 >> 0) & 0x01) ^ ((s_arrmul24_fa1_13_xor1 >> 0) & 0x01);
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s_arrmul24_ha0_14_and0 = ((s_arrmul24_and0_14 >> 0) & 0x01) & ((s_arrmul24_fa1_13_xor1 >> 0) & 0x01);
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s_arrmul24_and1_14 = ((a >> 1) & 0x01) & ((b >> 14) & 0x01);
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s_arrmul24_fa1_14_xor0 = ((s_arrmul24_and1_14 >> 0) & 0x01) ^ ((s_arrmul24_fa2_13_xor1 >> 0) & 0x01);
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s_arrmul24_fa1_14_and0 = ((s_arrmul24_and1_14 >> 0) & 0x01) & ((s_arrmul24_fa2_13_xor1 >> 0) & 0x01);
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s_arrmul24_fa1_14_xor1 = ((s_arrmul24_fa1_14_xor0 >> 0) & 0x01) ^ ((s_arrmul24_ha0_14_and0 >> 0) & 0x01);
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s_arrmul24_fa1_14_and1 = ((s_arrmul24_fa1_14_xor0 >> 0) & 0x01) & ((s_arrmul24_ha0_14_and0 >> 0) & 0x01);
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s_arrmul24_fa1_14_or0 = ((s_arrmul24_fa1_14_and0 >> 0) & 0x01) | ((s_arrmul24_fa1_14_and1 >> 0) & 0x01);
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s_arrmul24_and2_14 = ((a >> 2) & 0x01) & ((b >> 14) & 0x01);
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s_arrmul24_fa2_14_xor0 = ((s_arrmul24_and2_14 >> 0) & 0x01) ^ ((s_arrmul24_fa3_13_xor1 >> 0) & 0x01);
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s_arrmul24_fa2_14_and0 = ((s_arrmul24_and2_14 >> 0) & 0x01) & ((s_arrmul24_fa3_13_xor1 >> 0) & 0x01);
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s_arrmul24_fa2_14_xor1 = ((s_arrmul24_fa2_14_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa1_14_or0 >> 0) & 0x01);
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s_arrmul24_fa2_14_and1 = ((s_arrmul24_fa2_14_xor0 >> 0) & 0x01) & ((s_arrmul24_fa1_14_or0 >> 0) & 0x01);
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s_arrmul24_fa2_14_or0 = ((s_arrmul24_fa2_14_and0 >> 0) & 0x01) | ((s_arrmul24_fa2_14_and1 >> 0) & 0x01);
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s_arrmul24_and3_14 = ((a >> 3) & 0x01) & ((b >> 14) & 0x01);
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s_arrmul24_fa3_14_xor0 = ((s_arrmul24_and3_14 >> 0) & 0x01) ^ ((s_arrmul24_fa4_13_xor1 >> 0) & 0x01);
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s_arrmul24_fa3_14_and0 = ((s_arrmul24_and3_14 >> 0) & 0x01) & ((s_arrmul24_fa4_13_xor1 >> 0) & 0x01);
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s_arrmul24_fa3_14_xor1 = ((s_arrmul24_fa3_14_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa2_14_or0 >> 0) & 0x01);
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s_arrmul24_fa3_14_and1 = ((s_arrmul24_fa3_14_xor0 >> 0) & 0x01) & ((s_arrmul24_fa2_14_or0 >> 0) & 0x01);
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s_arrmul24_fa3_14_or0 = ((s_arrmul24_fa3_14_and0 >> 0) & 0x01) | ((s_arrmul24_fa3_14_and1 >> 0) & 0x01);
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s_arrmul24_and4_14 = ((a >> 4) & 0x01) & ((b >> 14) & 0x01);
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s_arrmul24_fa4_14_xor0 = ((s_arrmul24_and4_14 >> 0) & 0x01) ^ ((s_arrmul24_fa5_13_xor1 >> 0) & 0x01);
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s_arrmul24_fa4_14_and0 = ((s_arrmul24_and4_14 >> 0) & 0x01) & ((s_arrmul24_fa5_13_xor1 >> 0) & 0x01);
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s_arrmul24_fa4_14_xor1 = ((s_arrmul24_fa4_14_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa3_14_or0 >> 0) & 0x01);
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s_arrmul24_fa4_14_and1 = ((s_arrmul24_fa4_14_xor0 >> 0) & 0x01) & ((s_arrmul24_fa3_14_or0 >> 0) & 0x01);
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s_arrmul24_fa4_14_or0 = ((s_arrmul24_fa4_14_and0 >> 0) & 0x01) | ((s_arrmul24_fa4_14_and1 >> 0) & 0x01);
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s_arrmul24_and5_14 = ((a >> 5) & 0x01) & ((b >> 14) & 0x01);
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s_arrmul24_fa5_14_xor0 = ((s_arrmul24_and5_14 >> 0) & 0x01) ^ ((s_arrmul24_fa6_13_xor1 >> 0) & 0x01);
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s_arrmul24_fa5_14_and0 = ((s_arrmul24_and5_14 >> 0) & 0x01) & ((s_arrmul24_fa6_13_xor1 >> 0) & 0x01);
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s_arrmul24_fa5_14_xor1 = ((s_arrmul24_fa5_14_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa4_14_or0 >> 0) & 0x01);
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s_arrmul24_fa5_14_and1 = ((s_arrmul24_fa5_14_xor0 >> 0) & 0x01) & ((s_arrmul24_fa4_14_or0 >> 0) & 0x01);
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s_arrmul24_fa5_14_or0 = ((s_arrmul24_fa5_14_and0 >> 0) & 0x01) | ((s_arrmul24_fa5_14_and1 >> 0) & 0x01);
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s_arrmul24_and6_14 = ((a >> 6) & 0x01) & ((b >> 14) & 0x01);
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s_arrmul24_fa6_14_xor0 = ((s_arrmul24_and6_14 >> 0) & 0x01) ^ ((s_arrmul24_fa7_13_xor1 >> 0) & 0x01);
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s_arrmul24_fa6_14_and0 = ((s_arrmul24_and6_14 >> 0) & 0x01) & ((s_arrmul24_fa7_13_xor1 >> 0) & 0x01);
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s_arrmul24_fa6_14_xor1 = ((s_arrmul24_fa6_14_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa5_14_or0 >> 0) & 0x01);
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s_arrmul24_fa6_14_and1 = ((s_arrmul24_fa6_14_xor0 >> 0) & 0x01) & ((s_arrmul24_fa5_14_or0 >> 0) & 0x01);
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s_arrmul24_fa6_14_or0 = ((s_arrmul24_fa6_14_and0 >> 0) & 0x01) | ((s_arrmul24_fa6_14_and1 >> 0) & 0x01);
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s_arrmul24_and7_14 = ((a >> 7) & 0x01) & ((b >> 14) & 0x01);
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s_arrmul24_fa7_14_xor0 = ((s_arrmul24_and7_14 >> 0) & 0x01) ^ ((s_arrmul24_fa8_13_xor1 >> 0) & 0x01);
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s_arrmul24_fa7_14_and0 = ((s_arrmul24_and7_14 >> 0) & 0x01) & ((s_arrmul24_fa8_13_xor1 >> 0) & 0x01);
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s_arrmul24_fa7_14_xor1 = ((s_arrmul24_fa7_14_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa6_14_or0 >> 0) & 0x01);
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s_arrmul24_fa7_14_and1 = ((s_arrmul24_fa7_14_xor0 >> 0) & 0x01) & ((s_arrmul24_fa6_14_or0 >> 0) & 0x01);
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s_arrmul24_fa7_14_or0 = ((s_arrmul24_fa7_14_and0 >> 0) & 0x01) | ((s_arrmul24_fa7_14_and1 >> 0) & 0x01);
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s_arrmul24_and8_14 = ((a >> 8) & 0x01) & ((b >> 14) & 0x01);
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s_arrmul24_fa8_14_xor0 = ((s_arrmul24_and8_14 >> 0) & 0x01) ^ ((s_arrmul24_fa9_13_xor1 >> 0) & 0x01);
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s_arrmul24_fa8_14_and0 = ((s_arrmul24_and8_14 >> 0) & 0x01) & ((s_arrmul24_fa9_13_xor1 >> 0) & 0x01);
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s_arrmul24_fa8_14_xor1 = ((s_arrmul24_fa8_14_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa7_14_or0 >> 0) & 0x01);
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s_arrmul24_fa8_14_and1 = ((s_arrmul24_fa8_14_xor0 >> 0) & 0x01) & ((s_arrmul24_fa7_14_or0 >> 0) & 0x01);
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s_arrmul24_fa8_14_or0 = ((s_arrmul24_fa8_14_and0 >> 0) & 0x01) | ((s_arrmul24_fa8_14_and1 >> 0) & 0x01);
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s_arrmul24_and9_14 = ((a >> 9) & 0x01) & ((b >> 14) & 0x01);
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s_arrmul24_fa9_14_xor0 = ((s_arrmul24_and9_14 >> 0) & 0x01) ^ ((s_arrmul24_fa10_13_xor1 >> 0) & 0x01);
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s_arrmul24_fa9_14_and0 = ((s_arrmul24_and9_14 >> 0) & 0x01) & ((s_arrmul24_fa10_13_xor1 >> 0) & 0x01);
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s_arrmul24_fa9_14_xor1 = ((s_arrmul24_fa9_14_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa8_14_or0 >> 0) & 0x01);
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s_arrmul24_fa9_14_and1 = ((s_arrmul24_fa9_14_xor0 >> 0) & 0x01) & ((s_arrmul24_fa8_14_or0 >> 0) & 0x01);
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s_arrmul24_fa9_14_or0 = ((s_arrmul24_fa9_14_and0 >> 0) & 0x01) | ((s_arrmul24_fa9_14_and1 >> 0) & 0x01);
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s_arrmul24_and10_14 = ((a >> 10) & 0x01) & ((b >> 14) & 0x01);
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s_arrmul24_fa10_14_xor0 = ((s_arrmul24_and10_14 >> 0) & 0x01) ^ ((s_arrmul24_fa11_13_xor1 >> 0) & 0x01);
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s_arrmul24_fa10_14_and0 = ((s_arrmul24_and10_14 >> 0) & 0x01) & ((s_arrmul24_fa11_13_xor1 >> 0) & 0x01);
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s_arrmul24_fa10_14_xor1 = ((s_arrmul24_fa10_14_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa9_14_or0 >> 0) & 0x01);
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s_arrmul24_fa10_14_and1 = ((s_arrmul24_fa10_14_xor0 >> 0) & 0x01) & ((s_arrmul24_fa9_14_or0 >> 0) & 0x01);
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s_arrmul24_fa10_14_or0 = ((s_arrmul24_fa10_14_and0 >> 0) & 0x01) | ((s_arrmul24_fa10_14_and1 >> 0) & 0x01);
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s_arrmul24_and11_14 = ((a >> 11) & 0x01) & ((b >> 14) & 0x01);
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s_arrmul24_fa11_14_xor0 = ((s_arrmul24_and11_14 >> 0) & 0x01) ^ ((s_arrmul24_fa12_13_xor1 >> 0) & 0x01);
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s_arrmul24_fa11_14_and0 = ((s_arrmul24_and11_14 >> 0) & 0x01) & ((s_arrmul24_fa12_13_xor1 >> 0) & 0x01);
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s_arrmul24_fa11_14_xor1 = ((s_arrmul24_fa11_14_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa10_14_or0 >> 0) & 0x01);
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s_arrmul24_fa11_14_and1 = ((s_arrmul24_fa11_14_xor0 >> 0) & 0x01) & ((s_arrmul24_fa10_14_or0 >> 0) & 0x01);
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s_arrmul24_fa11_14_or0 = ((s_arrmul24_fa11_14_and0 >> 0) & 0x01) | ((s_arrmul24_fa11_14_and1 >> 0) & 0x01);
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s_arrmul24_and12_14 = ((a >> 12) & 0x01) & ((b >> 14) & 0x01);
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s_arrmul24_fa12_14_xor0 = ((s_arrmul24_and12_14 >> 0) & 0x01) ^ ((s_arrmul24_fa13_13_xor1 >> 0) & 0x01);
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s_arrmul24_fa12_14_and0 = ((s_arrmul24_and12_14 >> 0) & 0x01) & ((s_arrmul24_fa13_13_xor1 >> 0) & 0x01);
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s_arrmul24_fa12_14_xor1 = ((s_arrmul24_fa12_14_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa11_14_or0 >> 0) & 0x01);
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s_arrmul24_fa12_14_and1 = ((s_arrmul24_fa12_14_xor0 >> 0) & 0x01) & ((s_arrmul24_fa11_14_or0 >> 0) & 0x01);
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s_arrmul24_fa12_14_or0 = ((s_arrmul24_fa12_14_and0 >> 0) & 0x01) | ((s_arrmul24_fa12_14_and1 >> 0) & 0x01);
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s_arrmul24_and13_14 = ((a >> 13) & 0x01) & ((b >> 14) & 0x01);
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s_arrmul24_fa13_14_xor0 = ((s_arrmul24_and13_14 >> 0) & 0x01) ^ ((s_arrmul24_fa14_13_xor1 >> 0) & 0x01);
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s_arrmul24_fa13_14_and0 = ((s_arrmul24_and13_14 >> 0) & 0x01) & ((s_arrmul24_fa14_13_xor1 >> 0) & 0x01);
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s_arrmul24_fa13_14_xor1 = ((s_arrmul24_fa13_14_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa12_14_or0 >> 0) & 0x01);
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s_arrmul24_fa13_14_and1 = ((s_arrmul24_fa13_14_xor0 >> 0) & 0x01) & ((s_arrmul24_fa12_14_or0 >> 0) & 0x01);
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s_arrmul24_fa13_14_or0 = ((s_arrmul24_fa13_14_and0 >> 0) & 0x01) | ((s_arrmul24_fa13_14_and1 >> 0) & 0x01);
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s_arrmul24_and14_14 = ((a >> 14) & 0x01) & ((b >> 14) & 0x01);
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s_arrmul24_fa14_14_xor0 = ((s_arrmul24_and14_14 >> 0) & 0x01) ^ ((s_arrmul24_fa15_13_xor1 >> 0) & 0x01);
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s_arrmul24_fa14_14_and0 = ((s_arrmul24_and14_14 >> 0) & 0x01) & ((s_arrmul24_fa15_13_xor1 >> 0) & 0x01);
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s_arrmul24_fa14_14_xor1 = ((s_arrmul24_fa14_14_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa13_14_or0 >> 0) & 0x01);
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s_arrmul24_fa14_14_and1 = ((s_arrmul24_fa14_14_xor0 >> 0) & 0x01) & ((s_arrmul24_fa13_14_or0 >> 0) & 0x01);
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s_arrmul24_fa14_14_or0 = ((s_arrmul24_fa14_14_and0 >> 0) & 0x01) | ((s_arrmul24_fa14_14_and1 >> 0) & 0x01);
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s_arrmul24_and15_14 = ((a >> 15) & 0x01) & ((b >> 14) & 0x01);
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s_arrmul24_fa15_14_xor0 = ((s_arrmul24_and15_14 >> 0) & 0x01) ^ ((s_arrmul24_fa16_13_xor1 >> 0) & 0x01);
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s_arrmul24_fa15_14_and0 = ((s_arrmul24_and15_14 >> 0) & 0x01) & ((s_arrmul24_fa16_13_xor1 >> 0) & 0x01);
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s_arrmul24_fa15_14_xor1 = ((s_arrmul24_fa15_14_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa14_14_or0 >> 0) & 0x01);
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s_arrmul24_fa15_14_and1 = ((s_arrmul24_fa15_14_xor0 >> 0) & 0x01) & ((s_arrmul24_fa14_14_or0 >> 0) & 0x01);
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s_arrmul24_fa15_14_or0 = ((s_arrmul24_fa15_14_and0 >> 0) & 0x01) | ((s_arrmul24_fa15_14_and1 >> 0) & 0x01);
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s_arrmul24_and16_14 = ((a >> 16) & 0x01) & ((b >> 14) & 0x01);
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s_arrmul24_fa16_14_xor0 = ((s_arrmul24_and16_14 >> 0) & 0x01) ^ ((s_arrmul24_fa17_13_xor1 >> 0) & 0x01);
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s_arrmul24_fa16_14_and0 = ((s_arrmul24_and16_14 >> 0) & 0x01) & ((s_arrmul24_fa17_13_xor1 >> 0) & 0x01);
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s_arrmul24_fa16_14_xor1 = ((s_arrmul24_fa16_14_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa15_14_or0 >> 0) & 0x01);
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s_arrmul24_fa16_14_and1 = ((s_arrmul24_fa16_14_xor0 >> 0) & 0x01) & ((s_arrmul24_fa15_14_or0 >> 0) & 0x01);
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s_arrmul24_fa16_14_or0 = ((s_arrmul24_fa16_14_and0 >> 0) & 0x01) | ((s_arrmul24_fa16_14_and1 >> 0) & 0x01);
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s_arrmul24_and17_14 = ((a >> 17) & 0x01) & ((b >> 14) & 0x01);
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s_arrmul24_fa17_14_xor0 = ((s_arrmul24_and17_14 >> 0) & 0x01) ^ ((s_arrmul24_fa18_13_xor1 >> 0) & 0x01);
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s_arrmul24_fa17_14_and0 = ((s_arrmul24_and17_14 >> 0) & 0x01) & ((s_arrmul24_fa18_13_xor1 >> 0) & 0x01);
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s_arrmul24_fa17_14_xor1 = ((s_arrmul24_fa17_14_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa16_14_or0 >> 0) & 0x01);
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s_arrmul24_fa17_14_and1 = ((s_arrmul24_fa17_14_xor0 >> 0) & 0x01) & ((s_arrmul24_fa16_14_or0 >> 0) & 0x01);
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s_arrmul24_fa17_14_or0 = ((s_arrmul24_fa17_14_and0 >> 0) & 0x01) | ((s_arrmul24_fa17_14_and1 >> 0) & 0x01);
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s_arrmul24_and18_14 = ((a >> 18) & 0x01) & ((b >> 14) & 0x01);
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s_arrmul24_fa18_14_xor0 = ((s_arrmul24_and18_14 >> 0) & 0x01) ^ ((s_arrmul24_fa19_13_xor1 >> 0) & 0x01);
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s_arrmul24_fa18_14_and0 = ((s_arrmul24_and18_14 >> 0) & 0x01) & ((s_arrmul24_fa19_13_xor1 >> 0) & 0x01);
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s_arrmul24_fa18_14_xor1 = ((s_arrmul24_fa18_14_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa17_14_or0 >> 0) & 0x01);
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s_arrmul24_fa18_14_and1 = ((s_arrmul24_fa18_14_xor0 >> 0) & 0x01) & ((s_arrmul24_fa17_14_or0 >> 0) & 0x01);
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s_arrmul24_fa18_14_or0 = ((s_arrmul24_fa18_14_and0 >> 0) & 0x01) | ((s_arrmul24_fa18_14_and1 >> 0) & 0x01);
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s_arrmul24_and19_14 = ((a >> 19) & 0x01) & ((b >> 14) & 0x01);
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s_arrmul24_fa19_14_xor0 = ((s_arrmul24_and19_14 >> 0) & 0x01) ^ ((s_arrmul24_fa20_13_xor1 >> 0) & 0x01);
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s_arrmul24_fa19_14_and0 = ((s_arrmul24_and19_14 >> 0) & 0x01) & ((s_arrmul24_fa20_13_xor1 >> 0) & 0x01);
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s_arrmul24_fa19_14_xor1 = ((s_arrmul24_fa19_14_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa18_14_or0 >> 0) & 0x01);
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s_arrmul24_fa19_14_and1 = ((s_arrmul24_fa19_14_xor0 >> 0) & 0x01) & ((s_arrmul24_fa18_14_or0 >> 0) & 0x01);
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s_arrmul24_fa19_14_or0 = ((s_arrmul24_fa19_14_and0 >> 0) & 0x01) | ((s_arrmul24_fa19_14_and1 >> 0) & 0x01);
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s_arrmul24_and20_14 = ((a >> 20) & 0x01) & ((b >> 14) & 0x01);
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s_arrmul24_fa20_14_xor0 = ((s_arrmul24_and20_14 >> 0) & 0x01) ^ ((s_arrmul24_fa21_13_xor1 >> 0) & 0x01);
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s_arrmul24_fa20_14_and0 = ((s_arrmul24_and20_14 >> 0) & 0x01) & ((s_arrmul24_fa21_13_xor1 >> 0) & 0x01);
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s_arrmul24_fa20_14_xor1 = ((s_arrmul24_fa20_14_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa19_14_or0 >> 0) & 0x01);
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s_arrmul24_fa20_14_and1 = ((s_arrmul24_fa20_14_xor0 >> 0) & 0x01) & ((s_arrmul24_fa19_14_or0 >> 0) & 0x01);
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s_arrmul24_fa20_14_or0 = ((s_arrmul24_fa20_14_and0 >> 0) & 0x01) | ((s_arrmul24_fa20_14_and1 >> 0) & 0x01);
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s_arrmul24_and21_14 = ((a >> 21) & 0x01) & ((b >> 14) & 0x01);
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s_arrmul24_fa21_14_xor0 = ((s_arrmul24_and21_14 >> 0) & 0x01) ^ ((s_arrmul24_fa22_13_xor1 >> 0) & 0x01);
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s_arrmul24_fa21_14_and0 = ((s_arrmul24_and21_14 >> 0) & 0x01) & ((s_arrmul24_fa22_13_xor1 >> 0) & 0x01);
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s_arrmul24_fa21_14_xor1 = ((s_arrmul24_fa21_14_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa20_14_or0 >> 0) & 0x01);
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s_arrmul24_fa21_14_and1 = ((s_arrmul24_fa21_14_xor0 >> 0) & 0x01) & ((s_arrmul24_fa20_14_or0 >> 0) & 0x01);
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s_arrmul24_fa21_14_or0 = ((s_arrmul24_fa21_14_and0 >> 0) & 0x01) | ((s_arrmul24_fa21_14_and1 >> 0) & 0x01);
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s_arrmul24_and22_14 = ((a >> 22) & 0x01) & ((b >> 14) & 0x01);
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s_arrmul24_fa22_14_xor0 = ((s_arrmul24_and22_14 >> 0) & 0x01) ^ ((s_arrmul24_fa23_13_xor1 >> 0) & 0x01);
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s_arrmul24_fa22_14_and0 = ((s_arrmul24_and22_14 >> 0) & 0x01) & ((s_arrmul24_fa23_13_xor1 >> 0) & 0x01);
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s_arrmul24_fa22_14_xor1 = ((s_arrmul24_fa22_14_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa21_14_or0 >> 0) & 0x01);
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s_arrmul24_fa22_14_and1 = ((s_arrmul24_fa22_14_xor0 >> 0) & 0x01) & ((s_arrmul24_fa21_14_or0 >> 0) & 0x01);
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s_arrmul24_fa22_14_or0 = ((s_arrmul24_fa22_14_and0 >> 0) & 0x01) | ((s_arrmul24_fa22_14_and1 >> 0) & 0x01);
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s_arrmul24_nand23_14 = ~(((a >> 23) & 0x01) & ((b >> 14) & 0x01)) & 0x01;
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s_arrmul24_fa23_14_xor0 = ((s_arrmul24_nand23_14 >> 0) & 0x01) ^ ((s_arrmul24_fa23_13_or0 >> 0) & 0x01);
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s_arrmul24_fa23_14_and0 = ((s_arrmul24_nand23_14 >> 0) & 0x01) & ((s_arrmul24_fa23_13_or0 >> 0) & 0x01);
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s_arrmul24_fa23_14_xor1 = ((s_arrmul24_fa23_14_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa22_14_or0 >> 0) & 0x01);
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s_arrmul24_fa23_14_and1 = ((s_arrmul24_fa23_14_xor0 >> 0) & 0x01) & ((s_arrmul24_fa22_14_or0 >> 0) & 0x01);
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s_arrmul24_fa23_14_or0 = ((s_arrmul24_fa23_14_and0 >> 0) & 0x01) | ((s_arrmul24_fa23_14_and1 >> 0) & 0x01);
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s_arrmul24_and0_15 = ((a >> 0) & 0x01) & ((b >> 15) & 0x01);
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s_arrmul24_ha0_15_xor0 = ((s_arrmul24_and0_15 >> 0) & 0x01) ^ ((s_arrmul24_fa1_14_xor1 >> 0) & 0x01);
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s_arrmul24_ha0_15_and0 = ((s_arrmul24_and0_15 >> 0) & 0x01) & ((s_arrmul24_fa1_14_xor1 >> 0) & 0x01);
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s_arrmul24_and1_15 = ((a >> 1) & 0x01) & ((b >> 15) & 0x01);
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s_arrmul24_fa1_15_xor0 = ((s_arrmul24_and1_15 >> 0) & 0x01) ^ ((s_arrmul24_fa2_14_xor1 >> 0) & 0x01);
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s_arrmul24_fa1_15_and0 = ((s_arrmul24_and1_15 >> 0) & 0x01) & ((s_arrmul24_fa2_14_xor1 >> 0) & 0x01);
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s_arrmul24_fa1_15_xor1 = ((s_arrmul24_fa1_15_xor0 >> 0) & 0x01) ^ ((s_arrmul24_ha0_15_and0 >> 0) & 0x01);
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s_arrmul24_fa1_15_and1 = ((s_arrmul24_fa1_15_xor0 >> 0) & 0x01) & ((s_arrmul24_ha0_15_and0 >> 0) & 0x01);
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s_arrmul24_fa1_15_or0 = ((s_arrmul24_fa1_15_and0 >> 0) & 0x01) | ((s_arrmul24_fa1_15_and1 >> 0) & 0x01);
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s_arrmul24_and2_15 = ((a >> 2) & 0x01) & ((b >> 15) & 0x01);
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s_arrmul24_fa2_15_xor0 = ((s_arrmul24_and2_15 >> 0) & 0x01) ^ ((s_arrmul24_fa3_14_xor1 >> 0) & 0x01);
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s_arrmul24_fa2_15_and0 = ((s_arrmul24_and2_15 >> 0) & 0x01) & ((s_arrmul24_fa3_14_xor1 >> 0) & 0x01);
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s_arrmul24_fa2_15_xor1 = ((s_arrmul24_fa2_15_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa1_15_or0 >> 0) & 0x01);
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s_arrmul24_fa2_15_and1 = ((s_arrmul24_fa2_15_xor0 >> 0) & 0x01) & ((s_arrmul24_fa1_15_or0 >> 0) & 0x01);
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s_arrmul24_fa2_15_or0 = ((s_arrmul24_fa2_15_and0 >> 0) & 0x01) | ((s_arrmul24_fa2_15_and1 >> 0) & 0x01);
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s_arrmul24_and3_15 = ((a >> 3) & 0x01) & ((b >> 15) & 0x01);
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s_arrmul24_fa3_15_xor0 = ((s_arrmul24_and3_15 >> 0) & 0x01) ^ ((s_arrmul24_fa4_14_xor1 >> 0) & 0x01);
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s_arrmul24_fa3_15_and0 = ((s_arrmul24_and3_15 >> 0) & 0x01) & ((s_arrmul24_fa4_14_xor1 >> 0) & 0x01);
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s_arrmul24_fa3_15_xor1 = ((s_arrmul24_fa3_15_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa2_15_or0 >> 0) & 0x01);
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s_arrmul24_fa3_15_and1 = ((s_arrmul24_fa3_15_xor0 >> 0) & 0x01) & ((s_arrmul24_fa2_15_or0 >> 0) & 0x01);
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s_arrmul24_fa3_15_or0 = ((s_arrmul24_fa3_15_and0 >> 0) & 0x01) | ((s_arrmul24_fa3_15_and1 >> 0) & 0x01);
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s_arrmul24_and4_15 = ((a >> 4) & 0x01) & ((b >> 15) & 0x01);
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s_arrmul24_fa4_15_xor0 = ((s_arrmul24_and4_15 >> 0) & 0x01) ^ ((s_arrmul24_fa5_14_xor1 >> 0) & 0x01);
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s_arrmul24_fa4_15_and0 = ((s_arrmul24_and4_15 >> 0) & 0x01) & ((s_arrmul24_fa5_14_xor1 >> 0) & 0x01);
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s_arrmul24_fa4_15_xor1 = ((s_arrmul24_fa4_15_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa3_15_or0 >> 0) & 0x01);
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s_arrmul24_fa4_15_and1 = ((s_arrmul24_fa4_15_xor0 >> 0) & 0x01) & ((s_arrmul24_fa3_15_or0 >> 0) & 0x01);
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s_arrmul24_fa4_15_or0 = ((s_arrmul24_fa4_15_and0 >> 0) & 0x01) | ((s_arrmul24_fa4_15_and1 >> 0) & 0x01);
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s_arrmul24_and5_15 = ((a >> 5) & 0x01) & ((b >> 15) & 0x01);
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s_arrmul24_fa5_15_xor0 = ((s_arrmul24_and5_15 >> 0) & 0x01) ^ ((s_arrmul24_fa6_14_xor1 >> 0) & 0x01);
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s_arrmul24_fa5_15_and0 = ((s_arrmul24_and5_15 >> 0) & 0x01) & ((s_arrmul24_fa6_14_xor1 >> 0) & 0x01);
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s_arrmul24_fa5_15_xor1 = ((s_arrmul24_fa5_15_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa4_15_or0 >> 0) & 0x01);
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s_arrmul24_fa5_15_and1 = ((s_arrmul24_fa5_15_xor0 >> 0) & 0x01) & ((s_arrmul24_fa4_15_or0 >> 0) & 0x01);
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s_arrmul24_fa5_15_or0 = ((s_arrmul24_fa5_15_and0 >> 0) & 0x01) | ((s_arrmul24_fa5_15_and1 >> 0) & 0x01);
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s_arrmul24_and6_15 = ((a >> 6) & 0x01) & ((b >> 15) & 0x01);
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s_arrmul24_fa6_15_xor0 = ((s_arrmul24_and6_15 >> 0) & 0x01) ^ ((s_arrmul24_fa7_14_xor1 >> 0) & 0x01);
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s_arrmul24_fa6_15_and0 = ((s_arrmul24_and6_15 >> 0) & 0x01) & ((s_arrmul24_fa7_14_xor1 >> 0) & 0x01);
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s_arrmul24_fa6_15_xor1 = ((s_arrmul24_fa6_15_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa5_15_or0 >> 0) & 0x01);
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s_arrmul24_fa6_15_and1 = ((s_arrmul24_fa6_15_xor0 >> 0) & 0x01) & ((s_arrmul24_fa5_15_or0 >> 0) & 0x01);
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s_arrmul24_fa6_15_or0 = ((s_arrmul24_fa6_15_and0 >> 0) & 0x01) | ((s_arrmul24_fa6_15_and1 >> 0) & 0x01);
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s_arrmul24_and7_15 = ((a >> 7) & 0x01) & ((b >> 15) & 0x01);
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s_arrmul24_fa7_15_xor0 = ((s_arrmul24_and7_15 >> 0) & 0x01) ^ ((s_arrmul24_fa8_14_xor1 >> 0) & 0x01);
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s_arrmul24_fa7_15_and0 = ((s_arrmul24_and7_15 >> 0) & 0x01) & ((s_arrmul24_fa8_14_xor1 >> 0) & 0x01);
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s_arrmul24_fa7_15_xor1 = ((s_arrmul24_fa7_15_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa6_15_or0 >> 0) & 0x01);
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s_arrmul24_fa7_15_and1 = ((s_arrmul24_fa7_15_xor0 >> 0) & 0x01) & ((s_arrmul24_fa6_15_or0 >> 0) & 0x01);
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s_arrmul24_fa7_15_or0 = ((s_arrmul24_fa7_15_and0 >> 0) & 0x01) | ((s_arrmul24_fa7_15_and1 >> 0) & 0x01);
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s_arrmul24_and8_15 = ((a >> 8) & 0x01) & ((b >> 15) & 0x01);
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s_arrmul24_fa8_15_xor0 = ((s_arrmul24_and8_15 >> 0) & 0x01) ^ ((s_arrmul24_fa9_14_xor1 >> 0) & 0x01);
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s_arrmul24_fa8_15_and0 = ((s_arrmul24_and8_15 >> 0) & 0x01) & ((s_arrmul24_fa9_14_xor1 >> 0) & 0x01);
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s_arrmul24_fa8_15_xor1 = ((s_arrmul24_fa8_15_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa7_15_or0 >> 0) & 0x01);
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s_arrmul24_fa8_15_and1 = ((s_arrmul24_fa8_15_xor0 >> 0) & 0x01) & ((s_arrmul24_fa7_15_or0 >> 0) & 0x01);
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s_arrmul24_fa8_15_or0 = ((s_arrmul24_fa8_15_and0 >> 0) & 0x01) | ((s_arrmul24_fa8_15_and1 >> 0) & 0x01);
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s_arrmul24_and9_15 = ((a >> 9) & 0x01) & ((b >> 15) & 0x01);
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s_arrmul24_fa9_15_xor0 = ((s_arrmul24_and9_15 >> 0) & 0x01) ^ ((s_arrmul24_fa10_14_xor1 >> 0) & 0x01);
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s_arrmul24_fa9_15_and0 = ((s_arrmul24_and9_15 >> 0) & 0x01) & ((s_arrmul24_fa10_14_xor1 >> 0) & 0x01);
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s_arrmul24_fa9_15_xor1 = ((s_arrmul24_fa9_15_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa8_15_or0 >> 0) & 0x01);
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s_arrmul24_fa9_15_and1 = ((s_arrmul24_fa9_15_xor0 >> 0) & 0x01) & ((s_arrmul24_fa8_15_or0 >> 0) & 0x01);
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s_arrmul24_fa9_15_or0 = ((s_arrmul24_fa9_15_and0 >> 0) & 0x01) | ((s_arrmul24_fa9_15_and1 >> 0) & 0x01);
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s_arrmul24_and10_15 = ((a >> 10) & 0x01) & ((b >> 15) & 0x01);
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s_arrmul24_fa10_15_xor0 = ((s_arrmul24_and10_15 >> 0) & 0x01) ^ ((s_arrmul24_fa11_14_xor1 >> 0) & 0x01);
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s_arrmul24_fa10_15_and0 = ((s_arrmul24_and10_15 >> 0) & 0x01) & ((s_arrmul24_fa11_14_xor1 >> 0) & 0x01);
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s_arrmul24_fa10_15_xor1 = ((s_arrmul24_fa10_15_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa9_15_or0 >> 0) & 0x01);
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s_arrmul24_fa10_15_and1 = ((s_arrmul24_fa10_15_xor0 >> 0) & 0x01) & ((s_arrmul24_fa9_15_or0 >> 0) & 0x01);
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s_arrmul24_fa10_15_or0 = ((s_arrmul24_fa10_15_and0 >> 0) & 0x01) | ((s_arrmul24_fa10_15_and1 >> 0) & 0x01);
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s_arrmul24_and11_15 = ((a >> 11) & 0x01) & ((b >> 15) & 0x01);
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s_arrmul24_fa11_15_xor0 = ((s_arrmul24_and11_15 >> 0) & 0x01) ^ ((s_arrmul24_fa12_14_xor1 >> 0) & 0x01);
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s_arrmul24_fa11_15_and0 = ((s_arrmul24_and11_15 >> 0) & 0x01) & ((s_arrmul24_fa12_14_xor1 >> 0) & 0x01);
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s_arrmul24_fa11_15_xor1 = ((s_arrmul24_fa11_15_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa10_15_or0 >> 0) & 0x01);
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s_arrmul24_fa11_15_and1 = ((s_arrmul24_fa11_15_xor0 >> 0) & 0x01) & ((s_arrmul24_fa10_15_or0 >> 0) & 0x01);
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s_arrmul24_fa11_15_or0 = ((s_arrmul24_fa11_15_and0 >> 0) & 0x01) | ((s_arrmul24_fa11_15_and1 >> 0) & 0x01);
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s_arrmul24_and12_15 = ((a >> 12) & 0x01) & ((b >> 15) & 0x01);
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s_arrmul24_fa12_15_xor0 = ((s_arrmul24_and12_15 >> 0) & 0x01) ^ ((s_arrmul24_fa13_14_xor1 >> 0) & 0x01);
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s_arrmul24_fa12_15_and0 = ((s_arrmul24_and12_15 >> 0) & 0x01) & ((s_arrmul24_fa13_14_xor1 >> 0) & 0x01);
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s_arrmul24_fa12_15_xor1 = ((s_arrmul24_fa12_15_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa11_15_or0 >> 0) & 0x01);
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s_arrmul24_fa12_15_and1 = ((s_arrmul24_fa12_15_xor0 >> 0) & 0x01) & ((s_arrmul24_fa11_15_or0 >> 0) & 0x01);
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s_arrmul24_fa12_15_or0 = ((s_arrmul24_fa12_15_and0 >> 0) & 0x01) | ((s_arrmul24_fa12_15_and1 >> 0) & 0x01);
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s_arrmul24_and13_15 = ((a >> 13) & 0x01) & ((b >> 15) & 0x01);
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s_arrmul24_fa13_15_xor0 = ((s_arrmul24_and13_15 >> 0) & 0x01) ^ ((s_arrmul24_fa14_14_xor1 >> 0) & 0x01);
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s_arrmul24_fa13_15_and0 = ((s_arrmul24_and13_15 >> 0) & 0x01) & ((s_arrmul24_fa14_14_xor1 >> 0) & 0x01);
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s_arrmul24_fa13_15_xor1 = ((s_arrmul24_fa13_15_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa12_15_or0 >> 0) & 0x01);
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s_arrmul24_fa13_15_and1 = ((s_arrmul24_fa13_15_xor0 >> 0) & 0x01) & ((s_arrmul24_fa12_15_or0 >> 0) & 0x01);
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s_arrmul24_fa13_15_or0 = ((s_arrmul24_fa13_15_and0 >> 0) & 0x01) | ((s_arrmul24_fa13_15_and1 >> 0) & 0x01);
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s_arrmul24_and14_15 = ((a >> 14) & 0x01) & ((b >> 15) & 0x01);
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s_arrmul24_fa14_15_xor0 = ((s_arrmul24_and14_15 >> 0) & 0x01) ^ ((s_arrmul24_fa15_14_xor1 >> 0) & 0x01);
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s_arrmul24_fa14_15_and0 = ((s_arrmul24_and14_15 >> 0) & 0x01) & ((s_arrmul24_fa15_14_xor1 >> 0) & 0x01);
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s_arrmul24_fa14_15_xor1 = ((s_arrmul24_fa14_15_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa13_15_or0 >> 0) & 0x01);
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s_arrmul24_fa14_15_and1 = ((s_arrmul24_fa14_15_xor0 >> 0) & 0x01) & ((s_arrmul24_fa13_15_or0 >> 0) & 0x01);
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s_arrmul24_fa14_15_or0 = ((s_arrmul24_fa14_15_and0 >> 0) & 0x01) | ((s_arrmul24_fa14_15_and1 >> 0) & 0x01);
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s_arrmul24_and15_15 = ((a >> 15) & 0x01) & ((b >> 15) & 0x01);
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s_arrmul24_fa15_15_xor0 = ((s_arrmul24_and15_15 >> 0) & 0x01) ^ ((s_arrmul24_fa16_14_xor1 >> 0) & 0x01);
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s_arrmul24_fa15_15_and0 = ((s_arrmul24_and15_15 >> 0) & 0x01) & ((s_arrmul24_fa16_14_xor1 >> 0) & 0x01);
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s_arrmul24_fa15_15_xor1 = ((s_arrmul24_fa15_15_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa14_15_or0 >> 0) & 0x01);
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s_arrmul24_fa15_15_and1 = ((s_arrmul24_fa15_15_xor0 >> 0) & 0x01) & ((s_arrmul24_fa14_15_or0 >> 0) & 0x01);
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s_arrmul24_fa15_15_or0 = ((s_arrmul24_fa15_15_and0 >> 0) & 0x01) | ((s_arrmul24_fa15_15_and1 >> 0) & 0x01);
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s_arrmul24_and16_15 = ((a >> 16) & 0x01) & ((b >> 15) & 0x01);
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s_arrmul24_fa16_15_xor0 = ((s_arrmul24_and16_15 >> 0) & 0x01) ^ ((s_arrmul24_fa17_14_xor1 >> 0) & 0x01);
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s_arrmul24_fa16_15_and0 = ((s_arrmul24_and16_15 >> 0) & 0x01) & ((s_arrmul24_fa17_14_xor1 >> 0) & 0x01);
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s_arrmul24_fa16_15_xor1 = ((s_arrmul24_fa16_15_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa15_15_or0 >> 0) & 0x01);
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s_arrmul24_fa16_15_and1 = ((s_arrmul24_fa16_15_xor0 >> 0) & 0x01) & ((s_arrmul24_fa15_15_or0 >> 0) & 0x01);
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s_arrmul24_fa16_15_or0 = ((s_arrmul24_fa16_15_and0 >> 0) & 0x01) | ((s_arrmul24_fa16_15_and1 >> 0) & 0x01);
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s_arrmul24_and17_15 = ((a >> 17) & 0x01) & ((b >> 15) & 0x01);
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s_arrmul24_fa17_15_xor0 = ((s_arrmul24_and17_15 >> 0) & 0x01) ^ ((s_arrmul24_fa18_14_xor1 >> 0) & 0x01);
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s_arrmul24_fa17_15_and0 = ((s_arrmul24_and17_15 >> 0) & 0x01) & ((s_arrmul24_fa18_14_xor1 >> 0) & 0x01);
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s_arrmul24_fa17_15_xor1 = ((s_arrmul24_fa17_15_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa16_15_or0 >> 0) & 0x01);
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s_arrmul24_fa17_15_and1 = ((s_arrmul24_fa17_15_xor0 >> 0) & 0x01) & ((s_arrmul24_fa16_15_or0 >> 0) & 0x01);
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s_arrmul24_fa17_15_or0 = ((s_arrmul24_fa17_15_and0 >> 0) & 0x01) | ((s_arrmul24_fa17_15_and1 >> 0) & 0x01);
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s_arrmul24_and18_15 = ((a >> 18) & 0x01) & ((b >> 15) & 0x01);
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s_arrmul24_fa18_15_xor0 = ((s_arrmul24_and18_15 >> 0) & 0x01) ^ ((s_arrmul24_fa19_14_xor1 >> 0) & 0x01);
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s_arrmul24_fa18_15_and0 = ((s_arrmul24_and18_15 >> 0) & 0x01) & ((s_arrmul24_fa19_14_xor1 >> 0) & 0x01);
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s_arrmul24_fa18_15_xor1 = ((s_arrmul24_fa18_15_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa17_15_or0 >> 0) & 0x01);
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s_arrmul24_fa18_15_and1 = ((s_arrmul24_fa18_15_xor0 >> 0) & 0x01) & ((s_arrmul24_fa17_15_or0 >> 0) & 0x01);
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s_arrmul24_fa18_15_or0 = ((s_arrmul24_fa18_15_and0 >> 0) & 0x01) | ((s_arrmul24_fa18_15_and1 >> 0) & 0x01);
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s_arrmul24_and19_15 = ((a >> 19) & 0x01) & ((b >> 15) & 0x01);
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s_arrmul24_fa19_15_xor0 = ((s_arrmul24_and19_15 >> 0) & 0x01) ^ ((s_arrmul24_fa20_14_xor1 >> 0) & 0x01);
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s_arrmul24_fa19_15_and0 = ((s_arrmul24_and19_15 >> 0) & 0x01) & ((s_arrmul24_fa20_14_xor1 >> 0) & 0x01);
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s_arrmul24_fa19_15_xor1 = ((s_arrmul24_fa19_15_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa18_15_or0 >> 0) & 0x01);
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s_arrmul24_fa19_15_and1 = ((s_arrmul24_fa19_15_xor0 >> 0) & 0x01) & ((s_arrmul24_fa18_15_or0 >> 0) & 0x01);
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s_arrmul24_fa19_15_or0 = ((s_arrmul24_fa19_15_and0 >> 0) & 0x01) | ((s_arrmul24_fa19_15_and1 >> 0) & 0x01);
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s_arrmul24_and20_15 = ((a >> 20) & 0x01) & ((b >> 15) & 0x01);
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s_arrmul24_fa20_15_xor0 = ((s_arrmul24_and20_15 >> 0) & 0x01) ^ ((s_arrmul24_fa21_14_xor1 >> 0) & 0x01);
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s_arrmul24_fa20_15_and0 = ((s_arrmul24_and20_15 >> 0) & 0x01) & ((s_arrmul24_fa21_14_xor1 >> 0) & 0x01);
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s_arrmul24_fa20_15_xor1 = ((s_arrmul24_fa20_15_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa19_15_or0 >> 0) & 0x01);
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s_arrmul24_fa20_15_and1 = ((s_arrmul24_fa20_15_xor0 >> 0) & 0x01) & ((s_arrmul24_fa19_15_or0 >> 0) & 0x01);
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s_arrmul24_fa20_15_or0 = ((s_arrmul24_fa20_15_and0 >> 0) & 0x01) | ((s_arrmul24_fa20_15_and1 >> 0) & 0x01);
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s_arrmul24_and21_15 = ((a >> 21) & 0x01) & ((b >> 15) & 0x01);
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s_arrmul24_fa21_15_xor0 = ((s_arrmul24_and21_15 >> 0) & 0x01) ^ ((s_arrmul24_fa22_14_xor1 >> 0) & 0x01);
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s_arrmul24_fa21_15_and0 = ((s_arrmul24_and21_15 >> 0) & 0x01) & ((s_arrmul24_fa22_14_xor1 >> 0) & 0x01);
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s_arrmul24_fa21_15_xor1 = ((s_arrmul24_fa21_15_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa20_15_or0 >> 0) & 0x01);
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s_arrmul24_fa21_15_and1 = ((s_arrmul24_fa21_15_xor0 >> 0) & 0x01) & ((s_arrmul24_fa20_15_or0 >> 0) & 0x01);
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s_arrmul24_fa21_15_or0 = ((s_arrmul24_fa21_15_and0 >> 0) & 0x01) | ((s_arrmul24_fa21_15_and1 >> 0) & 0x01);
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s_arrmul24_and22_15 = ((a >> 22) & 0x01) & ((b >> 15) & 0x01);
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s_arrmul24_fa22_15_xor0 = ((s_arrmul24_and22_15 >> 0) & 0x01) ^ ((s_arrmul24_fa23_14_xor1 >> 0) & 0x01);
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s_arrmul24_fa22_15_and0 = ((s_arrmul24_and22_15 >> 0) & 0x01) & ((s_arrmul24_fa23_14_xor1 >> 0) & 0x01);
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s_arrmul24_fa22_15_xor1 = ((s_arrmul24_fa22_15_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa21_15_or0 >> 0) & 0x01);
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s_arrmul24_fa22_15_and1 = ((s_arrmul24_fa22_15_xor0 >> 0) & 0x01) & ((s_arrmul24_fa21_15_or0 >> 0) & 0x01);
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s_arrmul24_fa22_15_or0 = ((s_arrmul24_fa22_15_and0 >> 0) & 0x01) | ((s_arrmul24_fa22_15_and1 >> 0) & 0x01);
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s_arrmul24_nand23_15 = ~(((a >> 23) & 0x01) & ((b >> 15) & 0x01)) & 0x01;
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s_arrmul24_fa23_15_xor0 = ((s_arrmul24_nand23_15 >> 0) & 0x01) ^ ((s_arrmul24_fa23_14_or0 >> 0) & 0x01);
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s_arrmul24_fa23_15_and0 = ((s_arrmul24_nand23_15 >> 0) & 0x01) & ((s_arrmul24_fa23_14_or0 >> 0) & 0x01);
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s_arrmul24_fa23_15_xor1 = ((s_arrmul24_fa23_15_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa22_15_or0 >> 0) & 0x01);
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s_arrmul24_fa23_15_and1 = ((s_arrmul24_fa23_15_xor0 >> 0) & 0x01) & ((s_arrmul24_fa22_15_or0 >> 0) & 0x01);
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s_arrmul24_fa23_15_or0 = ((s_arrmul24_fa23_15_and0 >> 0) & 0x01) | ((s_arrmul24_fa23_15_and1 >> 0) & 0x01);
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s_arrmul24_and0_16 = ((a >> 0) & 0x01) & ((b >> 16) & 0x01);
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s_arrmul24_ha0_16_xor0 = ((s_arrmul24_and0_16 >> 0) & 0x01) ^ ((s_arrmul24_fa1_15_xor1 >> 0) & 0x01);
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s_arrmul24_ha0_16_and0 = ((s_arrmul24_and0_16 >> 0) & 0x01) & ((s_arrmul24_fa1_15_xor1 >> 0) & 0x01);
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s_arrmul24_and1_16 = ((a >> 1) & 0x01) & ((b >> 16) & 0x01);
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s_arrmul24_fa1_16_xor0 = ((s_arrmul24_and1_16 >> 0) & 0x01) ^ ((s_arrmul24_fa2_15_xor1 >> 0) & 0x01);
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s_arrmul24_fa1_16_and0 = ((s_arrmul24_and1_16 >> 0) & 0x01) & ((s_arrmul24_fa2_15_xor1 >> 0) & 0x01);
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s_arrmul24_fa1_16_xor1 = ((s_arrmul24_fa1_16_xor0 >> 0) & 0x01) ^ ((s_arrmul24_ha0_16_and0 >> 0) & 0x01);
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s_arrmul24_fa1_16_and1 = ((s_arrmul24_fa1_16_xor0 >> 0) & 0x01) & ((s_arrmul24_ha0_16_and0 >> 0) & 0x01);
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s_arrmul24_fa1_16_or0 = ((s_arrmul24_fa1_16_and0 >> 0) & 0x01) | ((s_arrmul24_fa1_16_and1 >> 0) & 0x01);
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s_arrmul24_and2_16 = ((a >> 2) & 0x01) & ((b >> 16) & 0x01);
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s_arrmul24_fa2_16_xor0 = ((s_arrmul24_and2_16 >> 0) & 0x01) ^ ((s_arrmul24_fa3_15_xor1 >> 0) & 0x01);
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s_arrmul24_fa2_16_and0 = ((s_arrmul24_and2_16 >> 0) & 0x01) & ((s_arrmul24_fa3_15_xor1 >> 0) & 0x01);
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s_arrmul24_fa2_16_xor1 = ((s_arrmul24_fa2_16_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa1_16_or0 >> 0) & 0x01);
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s_arrmul24_fa2_16_and1 = ((s_arrmul24_fa2_16_xor0 >> 0) & 0x01) & ((s_arrmul24_fa1_16_or0 >> 0) & 0x01);
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s_arrmul24_fa2_16_or0 = ((s_arrmul24_fa2_16_and0 >> 0) & 0x01) | ((s_arrmul24_fa2_16_and1 >> 0) & 0x01);
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s_arrmul24_and3_16 = ((a >> 3) & 0x01) & ((b >> 16) & 0x01);
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s_arrmul24_fa3_16_xor0 = ((s_arrmul24_and3_16 >> 0) & 0x01) ^ ((s_arrmul24_fa4_15_xor1 >> 0) & 0x01);
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s_arrmul24_fa3_16_and0 = ((s_arrmul24_and3_16 >> 0) & 0x01) & ((s_arrmul24_fa4_15_xor1 >> 0) & 0x01);
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s_arrmul24_fa3_16_xor1 = ((s_arrmul24_fa3_16_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa2_16_or0 >> 0) & 0x01);
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s_arrmul24_fa3_16_and1 = ((s_arrmul24_fa3_16_xor0 >> 0) & 0x01) & ((s_arrmul24_fa2_16_or0 >> 0) & 0x01);
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s_arrmul24_fa3_16_or0 = ((s_arrmul24_fa3_16_and0 >> 0) & 0x01) | ((s_arrmul24_fa3_16_and1 >> 0) & 0x01);
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s_arrmul24_and4_16 = ((a >> 4) & 0x01) & ((b >> 16) & 0x01);
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s_arrmul24_fa4_16_xor0 = ((s_arrmul24_and4_16 >> 0) & 0x01) ^ ((s_arrmul24_fa5_15_xor1 >> 0) & 0x01);
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s_arrmul24_fa4_16_and0 = ((s_arrmul24_and4_16 >> 0) & 0x01) & ((s_arrmul24_fa5_15_xor1 >> 0) & 0x01);
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s_arrmul24_fa4_16_xor1 = ((s_arrmul24_fa4_16_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa3_16_or0 >> 0) & 0x01);
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s_arrmul24_fa4_16_and1 = ((s_arrmul24_fa4_16_xor0 >> 0) & 0x01) & ((s_arrmul24_fa3_16_or0 >> 0) & 0x01);
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s_arrmul24_fa4_16_or0 = ((s_arrmul24_fa4_16_and0 >> 0) & 0x01) | ((s_arrmul24_fa4_16_and1 >> 0) & 0x01);
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s_arrmul24_and5_16 = ((a >> 5) & 0x01) & ((b >> 16) & 0x01);
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s_arrmul24_fa5_16_xor0 = ((s_arrmul24_and5_16 >> 0) & 0x01) ^ ((s_arrmul24_fa6_15_xor1 >> 0) & 0x01);
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s_arrmul24_fa5_16_and0 = ((s_arrmul24_and5_16 >> 0) & 0x01) & ((s_arrmul24_fa6_15_xor1 >> 0) & 0x01);
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s_arrmul24_fa5_16_xor1 = ((s_arrmul24_fa5_16_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa4_16_or0 >> 0) & 0x01);
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s_arrmul24_fa5_16_and1 = ((s_arrmul24_fa5_16_xor0 >> 0) & 0x01) & ((s_arrmul24_fa4_16_or0 >> 0) & 0x01);
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s_arrmul24_fa5_16_or0 = ((s_arrmul24_fa5_16_and0 >> 0) & 0x01) | ((s_arrmul24_fa5_16_and1 >> 0) & 0x01);
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s_arrmul24_and6_16 = ((a >> 6) & 0x01) & ((b >> 16) & 0x01);
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s_arrmul24_fa6_16_xor0 = ((s_arrmul24_and6_16 >> 0) & 0x01) ^ ((s_arrmul24_fa7_15_xor1 >> 0) & 0x01);
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s_arrmul24_fa6_16_and0 = ((s_arrmul24_and6_16 >> 0) & 0x01) & ((s_arrmul24_fa7_15_xor1 >> 0) & 0x01);
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s_arrmul24_fa6_16_xor1 = ((s_arrmul24_fa6_16_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa5_16_or0 >> 0) & 0x01);
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s_arrmul24_fa6_16_and1 = ((s_arrmul24_fa6_16_xor0 >> 0) & 0x01) & ((s_arrmul24_fa5_16_or0 >> 0) & 0x01);
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s_arrmul24_fa6_16_or0 = ((s_arrmul24_fa6_16_and0 >> 0) & 0x01) | ((s_arrmul24_fa6_16_and1 >> 0) & 0x01);
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s_arrmul24_and7_16 = ((a >> 7) & 0x01) & ((b >> 16) & 0x01);
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s_arrmul24_fa7_16_xor0 = ((s_arrmul24_and7_16 >> 0) & 0x01) ^ ((s_arrmul24_fa8_15_xor1 >> 0) & 0x01);
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s_arrmul24_fa7_16_and0 = ((s_arrmul24_and7_16 >> 0) & 0x01) & ((s_arrmul24_fa8_15_xor1 >> 0) & 0x01);
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s_arrmul24_fa7_16_xor1 = ((s_arrmul24_fa7_16_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa6_16_or0 >> 0) & 0x01);
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s_arrmul24_fa7_16_and1 = ((s_arrmul24_fa7_16_xor0 >> 0) & 0x01) & ((s_arrmul24_fa6_16_or0 >> 0) & 0x01);
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s_arrmul24_fa7_16_or0 = ((s_arrmul24_fa7_16_and0 >> 0) & 0x01) | ((s_arrmul24_fa7_16_and1 >> 0) & 0x01);
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s_arrmul24_and8_16 = ((a >> 8) & 0x01) & ((b >> 16) & 0x01);
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s_arrmul24_fa8_16_xor0 = ((s_arrmul24_and8_16 >> 0) & 0x01) ^ ((s_arrmul24_fa9_15_xor1 >> 0) & 0x01);
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s_arrmul24_fa8_16_and0 = ((s_arrmul24_and8_16 >> 0) & 0x01) & ((s_arrmul24_fa9_15_xor1 >> 0) & 0x01);
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s_arrmul24_fa8_16_xor1 = ((s_arrmul24_fa8_16_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa7_16_or0 >> 0) & 0x01);
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s_arrmul24_fa8_16_and1 = ((s_arrmul24_fa8_16_xor0 >> 0) & 0x01) & ((s_arrmul24_fa7_16_or0 >> 0) & 0x01);
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s_arrmul24_fa8_16_or0 = ((s_arrmul24_fa8_16_and0 >> 0) & 0x01) | ((s_arrmul24_fa8_16_and1 >> 0) & 0x01);
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s_arrmul24_and9_16 = ((a >> 9) & 0x01) & ((b >> 16) & 0x01);
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s_arrmul24_fa9_16_xor0 = ((s_arrmul24_and9_16 >> 0) & 0x01) ^ ((s_arrmul24_fa10_15_xor1 >> 0) & 0x01);
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s_arrmul24_fa9_16_and0 = ((s_arrmul24_and9_16 >> 0) & 0x01) & ((s_arrmul24_fa10_15_xor1 >> 0) & 0x01);
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s_arrmul24_fa9_16_xor1 = ((s_arrmul24_fa9_16_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa8_16_or0 >> 0) & 0x01);
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s_arrmul24_fa9_16_and1 = ((s_arrmul24_fa9_16_xor0 >> 0) & 0x01) & ((s_arrmul24_fa8_16_or0 >> 0) & 0x01);
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s_arrmul24_fa9_16_or0 = ((s_arrmul24_fa9_16_and0 >> 0) & 0x01) | ((s_arrmul24_fa9_16_and1 >> 0) & 0x01);
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s_arrmul24_and10_16 = ((a >> 10) & 0x01) & ((b >> 16) & 0x01);
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s_arrmul24_fa10_16_xor0 = ((s_arrmul24_and10_16 >> 0) & 0x01) ^ ((s_arrmul24_fa11_15_xor1 >> 0) & 0x01);
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s_arrmul24_fa10_16_and0 = ((s_arrmul24_and10_16 >> 0) & 0x01) & ((s_arrmul24_fa11_15_xor1 >> 0) & 0x01);
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s_arrmul24_fa10_16_xor1 = ((s_arrmul24_fa10_16_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa9_16_or0 >> 0) & 0x01);
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s_arrmul24_fa10_16_and1 = ((s_arrmul24_fa10_16_xor0 >> 0) & 0x01) & ((s_arrmul24_fa9_16_or0 >> 0) & 0x01);
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s_arrmul24_fa10_16_or0 = ((s_arrmul24_fa10_16_and0 >> 0) & 0x01) | ((s_arrmul24_fa10_16_and1 >> 0) & 0x01);
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s_arrmul24_and11_16 = ((a >> 11) & 0x01) & ((b >> 16) & 0x01);
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s_arrmul24_fa11_16_xor0 = ((s_arrmul24_and11_16 >> 0) & 0x01) ^ ((s_arrmul24_fa12_15_xor1 >> 0) & 0x01);
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s_arrmul24_fa11_16_and0 = ((s_arrmul24_and11_16 >> 0) & 0x01) & ((s_arrmul24_fa12_15_xor1 >> 0) & 0x01);
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s_arrmul24_fa11_16_xor1 = ((s_arrmul24_fa11_16_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa10_16_or0 >> 0) & 0x01);
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s_arrmul24_fa11_16_and1 = ((s_arrmul24_fa11_16_xor0 >> 0) & 0x01) & ((s_arrmul24_fa10_16_or0 >> 0) & 0x01);
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s_arrmul24_fa11_16_or0 = ((s_arrmul24_fa11_16_and0 >> 0) & 0x01) | ((s_arrmul24_fa11_16_and1 >> 0) & 0x01);
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s_arrmul24_and12_16 = ((a >> 12) & 0x01) & ((b >> 16) & 0x01);
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s_arrmul24_fa12_16_xor0 = ((s_arrmul24_and12_16 >> 0) & 0x01) ^ ((s_arrmul24_fa13_15_xor1 >> 0) & 0x01);
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s_arrmul24_fa12_16_and0 = ((s_arrmul24_and12_16 >> 0) & 0x01) & ((s_arrmul24_fa13_15_xor1 >> 0) & 0x01);
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s_arrmul24_fa12_16_xor1 = ((s_arrmul24_fa12_16_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa11_16_or0 >> 0) & 0x01);
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s_arrmul24_fa12_16_and1 = ((s_arrmul24_fa12_16_xor0 >> 0) & 0x01) & ((s_arrmul24_fa11_16_or0 >> 0) & 0x01);
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s_arrmul24_fa12_16_or0 = ((s_arrmul24_fa12_16_and0 >> 0) & 0x01) | ((s_arrmul24_fa12_16_and1 >> 0) & 0x01);
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s_arrmul24_and13_16 = ((a >> 13) & 0x01) & ((b >> 16) & 0x01);
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s_arrmul24_fa13_16_xor0 = ((s_arrmul24_and13_16 >> 0) & 0x01) ^ ((s_arrmul24_fa14_15_xor1 >> 0) & 0x01);
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s_arrmul24_fa13_16_and0 = ((s_arrmul24_and13_16 >> 0) & 0x01) & ((s_arrmul24_fa14_15_xor1 >> 0) & 0x01);
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s_arrmul24_fa13_16_xor1 = ((s_arrmul24_fa13_16_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa12_16_or0 >> 0) & 0x01);
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s_arrmul24_fa13_16_and1 = ((s_arrmul24_fa13_16_xor0 >> 0) & 0x01) & ((s_arrmul24_fa12_16_or0 >> 0) & 0x01);
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s_arrmul24_fa13_16_or0 = ((s_arrmul24_fa13_16_and0 >> 0) & 0x01) | ((s_arrmul24_fa13_16_and1 >> 0) & 0x01);
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s_arrmul24_and14_16 = ((a >> 14) & 0x01) & ((b >> 16) & 0x01);
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s_arrmul24_fa14_16_xor0 = ((s_arrmul24_and14_16 >> 0) & 0x01) ^ ((s_arrmul24_fa15_15_xor1 >> 0) & 0x01);
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s_arrmul24_fa14_16_and0 = ((s_arrmul24_and14_16 >> 0) & 0x01) & ((s_arrmul24_fa15_15_xor1 >> 0) & 0x01);
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s_arrmul24_fa14_16_xor1 = ((s_arrmul24_fa14_16_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa13_16_or0 >> 0) & 0x01);
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s_arrmul24_fa14_16_and1 = ((s_arrmul24_fa14_16_xor0 >> 0) & 0x01) & ((s_arrmul24_fa13_16_or0 >> 0) & 0x01);
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s_arrmul24_fa14_16_or0 = ((s_arrmul24_fa14_16_and0 >> 0) & 0x01) | ((s_arrmul24_fa14_16_and1 >> 0) & 0x01);
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s_arrmul24_and15_16 = ((a >> 15) & 0x01) & ((b >> 16) & 0x01);
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s_arrmul24_fa15_16_xor0 = ((s_arrmul24_and15_16 >> 0) & 0x01) ^ ((s_arrmul24_fa16_15_xor1 >> 0) & 0x01);
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s_arrmul24_fa15_16_and0 = ((s_arrmul24_and15_16 >> 0) & 0x01) & ((s_arrmul24_fa16_15_xor1 >> 0) & 0x01);
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s_arrmul24_fa15_16_xor1 = ((s_arrmul24_fa15_16_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa14_16_or0 >> 0) & 0x01);
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s_arrmul24_fa15_16_and1 = ((s_arrmul24_fa15_16_xor0 >> 0) & 0x01) & ((s_arrmul24_fa14_16_or0 >> 0) & 0x01);
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s_arrmul24_fa15_16_or0 = ((s_arrmul24_fa15_16_and0 >> 0) & 0x01) | ((s_arrmul24_fa15_16_and1 >> 0) & 0x01);
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s_arrmul24_and16_16 = ((a >> 16) & 0x01) & ((b >> 16) & 0x01);
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s_arrmul24_fa16_16_xor0 = ((s_arrmul24_and16_16 >> 0) & 0x01) ^ ((s_arrmul24_fa17_15_xor1 >> 0) & 0x01);
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s_arrmul24_fa16_16_and0 = ((s_arrmul24_and16_16 >> 0) & 0x01) & ((s_arrmul24_fa17_15_xor1 >> 0) & 0x01);
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s_arrmul24_fa16_16_xor1 = ((s_arrmul24_fa16_16_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa15_16_or0 >> 0) & 0x01);
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s_arrmul24_fa16_16_and1 = ((s_arrmul24_fa16_16_xor0 >> 0) & 0x01) & ((s_arrmul24_fa15_16_or0 >> 0) & 0x01);
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s_arrmul24_fa16_16_or0 = ((s_arrmul24_fa16_16_and0 >> 0) & 0x01) | ((s_arrmul24_fa16_16_and1 >> 0) & 0x01);
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s_arrmul24_and17_16 = ((a >> 17) & 0x01) & ((b >> 16) & 0x01);
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s_arrmul24_fa17_16_xor0 = ((s_arrmul24_and17_16 >> 0) & 0x01) ^ ((s_arrmul24_fa18_15_xor1 >> 0) & 0x01);
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s_arrmul24_fa17_16_and0 = ((s_arrmul24_and17_16 >> 0) & 0x01) & ((s_arrmul24_fa18_15_xor1 >> 0) & 0x01);
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s_arrmul24_fa17_16_xor1 = ((s_arrmul24_fa17_16_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa16_16_or0 >> 0) & 0x01);
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s_arrmul24_fa17_16_and1 = ((s_arrmul24_fa17_16_xor0 >> 0) & 0x01) & ((s_arrmul24_fa16_16_or0 >> 0) & 0x01);
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s_arrmul24_fa17_16_or0 = ((s_arrmul24_fa17_16_and0 >> 0) & 0x01) | ((s_arrmul24_fa17_16_and1 >> 0) & 0x01);
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s_arrmul24_and18_16 = ((a >> 18) & 0x01) & ((b >> 16) & 0x01);
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s_arrmul24_fa18_16_xor0 = ((s_arrmul24_and18_16 >> 0) & 0x01) ^ ((s_arrmul24_fa19_15_xor1 >> 0) & 0x01);
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s_arrmul24_fa18_16_and0 = ((s_arrmul24_and18_16 >> 0) & 0x01) & ((s_arrmul24_fa19_15_xor1 >> 0) & 0x01);
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s_arrmul24_fa18_16_xor1 = ((s_arrmul24_fa18_16_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa17_16_or0 >> 0) & 0x01);
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s_arrmul24_fa18_16_and1 = ((s_arrmul24_fa18_16_xor0 >> 0) & 0x01) & ((s_arrmul24_fa17_16_or0 >> 0) & 0x01);
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s_arrmul24_fa18_16_or0 = ((s_arrmul24_fa18_16_and0 >> 0) & 0x01) | ((s_arrmul24_fa18_16_and1 >> 0) & 0x01);
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s_arrmul24_and19_16 = ((a >> 19) & 0x01) & ((b >> 16) & 0x01);
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s_arrmul24_fa19_16_xor0 = ((s_arrmul24_and19_16 >> 0) & 0x01) ^ ((s_arrmul24_fa20_15_xor1 >> 0) & 0x01);
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s_arrmul24_fa19_16_and0 = ((s_arrmul24_and19_16 >> 0) & 0x01) & ((s_arrmul24_fa20_15_xor1 >> 0) & 0x01);
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s_arrmul24_fa19_16_xor1 = ((s_arrmul24_fa19_16_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa18_16_or0 >> 0) & 0x01);
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s_arrmul24_fa19_16_and1 = ((s_arrmul24_fa19_16_xor0 >> 0) & 0x01) & ((s_arrmul24_fa18_16_or0 >> 0) & 0x01);
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s_arrmul24_fa19_16_or0 = ((s_arrmul24_fa19_16_and0 >> 0) & 0x01) | ((s_arrmul24_fa19_16_and1 >> 0) & 0x01);
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s_arrmul24_and20_16 = ((a >> 20) & 0x01) & ((b >> 16) & 0x01);
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s_arrmul24_fa20_16_xor0 = ((s_arrmul24_and20_16 >> 0) & 0x01) ^ ((s_arrmul24_fa21_15_xor1 >> 0) & 0x01);
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s_arrmul24_fa20_16_and0 = ((s_arrmul24_and20_16 >> 0) & 0x01) & ((s_arrmul24_fa21_15_xor1 >> 0) & 0x01);
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s_arrmul24_fa20_16_xor1 = ((s_arrmul24_fa20_16_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa19_16_or0 >> 0) & 0x01);
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s_arrmul24_fa20_16_and1 = ((s_arrmul24_fa20_16_xor0 >> 0) & 0x01) & ((s_arrmul24_fa19_16_or0 >> 0) & 0x01);
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s_arrmul24_fa20_16_or0 = ((s_arrmul24_fa20_16_and0 >> 0) & 0x01) | ((s_arrmul24_fa20_16_and1 >> 0) & 0x01);
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s_arrmul24_and21_16 = ((a >> 21) & 0x01) & ((b >> 16) & 0x01);
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s_arrmul24_fa21_16_xor0 = ((s_arrmul24_and21_16 >> 0) & 0x01) ^ ((s_arrmul24_fa22_15_xor1 >> 0) & 0x01);
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s_arrmul24_fa21_16_and0 = ((s_arrmul24_and21_16 >> 0) & 0x01) & ((s_arrmul24_fa22_15_xor1 >> 0) & 0x01);
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s_arrmul24_fa21_16_xor1 = ((s_arrmul24_fa21_16_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa20_16_or0 >> 0) & 0x01);
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s_arrmul24_fa21_16_and1 = ((s_arrmul24_fa21_16_xor0 >> 0) & 0x01) & ((s_arrmul24_fa20_16_or0 >> 0) & 0x01);
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s_arrmul24_fa21_16_or0 = ((s_arrmul24_fa21_16_and0 >> 0) & 0x01) | ((s_arrmul24_fa21_16_and1 >> 0) & 0x01);
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s_arrmul24_and22_16 = ((a >> 22) & 0x01) & ((b >> 16) & 0x01);
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s_arrmul24_fa22_16_xor0 = ((s_arrmul24_and22_16 >> 0) & 0x01) ^ ((s_arrmul24_fa23_15_xor1 >> 0) & 0x01);
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s_arrmul24_fa22_16_and0 = ((s_arrmul24_and22_16 >> 0) & 0x01) & ((s_arrmul24_fa23_15_xor1 >> 0) & 0x01);
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s_arrmul24_fa22_16_xor1 = ((s_arrmul24_fa22_16_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa21_16_or0 >> 0) & 0x01);
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s_arrmul24_fa22_16_and1 = ((s_arrmul24_fa22_16_xor0 >> 0) & 0x01) & ((s_arrmul24_fa21_16_or0 >> 0) & 0x01);
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s_arrmul24_fa22_16_or0 = ((s_arrmul24_fa22_16_and0 >> 0) & 0x01) | ((s_arrmul24_fa22_16_and1 >> 0) & 0x01);
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s_arrmul24_nand23_16 = ~(((a >> 23) & 0x01) & ((b >> 16) & 0x01)) & 0x01;
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s_arrmul24_fa23_16_xor0 = ((s_arrmul24_nand23_16 >> 0) & 0x01) ^ ((s_arrmul24_fa23_15_or0 >> 0) & 0x01);
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s_arrmul24_fa23_16_and0 = ((s_arrmul24_nand23_16 >> 0) & 0x01) & ((s_arrmul24_fa23_15_or0 >> 0) & 0x01);
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s_arrmul24_fa23_16_xor1 = ((s_arrmul24_fa23_16_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa22_16_or0 >> 0) & 0x01);
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s_arrmul24_fa23_16_and1 = ((s_arrmul24_fa23_16_xor0 >> 0) & 0x01) & ((s_arrmul24_fa22_16_or0 >> 0) & 0x01);
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s_arrmul24_fa23_16_or0 = ((s_arrmul24_fa23_16_and0 >> 0) & 0x01) | ((s_arrmul24_fa23_16_and1 >> 0) & 0x01);
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s_arrmul24_and0_17 = ((a >> 0) & 0x01) & ((b >> 17) & 0x01);
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s_arrmul24_ha0_17_xor0 = ((s_arrmul24_and0_17 >> 0) & 0x01) ^ ((s_arrmul24_fa1_16_xor1 >> 0) & 0x01);
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s_arrmul24_ha0_17_and0 = ((s_arrmul24_and0_17 >> 0) & 0x01) & ((s_arrmul24_fa1_16_xor1 >> 0) & 0x01);
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s_arrmul24_and1_17 = ((a >> 1) & 0x01) & ((b >> 17) & 0x01);
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s_arrmul24_fa1_17_xor0 = ((s_arrmul24_and1_17 >> 0) & 0x01) ^ ((s_arrmul24_fa2_16_xor1 >> 0) & 0x01);
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s_arrmul24_fa1_17_and0 = ((s_arrmul24_and1_17 >> 0) & 0x01) & ((s_arrmul24_fa2_16_xor1 >> 0) & 0x01);
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s_arrmul24_fa1_17_xor1 = ((s_arrmul24_fa1_17_xor0 >> 0) & 0x01) ^ ((s_arrmul24_ha0_17_and0 >> 0) & 0x01);
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s_arrmul24_fa1_17_and1 = ((s_arrmul24_fa1_17_xor0 >> 0) & 0x01) & ((s_arrmul24_ha0_17_and0 >> 0) & 0x01);
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s_arrmul24_fa1_17_or0 = ((s_arrmul24_fa1_17_and0 >> 0) & 0x01) | ((s_arrmul24_fa1_17_and1 >> 0) & 0x01);
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s_arrmul24_and2_17 = ((a >> 2) & 0x01) & ((b >> 17) & 0x01);
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s_arrmul24_fa2_17_xor0 = ((s_arrmul24_and2_17 >> 0) & 0x01) ^ ((s_arrmul24_fa3_16_xor1 >> 0) & 0x01);
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s_arrmul24_fa2_17_and0 = ((s_arrmul24_and2_17 >> 0) & 0x01) & ((s_arrmul24_fa3_16_xor1 >> 0) & 0x01);
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s_arrmul24_fa2_17_xor1 = ((s_arrmul24_fa2_17_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa1_17_or0 >> 0) & 0x01);
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s_arrmul24_fa2_17_and1 = ((s_arrmul24_fa2_17_xor0 >> 0) & 0x01) & ((s_arrmul24_fa1_17_or0 >> 0) & 0x01);
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s_arrmul24_fa2_17_or0 = ((s_arrmul24_fa2_17_and0 >> 0) & 0x01) | ((s_arrmul24_fa2_17_and1 >> 0) & 0x01);
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s_arrmul24_and3_17 = ((a >> 3) & 0x01) & ((b >> 17) & 0x01);
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s_arrmul24_fa3_17_xor0 = ((s_arrmul24_and3_17 >> 0) & 0x01) ^ ((s_arrmul24_fa4_16_xor1 >> 0) & 0x01);
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s_arrmul24_fa3_17_and0 = ((s_arrmul24_and3_17 >> 0) & 0x01) & ((s_arrmul24_fa4_16_xor1 >> 0) & 0x01);
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s_arrmul24_fa3_17_xor1 = ((s_arrmul24_fa3_17_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa2_17_or0 >> 0) & 0x01);
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s_arrmul24_fa3_17_and1 = ((s_arrmul24_fa3_17_xor0 >> 0) & 0x01) & ((s_arrmul24_fa2_17_or0 >> 0) & 0x01);
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s_arrmul24_fa3_17_or0 = ((s_arrmul24_fa3_17_and0 >> 0) & 0x01) | ((s_arrmul24_fa3_17_and1 >> 0) & 0x01);
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s_arrmul24_and4_17 = ((a >> 4) & 0x01) & ((b >> 17) & 0x01);
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s_arrmul24_fa4_17_xor0 = ((s_arrmul24_and4_17 >> 0) & 0x01) ^ ((s_arrmul24_fa5_16_xor1 >> 0) & 0x01);
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s_arrmul24_fa4_17_and0 = ((s_arrmul24_and4_17 >> 0) & 0x01) & ((s_arrmul24_fa5_16_xor1 >> 0) & 0x01);
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s_arrmul24_fa4_17_xor1 = ((s_arrmul24_fa4_17_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa3_17_or0 >> 0) & 0x01);
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s_arrmul24_fa4_17_and1 = ((s_arrmul24_fa4_17_xor0 >> 0) & 0x01) & ((s_arrmul24_fa3_17_or0 >> 0) & 0x01);
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s_arrmul24_fa4_17_or0 = ((s_arrmul24_fa4_17_and0 >> 0) & 0x01) | ((s_arrmul24_fa4_17_and1 >> 0) & 0x01);
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s_arrmul24_and5_17 = ((a >> 5) & 0x01) & ((b >> 17) & 0x01);
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s_arrmul24_fa5_17_xor0 = ((s_arrmul24_and5_17 >> 0) & 0x01) ^ ((s_arrmul24_fa6_16_xor1 >> 0) & 0x01);
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s_arrmul24_fa5_17_and0 = ((s_arrmul24_and5_17 >> 0) & 0x01) & ((s_arrmul24_fa6_16_xor1 >> 0) & 0x01);
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s_arrmul24_fa5_17_xor1 = ((s_arrmul24_fa5_17_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa4_17_or0 >> 0) & 0x01);
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s_arrmul24_fa5_17_and1 = ((s_arrmul24_fa5_17_xor0 >> 0) & 0x01) & ((s_arrmul24_fa4_17_or0 >> 0) & 0x01);
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s_arrmul24_fa5_17_or0 = ((s_arrmul24_fa5_17_and0 >> 0) & 0x01) | ((s_arrmul24_fa5_17_and1 >> 0) & 0x01);
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s_arrmul24_and6_17 = ((a >> 6) & 0x01) & ((b >> 17) & 0x01);
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s_arrmul24_fa6_17_xor0 = ((s_arrmul24_and6_17 >> 0) & 0x01) ^ ((s_arrmul24_fa7_16_xor1 >> 0) & 0x01);
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s_arrmul24_fa6_17_and0 = ((s_arrmul24_and6_17 >> 0) & 0x01) & ((s_arrmul24_fa7_16_xor1 >> 0) & 0x01);
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s_arrmul24_fa6_17_xor1 = ((s_arrmul24_fa6_17_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa5_17_or0 >> 0) & 0x01);
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s_arrmul24_fa6_17_and1 = ((s_arrmul24_fa6_17_xor0 >> 0) & 0x01) & ((s_arrmul24_fa5_17_or0 >> 0) & 0x01);
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s_arrmul24_fa6_17_or0 = ((s_arrmul24_fa6_17_and0 >> 0) & 0x01) | ((s_arrmul24_fa6_17_and1 >> 0) & 0x01);
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s_arrmul24_and7_17 = ((a >> 7) & 0x01) & ((b >> 17) & 0x01);
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s_arrmul24_fa7_17_xor0 = ((s_arrmul24_and7_17 >> 0) & 0x01) ^ ((s_arrmul24_fa8_16_xor1 >> 0) & 0x01);
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s_arrmul24_fa7_17_and0 = ((s_arrmul24_and7_17 >> 0) & 0x01) & ((s_arrmul24_fa8_16_xor1 >> 0) & 0x01);
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s_arrmul24_fa7_17_xor1 = ((s_arrmul24_fa7_17_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa6_17_or0 >> 0) & 0x01);
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s_arrmul24_fa7_17_and1 = ((s_arrmul24_fa7_17_xor0 >> 0) & 0x01) & ((s_arrmul24_fa6_17_or0 >> 0) & 0x01);
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s_arrmul24_fa7_17_or0 = ((s_arrmul24_fa7_17_and0 >> 0) & 0x01) | ((s_arrmul24_fa7_17_and1 >> 0) & 0x01);
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s_arrmul24_and8_17 = ((a >> 8) & 0x01) & ((b >> 17) & 0x01);
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s_arrmul24_fa8_17_xor0 = ((s_arrmul24_and8_17 >> 0) & 0x01) ^ ((s_arrmul24_fa9_16_xor1 >> 0) & 0x01);
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s_arrmul24_fa8_17_and0 = ((s_arrmul24_and8_17 >> 0) & 0x01) & ((s_arrmul24_fa9_16_xor1 >> 0) & 0x01);
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s_arrmul24_fa8_17_xor1 = ((s_arrmul24_fa8_17_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa7_17_or0 >> 0) & 0x01);
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s_arrmul24_fa8_17_and1 = ((s_arrmul24_fa8_17_xor0 >> 0) & 0x01) & ((s_arrmul24_fa7_17_or0 >> 0) & 0x01);
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s_arrmul24_fa8_17_or0 = ((s_arrmul24_fa8_17_and0 >> 0) & 0x01) | ((s_arrmul24_fa8_17_and1 >> 0) & 0x01);
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s_arrmul24_and9_17 = ((a >> 9) & 0x01) & ((b >> 17) & 0x01);
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s_arrmul24_fa9_17_xor0 = ((s_arrmul24_and9_17 >> 0) & 0x01) ^ ((s_arrmul24_fa10_16_xor1 >> 0) & 0x01);
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s_arrmul24_fa9_17_and0 = ((s_arrmul24_and9_17 >> 0) & 0x01) & ((s_arrmul24_fa10_16_xor1 >> 0) & 0x01);
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s_arrmul24_fa9_17_xor1 = ((s_arrmul24_fa9_17_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa8_17_or0 >> 0) & 0x01);
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s_arrmul24_fa9_17_and1 = ((s_arrmul24_fa9_17_xor0 >> 0) & 0x01) & ((s_arrmul24_fa8_17_or0 >> 0) & 0x01);
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s_arrmul24_fa9_17_or0 = ((s_arrmul24_fa9_17_and0 >> 0) & 0x01) | ((s_arrmul24_fa9_17_and1 >> 0) & 0x01);
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s_arrmul24_and10_17 = ((a >> 10) & 0x01) & ((b >> 17) & 0x01);
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s_arrmul24_fa10_17_xor0 = ((s_arrmul24_and10_17 >> 0) & 0x01) ^ ((s_arrmul24_fa11_16_xor1 >> 0) & 0x01);
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s_arrmul24_fa10_17_and0 = ((s_arrmul24_and10_17 >> 0) & 0x01) & ((s_arrmul24_fa11_16_xor1 >> 0) & 0x01);
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s_arrmul24_fa10_17_xor1 = ((s_arrmul24_fa10_17_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa9_17_or0 >> 0) & 0x01);
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s_arrmul24_fa10_17_and1 = ((s_arrmul24_fa10_17_xor0 >> 0) & 0x01) & ((s_arrmul24_fa9_17_or0 >> 0) & 0x01);
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s_arrmul24_fa10_17_or0 = ((s_arrmul24_fa10_17_and0 >> 0) & 0x01) | ((s_arrmul24_fa10_17_and1 >> 0) & 0x01);
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s_arrmul24_and11_17 = ((a >> 11) & 0x01) & ((b >> 17) & 0x01);
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s_arrmul24_fa11_17_xor0 = ((s_arrmul24_and11_17 >> 0) & 0x01) ^ ((s_arrmul24_fa12_16_xor1 >> 0) & 0x01);
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s_arrmul24_fa11_17_and0 = ((s_arrmul24_and11_17 >> 0) & 0x01) & ((s_arrmul24_fa12_16_xor1 >> 0) & 0x01);
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s_arrmul24_fa11_17_xor1 = ((s_arrmul24_fa11_17_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa10_17_or0 >> 0) & 0x01);
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s_arrmul24_fa11_17_and1 = ((s_arrmul24_fa11_17_xor0 >> 0) & 0x01) & ((s_arrmul24_fa10_17_or0 >> 0) & 0x01);
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s_arrmul24_fa11_17_or0 = ((s_arrmul24_fa11_17_and0 >> 0) & 0x01) | ((s_arrmul24_fa11_17_and1 >> 0) & 0x01);
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s_arrmul24_and12_17 = ((a >> 12) & 0x01) & ((b >> 17) & 0x01);
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s_arrmul24_fa12_17_xor0 = ((s_arrmul24_and12_17 >> 0) & 0x01) ^ ((s_arrmul24_fa13_16_xor1 >> 0) & 0x01);
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s_arrmul24_fa12_17_and0 = ((s_arrmul24_and12_17 >> 0) & 0x01) & ((s_arrmul24_fa13_16_xor1 >> 0) & 0x01);
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s_arrmul24_fa12_17_xor1 = ((s_arrmul24_fa12_17_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa11_17_or0 >> 0) & 0x01);
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s_arrmul24_fa12_17_and1 = ((s_arrmul24_fa12_17_xor0 >> 0) & 0x01) & ((s_arrmul24_fa11_17_or0 >> 0) & 0x01);
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s_arrmul24_fa12_17_or0 = ((s_arrmul24_fa12_17_and0 >> 0) & 0x01) | ((s_arrmul24_fa12_17_and1 >> 0) & 0x01);
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s_arrmul24_and13_17 = ((a >> 13) & 0x01) & ((b >> 17) & 0x01);
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s_arrmul24_fa13_17_xor0 = ((s_arrmul24_and13_17 >> 0) & 0x01) ^ ((s_arrmul24_fa14_16_xor1 >> 0) & 0x01);
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s_arrmul24_fa13_17_and0 = ((s_arrmul24_and13_17 >> 0) & 0x01) & ((s_arrmul24_fa14_16_xor1 >> 0) & 0x01);
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s_arrmul24_fa13_17_xor1 = ((s_arrmul24_fa13_17_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa12_17_or0 >> 0) & 0x01);
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s_arrmul24_fa13_17_and1 = ((s_arrmul24_fa13_17_xor0 >> 0) & 0x01) & ((s_arrmul24_fa12_17_or0 >> 0) & 0x01);
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s_arrmul24_fa13_17_or0 = ((s_arrmul24_fa13_17_and0 >> 0) & 0x01) | ((s_arrmul24_fa13_17_and1 >> 0) & 0x01);
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s_arrmul24_and14_17 = ((a >> 14) & 0x01) & ((b >> 17) & 0x01);
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s_arrmul24_fa14_17_xor0 = ((s_arrmul24_and14_17 >> 0) & 0x01) ^ ((s_arrmul24_fa15_16_xor1 >> 0) & 0x01);
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s_arrmul24_fa14_17_and0 = ((s_arrmul24_and14_17 >> 0) & 0x01) & ((s_arrmul24_fa15_16_xor1 >> 0) & 0x01);
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s_arrmul24_fa14_17_xor1 = ((s_arrmul24_fa14_17_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa13_17_or0 >> 0) & 0x01);
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s_arrmul24_fa14_17_and1 = ((s_arrmul24_fa14_17_xor0 >> 0) & 0x01) & ((s_arrmul24_fa13_17_or0 >> 0) & 0x01);
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s_arrmul24_fa14_17_or0 = ((s_arrmul24_fa14_17_and0 >> 0) & 0x01) | ((s_arrmul24_fa14_17_and1 >> 0) & 0x01);
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s_arrmul24_and15_17 = ((a >> 15) & 0x01) & ((b >> 17) & 0x01);
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s_arrmul24_fa15_17_xor0 = ((s_arrmul24_and15_17 >> 0) & 0x01) ^ ((s_arrmul24_fa16_16_xor1 >> 0) & 0x01);
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s_arrmul24_fa15_17_and0 = ((s_arrmul24_and15_17 >> 0) & 0x01) & ((s_arrmul24_fa16_16_xor1 >> 0) & 0x01);
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s_arrmul24_fa15_17_xor1 = ((s_arrmul24_fa15_17_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa14_17_or0 >> 0) & 0x01);
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s_arrmul24_fa15_17_and1 = ((s_arrmul24_fa15_17_xor0 >> 0) & 0x01) & ((s_arrmul24_fa14_17_or0 >> 0) & 0x01);
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s_arrmul24_fa15_17_or0 = ((s_arrmul24_fa15_17_and0 >> 0) & 0x01) | ((s_arrmul24_fa15_17_and1 >> 0) & 0x01);
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s_arrmul24_and16_17 = ((a >> 16) & 0x01) & ((b >> 17) & 0x01);
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s_arrmul24_fa16_17_xor0 = ((s_arrmul24_and16_17 >> 0) & 0x01) ^ ((s_arrmul24_fa17_16_xor1 >> 0) & 0x01);
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s_arrmul24_fa16_17_and0 = ((s_arrmul24_and16_17 >> 0) & 0x01) & ((s_arrmul24_fa17_16_xor1 >> 0) & 0x01);
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s_arrmul24_fa16_17_xor1 = ((s_arrmul24_fa16_17_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa15_17_or0 >> 0) & 0x01);
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s_arrmul24_fa16_17_and1 = ((s_arrmul24_fa16_17_xor0 >> 0) & 0x01) & ((s_arrmul24_fa15_17_or0 >> 0) & 0x01);
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s_arrmul24_fa16_17_or0 = ((s_arrmul24_fa16_17_and0 >> 0) & 0x01) | ((s_arrmul24_fa16_17_and1 >> 0) & 0x01);
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s_arrmul24_and17_17 = ((a >> 17) & 0x01) & ((b >> 17) & 0x01);
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s_arrmul24_fa17_17_xor0 = ((s_arrmul24_and17_17 >> 0) & 0x01) ^ ((s_arrmul24_fa18_16_xor1 >> 0) & 0x01);
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s_arrmul24_fa17_17_and0 = ((s_arrmul24_and17_17 >> 0) & 0x01) & ((s_arrmul24_fa18_16_xor1 >> 0) & 0x01);
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s_arrmul24_fa17_17_xor1 = ((s_arrmul24_fa17_17_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa16_17_or0 >> 0) & 0x01);
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s_arrmul24_fa17_17_and1 = ((s_arrmul24_fa17_17_xor0 >> 0) & 0x01) & ((s_arrmul24_fa16_17_or0 >> 0) & 0x01);
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s_arrmul24_fa17_17_or0 = ((s_arrmul24_fa17_17_and0 >> 0) & 0x01) | ((s_arrmul24_fa17_17_and1 >> 0) & 0x01);
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s_arrmul24_and18_17 = ((a >> 18) & 0x01) & ((b >> 17) & 0x01);
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s_arrmul24_fa18_17_xor0 = ((s_arrmul24_and18_17 >> 0) & 0x01) ^ ((s_arrmul24_fa19_16_xor1 >> 0) & 0x01);
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s_arrmul24_fa18_17_and0 = ((s_arrmul24_and18_17 >> 0) & 0x01) & ((s_arrmul24_fa19_16_xor1 >> 0) & 0x01);
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s_arrmul24_fa18_17_xor1 = ((s_arrmul24_fa18_17_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa17_17_or0 >> 0) & 0x01);
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s_arrmul24_fa18_17_and1 = ((s_arrmul24_fa18_17_xor0 >> 0) & 0x01) & ((s_arrmul24_fa17_17_or0 >> 0) & 0x01);
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s_arrmul24_fa18_17_or0 = ((s_arrmul24_fa18_17_and0 >> 0) & 0x01) | ((s_arrmul24_fa18_17_and1 >> 0) & 0x01);
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s_arrmul24_and19_17 = ((a >> 19) & 0x01) & ((b >> 17) & 0x01);
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s_arrmul24_fa19_17_xor0 = ((s_arrmul24_and19_17 >> 0) & 0x01) ^ ((s_arrmul24_fa20_16_xor1 >> 0) & 0x01);
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s_arrmul24_fa19_17_and0 = ((s_arrmul24_and19_17 >> 0) & 0x01) & ((s_arrmul24_fa20_16_xor1 >> 0) & 0x01);
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s_arrmul24_fa19_17_xor1 = ((s_arrmul24_fa19_17_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa18_17_or0 >> 0) & 0x01);
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s_arrmul24_fa19_17_and1 = ((s_arrmul24_fa19_17_xor0 >> 0) & 0x01) & ((s_arrmul24_fa18_17_or0 >> 0) & 0x01);
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s_arrmul24_fa19_17_or0 = ((s_arrmul24_fa19_17_and0 >> 0) & 0x01) | ((s_arrmul24_fa19_17_and1 >> 0) & 0x01);
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s_arrmul24_and20_17 = ((a >> 20) & 0x01) & ((b >> 17) & 0x01);
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s_arrmul24_fa20_17_xor0 = ((s_arrmul24_and20_17 >> 0) & 0x01) ^ ((s_arrmul24_fa21_16_xor1 >> 0) & 0x01);
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s_arrmul24_fa20_17_and0 = ((s_arrmul24_and20_17 >> 0) & 0x01) & ((s_arrmul24_fa21_16_xor1 >> 0) & 0x01);
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s_arrmul24_fa20_17_xor1 = ((s_arrmul24_fa20_17_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa19_17_or0 >> 0) & 0x01);
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s_arrmul24_fa20_17_and1 = ((s_arrmul24_fa20_17_xor0 >> 0) & 0x01) & ((s_arrmul24_fa19_17_or0 >> 0) & 0x01);
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s_arrmul24_fa20_17_or0 = ((s_arrmul24_fa20_17_and0 >> 0) & 0x01) | ((s_arrmul24_fa20_17_and1 >> 0) & 0x01);
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s_arrmul24_and21_17 = ((a >> 21) & 0x01) & ((b >> 17) & 0x01);
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s_arrmul24_fa21_17_xor0 = ((s_arrmul24_and21_17 >> 0) & 0x01) ^ ((s_arrmul24_fa22_16_xor1 >> 0) & 0x01);
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s_arrmul24_fa21_17_and0 = ((s_arrmul24_and21_17 >> 0) & 0x01) & ((s_arrmul24_fa22_16_xor1 >> 0) & 0x01);
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s_arrmul24_fa21_17_xor1 = ((s_arrmul24_fa21_17_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa20_17_or0 >> 0) & 0x01);
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s_arrmul24_fa21_17_and1 = ((s_arrmul24_fa21_17_xor0 >> 0) & 0x01) & ((s_arrmul24_fa20_17_or0 >> 0) & 0x01);
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s_arrmul24_fa21_17_or0 = ((s_arrmul24_fa21_17_and0 >> 0) & 0x01) | ((s_arrmul24_fa21_17_and1 >> 0) & 0x01);
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s_arrmul24_and22_17 = ((a >> 22) & 0x01) & ((b >> 17) & 0x01);
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s_arrmul24_fa22_17_xor0 = ((s_arrmul24_and22_17 >> 0) & 0x01) ^ ((s_arrmul24_fa23_16_xor1 >> 0) & 0x01);
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s_arrmul24_fa22_17_and0 = ((s_arrmul24_and22_17 >> 0) & 0x01) & ((s_arrmul24_fa23_16_xor1 >> 0) & 0x01);
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s_arrmul24_fa22_17_xor1 = ((s_arrmul24_fa22_17_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa21_17_or0 >> 0) & 0x01);
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s_arrmul24_fa22_17_and1 = ((s_arrmul24_fa22_17_xor0 >> 0) & 0x01) & ((s_arrmul24_fa21_17_or0 >> 0) & 0x01);
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s_arrmul24_fa22_17_or0 = ((s_arrmul24_fa22_17_and0 >> 0) & 0x01) | ((s_arrmul24_fa22_17_and1 >> 0) & 0x01);
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s_arrmul24_nand23_17 = ~(((a >> 23) & 0x01) & ((b >> 17) & 0x01)) & 0x01;
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s_arrmul24_fa23_17_xor0 = ((s_arrmul24_nand23_17 >> 0) & 0x01) ^ ((s_arrmul24_fa23_16_or0 >> 0) & 0x01);
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s_arrmul24_fa23_17_and0 = ((s_arrmul24_nand23_17 >> 0) & 0x01) & ((s_arrmul24_fa23_16_or0 >> 0) & 0x01);
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s_arrmul24_fa23_17_xor1 = ((s_arrmul24_fa23_17_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa22_17_or0 >> 0) & 0x01);
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s_arrmul24_fa23_17_and1 = ((s_arrmul24_fa23_17_xor0 >> 0) & 0x01) & ((s_arrmul24_fa22_17_or0 >> 0) & 0x01);
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s_arrmul24_fa23_17_or0 = ((s_arrmul24_fa23_17_and0 >> 0) & 0x01) | ((s_arrmul24_fa23_17_and1 >> 0) & 0x01);
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s_arrmul24_and0_18 = ((a >> 0) & 0x01) & ((b >> 18) & 0x01);
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s_arrmul24_ha0_18_xor0 = ((s_arrmul24_and0_18 >> 0) & 0x01) ^ ((s_arrmul24_fa1_17_xor1 >> 0) & 0x01);
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s_arrmul24_ha0_18_and0 = ((s_arrmul24_and0_18 >> 0) & 0x01) & ((s_arrmul24_fa1_17_xor1 >> 0) & 0x01);
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s_arrmul24_and1_18 = ((a >> 1) & 0x01) & ((b >> 18) & 0x01);
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s_arrmul24_fa1_18_xor0 = ((s_arrmul24_and1_18 >> 0) & 0x01) ^ ((s_arrmul24_fa2_17_xor1 >> 0) & 0x01);
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s_arrmul24_fa1_18_and0 = ((s_arrmul24_and1_18 >> 0) & 0x01) & ((s_arrmul24_fa2_17_xor1 >> 0) & 0x01);
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s_arrmul24_fa1_18_xor1 = ((s_arrmul24_fa1_18_xor0 >> 0) & 0x01) ^ ((s_arrmul24_ha0_18_and0 >> 0) & 0x01);
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s_arrmul24_fa1_18_and1 = ((s_arrmul24_fa1_18_xor0 >> 0) & 0x01) & ((s_arrmul24_ha0_18_and0 >> 0) & 0x01);
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s_arrmul24_fa1_18_or0 = ((s_arrmul24_fa1_18_and0 >> 0) & 0x01) | ((s_arrmul24_fa1_18_and1 >> 0) & 0x01);
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s_arrmul24_and2_18 = ((a >> 2) & 0x01) & ((b >> 18) & 0x01);
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s_arrmul24_fa2_18_xor0 = ((s_arrmul24_and2_18 >> 0) & 0x01) ^ ((s_arrmul24_fa3_17_xor1 >> 0) & 0x01);
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s_arrmul24_fa2_18_and0 = ((s_arrmul24_and2_18 >> 0) & 0x01) & ((s_arrmul24_fa3_17_xor1 >> 0) & 0x01);
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s_arrmul24_fa2_18_xor1 = ((s_arrmul24_fa2_18_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa1_18_or0 >> 0) & 0x01);
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s_arrmul24_fa2_18_and1 = ((s_arrmul24_fa2_18_xor0 >> 0) & 0x01) & ((s_arrmul24_fa1_18_or0 >> 0) & 0x01);
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s_arrmul24_fa2_18_or0 = ((s_arrmul24_fa2_18_and0 >> 0) & 0x01) | ((s_arrmul24_fa2_18_and1 >> 0) & 0x01);
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s_arrmul24_and3_18 = ((a >> 3) & 0x01) & ((b >> 18) & 0x01);
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s_arrmul24_fa3_18_xor0 = ((s_arrmul24_and3_18 >> 0) & 0x01) ^ ((s_arrmul24_fa4_17_xor1 >> 0) & 0x01);
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s_arrmul24_fa3_18_and0 = ((s_arrmul24_and3_18 >> 0) & 0x01) & ((s_arrmul24_fa4_17_xor1 >> 0) & 0x01);
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s_arrmul24_fa3_18_xor1 = ((s_arrmul24_fa3_18_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa2_18_or0 >> 0) & 0x01);
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s_arrmul24_fa3_18_and1 = ((s_arrmul24_fa3_18_xor0 >> 0) & 0x01) & ((s_arrmul24_fa2_18_or0 >> 0) & 0x01);
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s_arrmul24_fa3_18_or0 = ((s_arrmul24_fa3_18_and0 >> 0) & 0x01) | ((s_arrmul24_fa3_18_and1 >> 0) & 0x01);
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s_arrmul24_and4_18 = ((a >> 4) & 0x01) & ((b >> 18) & 0x01);
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s_arrmul24_fa4_18_xor0 = ((s_arrmul24_and4_18 >> 0) & 0x01) ^ ((s_arrmul24_fa5_17_xor1 >> 0) & 0x01);
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s_arrmul24_fa4_18_and0 = ((s_arrmul24_and4_18 >> 0) & 0x01) & ((s_arrmul24_fa5_17_xor1 >> 0) & 0x01);
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s_arrmul24_fa4_18_xor1 = ((s_arrmul24_fa4_18_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa3_18_or0 >> 0) & 0x01);
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s_arrmul24_fa4_18_and1 = ((s_arrmul24_fa4_18_xor0 >> 0) & 0x01) & ((s_arrmul24_fa3_18_or0 >> 0) & 0x01);
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s_arrmul24_fa4_18_or0 = ((s_arrmul24_fa4_18_and0 >> 0) & 0x01) | ((s_arrmul24_fa4_18_and1 >> 0) & 0x01);
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s_arrmul24_and5_18 = ((a >> 5) & 0x01) & ((b >> 18) & 0x01);
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s_arrmul24_fa5_18_xor0 = ((s_arrmul24_and5_18 >> 0) & 0x01) ^ ((s_arrmul24_fa6_17_xor1 >> 0) & 0x01);
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s_arrmul24_fa5_18_and0 = ((s_arrmul24_and5_18 >> 0) & 0x01) & ((s_arrmul24_fa6_17_xor1 >> 0) & 0x01);
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s_arrmul24_fa5_18_xor1 = ((s_arrmul24_fa5_18_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa4_18_or0 >> 0) & 0x01);
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s_arrmul24_fa5_18_and1 = ((s_arrmul24_fa5_18_xor0 >> 0) & 0x01) & ((s_arrmul24_fa4_18_or0 >> 0) & 0x01);
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s_arrmul24_fa5_18_or0 = ((s_arrmul24_fa5_18_and0 >> 0) & 0x01) | ((s_arrmul24_fa5_18_and1 >> 0) & 0x01);
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s_arrmul24_and6_18 = ((a >> 6) & 0x01) & ((b >> 18) & 0x01);
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s_arrmul24_fa6_18_xor0 = ((s_arrmul24_and6_18 >> 0) & 0x01) ^ ((s_arrmul24_fa7_17_xor1 >> 0) & 0x01);
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s_arrmul24_fa6_18_and0 = ((s_arrmul24_and6_18 >> 0) & 0x01) & ((s_arrmul24_fa7_17_xor1 >> 0) & 0x01);
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s_arrmul24_fa6_18_xor1 = ((s_arrmul24_fa6_18_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa5_18_or0 >> 0) & 0x01);
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s_arrmul24_fa6_18_and1 = ((s_arrmul24_fa6_18_xor0 >> 0) & 0x01) & ((s_arrmul24_fa5_18_or0 >> 0) & 0x01);
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s_arrmul24_fa6_18_or0 = ((s_arrmul24_fa6_18_and0 >> 0) & 0x01) | ((s_arrmul24_fa6_18_and1 >> 0) & 0x01);
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s_arrmul24_and7_18 = ((a >> 7) & 0x01) & ((b >> 18) & 0x01);
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s_arrmul24_fa7_18_xor0 = ((s_arrmul24_and7_18 >> 0) & 0x01) ^ ((s_arrmul24_fa8_17_xor1 >> 0) & 0x01);
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s_arrmul24_fa7_18_and0 = ((s_arrmul24_and7_18 >> 0) & 0x01) & ((s_arrmul24_fa8_17_xor1 >> 0) & 0x01);
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s_arrmul24_fa7_18_xor1 = ((s_arrmul24_fa7_18_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa6_18_or0 >> 0) & 0x01);
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s_arrmul24_fa7_18_and1 = ((s_arrmul24_fa7_18_xor0 >> 0) & 0x01) & ((s_arrmul24_fa6_18_or0 >> 0) & 0x01);
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s_arrmul24_fa7_18_or0 = ((s_arrmul24_fa7_18_and0 >> 0) & 0x01) | ((s_arrmul24_fa7_18_and1 >> 0) & 0x01);
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s_arrmul24_and8_18 = ((a >> 8) & 0x01) & ((b >> 18) & 0x01);
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s_arrmul24_fa8_18_xor0 = ((s_arrmul24_and8_18 >> 0) & 0x01) ^ ((s_arrmul24_fa9_17_xor1 >> 0) & 0x01);
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s_arrmul24_fa8_18_and0 = ((s_arrmul24_and8_18 >> 0) & 0x01) & ((s_arrmul24_fa9_17_xor1 >> 0) & 0x01);
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s_arrmul24_fa8_18_xor1 = ((s_arrmul24_fa8_18_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa7_18_or0 >> 0) & 0x01);
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s_arrmul24_fa8_18_and1 = ((s_arrmul24_fa8_18_xor0 >> 0) & 0x01) & ((s_arrmul24_fa7_18_or0 >> 0) & 0x01);
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s_arrmul24_fa8_18_or0 = ((s_arrmul24_fa8_18_and0 >> 0) & 0x01) | ((s_arrmul24_fa8_18_and1 >> 0) & 0x01);
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s_arrmul24_and9_18 = ((a >> 9) & 0x01) & ((b >> 18) & 0x01);
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s_arrmul24_fa9_18_xor0 = ((s_arrmul24_and9_18 >> 0) & 0x01) ^ ((s_arrmul24_fa10_17_xor1 >> 0) & 0x01);
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s_arrmul24_fa9_18_and0 = ((s_arrmul24_and9_18 >> 0) & 0x01) & ((s_arrmul24_fa10_17_xor1 >> 0) & 0x01);
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s_arrmul24_fa9_18_xor1 = ((s_arrmul24_fa9_18_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa8_18_or0 >> 0) & 0x01);
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s_arrmul24_fa9_18_and1 = ((s_arrmul24_fa9_18_xor0 >> 0) & 0x01) & ((s_arrmul24_fa8_18_or0 >> 0) & 0x01);
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s_arrmul24_fa9_18_or0 = ((s_arrmul24_fa9_18_and0 >> 0) & 0x01) | ((s_arrmul24_fa9_18_and1 >> 0) & 0x01);
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s_arrmul24_and10_18 = ((a >> 10) & 0x01) & ((b >> 18) & 0x01);
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s_arrmul24_fa10_18_xor0 = ((s_arrmul24_and10_18 >> 0) & 0x01) ^ ((s_arrmul24_fa11_17_xor1 >> 0) & 0x01);
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s_arrmul24_fa10_18_and0 = ((s_arrmul24_and10_18 >> 0) & 0x01) & ((s_arrmul24_fa11_17_xor1 >> 0) & 0x01);
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s_arrmul24_fa10_18_xor1 = ((s_arrmul24_fa10_18_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa9_18_or0 >> 0) & 0x01);
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s_arrmul24_fa10_18_and1 = ((s_arrmul24_fa10_18_xor0 >> 0) & 0x01) & ((s_arrmul24_fa9_18_or0 >> 0) & 0x01);
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s_arrmul24_fa10_18_or0 = ((s_arrmul24_fa10_18_and0 >> 0) & 0x01) | ((s_arrmul24_fa10_18_and1 >> 0) & 0x01);
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s_arrmul24_and11_18 = ((a >> 11) & 0x01) & ((b >> 18) & 0x01);
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s_arrmul24_fa11_18_xor0 = ((s_arrmul24_and11_18 >> 0) & 0x01) ^ ((s_arrmul24_fa12_17_xor1 >> 0) & 0x01);
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s_arrmul24_fa11_18_and0 = ((s_arrmul24_and11_18 >> 0) & 0x01) & ((s_arrmul24_fa12_17_xor1 >> 0) & 0x01);
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s_arrmul24_fa11_18_xor1 = ((s_arrmul24_fa11_18_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa10_18_or0 >> 0) & 0x01);
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s_arrmul24_fa11_18_and1 = ((s_arrmul24_fa11_18_xor0 >> 0) & 0x01) & ((s_arrmul24_fa10_18_or0 >> 0) & 0x01);
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s_arrmul24_fa11_18_or0 = ((s_arrmul24_fa11_18_and0 >> 0) & 0x01) | ((s_arrmul24_fa11_18_and1 >> 0) & 0x01);
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s_arrmul24_and12_18 = ((a >> 12) & 0x01) & ((b >> 18) & 0x01);
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s_arrmul24_fa12_18_xor0 = ((s_arrmul24_and12_18 >> 0) & 0x01) ^ ((s_arrmul24_fa13_17_xor1 >> 0) & 0x01);
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s_arrmul24_fa12_18_and0 = ((s_arrmul24_and12_18 >> 0) & 0x01) & ((s_arrmul24_fa13_17_xor1 >> 0) & 0x01);
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s_arrmul24_fa12_18_xor1 = ((s_arrmul24_fa12_18_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa11_18_or0 >> 0) & 0x01);
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s_arrmul24_fa12_18_and1 = ((s_arrmul24_fa12_18_xor0 >> 0) & 0x01) & ((s_arrmul24_fa11_18_or0 >> 0) & 0x01);
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s_arrmul24_fa12_18_or0 = ((s_arrmul24_fa12_18_and0 >> 0) & 0x01) | ((s_arrmul24_fa12_18_and1 >> 0) & 0x01);
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s_arrmul24_and13_18 = ((a >> 13) & 0x01) & ((b >> 18) & 0x01);
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s_arrmul24_fa13_18_xor0 = ((s_arrmul24_and13_18 >> 0) & 0x01) ^ ((s_arrmul24_fa14_17_xor1 >> 0) & 0x01);
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s_arrmul24_fa13_18_and0 = ((s_arrmul24_and13_18 >> 0) & 0x01) & ((s_arrmul24_fa14_17_xor1 >> 0) & 0x01);
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s_arrmul24_fa13_18_xor1 = ((s_arrmul24_fa13_18_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa12_18_or0 >> 0) & 0x01);
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s_arrmul24_fa13_18_and1 = ((s_arrmul24_fa13_18_xor0 >> 0) & 0x01) & ((s_arrmul24_fa12_18_or0 >> 0) & 0x01);
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s_arrmul24_fa13_18_or0 = ((s_arrmul24_fa13_18_and0 >> 0) & 0x01) | ((s_arrmul24_fa13_18_and1 >> 0) & 0x01);
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s_arrmul24_and14_18 = ((a >> 14) & 0x01) & ((b >> 18) & 0x01);
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s_arrmul24_fa14_18_xor0 = ((s_arrmul24_and14_18 >> 0) & 0x01) ^ ((s_arrmul24_fa15_17_xor1 >> 0) & 0x01);
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s_arrmul24_fa14_18_and0 = ((s_arrmul24_and14_18 >> 0) & 0x01) & ((s_arrmul24_fa15_17_xor1 >> 0) & 0x01);
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s_arrmul24_fa14_18_xor1 = ((s_arrmul24_fa14_18_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa13_18_or0 >> 0) & 0x01);
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s_arrmul24_fa14_18_and1 = ((s_arrmul24_fa14_18_xor0 >> 0) & 0x01) & ((s_arrmul24_fa13_18_or0 >> 0) & 0x01);
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s_arrmul24_fa14_18_or0 = ((s_arrmul24_fa14_18_and0 >> 0) & 0x01) | ((s_arrmul24_fa14_18_and1 >> 0) & 0x01);
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s_arrmul24_and15_18 = ((a >> 15) & 0x01) & ((b >> 18) & 0x01);
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s_arrmul24_fa15_18_xor0 = ((s_arrmul24_and15_18 >> 0) & 0x01) ^ ((s_arrmul24_fa16_17_xor1 >> 0) & 0x01);
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s_arrmul24_fa15_18_and0 = ((s_arrmul24_and15_18 >> 0) & 0x01) & ((s_arrmul24_fa16_17_xor1 >> 0) & 0x01);
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s_arrmul24_fa15_18_xor1 = ((s_arrmul24_fa15_18_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa14_18_or0 >> 0) & 0x01);
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s_arrmul24_fa15_18_and1 = ((s_arrmul24_fa15_18_xor0 >> 0) & 0x01) & ((s_arrmul24_fa14_18_or0 >> 0) & 0x01);
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s_arrmul24_fa15_18_or0 = ((s_arrmul24_fa15_18_and0 >> 0) & 0x01) | ((s_arrmul24_fa15_18_and1 >> 0) & 0x01);
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s_arrmul24_and16_18 = ((a >> 16) & 0x01) & ((b >> 18) & 0x01);
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s_arrmul24_fa16_18_xor0 = ((s_arrmul24_and16_18 >> 0) & 0x01) ^ ((s_arrmul24_fa17_17_xor1 >> 0) & 0x01);
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s_arrmul24_fa16_18_and0 = ((s_arrmul24_and16_18 >> 0) & 0x01) & ((s_arrmul24_fa17_17_xor1 >> 0) & 0x01);
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s_arrmul24_fa16_18_xor1 = ((s_arrmul24_fa16_18_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa15_18_or0 >> 0) & 0x01);
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s_arrmul24_fa16_18_and1 = ((s_arrmul24_fa16_18_xor0 >> 0) & 0x01) & ((s_arrmul24_fa15_18_or0 >> 0) & 0x01);
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s_arrmul24_fa16_18_or0 = ((s_arrmul24_fa16_18_and0 >> 0) & 0x01) | ((s_arrmul24_fa16_18_and1 >> 0) & 0x01);
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s_arrmul24_and17_18 = ((a >> 17) & 0x01) & ((b >> 18) & 0x01);
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s_arrmul24_fa17_18_xor0 = ((s_arrmul24_and17_18 >> 0) & 0x01) ^ ((s_arrmul24_fa18_17_xor1 >> 0) & 0x01);
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s_arrmul24_fa17_18_and0 = ((s_arrmul24_and17_18 >> 0) & 0x01) & ((s_arrmul24_fa18_17_xor1 >> 0) & 0x01);
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s_arrmul24_fa17_18_xor1 = ((s_arrmul24_fa17_18_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa16_18_or0 >> 0) & 0x01);
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s_arrmul24_fa17_18_and1 = ((s_arrmul24_fa17_18_xor0 >> 0) & 0x01) & ((s_arrmul24_fa16_18_or0 >> 0) & 0x01);
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s_arrmul24_fa17_18_or0 = ((s_arrmul24_fa17_18_and0 >> 0) & 0x01) | ((s_arrmul24_fa17_18_and1 >> 0) & 0x01);
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s_arrmul24_and18_18 = ((a >> 18) & 0x01) & ((b >> 18) & 0x01);
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s_arrmul24_fa18_18_xor0 = ((s_arrmul24_and18_18 >> 0) & 0x01) ^ ((s_arrmul24_fa19_17_xor1 >> 0) & 0x01);
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s_arrmul24_fa18_18_and0 = ((s_arrmul24_and18_18 >> 0) & 0x01) & ((s_arrmul24_fa19_17_xor1 >> 0) & 0x01);
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s_arrmul24_fa18_18_xor1 = ((s_arrmul24_fa18_18_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa17_18_or0 >> 0) & 0x01);
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s_arrmul24_fa18_18_and1 = ((s_arrmul24_fa18_18_xor0 >> 0) & 0x01) & ((s_arrmul24_fa17_18_or0 >> 0) & 0x01);
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s_arrmul24_fa18_18_or0 = ((s_arrmul24_fa18_18_and0 >> 0) & 0x01) | ((s_arrmul24_fa18_18_and1 >> 0) & 0x01);
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s_arrmul24_and19_18 = ((a >> 19) & 0x01) & ((b >> 18) & 0x01);
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s_arrmul24_fa19_18_xor0 = ((s_arrmul24_and19_18 >> 0) & 0x01) ^ ((s_arrmul24_fa20_17_xor1 >> 0) & 0x01);
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s_arrmul24_fa19_18_and0 = ((s_arrmul24_and19_18 >> 0) & 0x01) & ((s_arrmul24_fa20_17_xor1 >> 0) & 0x01);
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s_arrmul24_fa19_18_xor1 = ((s_arrmul24_fa19_18_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa18_18_or0 >> 0) & 0x01);
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s_arrmul24_fa19_18_and1 = ((s_arrmul24_fa19_18_xor0 >> 0) & 0x01) & ((s_arrmul24_fa18_18_or0 >> 0) & 0x01);
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s_arrmul24_fa19_18_or0 = ((s_arrmul24_fa19_18_and0 >> 0) & 0x01) | ((s_arrmul24_fa19_18_and1 >> 0) & 0x01);
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s_arrmul24_and20_18 = ((a >> 20) & 0x01) & ((b >> 18) & 0x01);
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s_arrmul24_fa20_18_xor0 = ((s_arrmul24_and20_18 >> 0) & 0x01) ^ ((s_arrmul24_fa21_17_xor1 >> 0) & 0x01);
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s_arrmul24_fa20_18_and0 = ((s_arrmul24_and20_18 >> 0) & 0x01) & ((s_arrmul24_fa21_17_xor1 >> 0) & 0x01);
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s_arrmul24_fa20_18_xor1 = ((s_arrmul24_fa20_18_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa19_18_or0 >> 0) & 0x01);
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s_arrmul24_fa20_18_and1 = ((s_arrmul24_fa20_18_xor0 >> 0) & 0x01) & ((s_arrmul24_fa19_18_or0 >> 0) & 0x01);
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s_arrmul24_fa20_18_or0 = ((s_arrmul24_fa20_18_and0 >> 0) & 0x01) | ((s_arrmul24_fa20_18_and1 >> 0) & 0x01);
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s_arrmul24_and21_18 = ((a >> 21) & 0x01) & ((b >> 18) & 0x01);
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s_arrmul24_fa21_18_xor0 = ((s_arrmul24_and21_18 >> 0) & 0x01) ^ ((s_arrmul24_fa22_17_xor1 >> 0) & 0x01);
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s_arrmul24_fa21_18_and0 = ((s_arrmul24_and21_18 >> 0) & 0x01) & ((s_arrmul24_fa22_17_xor1 >> 0) & 0x01);
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s_arrmul24_fa21_18_xor1 = ((s_arrmul24_fa21_18_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa20_18_or0 >> 0) & 0x01);
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s_arrmul24_fa21_18_and1 = ((s_arrmul24_fa21_18_xor0 >> 0) & 0x01) & ((s_arrmul24_fa20_18_or0 >> 0) & 0x01);
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s_arrmul24_fa21_18_or0 = ((s_arrmul24_fa21_18_and0 >> 0) & 0x01) | ((s_arrmul24_fa21_18_and1 >> 0) & 0x01);
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s_arrmul24_and22_18 = ((a >> 22) & 0x01) & ((b >> 18) & 0x01);
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s_arrmul24_fa22_18_xor0 = ((s_arrmul24_and22_18 >> 0) & 0x01) ^ ((s_arrmul24_fa23_17_xor1 >> 0) & 0x01);
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s_arrmul24_fa22_18_and0 = ((s_arrmul24_and22_18 >> 0) & 0x01) & ((s_arrmul24_fa23_17_xor1 >> 0) & 0x01);
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s_arrmul24_fa22_18_xor1 = ((s_arrmul24_fa22_18_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa21_18_or0 >> 0) & 0x01);
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s_arrmul24_fa22_18_and1 = ((s_arrmul24_fa22_18_xor0 >> 0) & 0x01) & ((s_arrmul24_fa21_18_or0 >> 0) & 0x01);
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s_arrmul24_fa22_18_or0 = ((s_arrmul24_fa22_18_and0 >> 0) & 0x01) | ((s_arrmul24_fa22_18_and1 >> 0) & 0x01);
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s_arrmul24_nand23_18 = ~(((a >> 23) & 0x01) & ((b >> 18) & 0x01)) & 0x01;
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s_arrmul24_fa23_18_xor0 = ((s_arrmul24_nand23_18 >> 0) & 0x01) ^ ((s_arrmul24_fa23_17_or0 >> 0) & 0x01);
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s_arrmul24_fa23_18_and0 = ((s_arrmul24_nand23_18 >> 0) & 0x01) & ((s_arrmul24_fa23_17_or0 >> 0) & 0x01);
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s_arrmul24_fa23_18_xor1 = ((s_arrmul24_fa23_18_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa22_18_or0 >> 0) & 0x01);
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s_arrmul24_fa23_18_and1 = ((s_arrmul24_fa23_18_xor0 >> 0) & 0x01) & ((s_arrmul24_fa22_18_or0 >> 0) & 0x01);
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s_arrmul24_fa23_18_or0 = ((s_arrmul24_fa23_18_and0 >> 0) & 0x01) | ((s_arrmul24_fa23_18_and1 >> 0) & 0x01);
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s_arrmul24_and0_19 = ((a >> 0) & 0x01) & ((b >> 19) & 0x01);
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s_arrmul24_ha0_19_xor0 = ((s_arrmul24_and0_19 >> 0) & 0x01) ^ ((s_arrmul24_fa1_18_xor1 >> 0) & 0x01);
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s_arrmul24_ha0_19_and0 = ((s_arrmul24_and0_19 >> 0) & 0x01) & ((s_arrmul24_fa1_18_xor1 >> 0) & 0x01);
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s_arrmul24_and1_19 = ((a >> 1) & 0x01) & ((b >> 19) & 0x01);
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s_arrmul24_fa1_19_xor0 = ((s_arrmul24_and1_19 >> 0) & 0x01) ^ ((s_arrmul24_fa2_18_xor1 >> 0) & 0x01);
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s_arrmul24_fa1_19_and0 = ((s_arrmul24_and1_19 >> 0) & 0x01) & ((s_arrmul24_fa2_18_xor1 >> 0) & 0x01);
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s_arrmul24_fa1_19_xor1 = ((s_arrmul24_fa1_19_xor0 >> 0) & 0x01) ^ ((s_arrmul24_ha0_19_and0 >> 0) & 0x01);
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s_arrmul24_fa1_19_and1 = ((s_arrmul24_fa1_19_xor0 >> 0) & 0x01) & ((s_arrmul24_ha0_19_and0 >> 0) & 0x01);
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s_arrmul24_fa1_19_or0 = ((s_arrmul24_fa1_19_and0 >> 0) & 0x01) | ((s_arrmul24_fa1_19_and1 >> 0) & 0x01);
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s_arrmul24_and2_19 = ((a >> 2) & 0x01) & ((b >> 19) & 0x01);
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s_arrmul24_fa2_19_xor0 = ((s_arrmul24_and2_19 >> 0) & 0x01) ^ ((s_arrmul24_fa3_18_xor1 >> 0) & 0x01);
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s_arrmul24_fa2_19_and0 = ((s_arrmul24_and2_19 >> 0) & 0x01) & ((s_arrmul24_fa3_18_xor1 >> 0) & 0x01);
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s_arrmul24_fa2_19_xor1 = ((s_arrmul24_fa2_19_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa1_19_or0 >> 0) & 0x01);
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s_arrmul24_fa2_19_and1 = ((s_arrmul24_fa2_19_xor0 >> 0) & 0x01) & ((s_arrmul24_fa1_19_or0 >> 0) & 0x01);
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s_arrmul24_fa2_19_or0 = ((s_arrmul24_fa2_19_and0 >> 0) & 0x01) | ((s_arrmul24_fa2_19_and1 >> 0) & 0x01);
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s_arrmul24_and3_19 = ((a >> 3) & 0x01) & ((b >> 19) & 0x01);
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s_arrmul24_fa3_19_xor0 = ((s_arrmul24_and3_19 >> 0) & 0x01) ^ ((s_arrmul24_fa4_18_xor1 >> 0) & 0x01);
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s_arrmul24_fa3_19_and0 = ((s_arrmul24_and3_19 >> 0) & 0x01) & ((s_arrmul24_fa4_18_xor1 >> 0) & 0x01);
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s_arrmul24_fa3_19_xor1 = ((s_arrmul24_fa3_19_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa2_19_or0 >> 0) & 0x01);
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s_arrmul24_fa3_19_and1 = ((s_arrmul24_fa3_19_xor0 >> 0) & 0x01) & ((s_arrmul24_fa2_19_or0 >> 0) & 0x01);
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s_arrmul24_fa3_19_or0 = ((s_arrmul24_fa3_19_and0 >> 0) & 0x01) | ((s_arrmul24_fa3_19_and1 >> 0) & 0x01);
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s_arrmul24_and4_19 = ((a >> 4) & 0x01) & ((b >> 19) & 0x01);
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s_arrmul24_fa4_19_xor0 = ((s_arrmul24_and4_19 >> 0) & 0x01) ^ ((s_arrmul24_fa5_18_xor1 >> 0) & 0x01);
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s_arrmul24_fa4_19_and0 = ((s_arrmul24_and4_19 >> 0) & 0x01) & ((s_arrmul24_fa5_18_xor1 >> 0) & 0x01);
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s_arrmul24_fa4_19_xor1 = ((s_arrmul24_fa4_19_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa3_19_or0 >> 0) & 0x01);
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s_arrmul24_fa4_19_and1 = ((s_arrmul24_fa4_19_xor0 >> 0) & 0x01) & ((s_arrmul24_fa3_19_or0 >> 0) & 0x01);
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s_arrmul24_fa4_19_or0 = ((s_arrmul24_fa4_19_and0 >> 0) & 0x01) | ((s_arrmul24_fa4_19_and1 >> 0) & 0x01);
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s_arrmul24_and5_19 = ((a >> 5) & 0x01) & ((b >> 19) & 0x01);
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s_arrmul24_fa5_19_xor0 = ((s_arrmul24_and5_19 >> 0) & 0x01) ^ ((s_arrmul24_fa6_18_xor1 >> 0) & 0x01);
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s_arrmul24_fa5_19_and0 = ((s_arrmul24_and5_19 >> 0) & 0x01) & ((s_arrmul24_fa6_18_xor1 >> 0) & 0x01);
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s_arrmul24_fa5_19_xor1 = ((s_arrmul24_fa5_19_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa4_19_or0 >> 0) & 0x01);
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s_arrmul24_fa5_19_and1 = ((s_arrmul24_fa5_19_xor0 >> 0) & 0x01) & ((s_arrmul24_fa4_19_or0 >> 0) & 0x01);
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s_arrmul24_fa5_19_or0 = ((s_arrmul24_fa5_19_and0 >> 0) & 0x01) | ((s_arrmul24_fa5_19_and1 >> 0) & 0x01);
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s_arrmul24_and6_19 = ((a >> 6) & 0x01) & ((b >> 19) & 0x01);
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s_arrmul24_fa6_19_xor0 = ((s_arrmul24_and6_19 >> 0) & 0x01) ^ ((s_arrmul24_fa7_18_xor1 >> 0) & 0x01);
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s_arrmul24_fa6_19_and0 = ((s_arrmul24_and6_19 >> 0) & 0x01) & ((s_arrmul24_fa7_18_xor1 >> 0) & 0x01);
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s_arrmul24_fa6_19_xor1 = ((s_arrmul24_fa6_19_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa5_19_or0 >> 0) & 0x01);
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s_arrmul24_fa6_19_and1 = ((s_arrmul24_fa6_19_xor0 >> 0) & 0x01) & ((s_arrmul24_fa5_19_or0 >> 0) & 0x01);
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s_arrmul24_fa6_19_or0 = ((s_arrmul24_fa6_19_and0 >> 0) & 0x01) | ((s_arrmul24_fa6_19_and1 >> 0) & 0x01);
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s_arrmul24_and7_19 = ((a >> 7) & 0x01) & ((b >> 19) & 0x01);
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s_arrmul24_fa7_19_xor0 = ((s_arrmul24_and7_19 >> 0) & 0x01) ^ ((s_arrmul24_fa8_18_xor1 >> 0) & 0x01);
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s_arrmul24_fa7_19_and0 = ((s_arrmul24_and7_19 >> 0) & 0x01) & ((s_arrmul24_fa8_18_xor1 >> 0) & 0x01);
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s_arrmul24_fa7_19_xor1 = ((s_arrmul24_fa7_19_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa6_19_or0 >> 0) & 0x01);
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s_arrmul24_fa7_19_and1 = ((s_arrmul24_fa7_19_xor0 >> 0) & 0x01) & ((s_arrmul24_fa6_19_or0 >> 0) & 0x01);
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s_arrmul24_fa7_19_or0 = ((s_arrmul24_fa7_19_and0 >> 0) & 0x01) | ((s_arrmul24_fa7_19_and1 >> 0) & 0x01);
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s_arrmul24_and8_19 = ((a >> 8) & 0x01) & ((b >> 19) & 0x01);
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s_arrmul24_fa8_19_xor0 = ((s_arrmul24_and8_19 >> 0) & 0x01) ^ ((s_arrmul24_fa9_18_xor1 >> 0) & 0x01);
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s_arrmul24_fa8_19_and0 = ((s_arrmul24_and8_19 >> 0) & 0x01) & ((s_arrmul24_fa9_18_xor1 >> 0) & 0x01);
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s_arrmul24_fa8_19_xor1 = ((s_arrmul24_fa8_19_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa7_19_or0 >> 0) & 0x01);
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s_arrmul24_fa8_19_and1 = ((s_arrmul24_fa8_19_xor0 >> 0) & 0x01) & ((s_arrmul24_fa7_19_or0 >> 0) & 0x01);
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s_arrmul24_fa8_19_or0 = ((s_arrmul24_fa8_19_and0 >> 0) & 0x01) | ((s_arrmul24_fa8_19_and1 >> 0) & 0x01);
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s_arrmul24_and9_19 = ((a >> 9) & 0x01) & ((b >> 19) & 0x01);
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s_arrmul24_fa9_19_xor0 = ((s_arrmul24_and9_19 >> 0) & 0x01) ^ ((s_arrmul24_fa10_18_xor1 >> 0) & 0x01);
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s_arrmul24_fa9_19_and0 = ((s_arrmul24_and9_19 >> 0) & 0x01) & ((s_arrmul24_fa10_18_xor1 >> 0) & 0x01);
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s_arrmul24_fa9_19_xor1 = ((s_arrmul24_fa9_19_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa8_19_or0 >> 0) & 0x01);
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s_arrmul24_fa9_19_and1 = ((s_arrmul24_fa9_19_xor0 >> 0) & 0x01) & ((s_arrmul24_fa8_19_or0 >> 0) & 0x01);
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s_arrmul24_fa9_19_or0 = ((s_arrmul24_fa9_19_and0 >> 0) & 0x01) | ((s_arrmul24_fa9_19_and1 >> 0) & 0x01);
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s_arrmul24_and10_19 = ((a >> 10) & 0x01) & ((b >> 19) & 0x01);
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s_arrmul24_fa10_19_xor0 = ((s_arrmul24_and10_19 >> 0) & 0x01) ^ ((s_arrmul24_fa11_18_xor1 >> 0) & 0x01);
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s_arrmul24_fa10_19_and0 = ((s_arrmul24_and10_19 >> 0) & 0x01) & ((s_arrmul24_fa11_18_xor1 >> 0) & 0x01);
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s_arrmul24_fa10_19_xor1 = ((s_arrmul24_fa10_19_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa9_19_or0 >> 0) & 0x01);
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s_arrmul24_fa10_19_and1 = ((s_arrmul24_fa10_19_xor0 >> 0) & 0x01) & ((s_arrmul24_fa9_19_or0 >> 0) & 0x01);
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s_arrmul24_fa10_19_or0 = ((s_arrmul24_fa10_19_and0 >> 0) & 0x01) | ((s_arrmul24_fa10_19_and1 >> 0) & 0x01);
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s_arrmul24_and11_19 = ((a >> 11) & 0x01) & ((b >> 19) & 0x01);
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s_arrmul24_fa11_19_xor0 = ((s_arrmul24_and11_19 >> 0) & 0x01) ^ ((s_arrmul24_fa12_18_xor1 >> 0) & 0x01);
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s_arrmul24_fa11_19_and0 = ((s_arrmul24_and11_19 >> 0) & 0x01) & ((s_arrmul24_fa12_18_xor1 >> 0) & 0x01);
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s_arrmul24_fa11_19_xor1 = ((s_arrmul24_fa11_19_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa10_19_or0 >> 0) & 0x01);
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s_arrmul24_fa11_19_and1 = ((s_arrmul24_fa11_19_xor0 >> 0) & 0x01) & ((s_arrmul24_fa10_19_or0 >> 0) & 0x01);
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s_arrmul24_fa11_19_or0 = ((s_arrmul24_fa11_19_and0 >> 0) & 0x01) | ((s_arrmul24_fa11_19_and1 >> 0) & 0x01);
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s_arrmul24_and12_19 = ((a >> 12) & 0x01) & ((b >> 19) & 0x01);
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s_arrmul24_fa12_19_xor0 = ((s_arrmul24_and12_19 >> 0) & 0x01) ^ ((s_arrmul24_fa13_18_xor1 >> 0) & 0x01);
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s_arrmul24_fa12_19_and0 = ((s_arrmul24_and12_19 >> 0) & 0x01) & ((s_arrmul24_fa13_18_xor1 >> 0) & 0x01);
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s_arrmul24_fa12_19_xor1 = ((s_arrmul24_fa12_19_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa11_19_or0 >> 0) & 0x01);
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s_arrmul24_fa12_19_and1 = ((s_arrmul24_fa12_19_xor0 >> 0) & 0x01) & ((s_arrmul24_fa11_19_or0 >> 0) & 0x01);
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s_arrmul24_fa12_19_or0 = ((s_arrmul24_fa12_19_and0 >> 0) & 0x01) | ((s_arrmul24_fa12_19_and1 >> 0) & 0x01);
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s_arrmul24_and13_19 = ((a >> 13) & 0x01) & ((b >> 19) & 0x01);
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s_arrmul24_fa13_19_xor0 = ((s_arrmul24_and13_19 >> 0) & 0x01) ^ ((s_arrmul24_fa14_18_xor1 >> 0) & 0x01);
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s_arrmul24_fa13_19_and0 = ((s_arrmul24_and13_19 >> 0) & 0x01) & ((s_arrmul24_fa14_18_xor1 >> 0) & 0x01);
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s_arrmul24_fa13_19_xor1 = ((s_arrmul24_fa13_19_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa12_19_or0 >> 0) & 0x01);
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s_arrmul24_fa13_19_and1 = ((s_arrmul24_fa13_19_xor0 >> 0) & 0x01) & ((s_arrmul24_fa12_19_or0 >> 0) & 0x01);
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s_arrmul24_fa13_19_or0 = ((s_arrmul24_fa13_19_and0 >> 0) & 0x01) | ((s_arrmul24_fa13_19_and1 >> 0) & 0x01);
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s_arrmul24_and14_19 = ((a >> 14) & 0x01) & ((b >> 19) & 0x01);
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s_arrmul24_fa14_19_xor0 = ((s_arrmul24_and14_19 >> 0) & 0x01) ^ ((s_arrmul24_fa15_18_xor1 >> 0) & 0x01);
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s_arrmul24_fa14_19_and0 = ((s_arrmul24_and14_19 >> 0) & 0x01) & ((s_arrmul24_fa15_18_xor1 >> 0) & 0x01);
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s_arrmul24_fa14_19_xor1 = ((s_arrmul24_fa14_19_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa13_19_or0 >> 0) & 0x01);
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s_arrmul24_fa14_19_and1 = ((s_arrmul24_fa14_19_xor0 >> 0) & 0x01) & ((s_arrmul24_fa13_19_or0 >> 0) & 0x01);
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s_arrmul24_fa14_19_or0 = ((s_arrmul24_fa14_19_and0 >> 0) & 0x01) | ((s_arrmul24_fa14_19_and1 >> 0) & 0x01);
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s_arrmul24_and15_19 = ((a >> 15) & 0x01) & ((b >> 19) & 0x01);
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s_arrmul24_fa15_19_xor0 = ((s_arrmul24_and15_19 >> 0) & 0x01) ^ ((s_arrmul24_fa16_18_xor1 >> 0) & 0x01);
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s_arrmul24_fa15_19_and0 = ((s_arrmul24_and15_19 >> 0) & 0x01) & ((s_arrmul24_fa16_18_xor1 >> 0) & 0x01);
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s_arrmul24_fa15_19_xor1 = ((s_arrmul24_fa15_19_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa14_19_or0 >> 0) & 0x01);
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s_arrmul24_fa15_19_and1 = ((s_arrmul24_fa15_19_xor0 >> 0) & 0x01) & ((s_arrmul24_fa14_19_or0 >> 0) & 0x01);
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s_arrmul24_fa15_19_or0 = ((s_arrmul24_fa15_19_and0 >> 0) & 0x01) | ((s_arrmul24_fa15_19_and1 >> 0) & 0x01);
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s_arrmul24_and16_19 = ((a >> 16) & 0x01) & ((b >> 19) & 0x01);
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s_arrmul24_fa16_19_xor0 = ((s_arrmul24_and16_19 >> 0) & 0x01) ^ ((s_arrmul24_fa17_18_xor1 >> 0) & 0x01);
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s_arrmul24_fa16_19_and0 = ((s_arrmul24_and16_19 >> 0) & 0x01) & ((s_arrmul24_fa17_18_xor1 >> 0) & 0x01);
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s_arrmul24_fa16_19_xor1 = ((s_arrmul24_fa16_19_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa15_19_or0 >> 0) & 0x01);
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s_arrmul24_fa16_19_and1 = ((s_arrmul24_fa16_19_xor0 >> 0) & 0x01) & ((s_arrmul24_fa15_19_or0 >> 0) & 0x01);
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s_arrmul24_fa16_19_or0 = ((s_arrmul24_fa16_19_and0 >> 0) & 0x01) | ((s_arrmul24_fa16_19_and1 >> 0) & 0x01);
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s_arrmul24_and17_19 = ((a >> 17) & 0x01) & ((b >> 19) & 0x01);
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s_arrmul24_fa17_19_xor0 = ((s_arrmul24_and17_19 >> 0) & 0x01) ^ ((s_arrmul24_fa18_18_xor1 >> 0) & 0x01);
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s_arrmul24_fa17_19_and0 = ((s_arrmul24_and17_19 >> 0) & 0x01) & ((s_arrmul24_fa18_18_xor1 >> 0) & 0x01);
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s_arrmul24_fa17_19_xor1 = ((s_arrmul24_fa17_19_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa16_19_or0 >> 0) & 0x01);
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s_arrmul24_fa17_19_and1 = ((s_arrmul24_fa17_19_xor0 >> 0) & 0x01) & ((s_arrmul24_fa16_19_or0 >> 0) & 0x01);
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s_arrmul24_fa17_19_or0 = ((s_arrmul24_fa17_19_and0 >> 0) & 0x01) | ((s_arrmul24_fa17_19_and1 >> 0) & 0x01);
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s_arrmul24_and18_19 = ((a >> 18) & 0x01) & ((b >> 19) & 0x01);
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s_arrmul24_fa18_19_xor0 = ((s_arrmul24_and18_19 >> 0) & 0x01) ^ ((s_arrmul24_fa19_18_xor1 >> 0) & 0x01);
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s_arrmul24_fa18_19_and0 = ((s_arrmul24_and18_19 >> 0) & 0x01) & ((s_arrmul24_fa19_18_xor1 >> 0) & 0x01);
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s_arrmul24_fa18_19_xor1 = ((s_arrmul24_fa18_19_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa17_19_or0 >> 0) & 0x01);
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s_arrmul24_fa18_19_and1 = ((s_arrmul24_fa18_19_xor0 >> 0) & 0x01) & ((s_arrmul24_fa17_19_or0 >> 0) & 0x01);
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s_arrmul24_fa18_19_or0 = ((s_arrmul24_fa18_19_and0 >> 0) & 0x01) | ((s_arrmul24_fa18_19_and1 >> 0) & 0x01);
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s_arrmul24_and19_19 = ((a >> 19) & 0x01) & ((b >> 19) & 0x01);
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s_arrmul24_fa19_19_xor0 = ((s_arrmul24_and19_19 >> 0) & 0x01) ^ ((s_arrmul24_fa20_18_xor1 >> 0) & 0x01);
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s_arrmul24_fa19_19_and0 = ((s_arrmul24_and19_19 >> 0) & 0x01) & ((s_arrmul24_fa20_18_xor1 >> 0) & 0x01);
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s_arrmul24_fa19_19_xor1 = ((s_arrmul24_fa19_19_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa18_19_or0 >> 0) & 0x01);
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s_arrmul24_fa19_19_and1 = ((s_arrmul24_fa19_19_xor0 >> 0) & 0x01) & ((s_arrmul24_fa18_19_or0 >> 0) & 0x01);
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s_arrmul24_fa19_19_or0 = ((s_arrmul24_fa19_19_and0 >> 0) & 0x01) | ((s_arrmul24_fa19_19_and1 >> 0) & 0x01);
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s_arrmul24_and20_19 = ((a >> 20) & 0x01) & ((b >> 19) & 0x01);
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s_arrmul24_fa20_19_xor0 = ((s_arrmul24_and20_19 >> 0) & 0x01) ^ ((s_arrmul24_fa21_18_xor1 >> 0) & 0x01);
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s_arrmul24_fa20_19_and0 = ((s_arrmul24_and20_19 >> 0) & 0x01) & ((s_arrmul24_fa21_18_xor1 >> 0) & 0x01);
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s_arrmul24_fa20_19_xor1 = ((s_arrmul24_fa20_19_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa19_19_or0 >> 0) & 0x01);
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s_arrmul24_fa20_19_and1 = ((s_arrmul24_fa20_19_xor0 >> 0) & 0x01) & ((s_arrmul24_fa19_19_or0 >> 0) & 0x01);
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s_arrmul24_fa20_19_or0 = ((s_arrmul24_fa20_19_and0 >> 0) & 0x01) | ((s_arrmul24_fa20_19_and1 >> 0) & 0x01);
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s_arrmul24_and21_19 = ((a >> 21) & 0x01) & ((b >> 19) & 0x01);
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s_arrmul24_fa21_19_xor0 = ((s_arrmul24_and21_19 >> 0) & 0x01) ^ ((s_arrmul24_fa22_18_xor1 >> 0) & 0x01);
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s_arrmul24_fa21_19_and0 = ((s_arrmul24_and21_19 >> 0) & 0x01) & ((s_arrmul24_fa22_18_xor1 >> 0) & 0x01);
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s_arrmul24_fa21_19_xor1 = ((s_arrmul24_fa21_19_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa20_19_or0 >> 0) & 0x01);
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s_arrmul24_fa21_19_and1 = ((s_arrmul24_fa21_19_xor0 >> 0) & 0x01) & ((s_arrmul24_fa20_19_or0 >> 0) & 0x01);
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s_arrmul24_fa21_19_or0 = ((s_arrmul24_fa21_19_and0 >> 0) & 0x01) | ((s_arrmul24_fa21_19_and1 >> 0) & 0x01);
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s_arrmul24_and22_19 = ((a >> 22) & 0x01) & ((b >> 19) & 0x01);
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s_arrmul24_fa22_19_xor0 = ((s_arrmul24_and22_19 >> 0) & 0x01) ^ ((s_arrmul24_fa23_18_xor1 >> 0) & 0x01);
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s_arrmul24_fa22_19_and0 = ((s_arrmul24_and22_19 >> 0) & 0x01) & ((s_arrmul24_fa23_18_xor1 >> 0) & 0x01);
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s_arrmul24_fa22_19_xor1 = ((s_arrmul24_fa22_19_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa21_19_or0 >> 0) & 0x01);
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s_arrmul24_fa22_19_and1 = ((s_arrmul24_fa22_19_xor0 >> 0) & 0x01) & ((s_arrmul24_fa21_19_or0 >> 0) & 0x01);
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s_arrmul24_fa22_19_or0 = ((s_arrmul24_fa22_19_and0 >> 0) & 0x01) | ((s_arrmul24_fa22_19_and1 >> 0) & 0x01);
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s_arrmul24_nand23_19 = ~(((a >> 23) & 0x01) & ((b >> 19) & 0x01)) & 0x01;
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s_arrmul24_fa23_19_xor0 = ((s_arrmul24_nand23_19 >> 0) & 0x01) ^ ((s_arrmul24_fa23_18_or0 >> 0) & 0x01);
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s_arrmul24_fa23_19_and0 = ((s_arrmul24_nand23_19 >> 0) & 0x01) & ((s_arrmul24_fa23_18_or0 >> 0) & 0x01);
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s_arrmul24_fa23_19_xor1 = ((s_arrmul24_fa23_19_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa22_19_or0 >> 0) & 0x01);
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s_arrmul24_fa23_19_and1 = ((s_arrmul24_fa23_19_xor0 >> 0) & 0x01) & ((s_arrmul24_fa22_19_or0 >> 0) & 0x01);
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s_arrmul24_fa23_19_or0 = ((s_arrmul24_fa23_19_and0 >> 0) & 0x01) | ((s_arrmul24_fa23_19_and1 >> 0) & 0x01);
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s_arrmul24_and0_20 = ((a >> 0) & 0x01) & ((b >> 20) & 0x01);
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s_arrmul24_ha0_20_xor0 = ((s_arrmul24_and0_20 >> 0) & 0x01) ^ ((s_arrmul24_fa1_19_xor1 >> 0) & 0x01);
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s_arrmul24_ha0_20_and0 = ((s_arrmul24_and0_20 >> 0) & 0x01) & ((s_arrmul24_fa1_19_xor1 >> 0) & 0x01);
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s_arrmul24_and1_20 = ((a >> 1) & 0x01) & ((b >> 20) & 0x01);
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s_arrmul24_fa1_20_xor0 = ((s_arrmul24_and1_20 >> 0) & 0x01) ^ ((s_arrmul24_fa2_19_xor1 >> 0) & 0x01);
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s_arrmul24_fa1_20_and0 = ((s_arrmul24_and1_20 >> 0) & 0x01) & ((s_arrmul24_fa2_19_xor1 >> 0) & 0x01);
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s_arrmul24_fa1_20_xor1 = ((s_arrmul24_fa1_20_xor0 >> 0) & 0x01) ^ ((s_arrmul24_ha0_20_and0 >> 0) & 0x01);
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s_arrmul24_fa1_20_and1 = ((s_arrmul24_fa1_20_xor0 >> 0) & 0x01) & ((s_arrmul24_ha0_20_and0 >> 0) & 0x01);
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s_arrmul24_fa1_20_or0 = ((s_arrmul24_fa1_20_and0 >> 0) & 0x01) | ((s_arrmul24_fa1_20_and1 >> 0) & 0x01);
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s_arrmul24_and2_20 = ((a >> 2) & 0x01) & ((b >> 20) & 0x01);
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s_arrmul24_fa2_20_xor0 = ((s_arrmul24_and2_20 >> 0) & 0x01) ^ ((s_arrmul24_fa3_19_xor1 >> 0) & 0x01);
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s_arrmul24_fa2_20_and0 = ((s_arrmul24_and2_20 >> 0) & 0x01) & ((s_arrmul24_fa3_19_xor1 >> 0) & 0x01);
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s_arrmul24_fa2_20_xor1 = ((s_arrmul24_fa2_20_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa1_20_or0 >> 0) & 0x01);
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s_arrmul24_fa2_20_and1 = ((s_arrmul24_fa2_20_xor0 >> 0) & 0x01) & ((s_arrmul24_fa1_20_or0 >> 0) & 0x01);
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s_arrmul24_fa2_20_or0 = ((s_arrmul24_fa2_20_and0 >> 0) & 0x01) | ((s_arrmul24_fa2_20_and1 >> 0) & 0x01);
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s_arrmul24_and3_20 = ((a >> 3) & 0x01) & ((b >> 20) & 0x01);
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s_arrmul24_fa3_20_xor0 = ((s_arrmul24_and3_20 >> 0) & 0x01) ^ ((s_arrmul24_fa4_19_xor1 >> 0) & 0x01);
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s_arrmul24_fa3_20_and0 = ((s_arrmul24_and3_20 >> 0) & 0x01) & ((s_arrmul24_fa4_19_xor1 >> 0) & 0x01);
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s_arrmul24_fa3_20_xor1 = ((s_arrmul24_fa3_20_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa2_20_or0 >> 0) & 0x01);
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s_arrmul24_fa3_20_and1 = ((s_arrmul24_fa3_20_xor0 >> 0) & 0x01) & ((s_arrmul24_fa2_20_or0 >> 0) & 0x01);
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s_arrmul24_fa3_20_or0 = ((s_arrmul24_fa3_20_and0 >> 0) & 0x01) | ((s_arrmul24_fa3_20_and1 >> 0) & 0x01);
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s_arrmul24_and4_20 = ((a >> 4) & 0x01) & ((b >> 20) & 0x01);
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s_arrmul24_fa4_20_xor0 = ((s_arrmul24_and4_20 >> 0) & 0x01) ^ ((s_arrmul24_fa5_19_xor1 >> 0) & 0x01);
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s_arrmul24_fa4_20_and0 = ((s_arrmul24_and4_20 >> 0) & 0x01) & ((s_arrmul24_fa5_19_xor1 >> 0) & 0x01);
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s_arrmul24_fa4_20_xor1 = ((s_arrmul24_fa4_20_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa3_20_or0 >> 0) & 0x01);
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s_arrmul24_fa4_20_and1 = ((s_arrmul24_fa4_20_xor0 >> 0) & 0x01) & ((s_arrmul24_fa3_20_or0 >> 0) & 0x01);
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s_arrmul24_fa4_20_or0 = ((s_arrmul24_fa4_20_and0 >> 0) & 0x01) | ((s_arrmul24_fa4_20_and1 >> 0) & 0x01);
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s_arrmul24_and5_20 = ((a >> 5) & 0x01) & ((b >> 20) & 0x01);
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s_arrmul24_fa5_20_xor0 = ((s_arrmul24_and5_20 >> 0) & 0x01) ^ ((s_arrmul24_fa6_19_xor1 >> 0) & 0x01);
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s_arrmul24_fa5_20_and0 = ((s_arrmul24_and5_20 >> 0) & 0x01) & ((s_arrmul24_fa6_19_xor1 >> 0) & 0x01);
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s_arrmul24_fa5_20_xor1 = ((s_arrmul24_fa5_20_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa4_20_or0 >> 0) & 0x01);
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s_arrmul24_fa5_20_and1 = ((s_arrmul24_fa5_20_xor0 >> 0) & 0x01) & ((s_arrmul24_fa4_20_or0 >> 0) & 0x01);
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s_arrmul24_fa5_20_or0 = ((s_arrmul24_fa5_20_and0 >> 0) & 0x01) | ((s_arrmul24_fa5_20_and1 >> 0) & 0x01);
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s_arrmul24_and6_20 = ((a >> 6) & 0x01) & ((b >> 20) & 0x01);
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s_arrmul24_fa6_20_xor0 = ((s_arrmul24_and6_20 >> 0) & 0x01) ^ ((s_arrmul24_fa7_19_xor1 >> 0) & 0x01);
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s_arrmul24_fa6_20_and0 = ((s_arrmul24_and6_20 >> 0) & 0x01) & ((s_arrmul24_fa7_19_xor1 >> 0) & 0x01);
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s_arrmul24_fa6_20_xor1 = ((s_arrmul24_fa6_20_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa5_20_or0 >> 0) & 0x01);
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s_arrmul24_fa6_20_and1 = ((s_arrmul24_fa6_20_xor0 >> 0) & 0x01) & ((s_arrmul24_fa5_20_or0 >> 0) & 0x01);
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s_arrmul24_fa6_20_or0 = ((s_arrmul24_fa6_20_and0 >> 0) & 0x01) | ((s_arrmul24_fa6_20_and1 >> 0) & 0x01);
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s_arrmul24_and7_20 = ((a >> 7) & 0x01) & ((b >> 20) & 0x01);
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s_arrmul24_fa7_20_xor0 = ((s_arrmul24_and7_20 >> 0) & 0x01) ^ ((s_arrmul24_fa8_19_xor1 >> 0) & 0x01);
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s_arrmul24_fa7_20_and0 = ((s_arrmul24_and7_20 >> 0) & 0x01) & ((s_arrmul24_fa8_19_xor1 >> 0) & 0x01);
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s_arrmul24_fa7_20_xor1 = ((s_arrmul24_fa7_20_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa6_20_or0 >> 0) & 0x01);
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s_arrmul24_fa7_20_and1 = ((s_arrmul24_fa7_20_xor0 >> 0) & 0x01) & ((s_arrmul24_fa6_20_or0 >> 0) & 0x01);
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s_arrmul24_fa7_20_or0 = ((s_arrmul24_fa7_20_and0 >> 0) & 0x01) | ((s_arrmul24_fa7_20_and1 >> 0) & 0x01);
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s_arrmul24_and8_20 = ((a >> 8) & 0x01) & ((b >> 20) & 0x01);
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s_arrmul24_fa8_20_xor0 = ((s_arrmul24_and8_20 >> 0) & 0x01) ^ ((s_arrmul24_fa9_19_xor1 >> 0) & 0x01);
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s_arrmul24_fa8_20_and0 = ((s_arrmul24_and8_20 >> 0) & 0x01) & ((s_arrmul24_fa9_19_xor1 >> 0) & 0x01);
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s_arrmul24_fa8_20_xor1 = ((s_arrmul24_fa8_20_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa7_20_or0 >> 0) & 0x01);
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s_arrmul24_fa8_20_and1 = ((s_arrmul24_fa8_20_xor0 >> 0) & 0x01) & ((s_arrmul24_fa7_20_or0 >> 0) & 0x01);
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s_arrmul24_fa8_20_or0 = ((s_arrmul24_fa8_20_and0 >> 0) & 0x01) | ((s_arrmul24_fa8_20_and1 >> 0) & 0x01);
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s_arrmul24_and9_20 = ((a >> 9) & 0x01) & ((b >> 20) & 0x01);
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s_arrmul24_fa9_20_xor0 = ((s_arrmul24_and9_20 >> 0) & 0x01) ^ ((s_arrmul24_fa10_19_xor1 >> 0) & 0x01);
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s_arrmul24_fa9_20_and0 = ((s_arrmul24_and9_20 >> 0) & 0x01) & ((s_arrmul24_fa10_19_xor1 >> 0) & 0x01);
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s_arrmul24_fa9_20_xor1 = ((s_arrmul24_fa9_20_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa8_20_or0 >> 0) & 0x01);
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s_arrmul24_fa9_20_and1 = ((s_arrmul24_fa9_20_xor0 >> 0) & 0x01) & ((s_arrmul24_fa8_20_or0 >> 0) & 0x01);
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s_arrmul24_fa9_20_or0 = ((s_arrmul24_fa9_20_and0 >> 0) & 0x01) | ((s_arrmul24_fa9_20_and1 >> 0) & 0x01);
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s_arrmul24_and10_20 = ((a >> 10) & 0x01) & ((b >> 20) & 0x01);
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s_arrmul24_fa10_20_xor0 = ((s_arrmul24_and10_20 >> 0) & 0x01) ^ ((s_arrmul24_fa11_19_xor1 >> 0) & 0x01);
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s_arrmul24_fa10_20_and0 = ((s_arrmul24_and10_20 >> 0) & 0x01) & ((s_arrmul24_fa11_19_xor1 >> 0) & 0x01);
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s_arrmul24_fa10_20_xor1 = ((s_arrmul24_fa10_20_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa9_20_or0 >> 0) & 0x01);
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s_arrmul24_fa10_20_and1 = ((s_arrmul24_fa10_20_xor0 >> 0) & 0x01) & ((s_arrmul24_fa9_20_or0 >> 0) & 0x01);
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s_arrmul24_fa10_20_or0 = ((s_arrmul24_fa10_20_and0 >> 0) & 0x01) | ((s_arrmul24_fa10_20_and1 >> 0) & 0x01);
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s_arrmul24_and11_20 = ((a >> 11) & 0x01) & ((b >> 20) & 0x01);
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s_arrmul24_fa11_20_xor0 = ((s_arrmul24_and11_20 >> 0) & 0x01) ^ ((s_arrmul24_fa12_19_xor1 >> 0) & 0x01);
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s_arrmul24_fa11_20_and0 = ((s_arrmul24_and11_20 >> 0) & 0x01) & ((s_arrmul24_fa12_19_xor1 >> 0) & 0x01);
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s_arrmul24_fa11_20_xor1 = ((s_arrmul24_fa11_20_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa10_20_or0 >> 0) & 0x01);
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s_arrmul24_fa11_20_and1 = ((s_arrmul24_fa11_20_xor0 >> 0) & 0x01) & ((s_arrmul24_fa10_20_or0 >> 0) & 0x01);
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s_arrmul24_fa11_20_or0 = ((s_arrmul24_fa11_20_and0 >> 0) & 0x01) | ((s_arrmul24_fa11_20_and1 >> 0) & 0x01);
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s_arrmul24_and12_20 = ((a >> 12) & 0x01) & ((b >> 20) & 0x01);
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s_arrmul24_fa12_20_xor0 = ((s_arrmul24_and12_20 >> 0) & 0x01) ^ ((s_arrmul24_fa13_19_xor1 >> 0) & 0x01);
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s_arrmul24_fa12_20_and0 = ((s_arrmul24_and12_20 >> 0) & 0x01) & ((s_arrmul24_fa13_19_xor1 >> 0) & 0x01);
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s_arrmul24_fa12_20_xor1 = ((s_arrmul24_fa12_20_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa11_20_or0 >> 0) & 0x01);
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s_arrmul24_fa12_20_and1 = ((s_arrmul24_fa12_20_xor0 >> 0) & 0x01) & ((s_arrmul24_fa11_20_or0 >> 0) & 0x01);
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s_arrmul24_fa12_20_or0 = ((s_arrmul24_fa12_20_and0 >> 0) & 0x01) | ((s_arrmul24_fa12_20_and1 >> 0) & 0x01);
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s_arrmul24_and13_20 = ((a >> 13) & 0x01) & ((b >> 20) & 0x01);
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s_arrmul24_fa13_20_xor0 = ((s_arrmul24_and13_20 >> 0) & 0x01) ^ ((s_arrmul24_fa14_19_xor1 >> 0) & 0x01);
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s_arrmul24_fa13_20_and0 = ((s_arrmul24_and13_20 >> 0) & 0x01) & ((s_arrmul24_fa14_19_xor1 >> 0) & 0x01);
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s_arrmul24_fa13_20_xor1 = ((s_arrmul24_fa13_20_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa12_20_or0 >> 0) & 0x01);
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s_arrmul24_fa13_20_and1 = ((s_arrmul24_fa13_20_xor0 >> 0) & 0x01) & ((s_arrmul24_fa12_20_or0 >> 0) & 0x01);
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s_arrmul24_fa13_20_or0 = ((s_arrmul24_fa13_20_and0 >> 0) & 0x01) | ((s_arrmul24_fa13_20_and1 >> 0) & 0x01);
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s_arrmul24_and14_20 = ((a >> 14) & 0x01) & ((b >> 20) & 0x01);
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s_arrmul24_fa14_20_xor0 = ((s_arrmul24_and14_20 >> 0) & 0x01) ^ ((s_arrmul24_fa15_19_xor1 >> 0) & 0x01);
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s_arrmul24_fa14_20_and0 = ((s_arrmul24_and14_20 >> 0) & 0x01) & ((s_arrmul24_fa15_19_xor1 >> 0) & 0x01);
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s_arrmul24_fa14_20_xor1 = ((s_arrmul24_fa14_20_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa13_20_or0 >> 0) & 0x01);
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s_arrmul24_fa14_20_and1 = ((s_arrmul24_fa14_20_xor0 >> 0) & 0x01) & ((s_arrmul24_fa13_20_or0 >> 0) & 0x01);
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s_arrmul24_fa14_20_or0 = ((s_arrmul24_fa14_20_and0 >> 0) & 0x01) | ((s_arrmul24_fa14_20_and1 >> 0) & 0x01);
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s_arrmul24_and15_20 = ((a >> 15) & 0x01) & ((b >> 20) & 0x01);
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s_arrmul24_fa15_20_xor0 = ((s_arrmul24_and15_20 >> 0) & 0x01) ^ ((s_arrmul24_fa16_19_xor1 >> 0) & 0x01);
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s_arrmul24_fa15_20_and0 = ((s_arrmul24_and15_20 >> 0) & 0x01) & ((s_arrmul24_fa16_19_xor1 >> 0) & 0x01);
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s_arrmul24_fa15_20_xor1 = ((s_arrmul24_fa15_20_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa14_20_or0 >> 0) & 0x01);
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s_arrmul24_fa15_20_and1 = ((s_arrmul24_fa15_20_xor0 >> 0) & 0x01) & ((s_arrmul24_fa14_20_or0 >> 0) & 0x01);
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s_arrmul24_fa15_20_or0 = ((s_arrmul24_fa15_20_and0 >> 0) & 0x01) | ((s_arrmul24_fa15_20_and1 >> 0) & 0x01);
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s_arrmul24_and16_20 = ((a >> 16) & 0x01) & ((b >> 20) & 0x01);
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s_arrmul24_fa16_20_xor0 = ((s_arrmul24_and16_20 >> 0) & 0x01) ^ ((s_arrmul24_fa17_19_xor1 >> 0) & 0x01);
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s_arrmul24_fa16_20_and0 = ((s_arrmul24_and16_20 >> 0) & 0x01) & ((s_arrmul24_fa17_19_xor1 >> 0) & 0x01);
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s_arrmul24_fa16_20_xor1 = ((s_arrmul24_fa16_20_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa15_20_or0 >> 0) & 0x01);
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s_arrmul24_fa16_20_and1 = ((s_arrmul24_fa16_20_xor0 >> 0) & 0x01) & ((s_arrmul24_fa15_20_or0 >> 0) & 0x01);
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s_arrmul24_fa16_20_or0 = ((s_arrmul24_fa16_20_and0 >> 0) & 0x01) | ((s_arrmul24_fa16_20_and1 >> 0) & 0x01);
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s_arrmul24_and17_20 = ((a >> 17) & 0x01) & ((b >> 20) & 0x01);
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s_arrmul24_fa17_20_xor0 = ((s_arrmul24_and17_20 >> 0) & 0x01) ^ ((s_arrmul24_fa18_19_xor1 >> 0) & 0x01);
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s_arrmul24_fa17_20_and0 = ((s_arrmul24_and17_20 >> 0) & 0x01) & ((s_arrmul24_fa18_19_xor1 >> 0) & 0x01);
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s_arrmul24_fa17_20_xor1 = ((s_arrmul24_fa17_20_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa16_20_or0 >> 0) & 0x01);
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s_arrmul24_fa17_20_and1 = ((s_arrmul24_fa17_20_xor0 >> 0) & 0x01) & ((s_arrmul24_fa16_20_or0 >> 0) & 0x01);
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s_arrmul24_fa17_20_or0 = ((s_arrmul24_fa17_20_and0 >> 0) & 0x01) | ((s_arrmul24_fa17_20_and1 >> 0) & 0x01);
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s_arrmul24_and18_20 = ((a >> 18) & 0x01) & ((b >> 20) & 0x01);
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s_arrmul24_fa18_20_xor0 = ((s_arrmul24_and18_20 >> 0) & 0x01) ^ ((s_arrmul24_fa19_19_xor1 >> 0) & 0x01);
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s_arrmul24_fa18_20_and0 = ((s_arrmul24_and18_20 >> 0) & 0x01) & ((s_arrmul24_fa19_19_xor1 >> 0) & 0x01);
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s_arrmul24_fa18_20_xor1 = ((s_arrmul24_fa18_20_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa17_20_or0 >> 0) & 0x01);
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s_arrmul24_fa18_20_and1 = ((s_arrmul24_fa18_20_xor0 >> 0) & 0x01) & ((s_arrmul24_fa17_20_or0 >> 0) & 0x01);
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s_arrmul24_fa18_20_or0 = ((s_arrmul24_fa18_20_and0 >> 0) & 0x01) | ((s_arrmul24_fa18_20_and1 >> 0) & 0x01);
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s_arrmul24_and19_20 = ((a >> 19) & 0x01) & ((b >> 20) & 0x01);
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s_arrmul24_fa19_20_xor0 = ((s_arrmul24_and19_20 >> 0) & 0x01) ^ ((s_arrmul24_fa20_19_xor1 >> 0) & 0x01);
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s_arrmul24_fa19_20_and0 = ((s_arrmul24_and19_20 >> 0) & 0x01) & ((s_arrmul24_fa20_19_xor1 >> 0) & 0x01);
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s_arrmul24_fa19_20_xor1 = ((s_arrmul24_fa19_20_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa18_20_or0 >> 0) & 0x01);
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s_arrmul24_fa19_20_and1 = ((s_arrmul24_fa19_20_xor0 >> 0) & 0x01) & ((s_arrmul24_fa18_20_or0 >> 0) & 0x01);
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s_arrmul24_fa19_20_or0 = ((s_arrmul24_fa19_20_and0 >> 0) & 0x01) | ((s_arrmul24_fa19_20_and1 >> 0) & 0x01);
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s_arrmul24_and20_20 = ((a >> 20) & 0x01) & ((b >> 20) & 0x01);
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s_arrmul24_fa20_20_xor0 = ((s_arrmul24_and20_20 >> 0) & 0x01) ^ ((s_arrmul24_fa21_19_xor1 >> 0) & 0x01);
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s_arrmul24_fa20_20_and0 = ((s_arrmul24_and20_20 >> 0) & 0x01) & ((s_arrmul24_fa21_19_xor1 >> 0) & 0x01);
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s_arrmul24_fa20_20_xor1 = ((s_arrmul24_fa20_20_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa19_20_or0 >> 0) & 0x01);
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s_arrmul24_fa20_20_and1 = ((s_arrmul24_fa20_20_xor0 >> 0) & 0x01) & ((s_arrmul24_fa19_20_or0 >> 0) & 0x01);
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s_arrmul24_fa20_20_or0 = ((s_arrmul24_fa20_20_and0 >> 0) & 0x01) | ((s_arrmul24_fa20_20_and1 >> 0) & 0x01);
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s_arrmul24_and21_20 = ((a >> 21) & 0x01) & ((b >> 20) & 0x01);
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s_arrmul24_fa21_20_xor0 = ((s_arrmul24_and21_20 >> 0) & 0x01) ^ ((s_arrmul24_fa22_19_xor1 >> 0) & 0x01);
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s_arrmul24_fa21_20_and0 = ((s_arrmul24_and21_20 >> 0) & 0x01) & ((s_arrmul24_fa22_19_xor1 >> 0) & 0x01);
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s_arrmul24_fa21_20_xor1 = ((s_arrmul24_fa21_20_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa20_20_or0 >> 0) & 0x01);
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s_arrmul24_fa21_20_and1 = ((s_arrmul24_fa21_20_xor0 >> 0) & 0x01) & ((s_arrmul24_fa20_20_or0 >> 0) & 0x01);
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s_arrmul24_fa21_20_or0 = ((s_arrmul24_fa21_20_and0 >> 0) & 0x01) | ((s_arrmul24_fa21_20_and1 >> 0) & 0x01);
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s_arrmul24_and22_20 = ((a >> 22) & 0x01) & ((b >> 20) & 0x01);
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s_arrmul24_fa22_20_xor0 = ((s_arrmul24_and22_20 >> 0) & 0x01) ^ ((s_arrmul24_fa23_19_xor1 >> 0) & 0x01);
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s_arrmul24_fa22_20_and0 = ((s_arrmul24_and22_20 >> 0) & 0x01) & ((s_arrmul24_fa23_19_xor1 >> 0) & 0x01);
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s_arrmul24_fa22_20_xor1 = ((s_arrmul24_fa22_20_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa21_20_or0 >> 0) & 0x01);
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s_arrmul24_fa22_20_and1 = ((s_arrmul24_fa22_20_xor0 >> 0) & 0x01) & ((s_arrmul24_fa21_20_or0 >> 0) & 0x01);
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s_arrmul24_fa22_20_or0 = ((s_arrmul24_fa22_20_and0 >> 0) & 0x01) | ((s_arrmul24_fa22_20_and1 >> 0) & 0x01);
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s_arrmul24_nand23_20 = ~(((a >> 23) & 0x01) & ((b >> 20) & 0x01)) & 0x01;
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s_arrmul24_fa23_20_xor0 = ((s_arrmul24_nand23_20 >> 0) & 0x01) ^ ((s_arrmul24_fa23_19_or0 >> 0) & 0x01);
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s_arrmul24_fa23_20_and0 = ((s_arrmul24_nand23_20 >> 0) & 0x01) & ((s_arrmul24_fa23_19_or0 >> 0) & 0x01);
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s_arrmul24_fa23_20_xor1 = ((s_arrmul24_fa23_20_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa22_20_or0 >> 0) & 0x01);
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s_arrmul24_fa23_20_and1 = ((s_arrmul24_fa23_20_xor0 >> 0) & 0x01) & ((s_arrmul24_fa22_20_or0 >> 0) & 0x01);
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s_arrmul24_fa23_20_or0 = ((s_arrmul24_fa23_20_and0 >> 0) & 0x01) | ((s_arrmul24_fa23_20_and1 >> 0) & 0x01);
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s_arrmul24_and0_21 = ((a >> 0) & 0x01) & ((b >> 21) & 0x01);
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s_arrmul24_ha0_21_xor0 = ((s_arrmul24_and0_21 >> 0) & 0x01) ^ ((s_arrmul24_fa1_20_xor1 >> 0) & 0x01);
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s_arrmul24_ha0_21_and0 = ((s_arrmul24_and0_21 >> 0) & 0x01) & ((s_arrmul24_fa1_20_xor1 >> 0) & 0x01);
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s_arrmul24_and1_21 = ((a >> 1) & 0x01) & ((b >> 21) & 0x01);
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s_arrmul24_fa1_21_xor0 = ((s_arrmul24_and1_21 >> 0) & 0x01) ^ ((s_arrmul24_fa2_20_xor1 >> 0) & 0x01);
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s_arrmul24_fa1_21_and0 = ((s_arrmul24_and1_21 >> 0) & 0x01) & ((s_arrmul24_fa2_20_xor1 >> 0) & 0x01);
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s_arrmul24_fa1_21_xor1 = ((s_arrmul24_fa1_21_xor0 >> 0) & 0x01) ^ ((s_arrmul24_ha0_21_and0 >> 0) & 0x01);
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s_arrmul24_fa1_21_and1 = ((s_arrmul24_fa1_21_xor0 >> 0) & 0x01) & ((s_arrmul24_ha0_21_and0 >> 0) & 0x01);
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s_arrmul24_fa1_21_or0 = ((s_arrmul24_fa1_21_and0 >> 0) & 0x01) | ((s_arrmul24_fa1_21_and1 >> 0) & 0x01);
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s_arrmul24_and2_21 = ((a >> 2) & 0x01) & ((b >> 21) & 0x01);
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s_arrmul24_fa2_21_xor0 = ((s_arrmul24_and2_21 >> 0) & 0x01) ^ ((s_arrmul24_fa3_20_xor1 >> 0) & 0x01);
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s_arrmul24_fa2_21_and0 = ((s_arrmul24_and2_21 >> 0) & 0x01) & ((s_arrmul24_fa3_20_xor1 >> 0) & 0x01);
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s_arrmul24_fa2_21_xor1 = ((s_arrmul24_fa2_21_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa1_21_or0 >> 0) & 0x01);
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s_arrmul24_fa2_21_and1 = ((s_arrmul24_fa2_21_xor0 >> 0) & 0x01) & ((s_arrmul24_fa1_21_or0 >> 0) & 0x01);
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s_arrmul24_fa2_21_or0 = ((s_arrmul24_fa2_21_and0 >> 0) & 0x01) | ((s_arrmul24_fa2_21_and1 >> 0) & 0x01);
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s_arrmul24_and3_21 = ((a >> 3) & 0x01) & ((b >> 21) & 0x01);
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s_arrmul24_fa3_21_xor0 = ((s_arrmul24_and3_21 >> 0) & 0x01) ^ ((s_arrmul24_fa4_20_xor1 >> 0) & 0x01);
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s_arrmul24_fa3_21_and0 = ((s_arrmul24_and3_21 >> 0) & 0x01) & ((s_arrmul24_fa4_20_xor1 >> 0) & 0x01);
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s_arrmul24_fa3_21_xor1 = ((s_arrmul24_fa3_21_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa2_21_or0 >> 0) & 0x01);
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s_arrmul24_fa3_21_and1 = ((s_arrmul24_fa3_21_xor0 >> 0) & 0x01) & ((s_arrmul24_fa2_21_or0 >> 0) & 0x01);
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s_arrmul24_fa3_21_or0 = ((s_arrmul24_fa3_21_and0 >> 0) & 0x01) | ((s_arrmul24_fa3_21_and1 >> 0) & 0x01);
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s_arrmul24_and4_21 = ((a >> 4) & 0x01) & ((b >> 21) & 0x01);
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s_arrmul24_fa4_21_xor0 = ((s_arrmul24_and4_21 >> 0) & 0x01) ^ ((s_arrmul24_fa5_20_xor1 >> 0) & 0x01);
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s_arrmul24_fa4_21_and0 = ((s_arrmul24_and4_21 >> 0) & 0x01) & ((s_arrmul24_fa5_20_xor1 >> 0) & 0x01);
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s_arrmul24_fa4_21_xor1 = ((s_arrmul24_fa4_21_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa3_21_or0 >> 0) & 0x01);
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s_arrmul24_fa4_21_and1 = ((s_arrmul24_fa4_21_xor0 >> 0) & 0x01) & ((s_arrmul24_fa3_21_or0 >> 0) & 0x01);
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s_arrmul24_fa4_21_or0 = ((s_arrmul24_fa4_21_and0 >> 0) & 0x01) | ((s_arrmul24_fa4_21_and1 >> 0) & 0x01);
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s_arrmul24_and5_21 = ((a >> 5) & 0x01) & ((b >> 21) & 0x01);
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s_arrmul24_fa5_21_xor0 = ((s_arrmul24_and5_21 >> 0) & 0x01) ^ ((s_arrmul24_fa6_20_xor1 >> 0) & 0x01);
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s_arrmul24_fa5_21_and0 = ((s_arrmul24_and5_21 >> 0) & 0x01) & ((s_arrmul24_fa6_20_xor1 >> 0) & 0x01);
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s_arrmul24_fa5_21_xor1 = ((s_arrmul24_fa5_21_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa4_21_or0 >> 0) & 0x01);
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s_arrmul24_fa5_21_and1 = ((s_arrmul24_fa5_21_xor0 >> 0) & 0x01) & ((s_arrmul24_fa4_21_or0 >> 0) & 0x01);
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s_arrmul24_fa5_21_or0 = ((s_arrmul24_fa5_21_and0 >> 0) & 0x01) | ((s_arrmul24_fa5_21_and1 >> 0) & 0x01);
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s_arrmul24_and6_21 = ((a >> 6) & 0x01) & ((b >> 21) & 0x01);
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s_arrmul24_fa6_21_xor0 = ((s_arrmul24_and6_21 >> 0) & 0x01) ^ ((s_arrmul24_fa7_20_xor1 >> 0) & 0x01);
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s_arrmul24_fa6_21_and0 = ((s_arrmul24_and6_21 >> 0) & 0x01) & ((s_arrmul24_fa7_20_xor1 >> 0) & 0x01);
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s_arrmul24_fa6_21_xor1 = ((s_arrmul24_fa6_21_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa5_21_or0 >> 0) & 0x01);
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s_arrmul24_fa6_21_and1 = ((s_arrmul24_fa6_21_xor0 >> 0) & 0x01) & ((s_arrmul24_fa5_21_or0 >> 0) & 0x01);
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s_arrmul24_fa6_21_or0 = ((s_arrmul24_fa6_21_and0 >> 0) & 0x01) | ((s_arrmul24_fa6_21_and1 >> 0) & 0x01);
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s_arrmul24_and7_21 = ((a >> 7) & 0x01) & ((b >> 21) & 0x01);
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s_arrmul24_fa7_21_xor0 = ((s_arrmul24_and7_21 >> 0) & 0x01) ^ ((s_arrmul24_fa8_20_xor1 >> 0) & 0x01);
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s_arrmul24_fa7_21_and0 = ((s_arrmul24_and7_21 >> 0) & 0x01) & ((s_arrmul24_fa8_20_xor1 >> 0) & 0x01);
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s_arrmul24_fa7_21_xor1 = ((s_arrmul24_fa7_21_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa6_21_or0 >> 0) & 0x01);
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s_arrmul24_fa7_21_and1 = ((s_arrmul24_fa7_21_xor0 >> 0) & 0x01) & ((s_arrmul24_fa6_21_or0 >> 0) & 0x01);
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s_arrmul24_fa7_21_or0 = ((s_arrmul24_fa7_21_and0 >> 0) & 0x01) | ((s_arrmul24_fa7_21_and1 >> 0) & 0x01);
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s_arrmul24_and8_21 = ((a >> 8) & 0x01) & ((b >> 21) & 0x01);
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s_arrmul24_fa8_21_xor0 = ((s_arrmul24_and8_21 >> 0) & 0x01) ^ ((s_arrmul24_fa9_20_xor1 >> 0) & 0x01);
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s_arrmul24_fa8_21_and0 = ((s_arrmul24_and8_21 >> 0) & 0x01) & ((s_arrmul24_fa9_20_xor1 >> 0) & 0x01);
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s_arrmul24_fa8_21_xor1 = ((s_arrmul24_fa8_21_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa7_21_or0 >> 0) & 0x01);
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s_arrmul24_fa8_21_and1 = ((s_arrmul24_fa8_21_xor0 >> 0) & 0x01) & ((s_arrmul24_fa7_21_or0 >> 0) & 0x01);
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s_arrmul24_fa8_21_or0 = ((s_arrmul24_fa8_21_and0 >> 0) & 0x01) | ((s_arrmul24_fa8_21_and1 >> 0) & 0x01);
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s_arrmul24_and9_21 = ((a >> 9) & 0x01) & ((b >> 21) & 0x01);
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s_arrmul24_fa9_21_xor0 = ((s_arrmul24_and9_21 >> 0) & 0x01) ^ ((s_arrmul24_fa10_20_xor1 >> 0) & 0x01);
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s_arrmul24_fa9_21_and0 = ((s_arrmul24_and9_21 >> 0) & 0x01) & ((s_arrmul24_fa10_20_xor1 >> 0) & 0x01);
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s_arrmul24_fa9_21_xor1 = ((s_arrmul24_fa9_21_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa8_21_or0 >> 0) & 0x01);
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s_arrmul24_fa9_21_and1 = ((s_arrmul24_fa9_21_xor0 >> 0) & 0x01) & ((s_arrmul24_fa8_21_or0 >> 0) & 0x01);
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s_arrmul24_fa9_21_or0 = ((s_arrmul24_fa9_21_and0 >> 0) & 0x01) | ((s_arrmul24_fa9_21_and1 >> 0) & 0x01);
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s_arrmul24_and10_21 = ((a >> 10) & 0x01) & ((b >> 21) & 0x01);
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s_arrmul24_fa10_21_xor0 = ((s_arrmul24_and10_21 >> 0) & 0x01) ^ ((s_arrmul24_fa11_20_xor1 >> 0) & 0x01);
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s_arrmul24_fa10_21_and0 = ((s_arrmul24_and10_21 >> 0) & 0x01) & ((s_arrmul24_fa11_20_xor1 >> 0) & 0x01);
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s_arrmul24_fa10_21_xor1 = ((s_arrmul24_fa10_21_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa9_21_or0 >> 0) & 0x01);
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s_arrmul24_fa10_21_and1 = ((s_arrmul24_fa10_21_xor0 >> 0) & 0x01) & ((s_arrmul24_fa9_21_or0 >> 0) & 0x01);
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s_arrmul24_fa10_21_or0 = ((s_arrmul24_fa10_21_and0 >> 0) & 0x01) | ((s_arrmul24_fa10_21_and1 >> 0) & 0x01);
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s_arrmul24_and11_21 = ((a >> 11) & 0x01) & ((b >> 21) & 0x01);
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s_arrmul24_fa11_21_xor0 = ((s_arrmul24_and11_21 >> 0) & 0x01) ^ ((s_arrmul24_fa12_20_xor1 >> 0) & 0x01);
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s_arrmul24_fa11_21_and0 = ((s_arrmul24_and11_21 >> 0) & 0x01) & ((s_arrmul24_fa12_20_xor1 >> 0) & 0x01);
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s_arrmul24_fa11_21_xor1 = ((s_arrmul24_fa11_21_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa10_21_or0 >> 0) & 0x01);
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s_arrmul24_fa11_21_and1 = ((s_arrmul24_fa11_21_xor0 >> 0) & 0x01) & ((s_arrmul24_fa10_21_or0 >> 0) & 0x01);
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s_arrmul24_fa11_21_or0 = ((s_arrmul24_fa11_21_and0 >> 0) & 0x01) | ((s_arrmul24_fa11_21_and1 >> 0) & 0x01);
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s_arrmul24_and12_21 = ((a >> 12) & 0x01) & ((b >> 21) & 0x01);
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s_arrmul24_fa12_21_xor0 = ((s_arrmul24_and12_21 >> 0) & 0x01) ^ ((s_arrmul24_fa13_20_xor1 >> 0) & 0x01);
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s_arrmul24_fa12_21_and0 = ((s_arrmul24_and12_21 >> 0) & 0x01) & ((s_arrmul24_fa13_20_xor1 >> 0) & 0x01);
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s_arrmul24_fa12_21_xor1 = ((s_arrmul24_fa12_21_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa11_21_or0 >> 0) & 0x01);
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s_arrmul24_fa12_21_and1 = ((s_arrmul24_fa12_21_xor0 >> 0) & 0x01) & ((s_arrmul24_fa11_21_or0 >> 0) & 0x01);
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s_arrmul24_fa12_21_or0 = ((s_arrmul24_fa12_21_and0 >> 0) & 0x01) | ((s_arrmul24_fa12_21_and1 >> 0) & 0x01);
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s_arrmul24_and13_21 = ((a >> 13) & 0x01) & ((b >> 21) & 0x01);
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s_arrmul24_fa13_21_xor0 = ((s_arrmul24_and13_21 >> 0) & 0x01) ^ ((s_arrmul24_fa14_20_xor1 >> 0) & 0x01);
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s_arrmul24_fa13_21_and0 = ((s_arrmul24_and13_21 >> 0) & 0x01) & ((s_arrmul24_fa14_20_xor1 >> 0) & 0x01);
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s_arrmul24_fa13_21_xor1 = ((s_arrmul24_fa13_21_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa12_21_or0 >> 0) & 0x01);
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s_arrmul24_fa13_21_and1 = ((s_arrmul24_fa13_21_xor0 >> 0) & 0x01) & ((s_arrmul24_fa12_21_or0 >> 0) & 0x01);
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s_arrmul24_fa13_21_or0 = ((s_arrmul24_fa13_21_and0 >> 0) & 0x01) | ((s_arrmul24_fa13_21_and1 >> 0) & 0x01);
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s_arrmul24_and14_21 = ((a >> 14) & 0x01) & ((b >> 21) & 0x01);
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s_arrmul24_fa14_21_xor0 = ((s_arrmul24_and14_21 >> 0) & 0x01) ^ ((s_arrmul24_fa15_20_xor1 >> 0) & 0x01);
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s_arrmul24_fa14_21_and0 = ((s_arrmul24_and14_21 >> 0) & 0x01) & ((s_arrmul24_fa15_20_xor1 >> 0) & 0x01);
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s_arrmul24_fa14_21_xor1 = ((s_arrmul24_fa14_21_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa13_21_or0 >> 0) & 0x01);
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s_arrmul24_fa14_21_and1 = ((s_arrmul24_fa14_21_xor0 >> 0) & 0x01) & ((s_arrmul24_fa13_21_or0 >> 0) & 0x01);
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s_arrmul24_fa14_21_or0 = ((s_arrmul24_fa14_21_and0 >> 0) & 0x01) | ((s_arrmul24_fa14_21_and1 >> 0) & 0x01);
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s_arrmul24_and15_21 = ((a >> 15) & 0x01) & ((b >> 21) & 0x01);
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s_arrmul24_fa15_21_xor0 = ((s_arrmul24_and15_21 >> 0) & 0x01) ^ ((s_arrmul24_fa16_20_xor1 >> 0) & 0x01);
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s_arrmul24_fa15_21_and0 = ((s_arrmul24_and15_21 >> 0) & 0x01) & ((s_arrmul24_fa16_20_xor1 >> 0) & 0x01);
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s_arrmul24_fa15_21_xor1 = ((s_arrmul24_fa15_21_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa14_21_or0 >> 0) & 0x01);
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s_arrmul24_fa15_21_and1 = ((s_arrmul24_fa15_21_xor0 >> 0) & 0x01) & ((s_arrmul24_fa14_21_or0 >> 0) & 0x01);
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s_arrmul24_fa15_21_or0 = ((s_arrmul24_fa15_21_and0 >> 0) & 0x01) | ((s_arrmul24_fa15_21_and1 >> 0) & 0x01);
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s_arrmul24_and16_21 = ((a >> 16) & 0x01) & ((b >> 21) & 0x01);
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s_arrmul24_fa16_21_xor0 = ((s_arrmul24_and16_21 >> 0) & 0x01) ^ ((s_arrmul24_fa17_20_xor1 >> 0) & 0x01);
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s_arrmul24_fa16_21_and0 = ((s_arrmul24_and16_21 >> 0) & 0x01) & ((s_arrmul24_fa17_20_xor1 >> 0) & 0x01);
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s_arrmul24_fa16_21_xor1 = ((s_arrmul24_fa16_21_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa15_21_or0 >> 0) & 0x01);
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s_arrmul24_fa16_21_and1 = ((s_arrmul24_fa16_21_xor0 >> 0) & 0x01) & ((s_arrmul24_fa15_21_or0 >> 0) & 0x01);
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s_arrmul24_fa16_21_or0 = ((s_arrmul24_fa16_21_and0 >> 0) & 0x01) | ((s_arrmul24_fa16_21_and1 >> 0) & 0x01);
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s_arrmul24_and17_21 = ((a >> 17) & 0x01) & ((b >> 21) & 0x01);
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s_arrmul24_fa17_21_xor0 = ((s_arrmul24_and17_21 >> 0) & 0x01) ^ ((s_arrmul24_fa18_20_xor1 >> 0) & 0x01);
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s_arrmul24_fa17_21_and0 = ((s_arrmul24_and17_21 >> 0) & 0x01) & ((s_arrmul24_fa18_20_xor1 >> 0) & 0x01);
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s_arrmul24_fa17_21_xor1 = ((s_arrmul24_fa17_21_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa16_21_or0 >> 0) & 0x01);
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s_arrmul24_fa17_21_and1 = ((s_arrmul24_fa17_21_xor0 >> 0) & 0x01) & ((s_arrmul24_fa16_21_or0 >> 0) & 0x01);
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s_arrmul24_fa17_21_or0 = ((s_arrmul24_fa17_21_and0 >> 0) & 0x01) | ((s_arrmul24_fa17_21_and1 >> 0) & 0x01);
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s_arrmul24_and18_21 = ((a >> 18) & 0x01) & ((b >> 21) & 0x01);
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s_arrmul24_fa18_21_xor0 = ((s_arrmul24_and18_21 >> 0) & 0x01) ^ ((s_arrmul24_fa19_20_xor1 >> 0) & 0x01);
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s_arrmul24_fa18_21_and0 = ((s_arrmul24_and18_21 >> 0) & 0x01) & ((s_arrmul24_fa19_20_xor1 >> 0) & 0x01);
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s_arrmul24_fa18_21_xor1 = ((s_arrmul24_fa18_21_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa17_21_or0 >> 0) & 0x01);
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s_arrmul24_fa18_21_and1 = ((s_arrmul24_fa18_21_xor0 >> 0) & 0x01) & ((s_arrmul24_fa17_21_or0 >> 0) & 0x01);
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s_arrmul24_fa18_21_or0 = ((s_arrmul24_fa18_21_and0 >> 0) & 0x01) | ((s_arrmul24_fa18_21_and1 >> 0) & 0x01);
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s_arrmul24_and19_21 = ((a >> 19) & 0x01) & ((b >> 21) & 0x01);
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s_arrmul24_fa19_21_xor0 = ((s_arrmul24_and19_21 >> 0) & 0x01) ^ ((s_arrmul24_fa20_20_xor1 >> 0) & 0x01);
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s_arrmul24_fa19_21_and0 = ((s_arrmul24_and19_21 >> 0) & 0x01) & ((s_arrmul24_fa20_20_xor1 >> 0) & 0x01);
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s_arrmul24_fa19_21_xor1 = ((s_arrmul24_fa19_21_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa18_21_or0 >> 0) & 0x01);
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s_arrmul24_fa19_21_and1 = ((s_arrmul24_fa19_21_xor0 >> 0) & 0x01) & ((s_arrmul24_fa18_21_or0 >> 0) & 0x01);
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s_arrmul24_fa19_21_or0 = ((s_arrmul24_fa19_21_and0 >> 0) & 0x01) | ((s_arrmul24_fa19_21_and1 >> 0) & 0x01);
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s_arrmul24_and20_21 = ((a >> 20) & 0x01) & ((b >> 21) & 0x01);
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s_arrmul24_fa20_21_xor0 = ((s_arrmul24_and20_21 >> 0) & 0x01) ^ ((s_arrmul24_fa21_20_xor1 >> 0) & 0x01);
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s_arrmul24_fa20_21_and0 = ((s_arrmul24_and20_21 >> 0) & 0x01) & ((s_arrmul24_fa21_20_xor1 >> 0) & 0x01);
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s_arrmul24_fa20_21_xor1 = ((s_arrmul24_fa20_21_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa19_21_or0 >> 0) & 0x01);
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s_arrmul24_fa20_21_and1 = ((s_arrmul24_fa20_21_xor0 >> 0) & 0x01) & ((s_arrmul24_fa19_21_or0 >> 0) & 0x01);
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s_arrmul24_fa20_21_or0 = ((s_arrmul24_fa20_21_and0 >> 0) & 0x01) | ((s_arrmul24_fa20_21_and1 >> 0) & 0x01);
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s_arrmul24_and21_21 = ((a >> 21) & 0x01) & ((b >> 21) & 0x01);
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s_arrmul24_fa21_21_xor0 = ((s_arrmul24_and21_21 >> 0) & 0x01) ^ ((s_arrmul24_fa22_20_xor1 >> 0) & 0x01);
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s_arrmul24_fa21_21_and0 = ((s_arrmul24_and21_21 >> 0) & 0x01) & ((s_arrmul24_fa22_20_xor1 >> 0) & 0x01);
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s_arrmul24_fa21_21_xor1 = ((s_arrmul24_fa21_21_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa20_21_or0 >> 0) & 0x01);
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s_arrmul24_fa21_21_and1 = ((s_arrmul24_fa21_21_xor0 >> 0) & 0x01) & ((s_arrmul24_fa20_21_or0 >> 0) & 0x01);
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s_arrmul24_fa21_21_or0 = ((s_arrmul24_fa21_21_and0 >> 0) & 0x01) | ((s_arrmul24_fa21_21_and1 >> 0) & 0x01);
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s_arrmul24_and22_21 = ((a >> 22) & 0x01) & ((b >> 21) & 0x01);
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s_arrmul24_fa22_21_xor0 = ((s_arrmul24_and22_21 >> 0) & 0x01) ^ ((s_arrmul24_fa23_20_xor1 >> 0) & 0x01);
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s_arrmul24_fa22_21_and0 = ((s_arrmul24_and22_21 >> 0) & 0x01) & ((s_arrmul24_fa23_20_xor1 >> 0) & 0x01);
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s_arrmul24_fa22_21_xor1 = ((s_arrmul24_fa22_21_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa21_21_or0 >> 0) & 0x01);
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s_arrmul24_fa22_21_and1 = ((s_arrmul24_fa22_21_xor0 >> 0) & 0x01) & ((s_arrmul24_fa21_21_or0 >> 0) & 0x01);
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s_arrmul24_fa22_21_or0 = ((s_arrmul24_fa22_21_and0 >> 0) & 0x01) | ((s_arrmul24_fa22_21_and1 >> 0) & 0x01);
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s_arrmul24_nand23_21 = ~(((a >> 23) & 0x01) & ((b >> 21) & 0x01)) & 0x01;
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s_arrmul24_fa23_21_xor0 = ((s_arrmul24_nand23_21 >> 0) & 0x01) ^ ((s_arrmul24_fa23_20_or0 >> 0) & 0x01);
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s_arrmul24_fa23_21_and0 = ((s_arrmul24_nand23_21 >> 0) & 0x01) & ((s_arrmul24_fa23_20_or0 >> 0) & 0x01);
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s_arrmul24_fa23_21_xor1 = ((s_arrmul24_fa23_21_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa22_21_or0 >> 0) & 0x01);
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s_arrmul24_fa23_21_and1 = ((s_arrmul24_fa23_21_xor0 >> 0) & 0x01) & ((s_arrmul24_fa22_21_or0 >> 0) & 0x01);
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s_arrmul24_fa23_21_or0 = ((s_arrmul24_fa23_21_and0 >> 0) & 0x01) | ((s_arrmul24_fa23_21_and1 >> 0) & 0x01);
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s_arrmul24_and0_22 = ((a >> 0) & 0x01) & ((b >> 22) & 0x01);
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s_arrmul24_ha0_22_xor0 = ((s_arrmul24_and0_22 >> 0) & 0x01) ^ ((s_arrmul24_fa1_21_xor1 >> 0) & 0x01);
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s_arrmul24_ha0_22_and0 = ((s_arrmul24_and0_22 >> 0) & 0x01) & ((s_arrmul24_fa1_21_xor1 >> 0) & 0x01);
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s_arrmul24_and1_22 = ((a >> 1) & 0x01) & ((b >> 22) & 0x01);
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s_arrmul24_fa1_22_xor0 = ((s_arrmul24_and1_22 >> 0) & 0x01) ^ ((s_arrmul24_fa2_21_xor1 >> 0) & 0x01);
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s_arrmul24_fa1_22_and0 = ((s_arrmul24_and1_22 >> 0) & 0x01) & ((s_arrmul24_fa2_21_xor1 >> 0) & 0x01);
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s_arrmul24_fa1_22_xor1 = ((s_arrmul24_fa1_22_xor0 >> 0) & 0x01) ^ ((s_arrmul24_ha0_22_and0 >> 0) & 0x01);
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s_arrmul24_fa1_22_and1 = ((s_arrmul24_fa1_22_xor0 >> 0) & 0x01) & ((s_arrmul24_ha0_22_and0 >> 0) & 0x01);
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s_arrmul24_fa1_22_or0 = ((s_arrmul24_fa1_22_and0 >> 0) & 0x01) | ((s_arrmul24_fa1_22_and1 >> 0) & 0x01);
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s_arrmul24_and2_22 = ((a >> 2) & 0x01) & ((b >> 22) & 0x01);
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s_arrmul24_fa2_22_xor0 = ((s_arrmul24_and2_22 >> 0) & 0x01) ^ ((s_arrmul24_fa3_21_xor1 >> 0) & 0x01);
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s_arrmul24_fa2_22_and0 = ((s_arrmul24_and2_22 >> 0) & 0x01) & ((s_arrmul24_fa3_21_xor1 >> 0) & 0x01);
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s_arrmul24_fa2_22_xor1 = ((s_arrmul24_fa2_22_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa1_22_or0 >> 0) & 0x01);
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s_arrmul24_fa2_22_and1 = ((s_arrmul24_fa2_22_xor0 >> 0) & 0x01) & ((s_arrmul24_fa1_22_or0 >> 0) & 0x01);
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s_arrmul24_fa2_22_or0 = ((s_arrmul24_fa2_22_and0 >> 0) & 0x01) | ((s_arrmul24_fa2_22_and1 >> 0) & 0x01);
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s_arrmul24_and3_22 = ((a >> 3) & 0x01) & ((b >> 22) & 0x01);
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s_arrmul24_fa3_22_xor0 = ((s_arrmul24_and3_22 >> 0) & 0x01) ^ ((s_arrmul24_fa4_21_xor1 >> 0) & 0x01);
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s_arrmul24_fa3_22_and0 = ((s_arrmul24_and3_22 >> 0) & 0x01) & ((s_arrmul24_fa4_21_xor1 >> 0) & 0x01);
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s_arrmul24_fa3_22_xor1 = ((s_arrmul24_fa3_22_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa2_22_or0 >> 0) & 0x01);
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s_arrmul24_fa3_22_and1 = ((s_arrmul24_fa3_22_xor0 >> 0) & 0x01) & ((s_arrmul24_fa2_22_or0 >> 0) & 0x01);
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s_arrmul24_fa3_22_or0 = ((s_arrmul24_fa3_22_and0 >> 0) & 0x01) | ((s_arrmul24_fa3_22_and1 >> 0) & 0x01);
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s_arrmul24_and4_22 = ((a >> 4) & 0x01) & ((b >> 22) & 0x01);
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s_arrmul24_fa4_22_xor0 = ((s_arrmul24_and4_22 >> 0) & 0x01) ^ ((s_arrmul24_fa5_21_xor1 >> 0) & 0x01);
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s_arrmul24_fa4_22_and0 = ((s_arrmul24_and4_22 >> 0) & 0x01) & ((s_arrmul24_fa5_21_xor1 >> 0) & 0x01);
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s_arrmul24_fa4_22_xor1 = ((s_arrmul24_fa4_22_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa3_22_or0 >> 0) & 0x01);
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s_arrmul24_fa4_22_and1 = ((s_arrmul24_fa4_22_xor0 >> 0) & 0x01) & ((s_arrmul24_fa3_22_or0 >> 0) & 0x01);
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s_arrmul24_fa4_22_or0 = ((s_arrmul24_fa4_22_and0 >> 0) & 0x01) | ((s_arrmul24_fa4_22_and1 >> 0) & 0x01);
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s_arrmul24_and5_22 = ((a >> 5) & 0x01) & ((b >> 22) & 0x01);
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s_arrmul24_fa5_22_xor0 = ((s_arrmul24_and5_22 >> 0) & 0x01) ^ ((s_arrmul24_fa6_21_xor1 >> 0) & 0x01);
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s_arrmul24_fa5_22_and0 = ((s_arrmul24_and5_22 >> 0) & 0x01) & ((s_arrmul24_fa6_21_xor1 >> 0) & 0x01);
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s_arrmul24_fa5_22_xor1 = ((s_arrmul24_fa5_22_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa4_22_or0 >> 0) & 0x01);
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s_arrmul24_fa5_22_and1 = ((s_arrmul24_fa5_22_xor0 >> 0) & 0x01) & ((s_arrmul24_fa4_22_or0 >> 0) & 0x01);
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s_arrmul24_fa5_22_or0 = ((s_arrmul24_fa5_22_and0 >> 0) & 0x01) | ((s_arrmul24_fa5_22_and1 >> 0) & 0x01);
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s_arrmul24_and6_22 = ((a >> 6) & 0x01) & ((b >> 22) & 0x01);
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s_arrmul24_fa6_22_xor0 = ((s_arrmul24_and6_22 >> 0) & 0x01) ^ ((s_arrmul24_fa7_21_xor1 >> 0) & 0x01);
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s_arrmul24_fa6_22_and0 = ((s_arrmul24_and6_22 >> 0) & 0x01) & ((s_arrmul24_fa7_21_xor1 >> 0) & 0x01);
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s_arrmul24_fa6_22_xor1 = ((s_arrmul24_fa6_22_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa5_22_or0 >> 0) & 0x01);
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s_arrmul24_fa6_22_and1 = ((s_arrmul24_fa6_22_xor0 >> 0) & 0x01) & ((s_arrmul24_fa5_22_or0 >> 0) & 0x01);
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s_arrmul24_fa6_22_or0 = ((s_arrmul24_fa6_22_and0 >> 0) & 0x01) | ((s_arrmul24_fa6_22_and1 >> 0) & 0x01);
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s_arrmul24_and7_22 = ((a >> 7) & 0x01) & ((b >> 22) & 0x01);
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s_arrmul24_fa7_22_xor0 = ((s_arrmul24_and7_22 >> 0) & 0x01) ^ ((s_arrmul24_fa8_21_xor1 >> 0) & 0x01);
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s_arrmul24_fa7_22_and0 = ((s_arrmul24_and7_22 >> 0) & 0x01) & ((s_arrmul24_fa8_21_xor1 >> 0) & 0x01);
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s_arrmul24_fa7_22_xor1 = ((s_arrmul24_fa7_22_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa6_22_or0 >> 0) & 0x01);
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s_arrmul24_fa7_22_and1 = ((s_arrmul24_fa7_22_xor0 >> 0) & 0x01) & ((s_arrmul24_fa6_22_or0 >> 0) & 0x01);
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s_arrmul24_fa7_22_or0 = ((s_arrmul24_fa7_22_and0 >> 0) & 0x01) | ((s_arrmul24_fa7_22_and1 >> 0) & 0x01);
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s_arrmul24_and8_22 = ((a >> 8) & 0x01) & ((b >> 22) & 0x01);
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s_arrmul24_fa8_22_xor0 = ((s_arrmul24_and8_22 >> 0) & 0x01) ^ ((s_arrmul24_fa9_21_xor1 >> 0) & 0x01);
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s_arrmul24_fa8_22_and0 = ((s_arrmul24_and8_22 >> 0) & 0x01) & ((s_arrmul24_fa9_21_xor1 >> 0) & 0x01);
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s_arrmul24_fa8_22_xor1 = ((s_arrmul24_fa8_22_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa7_22_or0 >> 0) & 0x01);
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s_arrmul24_fa8_22_and1 = ((s_arrmul24_fa8_22_xor0 >> 0) & 0x01) & ((s_arrmul24_fa7_22_or0 >> 0) & 0x01);
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s_arrmul24_fa8_22_or0 = ((s_arrmul24_fa8_22_and0 >> 0) & 0x01) | ((s_arrmul24_fa8_22_and1 >> 0) & 0x01);
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s_arrmul24_and9_22 = ((a >> 9) & 0x01) & ((b >> 22) & 0x01);
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s_arrmul24_fa9_22_xor0 = ((s_arrmul24_and9_22 >> 0) & 0x01) ^ ((s_arrmul24_fa10_21_xor1 >> 0) & 0x01);
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s_arrmul24_fa9_22_and0 = ((s_arrmul24_and9_22 >> 0) & 0x01) & ((s_arrmul24_fa10_21_xor1 >> 0) & 0x01);
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s_arrmul24_fa9_22_xor1 = ((s_arrmul24_fa9_22_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa8_22_or0 >> 0) & 0x01);
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s_arrmul24_fa9_22_and1 = ((s_arrmul24_fa9_22_xor0 >> 0) & 0x01) & ((s_arrmul24_fa8_22_or0 >> 0) & 0x01);
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s_arrmul24_fa9_22_or0 = ((s_arrmul24_fa9_22_and0 >> 0) & 0x01) | ((s_arrmul24_fa9_22_and1 >> 0) & 0x01);
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s_arrmul24_and10_22 = ((a >> 10) & 0x01) & ((b >> 22) & 0x01);
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s_arrmul24_fa10_22_xor0 = ((s_arrmul24_and10_22 >> 0) & 0x01) ^ ((s_arrmul24_fa11_21_xor1 >> 0) & 0x01);
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s_arrmul24_fa10_22_and0 = ((s_arrmul24_and10_22 >> 0) & 0x01) & ((s_arrmul24_fa11_21_xor1 >> 0) & 0x01);
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s_arrmul24_fa10_22_xor1 = ((s_arrmul24_fa10_22_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa9_22_or0 >> 0) & 0x01);
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s_arrmul24_fa10_22_and1 = ((s_arrmul24_fa10_22_xor0 >> 0) & 0x01) & ((s_arrmul24_fa9_22_or0 >> 0) & 0x01);
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s_arrmul24_fa10_22_or0 = ((s_arrmul24_fa10_22_and0 >> 0) & 0x01) | ((s_arrmul24_fa10_22_and1 >> 0) & 0x01);
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s_arrmul24_and11_22 = ((a >> 11) & 0x01) & ((b >> 22) & 0x01);
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s_arrmul24_fa11_22_xor0 = ((s_arrmul24_and11_22 >> 0) & 0x01) ^ ((s_arrmul24_fa12_21_xor1 >> 0) & 0x01);
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s_arrmul24_fa11_22_and0 = ((s_arrmul24_and11_22 >> 0) & 0x01) & ((s_arrmul24_fa12_21_xor1 >> 0) & 0x01);
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s_arrmul24_fa11_22_xor1 = ((s_arrmul24_fa11_22_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa10_22_or0 >> 0) & 0x01);
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s_arrmul24_fa11_22_and1 = ((s_arrmul24_fa11_22_xor0 >> 0) & 0x01) & ((s_arrmul24_fa10_22_or0 >> 0) & 0x01);
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s_arrmul24_fa11_22_or0 = ((s_arrmul24_fa11_22_and0 >> 0) & 0x01) | ((s_arrmul24_fa11_22_and1 >> 0) & 0x01);
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s_arrmul24_and12_22 = ((a >> 12) & 0x01) & ((b >> 22) & 0x01);
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s_arrmul24_fa12_22_xor0 = ((s_arrmul24_and12_22 >> 0) & 0x01) ^ ((s_arrmul24_fa13_21_xor1 >> 0) & 0x01);
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s_arrmul24_fa12_22_and0 = ((s_arrmul24_and12_22 >> 0) & 0x01) & ((s_arrmul24_fa13_21_xor1 >> 0) & 0x01);
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s_arrmul24_fa12_22_xor1 = ((s_arrmul24_fa12_22_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa11_22_or0 >> 0) & 0x01);
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s_arrmul24_fa12_22_and1 = ((s_arrmul24_fa12_22_xor0 >> 0) & 0x01) & ((s_arrmul24_fa11_22_or0 >> 0) & 0x01);
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s_arrmul24_fa12_22_or0 = ((s_arrmul24_fa12_22_and0 >> 0) & 0x01) | ((s_arrmul24_fa12_22_and1 >> 0) & 0x01);
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s_arrmul24_and13_22 = ((a >> 13) & 0x01) & ((b >> 22) & 0x01);
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s_arrmul24_fa13_22_xor0 = ((s_arrmul24_and13_22 >> 0) & 0x01) ^ ((s_arrmul24_fa14_21_xor1 >> 0) & 0x01);
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s_arrmul24_fa13_22_and0 = ((s_arrmul24_and13_22 >> 0) & 0x01) & ((s_arrmul24_fa14_21_xor1 >> 0) & 0x01);
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s_arrmul24_fa13_22_xor1 = ((s_arrmul24_fa13_22_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa12_22_or0 >> 0) & 0x01);
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s_arrmul24_fa13_22_and1 = ((s_arrmul24_fa13_22_xor0 >> 0) & 0x01) & ((s_arrmul24_fa12_22_or0 >> 0) & 0x01);
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s_arrmul24_fa13_22_or0 = ((s_arrmul24_fa13_22_and0 >> 0) & 0x01) | ((s_arrmul24_fa13_22_and1 >> 0) & 0x01);
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s_arrmul24_and14_22 = ((a >> 14) & 0x01) & ((b >> 22) & 0x01);
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s_arrmul24_fa14_22_xor0 = ((s_arrmul24_and14_22 >> 0) & 0x01) ^ ((s_arrmul24_fa15_21_xor1 >> 0) & 0x01);
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s_arrmul24_fa14_22_and0 = ((s_arrmul24_and14_22 >> 0) & 0x01) & ((s_arrmul24_fa15_21_xor1 >> 0) & 0x01);
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s_arrmul24_fa14_22_xor1 = ((s_arrmul24_fa14_22_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa13_22_or0 >> 0) & 0x01);
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s_arrmul24_fa14_22_and1 = ((s_arrmul24_fa14_22_xor0 >> 0) & 0x01) & ((s_arrmul24_fa13_22_or0 >> 0) & 0x01);
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s_arrmul24_fa14_22_or0 = ((s_arrmul24_fa14_22_and0 >> 0) & 0x01) | ((s_arrmul24_fa14_22_and1 >> 0) & 0x01);
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s_arrmul24_and15_22 = ((a >> 15) & 0x01) & ((b >> 22) & 0x01);
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s_arrmul24_fa15_22_xor0 = ((s_arrmul24_and15_22 >> 0) & 0x01) ^ ((s_arrmul24_fa16_21_xor1 >> 0) & 0x01);
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s_arrmul24_fa15_22_and0 = ((s_arrmul24_and15_22 >> 0) & 0x01) & ((s_arrmul24_fa16_21_xor1 >> 0) & 0x01);
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s_arrmul24_fa15_22_xor1 = ((s_arrmul24_fa15_22_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa14_22_or0 >> 0) & 0x01);
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s_arrmul24_fa15_22_and1 = ((s_arrmul24_fa15_22_xor0 >> 0) & 0x01) & ((s_arrmul24_fa14_22_or0 >> 0) & 0x01);
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s_arrmul24_fa15_22_or0 = ((s_arrmul24_fa15_22_and0 >> 0) & 0x01) | ((s_arrmul24_fa15_22_and1 >> 0) & 0x01);
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s_arrmul24_and16_22 = ((a >> 16) & 0x01) & ((b >> 22) & 0x01);
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s_arrmul24_fa16_22_xor0 = ((s_arrmul24_and16_22 >> 0) & 0x01) ^ ((s_arrmul24_fa17_21_xor1 >> 0) & 0x01);
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s_arrmul24_fa16_22_and0 = ((s_arrmul24_and16_22 >> 0) & 0x01) & ((s_arrmul24_fa17_21_xor1 >> 0) & 0x01);
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s_arrmul24_fa16_22_xor1 = ((s_arrmul24_fa16_22_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa15_22_or0 >> 0) & 0x01);
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s_arrmul24_fa16_22_and1 = ((s_arrmul24_fa16_22_xor0 >> 0) & 0x01) & ((s_arrmul24_fa15_22_or0 >> 0) & 0x01);
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s_arrmul24_fa16_22_or0 = ((s_arrmul24_fa16_22_and0 >> 0) & 0x01) | ((s_arrmul24_fa16_22_and1 >> 0) & 0x01);
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s_arrmul24_and17_22 = ((a >> 17) & 0x01) & ((b >> 22) & 0x01);
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s_arrmul24_fa17_22_xor0 = ((s_arrmul24_and17_22 >> 0) & 0x01) ^ ((s_arrmul24_fa18_21_xor1 >> 0) & 0x01);
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s_arrmul24_fa17_22_and0 = ((s_arrmul24_and17_22 >> 0) & 0x01) & ((s_arrmul24_fa18_21_xor1 >> 0) & 0x01);
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s_arrmul24_fa17_22_xor1 = ((s_arrmul24_fa17_22_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa16_22_or0 >> 0) & 0x01);
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s_arrmul24_fa17_22_and1 = ((s_arrmul24_fa17_22_xor0 >> 0) & 0x01) & ((s_arrmul24_fa16_22_or0 >> 0) & 0x01);
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s_arrmul24_fa17_22_or0 = ((s_arrmul24_fa17_22_and0 >> 0) & 0x01) | ((s_arrmul24_fa17_22_and1 >> 0) & 0x01);
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s_arrmul24_and18_22 = ((a >> 18) & 0x01) & ((b >> 22) & 0x01);
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s_arrmul24_fa18_22_xor0 = ((s_arrmul24_and18_22 >> 0) & 0x01) ^ ((s_arrmul24_fa19_21_xor1 >> 0) & 0x01);
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s_arrmul24_fa18_22_and0 = ((s_arrmul24_and18_22 >> 0) & 0x01) & ((s_arrmul24_fa19_21_xor1 >> 0) & 0x01);
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s_arrmul24_fa18_22_xor1 = ((s_arrmul24_fa18_22_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa17_22_or0 >> 0) & 0x01);
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s_arrmul24_fa18_22_and1 = ((s_arrmul24_fa18_22_xor0 >> 0) & 0x01) & ((s_arrmul24_fa17_22_or0 >> 0) & 0x01);
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s_arrmul24_fa18_22_or0 = ((s_arrmul24_fa18_22_and0 >> 0) & 0x01) | ((s_arrmul24_fa18_22_and1 >> 0) & 0x01);
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s_arrmul24_and19_22 = ((a >> 19) & 0x01) & ((b >> 22) & 0x01);
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s_arrmul24_fa19_22_xor0 = ((s_arrmul24_and19_22 >> 0) & 0x01) ^ ((s_arrmul24_fa20_21_xor1 >> 0) & 0x01);
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s_arrmul24_fa19_22_and0 = ((s_arrmul24_and19_22 >> 0) & 0x01) & ((s_arrmul24_fa20_21_xor1 >> 0) & 0x01);
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s_arrmul24_fa19_22_xor1 = ((s_arrmul24_fa19_22_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa18_22_or0 >> 0) & 0x01);
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s_arrmul24_fa19_22_and1 = ((s_arrmul24_fa19_22_xor0 >> 0) & 0x01) & ((s_arrmul24_fa18_22_or0 >> 0) & 0x01);
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s_arrmul24_fa19_22_or0 = ((s_arrmul24_fa19_22_and0 >> 0) & 0x01) | ((s_arrmul24_fa19_22_and1 >> 0) & 0x01);
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s_arrmul24_and20_22 = ((a >> 20) & 0x01) & ((b >> 22) & 0x01);
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s_arrmul24_fa20_22_xor0 = ((s_arrmul24_and20_22 >> 0) & 0x01) ^ ((s_arrmul24_fa21_21_xor1 >> 0) & 0x01);
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s_arrmul24_fa20_22_and0 = ((s_arrmul24_and20_22 >> 0) & 0x01) & ((s_arrmul24_fa21_21_xor1 >> 0) & 0x01);
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s_arrmul24_fa20_22_xor1 = ((s_arrmul24_fa20_22_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa19_22_or0 >> 0) & 0x01);
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s_arrmul24_fa20_22_and1 = ((s_arrmul24_fa20_22_xor0 >> 0) & 0x01) & ((s_arrmul24_fa19_22_or0 >> 0) & 0x01);
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s_arrmul24_fa20_22_or0 = ((s_arrmul24_fa20_22_and0 >> 0) & 0x01) | ((s_arrmul24_fa20_22_and1 >> 0) & 0x01);
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s_arrmul24_and21_22 = ((a >> 21) & 0x01) & ((b >> 22) & 0x01);
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s_arrmul24_fa21_22_xor0 = ((s_arrmul24_and21_22 >> 0) & 0x01) ^ ((s_arrmul24_fa22_21_xor1 >> 0) & 0x01);
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s_arrmul24_fa21_22_and0 = ((s_arrmul24_and21_22 >> 0) & 0x01) & ((s_arrmul24_fa22_21_xor1 >> 0) & 0x01);
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s_arrmul24_fa21_22_xor1 = ((s_arrmul24_fa21_22_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa20_22_or0 >> 0) & 0x01);
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s_arrmul24_fa21_22_and1 = ((s_arrmul24_fa21_22_xor0 >> 0) & 0x01) & ((s_arrmul24_fa20_22_or0 >> 0) & 0x01);
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s_arrmul24_fa21_22_or0 = ((s_arrmul24_fa21_22_and0 >> 0) & 0x01) | ((s_arrmul24_fa21_22_and1 >> 0) & 0x01);
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s_arrmul24_and22_22 = ((a >> 22) & 0x01) & ((b >> 22) & 0x01);
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s_arrmul24_fa22_22_xor0 = ((s_arrmul24_and22_22 >> 0) & 0x01) ^ ((s_arrmul24_fa23_21_xor1 >> 0) & 0x01);
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s_arrmul24_fa22_22_and0 = ((s_arrmul24_and22_22 >> 0) & 0x01) & ((s_arrmul24_fa23_21_xor1 >> 0) & 0x01);
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s_arrmul24_fa22_22_xor1 = ((s_arrmul24_fa22_22_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa21_22_or0 >> 0) & 0x01);
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s_arrmul24_fa22_22_and1 = ((s_arrmul24_fa22_22_xor0 >> 0) & 0x01) & ((s_arrmul24_fa21_22_or0 >> 0) & 0x01);
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s_arrmul24_fa22_22_or0 = ((s_arrmul24_fa22_22_and0 >> 0) & 0x01) | ((s_arrmul24_fa22_22_and1 >> 0) & 0x01);
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s_arrmul24_nand23_22 = ~(((a >> 23) & 0x01) & ((b >> 22) & 0x01)) & 0x01;
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s_arrmul24_fa23_22_xor0 = ((s_arrmul24_nand23_22 >> 0) & 0x01) ^ ((s_arrmul24_fa23_21_or0 >> 0) & 0x01);
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s_arrmul24_fa23_22_and0 = ((s_arrmul24_nand23_22 >> 0) & 0x01) & ((s_arrmul24_fa23_21_or0 >> 0) & 0x01);
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s_arrmul24_fa23_22_xor1 = ((s_arrmul24_fa23_22_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa22_22_or0 >> 0) & 0x01);
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s_arrmul24_fa23_22_and1 = ((s_arrmul24_fa23_22_xor0 >> 0) & 0x01) & ((s_arrmul24_fa22_22_or0 >> 0) & 0x01);
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s_arrmul24_fa23_22_or0 = ((s_arrmul24_fa23_22_and0 >> 0) & 0x01) | ((s_arrmul24_fa23_22_and1 >> 0) & 0x01);
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s_arrmul24_nand0_23 = ~(((a >> 0) & 0x01) & ((b >> 23) & 0x01)) & 0x01;
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s_arrmul24_ha0_23_xor0 = ((s_arrmul24_nand0_23 >> 0) & 0x01) ^ ((s_arrmul24_fa1_22_xor1 >> 0) & 0x01);
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s_arrmul24_ha0_23_and0 = ((s_arrmul24_nand0_23 >> 0) & 0x01) & ((s_arrmul24_fa1_22_xor1 >> 0) & 0x01);
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s_arrmul24_nand1_23 = ~(((a >> 1) & 0x01) & ((b >> 23) & 0x01)) & 0x01;
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s_arrmul24_fa1_23_xor0 = ((s_arrmul24_nand1_23 >> 0) & 0x01) ^ ((s_arrmul24_fa2_22_xor1 >> 0) & 0x01);
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s_arrmul24_fa1_23_and0 = ((s_arrmul24_nand1_23 >> 0) & 0x01) & ((s_arrmul24_fa2_22_xor1 >> 0) & 0x01);
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s_arrmul24_fa1_23_xor1 = ((s_arrmul24_fa1_23_xor0 >> 0) & 0x01) ^ ((s_arrmul24_ha0_23_and0 >> 0) & 0x01);
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s_arrmul24_fa1_23_and1 = ((s_arrmul24_fa1_23_xor0 >> 0) & 0x01) & ((s_arrmul24_ha0_23_and0 >> 0) & 0x01);
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s_arrmul24_fa1_23_or0 = ((s_arrmul24_fa1_23_and0 >> 0) & 0x01) | ((s_arrmul24_fa1_23_and1 >> 0) & 0x01);
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s_arrmul24_nand2_23 = ~(((a >> 2) & 0x01) & ((b >> 23) & 0x01)) & 0x01;
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s_arrmul24_fa2_23_xor0 = ((s_arrmul24_nand2_23 >> 0) & 0x01) ^ ((s_arrmul24_fa3_22_xor1 >> 0) & 0x01);
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s_arrmul24_fa2_23_and0 = ((s_arrmul24_nand2_23 >> 0) & 0x01) & ((s_arrmul24_fa3_22_xor1 >> 0) & 0x01);
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s_arrmul24_fa2_23_xor1 = ((s_arrmul24_fa2_23_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa1_23_or0 >> 0) & 0x01);
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s_arrmul24_fa2_23_and1 = ((s_arrmul24_fa2_23_xor0 >> 0) & 0x01) & ((s_arrmul24_fa1_23_or0 >> 0) & 0x01);
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s_arrmul24_fa2_23_or0 = ((s_arrmul24_fa2_23_and0 >> 0) & 0x01) | ((s_arrmul24_fa2_23_and1 >> 0) & 0x01);
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s_arrmul24_nand3_23 = ~(((a >> 3) & 0x01) & ((b >> 23) & 0x01)) & 0x01;
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s_arrmul24_fa3_23_xor0 = ((s_arrmul24_nand3_23 >> 0) & 0x01) ^ ((s_arrmul24_fa4_22_xor1 >> 0) & 0x01);
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s_arrmul24_fa3_23_and0 = ((s_arrmul24_nand3_23 >> 0) & 0x01) & ((s_arrmul24_fa4_22_xor1 >> 0) & 0x01);
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s_arrmul24_fa3_23_xor1 = ((s_arrmul24_fa3_23_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa2_23_or0 >> 0) & 0x01);
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s_arrmul24_fa3_23_and1 = ((s_arrmul24_fa3_23_xor0 >> 0) & 0x01) & ((s_arrmul24_fa2_23_or0 >> 0) & 0x01);
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s_arrmul24_fa3_23_or0 = ((s_arrmul24_fa3_23_and0 >> 0) & 0x01) | ((s_arrmul24_fa3_23_and1 >> 0) & 0x01);
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s_arrmul24_nand4_23 = ~(((a >> 4) & 0x01) & ((b >> 23) & 0x01)) & 0x01;
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s_arrmul24_fa4_23_xor0 = ((s_arrmul24_nand4_23 >> 0) & 0x01) ^ ((s_arrmul24_fa5_22_xor1 >> 0) & 0x01);
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s_arrmul24_fa4_23_and0 = ((s_arrmul24_nand4_23 >> 0) & 0x01) & ((s_arrmul24_fa5_22_xor1 >> 0) & 0x01);
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s_arrmul24_fa4_23_xor1 = ((s_arrmul24_fa4_23_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa3_23_or0 >> 0) & 0x01);
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s_arrmul24_fa4_23_and1 = ((s_arrmul24_fa4_23_xor0 >> 0) & 0x01) & ((s_arrmul24_fa3_23_or0 >> 0) & 0x01);
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s_arrmul24_fa4_23_or0 = ((s_arrmul24_fa4_23_and0 >> 0) & 0x01) | ((s_arrmul24_fa4_23_and1 >> 0) & 0x01);
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s_arrmul24_nand5_23 = ~(((a >> 5) & 0x01) & ((b >> 23) & 0x01)) & 0x01;
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s_arrmul24_fa5_23_xor0 = ((s_arrmul24_nand5_23 >> 0) & 0x01) ^ ((s_arrmul24_fa6_22_xor1 >> 0) & 0x01);
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s_arrmul24_fa5_23_and0 = ((s_arrmul24_nand5_23 >> 0) & 0x01) & ((s_arrmul24_fa6_22_xor1 >> 0) & 0x01);
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s_arrmul24_fa5_23_xor1 = ((s_arrmul24_fa5_23_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa4_23_or0 >> 0) & 0x01);
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s_arrmul24_fa5_23_and1 = ((s_arrmul24_fa5_23_xor0 >> 0) & 0x01) & ((s_arrmul24_fa4_23_or0 >> 0) & 0x01);
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s_arrmul24_fa5_23_or0 = ((s_arrmul24_fa5_23_and0 >> 0) & 0x01) | ((s_arrmul24_fa5_23_and1 >> 0) & 0x01);
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s_arrmul24_nand6_23 = ~(((a >> 6) & 0x01) & ((b >> 23) & 0x01)) & 0x01;
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s_arrmul24_fa6_23_xor0 = ((s_arrmul24_nand6_23 >> 0) & 0x01) ^ ((s_arrmul24_fa7_22_xor1 >> 0) & 0x01);
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s_arrmul24_fa6_23_and0 = ((s_arrmul24_nand6_23 >> 0) & 0x01) & ((s_arrmul24_fa7_22_xor1 >> 0) & 0x01);
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s_arrmul24_fa6_23_xor1 = ((s_arrmul24_fa6_23_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa5_23_or0 >> 0) & 0x01);
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s_arrmul24_fa6_23_and1 = ((s_arrmul24_fa6_23_xor0 >> 0) & 0x01) & ((s_arrmul24_fa5_23_or0 >> 0) & 0x01);
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s_arrmul24_fa6_23_or0 = ((s_arrmul24_fa6_23_and0 >> 0) & 0x01) | ((s_arrmul24_fa6_23_and1 >> 0) & 0x01);
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s_arrmul24_nand7_23 = ~(((a >> 7) & 0x01) & ((b >> 23) & 0x01)) & 0x01;
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s_arrmul24_fa7_23_xor0 = ((s_arrmul24_nand7_23 >> 0) & 0x01) ^ ((s_arrmul24_fa8_22_xor1 >> 0) & 0x01);
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s_arrmul24_fa7_23_and0 = ((s_arrmul24_nand7_23 >> 0) & 0x01) & ((s_arrmul24_fa8_22_xor1 >> 0) & 0x01);
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s_arrmul24_fa7_23_xor1 = ((s_arrmul24_fa7_23_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa6_23_or0 >> 0) & 0x01);
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s_arrmul24_fa7_23_and1 = ((s_arrmul24_fa7_23_xor0 >> 0) & 0x01) & ((s_arrmul24_fa6_23_or0 >> 0) & 0x01);
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s_arrmul24_fa7_23_or0 = ((s_arrmul24_fa7_23_and0 >> 0) & 0x01) | ((s_arrmul24_fa7_23_and1 >> 0) & 0x01);
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s_arrmul24_nand8_23 = ~(((a >> 8) & 0x01) & ((b >> 23) & 0x01)) & 0x01;
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s_arrmul24_fa8_23_xor0 = ((s_arrmul24_nand8_23 >> 0) & 0x01) ^ ((s_arrmul24_fa9_22_xor1 >> 0) & 0x01);
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s_arrmul24_fa8_23_and0 = ((s_arrmul24_nand8_23 >> 0) & 0x01) & ((s_arrmul24_fa9_22_xor1 >> 0) & 0x01);
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s_arrmul24_fa8_23_xor1 = ((s_arrmul24_fa8_23_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa7_23_or0 >> 0) & 0x01);
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s_arrmul24_fa8_23_and1 = ((s_arrmul24_fa8_23_xor0 >> 0) & 0x01) & ((s_arrmul24_fa7_23_or0 >> 0) & 0x01);
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s_arrmul24_fa8_23_or0 = ((s_arrmul24_fa8_23_and0 >> 0) & 0x01) | ((s_arrmul24_fa8_23_and1 >> 0) & 0x01);
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s_arrmul24_nand9_23 = ~(((a >> 9) & 0x01) & ((b >> 23) & 0x01)) & 0x01;
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s_arrmul24_fa9_23_xor0 = ((s_arrmul24_nand9_23 >> 0) & 0x01) ^ ((s_arrmul24_fa10_22_xor1 >> 0) & 0x01);
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s_arrmul24_fa9_23_and0 = ((s_arrmul24_nand9_23 >> 0) & 0x01) & ((s_arrmul24_fa10_22_xor1 >> 0) & 0x01);
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s_arrmul24_fa9_23_xor1 = ((s_arrmul24_fa9_23_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa8_23_or0 >> 0) & 0x01);
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s_arrmul24_fa9_23_and1 = ((s_arrmul24_fa9_23_xor0 >> 0) & 0x01) & ((s_arrmul24_fa8_23_or0 >> 0) & 0x01);
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s_arrmul24_fa9_23_or0 = ((s_arrmul24_fa9_23_and0 >> 0) & 0x01) | ((s_arrmul24_fa9_23_and1 >> 0) & 0x01);
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s_arrmul24_nand10_23 = ~(((a >> 10) & 0x01) & ((b >> 23) & 0x01)) & 0x01;
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s_arrmul24_fa10_23_xor0 = ((s_arrmul24_nand10_23 >> 0) & 0x01) ^ ((s_arrmul24_fa11_22_xor1 >> 0) & 0x01);
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s_arrmul24_fa10_23_and0 = ((s_arrmul24_nand10_23 >> 0) & 0x01) & ((s_arrmul24_fa11_22_xor1 >> 0) & 0x01);
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s_arrmul24_fa10_23_xor1 = ((s_arrmul24_fa10_23_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa9_23_or0 >> 0) & 0x01);
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s_arrmul24_fa10_23_and1 = ((s_arrmul24_fa10_23_xor0 >> 0) & 0x01) & ((s_arrmul24_fa9_23_or0 >> 0) & 0x01);
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s_arrmul24_fa10_23_or0 = ((s_arrmul24_fa10_23_and0 >> 0) & 0x01) | ((s_arrmul24_fa10_23_and1 >> 0) & 0x01);
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s_arrmul24_nand11_23 = ~(((a >> 11) & 0x01) & ((b >> 23) & 0x01)) & 0x01;
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s_arrmul24_fa11_23_xor0 = ((s_arrmul24_nand11_23 >> 0) & 0x01) ^ ((s_arrmul24_fa12_22_xor1 >> 0) & 0x01);
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s_arrmul24_fa11_23_and0 = ((s_arrmul24_nand11_23 >> 0) & 0x01) & ((s_arrmul24_fa12_22_xor1 >> 0) & 0x01);
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s_arrmul24_fa11_23_xor1 = ((s_arrmul24_fa11_23_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa10_23_or0 >> 0) & 0x01);
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s_arrmul24_fa11_23_and1 = ((s_arrmul24_fa11_23_xor0 >> 0) & 0x01) & ((s_arrmul24_fa10_23_or0 >> 0) & 0x01);
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s_arrmul24_fa11_23_or0 = ((s_arrmul24_fa11_23_and0 >> 0) & 0x01) | ((s_arrmul24_fa11_23_and1 >> 0) & 0x01);
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s_arrmul24_nand12_23 = ~(((a >> 12) & 0x01) & ((b >> 23) & 0x01)) & 0x01;
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s_arrmul24_fa12_23_xor0 = ((s_arrmul24_nand12_23 >> 0) & 0x01) ^ ((s_arrmul24_fa13_22_xor1 >> 0) & 0x01);
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s_arrmul24_fa12_23_and0 = ((s_arrmul24_nand12_23 >> 0) & 0x01) & ((s_arrmul24_fa13_22_xor1 >> 0) & 0x01);
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s_arrmul24_fa12_23_xor1 = ((s_arrmul24_fa12_23_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa11_23_or0 >> 0) & 0x01);
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s_arrmul24_fa12_23_and1 = ((s_arrmul24_fa12_23_xor0 >> 0) & 0x01) & ((s_arrmul24_fa11_23_or0 >> 0) & 0x01);
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s_arrmul24_fa12_23_or0 = ((s_arrmul24_fa12_23_and0 >> 0) & 0x01) | ((s_arrmul24_fa12_23_and1 >> 0) & 0x01);
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s_arrmul24_nand13_23 = ~(((a >> 13) & 0x01) & ((b >> 23) & 0x01)) & 0x01;
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s_arrmul24_fa13_23_xor0 = ((s_arrmul24_nand13_23 >> 0) & 0x01) ^ ((s_arrmul24_fa14_22_xor1 >> 0) & 0x01);
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s_arrmul24_fa13_23_and0 = ((s_arrmul24_nand13_23 >> 0) & 0x01) & ((s_arrmul24_fa14_22_xor1 >> 0) & 0x01);
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s_arrmul24_fa13_23_xor1 = ((s_arrmul24_fa13_23_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa12_23_or0 >> 0) & 0x01);
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s_arrmul24_fa13_23_and1 = ((s_arrmul24_fa13_23_xor0 >> 0) & 0x01) & ((s_arrmul24_fa12_23_or0 >> 0) & 0x01);
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s_arrmul24_fa13_23_or0 = ((s_arrmul24_fa13_23_and0 >> 0) & 0x01) | ((s_arrmul24_fa13_23_and1 >> 0) & 0x01);
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s_arrmul24_nand14_23 = ~(((a >> 14) & 0x01) & ((b >> 23) & 0x01)) & 0x01;
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s_arrmul24_fa14_23_xor0 = ((s_arrmul24_nand14_23 >> 0) & 0x01) ^ ((s_arrmul24_fa15_22_xor1 >> 0) & 0x01);
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s_arrmul24_fa14_23_and0 = ((s_arrmul24_nand14_23 >> 0) & 0x01) & ((s_arrmul24_fa15_22_xor1 >> 0) & 0x01);
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s_arrmul24_fa14_23_xor1 = ((s_arrmul24_fa14_23_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa13_23_or0 >> 0) & 0x01);
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s_arrmul24_fa14_23_and1 = ((s_arrmul24_fa14_23_xor0 >> 0) & 0x01) & ((s_arrmul24_fa13_23_or0 >> 0) & 0x01);
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s_arrmul24_fa14_23_or0 = ((s_arrmul24_fa14_23_and0 >> 0) & 0x01) | ((s_arrmul24_fa14_23_and1 >> 0) & 0x01);
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s_arrmul24_nand15_23 = ~(((a >> 15) & 0x01) & ((b >> 23) & 0x01)) & 0x01;
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s_arrmul24_fa15_23_xor0 = ((s_arrmul24_nand15_23 >> 0) & 0x01) ^ ((s_arrmul24_fa16_22_xor1 >> 0) & 0x01);
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s_arrmul24_fa15_23_and0 = ((s_arrmul24_nand15_23 >> 0) & 0x01) & ((s_arrmul24_fa16_22_xor1 >> 0) & 0x01);
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s_arrmul24_fa15_23_xor1 = ((s_arrmul24_fa15_23_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa14_23_or0 >> 0) & 0x01);
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s_arrmul24_fa15_23_and1 = ((s_arrmul24_fa15_23_xor0 >> 0) & 0x01) & ((s_arrmul24_fa14_23_or0 >> 0) & 0x01);
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s_arrmul24_fa15_23_or0 = ((s_arrmul24_fa15_23_and0 >> 0) & 0x01) | ((s_arrmul24_fa15_23_and1 >> 0) & 0x01);
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s_arrmul24_nand16_23 = ~(((a >> 16) & 0x01) & ((b >> 23) & 0x01)) & 0x01;
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s_arrmul24_fa16_23_xor0 = ((s_arrmul24_nand16_23 >> 0) & 0x01) ^ ((s_arrmul24_fa17_22_xor1 >> 0) & 0x01);
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s_arrmul24_fa16_23_and0 = ((s_arrmul24_nand16_23 >> 0) & 0x01) & ((s_arrmul24_fa17_22_xor1 >> 0) & 0x01);
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s_arrmul24_fa16_23_xor1 = ((s_arrmul24_fa16_23_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa15_23_or0 >> 0) & 0x01);
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s_arrmul24_fa16_23_and1 = ((s_arrmul24_fa16_23_xor0 >> 0) & 0x01) & ((s_arrmul24_fa15_23_or0 >> 0) & 0x01);
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s_arrmul24_fa16_23_or0 = ((s_arrmul24_fa16_23_and0 >> 0) & 0x01) | ((s_arrmul24_fa16_23_and1 >> 0) & 0x01);
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s_arrmul24_nand17_23 = ~(((a >> 17) & 0x01) & ((b >> 23) & 0x01)) & 0x01;
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s_arrmul24_fa17_23_xor0 = ((s_arrmul24_nand17_23 >> 0) & 0x01) ^ ((s_arrmul24_fa18_22_xor1 >> 0) & 0x01);
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s_arrmul24_fa17_23_and0 = ((s_arrmul24_nand17_23 >> 0) & 0x01) & ((s_arrmul24_fa18_22_xor1 >> 0) & 0x01);
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s_arrmul24_fa17_23_xor1 = ((s_arrmul24_fa17_23_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa16_23_or0 >> 0) & 0x01);
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s_arrmul24_fa17_23_and1 = ((s_arrmul24_fa17_23_xor0 >> 0) & 0x01) & ((s_arrmul24_fa16_23_or0 >> 0) & 0x01);
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s_arrmul24_fa17_23_or0 = ((s_arrmul24_fa17_23_and0 >> 0) & 0x01) | ((s_arrmul24_fa17_23_and1 >> 0) & 0x01);
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s_arrmul24_nand18_23 = ~(((a >> 18) & 0x01) & ((b >> 23) & 0x01)) & 0x01;
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s_arrmul24_fa18_23_xor0 = ((s_arrmul24_nand18_23 >> 0) & 0x01) ^ ((s_arrmul24_fa19_22_xor1 >> 0) & 0x01);
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s_arrmul24_fa18_23_and0 = ((s_arrmul24_nand18_23 >> 0) & 0x01) & ((s_arrmul24_fa19_22_xor1 >> 0) & 0x01);
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s_arrmul24_fa18_23_xor1 = ((s_arrmul24_fa18_23_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa17_23_or0 >> 0) & 0x01);
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s_arrmul24_fa18_23_and1 = ((s_arrmul24_fa18_23_xor0 >> 0) & 0x01) & ((s_arrmul24_fa17_23_or0 >> 0) & 0x01);
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s_arrmul24_fa18_23_or0 = ((s_arrmul24_fa18_23_and0 >> 0) & 0x01) | ((s_arrmul24_fa18_23_and1 >> 0) & 0x01);
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s_arrmul24_nand19_23 = ~(((a >> 19) & 0x01) & ((b >> 23) & 0x01)) & 0x01;
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s_arrmul24_fa19_23_xor0 = ((s_arrmul24_nand19_23 >> 0) & 0x01) ^ ((s_arrmul24_fa20_22_xor1 >> 0) & 0x01);
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s_arrmul24_fa19_23_and0 = ((s_arrmul24_nand19_23 >> 0) & 0x01) & ((s_arrmul24_fa20_22_xor1 >> 0) & 0x01);
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s_arrmul24_fa19_23_xor1 = ((s_arrmul24_fa19_23_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa18_23_or0 >> 0) & 0x01);
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s_arrmul24_fa19_23_and1 = ((s_arrmul24_fa19_23_xor0 >> 0) & 0x01) & ((s_arrmul24_fa18_23_or0 >> 0) & 0x01);
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s_arrmul24_fa19_23_or0 = ((s_arrmul24_fa19_23_and0 >> 0) & 0x01) | ((s_arrmul24_fa19_23_and1 >> 0) & 0x01);
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s_arrmul24_nand20_23 = ~(((a >> 20) & 0x01) & ((b >> 23) & 0x01)) & 0x01;
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s_arrmul24_fa20_23_xor0 = ((s_arrmul24_nand20_23 >> 0) & 0x01) ^ ((s_arrmul24_fa21_22_xor1 >> 0) & 0x01);
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s_arrmul24_fa20_23_and0 = ((s_arrmul24_nand20_23 >> 0) & 0x01) & ((s_arrmul24_fa21_22_xor1 >> 0) & 0x01);
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s_arrmul24_fa20_23_xor1 = ((s_arrmul24_fa20_23_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa19_23_or0 >> 0) & 0x01);
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s_arrmul24_fa20_23_and1 = ((s_arrmul24_fa20_23_xor0 >> 0) & 0x01) & ((s_arrmul24_fa19_23_or0 >> 0) & 0x01);
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s_arrmul24_fa20_23_or0 = ((s_arrmul24_fa20_23_and0 >> 0) & 0x01) | ((s_arrmul24_fa20_23_and1 >> 0) & 0x01);
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s_arrmul24_nand21_23 = ~(((a >> 21) & 0x01) & ((b >> 23) & 0x01)) & 0x01;
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s_arrmul24_fa21_23_xor0 = ((s_arrmul24_nand21_23 >> 0) & 0x01) ^ ((s_arrmul24_fa22_22_xor1 >> 0) & 0x01);
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s_arrmul24_fa21_23_and0 = ((s_arrmul24_nand21_23 >> 0) & 0x01) & ((s_arrmul24_fa22_22_xor1 >> 0) & 0x01);
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s_arrmul24_fa21_23_xor1 = ((s_arrmul24_fa21_23_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa20_23_or0 >> 0) & 0x01);
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s_arrmul24_fa21_23_and1 = ((s_arrmul24_fa21_23_xor0 >> 0) & 0x01) & ((s_arrmul24_fa20_23_or0 >> 0) & 0x01);
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s_arrmul24_fa21_23_or0 = ((s_arrmul24_fa21_23_and0 >> 0) & 0x01) | ((s_arrmul24_fa21_23_and1 >> 0) & 0x01);
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s_arrmul24_nand22_23 = ~(((a >> 22) & 0x01) & ((b >> 23) & 0x01)) & 0x01;
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s_arrmul24_fa22_23_xor0 = ((s_arrmul24_nand22_23 >> 0) & 0x01) ^ ((s_arrmul24_fa23_22_xor1 >> 0) & 0x01);
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s_arrmul24_fa22_23_and0 = ((s_arrmul24_nand22_23 >> 0) & 0x01) & ((s_arrmul24_fa23_22_xor1 >> 0) & 0x01);
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s_arrmul24_fa22_23_xor1 = ((s_arrmul24_fa22_23_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa21_23_or0 >> 0) & 0x01);
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s_arrmul24_fa22_23_and1 = ((s_arrmul24_fa22_23_xor0 >> 0) & 0x01) & ((s_arrmul24_fa21_23_or0 >> 0) & 0x01);
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s_arrmul24_fa22_23_or0 = ((s_arrmul24_fa22_23_and0 >> 0) & 0x01) | ((s_arrmul24_fa22_23_and1 >> 0) & 0x01);
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s_arrmul24_and23_23 = ((a >> 23) & 0x01) & ((b >> 23) & 0x01);
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s_arrmul24_fa23_23_xor0 = ((s_arrmul24_and23_23 >> 0) & 0x01) ^ ((s_arrmul24_fa23_22_or0 >> 0) & 0x01);
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s_arrmul24_fa23_23_and0 = ((s_arrmul24_and23_23 >> 0) & 0x01) & ((s_arrmul24_fa23_22_or0 >> 0) & 0x01);
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s_arrmul24_fa23_23_xor1 = ((s_arrmul24_fa23_23_xor0 >> 0) & 0x01) ^ ((s_arrmul24_fa22_23_or0 >> 0) & 0x01);
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s_arrmul24_fa23_23_and1 = ((s_arrmul24_fa23_23_xor0 >> 0) & 0x01) & ((s_arrmul24_fa22_23_or0 >> 0) & 0x01);
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s_arrmul24_fa23_23_or0 = ((s_arrmul24_fa23_23_and0 >> 0) & 0x01) | ((s_arrmul24_fa23_23_and1 >> 0) & 0x01);
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s_arrmul24_xor24_23 = ~(((s_arrmul24_fa23_23_or0 >> 0) & 0x01)) & 0x01;
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s_arrmul24_out |= ((s_arrmul24_and0_0 >> 0) & 0x01ull) << 0;
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s_arrmul24_out |= ((s_arrmul24_ha0_1_xor0 >> 0) & 0x01ull) << 1;
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s_arrmul24_out |= ((s_arrmul24_ha0_2_xor0 >> 0) & 0x01ull) << 2;
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s_arrmul24_out |= ((s_arrmul24_ha0_3_xor0 >> 0) & 0x01ull) << 3;
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s_arrmul24_out |= ((s_arrmul24_ha0_4_xor0 >> 0) & 0x01ull) << 4;
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s_arrmul24_out |= ((s_arrmul24_ha0_5_xor0 >> 0) & 0x01ull) << 5;
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s_arrmul24_out |= ((s_arrmul24_ha0_6_xor0 >> 0) & 0x01ull) << 6;
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s_arrmul24_out |= ((s_arrmul24_ha0_7_xor0 >> 0) & 0x01ull) << 7;
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s_arrmul24_out |= ((s_arrmul24_ha0_8_xor0 >> 0) & 0x01ull) << 8;
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s_arrmul24_out |= ((s_arrmul24_ha0_9_xor0 >> 0) & 0x01ull) << 9;
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s_arrmul24_out |= ((s_arrmul24_ha0_10_xor0 >> 0) & 0x01ull) << 10;
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s_arrmul24_out |= ((s_arrmul24_ha0_11_xor0 >> 0) & 0x01ull) << 11;
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s_arrmul24_out |= ((s_arrmul24_ha0_12_xor0 >> 0) & 0x01ull) << 12;
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s_arrmul24_out |= ((s_arrmul24_ha0_13_xor0 >> 0) & 0x01ull) << 13;
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s_arrmul24_out |= ((s_arrmul24_ha0_14_xor0 >> 0) & 0x01ull) << 14;
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s_arrmul24_out |= ((s_arrmul24_ha0_15_xor0 >> 0) & 0x01ull) << 15;
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s_arrmul24_out |= ((s_arrmul24_ha0_16_xor0 >> 0) & 0x01ull) << 16;
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s_arrmul24_out |= ((s_arrmul24_ha0_17_xor0 >> 0) & 0x01ull) << 17;
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s_arrmul24_out |= ((s_arrmul24_ha0_18_xor0 >> 0) & 0x01ull) << 18;
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s_arrmul24_out |= ((s_arrmul24_ha0_19_xor0 >> 0) & 0x01ull) << 19;
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s_arrmul24_out |= ((s_arrmul24_ha0_20_xor0 >> 0) & 0x01ull) << 20;
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s_arrmul24_out |= ((s_arrmul24_ha0_21_xor0 >> 0) & 0x01ull) << 21;
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s_arrmul24_out |= ((s_arrmul24_ha0_22_xor0 >> 0) & 0x01ull) << 22;
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s_arrmul24_out |= ((s_arrmul24_ha0_23_xor0 >> 0) & 0x01ull) << 23;
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s_arrmul24_out |= ((s_arrmul24_fa1_23_xor1 >> 0) & 0x01ull) << 24;
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s_arrmul24_out |= ((s_arrmul24_fa2_23_xor1 >> 0) & 0x01ull) << 25;
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s_arrmul24_out |= ((s_arrmul24_fa3_23_xor1 >> 0) & 0x01ull) << 26;
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s_arrmul24_out |= ((s_arrmul24_fa4_23_xor1 >> 0) & 0x01ull) << 27;
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s_arrmul24_out |= ((s_arrmul24_fa5_23_xor1 >> 0) & 0x01ull) << 28;
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s_arrmul24_out |= ((s_arrmul24_fa6_23_xor1 >> 0) & 0x01ull) << 29;
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s_arrmul24_out |= ((s_arrmul24_fa7_23_xor1 >> 0) & 0x01ull) << 30;
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s_arrmul24_out |= ((s_arrmul24_fa8_23_xor1 >> 0) & 0x01ull) << 31;
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s_arrmul24_out |= ((s_arrmul24_fa9_23_xor1 >> 0) & 0x01ull) << 32;
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s_arrmul24_out |= ((s_arrmul24_fa10_23_xor1 >> 0) & 0x01ull) << 33;
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s_arrmul24_out |= ((s_arrmul24_fa11_23_xor1 >> 0) & 0x01ull) << 34;
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s_arrmul24_out |= ((s_arrmul24_fa12_23_xor1 >> 0) & 0x01ull) << 35;
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s_arrmul24_out |= ((s_arrmul24_fa13_23_xor1 >> 0) & 0x01ull) << 36;
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s_arrmul24_out |= ((s_arrmul24_fa14_23_xor1 >> 0) & 0x01ull) << 37;
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s_arrmul24_out |= ((s_arrmul24_fa15_23_xor1 >> 0) & 0x01ull) << 38;
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s_arrmul24_out |= ((s_arrmul24_fa16_23_xor1 >> 0) & 0x01ull) << 39;
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s_arrmul24_out |= ((s_arrmul24_fa17_23_xor1 >> 0) & 0x01ull) << 40;
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s_arrmul24_out |= ((s_arrmul24_fa18_23_xor1 >> 0) & 0x01ull) << 41;
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s_arrmul24_out |= ((s_arrmul24_fa19_23_xor1 >> 0) & 0x01ull) << 42;
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s_arrmul24_out |= ((s_arrmul24_fa20_23_xor1 >> 0) & 0x01ull) << 43;
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s_arrmul24_out |= ((s_arrmul24_fa21_23_xor1 >> 0) & 0x01ull) << 44;
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s_arrmul24_out |= ((s_arrmul24_fa22_23_xor1 >> 0) & 0x01ull) << 45;
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s_arrmul24_out |= ((s_arrmul24_fa23_23_xor1 >> 0) & 0x01ull) << 46;
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s_arrmul24_out |= ((s_arrmul24_xor24_23 >> 0) & 0x01ull) << 47;
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s_arrmul24_out |= ((s_arrmul24_xor24_23 >> 0) & 0x01ull) << 48;
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s_arrmul24_out |= ((s_arrmul24_xor24_23 >> 0) & 0x01ull) << 49;
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s_arrmul24_out |= ((s_arrmul24_xor24_23 >> 0) & 0x01ull) << 50;
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s_arrmul24_out |= ((s_arrmul24_xor24_23 >> 0) & 0x01ull) << 51;
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s_arrmul24_out |= ((s_arrmul24_xor24_23 >> 0) & 0x01ull) << 52;
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s_arrmul24_out |= ((s_arrmul24_xor24_23 >> 0) & 0x01ull) << 53;
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s_arrmul24_out |= ((s_arrmul24_xor24_23 >> 0) & 0x01ull) << 54;
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s_arrmul24_out |= ((s_arrmul24_xor24_23 >> 0) & 0x01ull) << 55;
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s_arrmul24_out |= ((s_arrmul24_xor24_23 >> 0) & 0x01ull) << 56;
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s_arrmul24_out |= ((s_arrmul24_xor24_23 >> 0) & 0x01ull) << 57;
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s_arrmul24_out |= ((s_arrmul24_xor24_23 >> 0) & 0x01ull) << 58;
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s_arrmul24_out |= ((s_arrmul24_xor24_23 >> 0) & 0x01ull) << 59;
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s_arrmul24_out |= ((s_arrmul24_xor24_23 >> 0) & 0x01ull) << 60;
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s_arrmul24_out |= ((s_arrmul24_xor24_23 >> 0) & 0x01ull) << 61;
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s_arrmul24_out |= ((s_arrmul24_xor24_23 >> 0) & 0x01ull) << 62;
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s_arrmul24_out |= ((s_arrmul24_xor24_23 >> 0) & 0x01ull) << 63;
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return s_arrmul24_out;
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} |