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256 lines
11 KiB
Plaintext
256 lines
11 KiB
Plaintext
.model s_CSAwallace_cla4
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.inputs a[0] a[1] a[2] a[3] b[0] b[1] b[2] b[3]
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.outputs s_CSAwallace_cla4_out[0] s_CSAwallace_cla4_out[1] s_CSAwallace_cla4_out[2] s_CSAwallace_cla4_out[3] s_CSAwallace_cla4_out[4] s_CSAwallace_cla4_out[5] s_CSAwallace_cla4_out[6] s_CSAwallace_cla4_out[7]
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.names vdd
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1
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.names gnd
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0
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.names a[0] b[0] s_CSAwallace_cla4_and_0_0
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11 1
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.names a[1] b[0] s_CSAwallace_cla4_and_1_0
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11 1
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.names a[2] b[0] s_CSAwallace_cla4_and_2_0
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11 1
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.names a[3] b[0] s_CSAwallace_cla4_nand_3_0
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0- 1
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-0 1
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.names a[0] b[1] s_CSAwallace_cla4_and_0_1
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11 1
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.names a[1] b[1] s_CSAwallace_cla4_and_1_1
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11 1
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.names a[2] b[1] s_CSAwallace_cla4_and_2_1
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11 1
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.names a[3] b[1] s_CSAwallace_cla4_nand_3_1
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0- 1
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-0 1
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.names a[0] b[2] s_CSAwallace_cla4_and_0_2
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11 1
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.names a[1] b[2] s_CSAwallace_cla4_and_1_2
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11 1
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.names a[2] b[2] s_CSAwallace_cla4_and_2_2
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11 1
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.names a[3] b[2] s_CSAwallace_cla4_nand_3_2
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0- 1
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-0 1
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.names a[0] b[3] s_CSAwallace_cla4_nand_0_3
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0- 1
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-0 1
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.names a[1] b[3] s_CSAwallace_cla4_nand_1_3
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0- 1
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-0 1
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.names a[2] b[3] s_CSAwallace_cla4_nand_2_3
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0- 1
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-0 1
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.names a[3] b[3] s_CSAwallace_cla4_and_3_3
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11 1
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.names s_CSAwallace_cla4_and_1_0 s_CSAwallace_cla4_and_0_1 s_CSAwallace_cla4_csa0_csa_component_fa1_xor0
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01 1
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10 1
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.names s_CSAwallace_cla4_and_1_0 s_CSAwallace_cla4_and_0_1 s_CSAwallace_cla4_csa0_csa_component_fa1_and0
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11 1
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.names s_CSAwallace_cla4_and_2_0 s_CSAwallace_cla4_and_1_1 s_CSAwallace_cla4_csa0_csa_component_fa2_xor0
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01 1
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10 1
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.names s_CSAwallace_cla4_and_2_0 s_CSAwallace_cla4_and_1_1 s_CSAwallace_cla4_csa0_csa_component_fa2_and0
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11 1
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.names s_CSAwallace_cla4_csa0_csa_component_fa2_xor0 s_CSAwallace_cla4_and_0_2 s_CSAwallace_cla4_csa0_csa_component_fa2_xor1
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01 1
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10 1
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.names s_CSAwallace_cla4_csa0_csa_component_fa2_xor0 s_CSAwallace_cla4_and_0_2 s_CSAwallace_cla4_csa0_csa_component_fa2_and1
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11 1
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.names s_CSAwallace_cla4_csa0_csa_component_fa2_and0 s_CSAwallace_cla4_csa0_csa_component_fa2_and1 s_CSAwallace_cla4_csa0_csa_component_fa2_or0
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1- 1
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-1 1
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.names s_CSAwallace_cla4_nand_3_0 s_CSAwallace_cla4_and_2_1 s_CSAwallace_cla4_csa0_csa_component_fa3_xor0
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01 1
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10 1
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.names s_CSAwallace_cla4_nand_3_0 s_CSAwallace_cla4_and_2_1 s_CSAwallace_cla4_csa0_csa_component_fa3_and0
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11 1
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.names s_CSAwallace_cla4_csa0_csa_component_fa3_xor0 s_CSAwallace_cla4_and_1_2 s_CSAwallace_cla4_csa0_csa_component_fa3_xor1
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01 1
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10 1
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.names s_CSAwallace_cla4_csa0_csa_component_fa3_xor0 s_CSAwallace_cla4_and_1_2 s_CSAwallace_cla4_csa0_csa_component_fa3_and1
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11 1
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.names s_CSAwallace_cla4_csa0_csa_component_fa3_and0 s_CSAwallace_cla4_csa0_csa_component_fa3_and1 s_CSAwallace_cla4_csa0_csa_component_fa3_or0
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1- 1
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-1 1
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.names s_CSAwallace_cla4_nand_3_1 s_CSAwallace_cla4_csa0_csa_component_fa4_xor0
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0 1
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.names s_CSAwallace_cla4_csa0_csa_component_fa4_xor0 s_CSAwallace_cla4_and_2_2 s_CSAwallace_cla4_csa0_csa_component_fa4_xor1
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01 1
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10 1
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.names s_CSAwallace_cla4_csa0_csa_component_fa4_xor0 s_CSAwallace_cla4_and_2_2 s_CSAwallace_cla4_csa0_csa_component_fa4_and1
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11 1
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.names s_CSAwallace_cla4_nand_3_1 s_CSAwallace_cla4_csa0_csa_component_fa4_and1 s_CSAwallace_cla4_csa0_csa_component_fa4_or0
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1- 1
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-1 1
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.names s_CSAwallace_cla4_csa0_csa_component_fa2_xor1 s_CSAwallace_cla4_csa0_csa_component_fa1_and0 s_CSAwallace_cla4_csa1_csa_component_fa2_xor0
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01 1
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10 1
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.names s_CSAwallace_cla4_csa0_csa_component_fa2_xor1 s_CSAwallace_cla4_csa0_csa_component_fa1_and0 s_CSAwallace_cla4_csa1_csa_component_fa2_and0
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11 1
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.names s_CSAwallace_cla4_csa0_csa_component_fa3_xor1 s_CSAwallace_cla4_csa0_csa_component_fa2_or0 s_CSAwallace_cla4_csa1_csa_component_fa3_xor0
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01 1
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10 1
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.names s_CSAwallace_cla4_csa0_csa_component_fa3_xor1 s_CSAwallace_cla4_csa0_csa_component_fa2_or0 s_CSAwallace_cla4_csa1_csa_component_fa3_and0
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11 1
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.names s_CSAwallace_cla4_csa1_csa_component_fa3_xor0 s_CSAwallace_cla4_nand_0_3 s_CSAwallace_cla4_csa1_csa_component_fa3_xor1
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01 1
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10 1
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.names s_CSAwallace_cla4_csa1_csa_component_fa3_xor0 s_CSAwallace_cla4_nand_0_3 s_CSAwallace_cla4_csa1_csa_component_fa3_and1
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11 1
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.names s_CSAwallace_cla4_csa1_csa_component_fa3_and0 s_CSAwallace_cla4_csa1_csa_component_fa3_and1 s_CSAwallace_cla4_csa1_csa_component_fa3_or0
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1- 1
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-1 1
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.names s_CSAwallace_cla4_csa0_csa_component_fa4_xor1 s_CSAwallace_cla4_csa0_csa_component_fa3_or0 s_CSAwallace_cla4_csa1_csa_component_fa4_xor0
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01 1
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10 1
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.names s_CSAwallace_cla4_csa0_csa_component_fa4_xor1 s_CSAwallace_cla4_csa0_csa_component_fa3_or0 s_CSAwallace_cla4_csa1_csa_component_fa4_and0
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11 1
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.names s_CSAwallace_cla4_csa1_csa_component_fa4_xor0 s_CSAwallace_cla4_nand_1_3 s_CSAwallace_cla4_csa1_csa_component_fa4_xor1
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01 1
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10 1
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.names s_CSAwallace_cla4_csa1_csa_component_fa4_xor0 s_CSAwallace_cla4_nand_1_3 s_CSAwallace_cla4_csa1_csa_component_fa4_and1
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11 1
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.names s_CSAwallace_cla4_csa1_csa_component_fa4_and0 s_CSAwallace_cla4_csa1_csa_component_fa4_and1 s_CSAwallace_cla4_csa1_csa_component_fa4_or0
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1- 1
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-1 1
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.names s_CSAwallace_cla4_nand_3_2 s_CSAwallace_cla4_csa0_csa_component_fa4_or0 s_CSAwallace_cla4_csa1_csa_component_fa5_xor0
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01 1
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10 1
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.names s_CSAwallace_cla4_nand_3_2 s_CSAwallace_cla4_csa0_csa_component_fa4_or0 s_CSAwallace_cla4_csa1_csa_component_fa5_and0
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11 1
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.names s_CSAwallace_cla4_csa1_csa_component_fa5_xor0 s_CSAwallace_cla4_nand_2_3 s_CSAwallace_cla4_csa1_csa_component_fa5_xor1
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01 1
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10 1
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.names s_CSAwallace_cla4_csa1_csa_component_fa5_xor0 s_CSAwallace_cla4_nand_2_3 s_CSAwallace_cla4_csa1_csa_component_fa5_and1
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11 1
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.names s_CSAwallace_cla4_csa1_csa_component_fa5_and0 s_CSAwallace_cla4_csa1_csa_component_fa5_and1 s_CSAwallace_cla4_csa1_csa_component_fa5_or0
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1- 1
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-1 1
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.names s_CSAwallace_cla4_csa1_csa_component_fa2_xor0 s_CSAwallace_cla4_and_0_0 s_CSAwallace_cla4_u_cla8_and0
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11 1
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.names s_CSAwallace_cla4_csa1_csa_component_fa3_xor1 s_CSAwallace_cla4_csa1_csa_component_fa2_and0 s_CSAwallace_cla4_u_cla8_pg_logic3_or0
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1- 1
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-1 1
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.names s_CSAwallace_cla4_csa1_csa_component_fa3_xor1 s_CSAwallace_cla4_csa1_csa_component_fa2_and0 s_CSAwallace_cla4_u_cla8_pg_logic3_and0
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11 1
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.names s_CSAwallace_cla4_csa1_csa_component_fa3_xor1 s_CSAwallace_cla4_csa1_csa_component_fa2_and0 s_CSAwallace_cla4_u_cla8_pg_logic3_xor0
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01 1
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10 1
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.names s_CSAwallace_cla4_u_cla8_pg_logic3_or0 s_CSAwallace_cla4_csa0_csa_component_fa1_xor0 s_CSAwallace_cla4_u_cla8_and1
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11 1
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.names s_CSAwallace_cla4_u_cla8_pg_logic3_or0 s_CSAwallace_cla4_csa0_csa_component_fa1_xor0 s_CSAwallace_cla4_u_cla8_and2
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11 1
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.names s_CSAwallace_cla4_csa1_csa_component_fa4_xor1 s_CSAwallace_cla4_csa1_csa_component_fa3_or0 s_CSAwallace_cla4_u_cla8_pg_logic4_or0
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1- 1
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-1 1
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.names s_CSAwallace_cla4_csa1_csa_component_fa4_xor1 s_CSAwallace_cla4_csa1_csa_component_fa3_or0 s_CSAwallace_cla4_u_cla8_pg_logic4_and0
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11 1
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.names s_CSAwallace_cla4_csa1_csa_component_fa4_xor1 s_CSAwallace_cla4_csa1_csa_component_fa3_or0 s_CSAwallace_cla4_u_cla8_pg_logic4_xor0
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01 1
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10 1
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.names s_CSAwallace_cla4_u_cla8_pg_logic4_xor0 s_CSAwallace_cla4_u_cla8_pg_logic3_and0 s_CSAwallace_cla4_u_cla8_xor4
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01 1
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10 1
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.names s_CSAwallace_cla4_u_cla8_pg_logic3_and0 s_CSAwallace_cla4_u_cla8_pg_logic4_or0 s_CSAwallace_cla4_u_cla8_and3
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11 1
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.names s_CSAwallace_cla4_u_cla8_pg_logic4_and0 s_CSAwallace_cla4_u_cla8_and3 s_CSAwallace_cla4_u_cla8_or0
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.names s_CSAwallace_cla4_csa1_csa_component_fa5_xor1 s_CSAwallace_cla4_csa1_csa_component_fa4_or0 s_CSAwallace_cla4_u_cla8_pg_logic5_or0
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.names s_CSAwallace_cla4_csa1_csa_component_fa5_xor1 s_CSAwallace_cla4_csa1_csa_component_fa4_or0 s_CSAwallace_cla4_u_cla8_pg_logic5_and0
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11 1
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.names s_CSAwallace_cla4_csa1_csa_component_fa5_xor1 s_CSAwallace_cla4_csa1_csa_component_fa4_or0 s_CSAwallace_cla4_u_cla8_pg_logic5_xor0
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01 1
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10 1
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.names s_CSAwallace_cla4_u_cla8_pg_logic5_xor0 s_CSAwallace_cla4_u_cla8_or0 s_CSAwallace_cla4_u_cla8_xor5
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01 1
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10 1
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.names s_CSAwallace_cla4_u_cla8_pg_logic3_and0 s_CSAwallace_cla4_u_cla8_pg_logic5_or0 s_CSAwallace_cla4_u_cla8_and4
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11 1
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.names s_CSAwallace_cla4_u_cla8_and4 s_CSAwallace_cla4_u_cla8_pg_logic4_or0 s_CSAwallace_cla4_u_cla8_and5
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11 1
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.names s_CSAwallace_cla4_u_cla8_pg_logic4_and0 s_CSAwallace_cla4_u_cla8_pg_logic5_or0 s_CSAwallace_cla4_u_cla8_and6
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11 1
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.names s_CSAwallace_cla4_u_cla8_and5 s_CSAwallace_cla4_u_cla8_and6 s_CSAwallace_cla4_u_cla8_or1
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1- 1
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-1 1
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.names s_CSAwallace_cla4_u_cla8_pg_logic5_and0 s_CSAwallace_cla4_u_cla8_or1 s_CSAwallace_cla4_u_cla8_or2
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1- 1
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-1 1
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.names s_CSAwallace_cla4_and_3_3 s_CSAwallace_cla4_csa1_csa_component_fa5_or0 s_CSAwallace_cla4_u_cla8_pg_logic6_or0
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1- 1
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-1 1
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.names s_CSAwallace_cla4_and_3_3 s_CSAwallace_cla4_csa1_csa_component_fa5_or0 s_CSAwallace_cla4_u_cla8_pg_logic6_and0
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11 1
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.names s_CSAwallace_cla4_and_3_3 s_CSAwallace_cla4_csa1_csa_component_fa5_or0 s_CSAwallace_cla4_u_cla8_pg_logic6_xor0
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01 1
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10 1
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.names s_CSAwallace_cla4_u_cla8_pg_logic6_xor0 s_CSAwallace_cla4_u_cla8_or2 s_CSAwallace_cla4_u_cla8_xor6
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01 1
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10 1
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.names s_CSAwallace_cla4_u_cla8_pg_logic3_and0 s_CSAwallace_cla4_u_cla8_pg_logic5_or0 s_CSAwallace_cla4_u_cla8_and7
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11 1
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.names s_CSAwallace_cla4_u_cla8_pg_logic6_or0 s_CSAwallace_cla4_u_cla8_pg_logic4_or0 s_CSAwallace_cla4_u_cla8_and8
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11 1
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.names s_CSAwallace_cla4_u_cla8_and7 s_CSAwallace_cla4_u_cla8_and8 s_CSAwallace_cla4_u_cla8_and9
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11 1
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.names s_CSAwallace_cla4_u_cla8_pg_logic4_and0 s_CSAwallace_cla4_u_cla8_pg_logic6_or0 s_CSAwallace_cla4_u_cla8_and10
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11 1
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.names s_CSAwallace_cla4_u_cla8_and10 s_CSAwallace_cla4_u_cla8_pg_logic5_or0 s_CSAwallace_cla4_u_cla8_and11
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11 1
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.names s_CSAwallace_cla4_u_cla8_pg_logic5_and0 s_CSAwallace_cla4_u_cla8_pg_logic6_or0 s_CSAwallace_cla4_u_cla8_and12
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11 1
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.names s_CSAwallace_cla4_u_cla8_and9 s_CSAwallace_cla4_u_cla8_and11 s_CSAwallace_cla4_u_cla8_or3
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.names s_CSAwallace_cla4_u_cla8_or3 s_CSAwallace_cla4_u_cla8_and12 s_CSAwallace_cla4_u_cla8_or4
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1- 1
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-1 1
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.names s_CSAwallace_cla4_u_cla8_pg_logic6_and0 s_CSAwallace_cla4_u_cla8_or4 s_CSAwallace_cla4_u_cla8_or5
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-1 1
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.names s_CSAwallace_cla4_u_cla8_pg_logic3_and0 s_CSAwallace_cla4_u_cla8_pg_logic6_or0 s_CSAwallace_cla4_u_cla8_and13
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11 1
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.names s_CSAwallace_cla4_u_cla8_and13 s_CSAwallace_cla4_u_cla8_pg_logic5_or0 s_CSAwallace_cla4_u_cla8_and14
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11 1
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.names s_CSAwallace_cla4_u_cla8_and14 s_CSAwallace_cla4_u_cla8_pg_logic4_or0 s_CSAwallace_cla4_u_cla8_and15
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11 1
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.names s_CSAwallace_cla4_u_cla8_pg_logic4_and0 s_CSAwallace_cla4_u_cla8_pg_logic6_or0 s_CSAwallace_cla4_u_cla8_and16
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11 1
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.names s_CSAwallace_cla4_u_cla8_and16 s_CSAwallace_cla4_u_cla8_pg_logic5_or0 s_CSAwallace_cla4_u_cla8_and17
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11 1
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.names s_CSAwallace_cla4_u_cla8_pg_logic5_and0 s_CSAwallace_cla4_u_cla8_pg_logic6_or0 s_CSAwallace_cla4_u_cla8_and18
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11 1
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.names s_CSAwallace_cla4_u_cla8_and15 s_CSAwallace_cla4_u_cla8_and18 s_CSAwallace_cla4_u_cla8_or6
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1- 1
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-1 1
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.names s_CSAwallace_cla4_u_cla8_and17 s_CSAwallace_cla4_u_cla8_pg_logic6_and0 s_CSAwallace_cla4_u_cla8_or7
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1- 1
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-1 1
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.names s_CSAwallace_cla4_u_cla8_or6 s_CSAwallace_cla4_u_cla8_or7 s_CSAwallace_cla4_u_cla8_or8
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1- 1
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-1 1
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.names s_CSAwallace_cla4_u_cla8_or5 s_CSAwallace_cla4_xor0
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0 1
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.names s_CSAwallace_cla4_and_0_0 s_CSAwallace_cla4_out[0]
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1 1
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.names s_CSAwallace_cla4_csa0_csa_component_fa1_xor0 s_CSAwallace_cla4_out[1]
|
|
1 1
|
|
.names s_CSAwallace_cla4_csa1_csa_component_fa2_xor0 s_CSAwallace_cla4_out[2]
|
|
1 1
|
|
.names s_CSAwallace_cla4_u_cla8_pg_logic3_xor0 s_CSAwallace_cla4_out[3]
|
|
1 1
|
|
.names s_CSAwallace_cla4_u_cla8_xor4 s_CSAwallace_cla4_out[4]
|
|
1 1
|
|
.names s_CSAwallace_cla4_u_cla8_xor5 s_CSAwallace_cla4_out[5]
|
|
1 1
|
|
.names s_CSAwallace_cla4_u_cla8_xor6 s_CSAwallace_cla4_out[6]
|
|
1 1
|
|
.names s_CSAwallace_cla4_xor0 s_CSAwallace_cla4_out[7]
|
|
1 1
|
|
.end
|