mirror of
https://github.com/ehw-fit/ariths-gen.git
synced 2025-04-22 14:51:22 +01:00

* #10 CGP Circuits as inputs (#11) * CGP Circuits as inputs * #10 support of signed output in general circuit * input as output works * output connected to input (c) * automated verilog testing * output rename * Implemented CSA and Wallace tree multiplier composing of CSAs. Also did some code cleanup. * Typos fix and code cleanup. * Added new (approximate) multiplier architectures and did some minor changes regarding sign extension for c output formats. * Updated automated testing scripts. * Small bugfix in python code generation (I initially thought this line is useless). * Updated generated circuits folder. Co-authored-by: Vojta Mrazek <mrazek@fit.vutbr.cz>
76 lines
3.6 KiB
C
76 lines
3.6 KiB
C
#include <stdio.h>
|
|
#include <stdint.h>
|
|
|
|
uint8_t xor_gate(uint8_t a, uint8_t b){
|
|
return ((a >> 0) & 0x01) ^ ((b >> 0) & 0x01);
|
|
}
|
|
|
|
uint8_t and_gate(uint8_t a, uint8_t b){
|
|
return ((a >> 0) & 0x01) & ((b >> 0) & 0x01);
|
|
}
|
|
|
|
uint8_t or_gate(uint8_t a, uint8_t b){
|
|
return ((a >> 0) & 0x01) | ((b >> 0) & 0x01);
|
|
}
|
|
|
|
uint8_t pg_fa(uint8_t a, uint8_t b, uint8_t cin){
|
|
uint8_t pg_fa_out = 0;
|
|
uint8_t pg_fa_xor0 = 0;
|
|
uint8_t pg_fa_and0 = 0;
|
|
uint8_t pg_fa_xor1 = 0;
|
|
|
|
pg_fa_xor0 = xor_gate(((a >> 0) & 0x01), ((b >> 0) & 0x01));
|
|
pg_fa_and0 = and_gate(((a >> 0) & 0x01), ((b >> 0) & 0x01));
|
|
pg_fa_xor1 = xor_gate(((pg_fa_xor0 >> 0) & 0x01), ((cin >> 0) & 0x01));
|
|
|
|
pg_fa_out |= ((pg_fa_xor0 >> 0) & 0x01ull) << 0;
|
|
pg_fa_out |= ((pg_fa_and0 >> 0) & 0x01ull) << 1;
|
|
pg_fa_out |= ((pg_fa_xor1 >> 0) & 0x01ull) << 2;
|
|
return pg_fa_out;
|
|
}
|
|
|
|
uint64_t u_pg_rca4(uint64_t a, uint64_t b){
|
|
uint8_t u_pg_rca4_out = 0;
|
|
uint8_t u_pg_rca4_pg_fa0_xor0 = 0;
|
|
uint8_t u_pg_rca4_pg_fa0_and0 = 0;
|
|
uint8_t u_pg_rca4_pg_fa1_xor0 = 0;
|
|
uint8_t u_pg_rca4_pg_fa1_and0 = 0;
|
|
uint8_t u_pg_rca4_pg_fa1_xor1 = 0;
|
|
uint8_t u_pg_rca4_and1 = 0;
|
|
uint8_t u_pg_rca4_or1 = 0;
|
|
uint8_t u_pg_rca4_pg_fa2_xor0 = 0;
|
|
uint8_t u_pg_rca4_pg_fa2_and0 = 0;
|
|
uint8_t u_pg_rca4_pg_fa2_xor1 = 0;
|
|
uint8_t u_pg_rca4_and2 = 0;
|
|
uint8_t u_pg_rca4_or2 = 0;
|
|
uint8_t u_pg_rca4_pg_fa3_xor0 = 0;
|
|
uint8_t u_pg_rca4_pg_fa3_and0 = 0;
|
|
uint8_t u_pg_rca4_pg_fa3_xor1 = 0;
|
|
uint8_t u_pg_rca4_and3 = 0;
|
|
uint8_t u_pg_rca4_or3 = 0;
|
|
|
|
u_pg_rca4_pg_fa0_xor0 = (pg_fa(((a >> 0) & 0x01), ((b >> 0) & 0x01), (0x00)) >> 0) & 0x01;
|
|
u_pg_rca4_pg_fa0_and0 = (pg_fa(((a >> 0) & 0x01), ((b >> 0) & 0x01), (0x00)) >> 1) & 0x01;
|
|
u_pg_rca4_pg_fa1_xor0 = (pg_fa(((a >> 1) & 0x01), ((b >> 1) & 0x01), ((u_pg_rca4_pg_fa0_and0 >> 0) & 0x01)) >> 0) & 0x01;
|
|
u_pg_rca4_pg_fa1_and0 = (pg_fa(((a >> 1) & 0x01), ((b >> 1) & 0x01), ((u_pg_rca4_pg_fa0_and0 >> 0) & 0x01)) >> 1) & 0x01;
|
|
u_pg_rca4_pg_fa1_xor1 = (pg_fa(((a >> 1) & 0x01), ((b >> 1) & 0x01), ((u_pg_rca4_pg_fa0_and0 >> 0) & 0x01)) >> 2) & 0x01;
|
|
u_pg_rca4_and1 = and_gate(((u_pg_rca4_pg_fa0_and0 >> 0) & 0x01), ((u_pg_rca4_pg_fa1_xor0 >> 0) & 0x01));
|
|
u_pg_rca4_or1 = or_gate(((u_pg_rca4_and1 >> 0) & 0x01), ((u_pg_rca4_pg_fa1_and0 >> 0) & 0x01));
|
|
u_pg_rca4_pg_fa2_xor0 = (pg_fa(((a >> 2) & 0x01), ((b >> 2) & 0x01), ((u_pg_rca4_or1 >> 0) & 0x01)) >> 0) & 0x01;
|
|
u_pg_rca4_pg_fa2_and0 = (pg_fa(((a >> 2) & 0x01), ((b >> 2) & 0x01), ((u_pg_rca4_or1 >> 0) & 0x01)) >> 1) & 0x01;
|
|
u_pg_rca4_pg_fa2_xor1 = (pg_fa(((a >> 2) & 0x01), ((b >> 2) & 0x01), ((u_pg_rca4_or1 >> 0) & 0x01)) >> 2) & 0x01;
|
|
u_pg_rca4_and2 = and_gate(((u_pg_rca4_or1 >> 0) & 0x01), ((u_pg_rca4_pg_fa2_xor0 >> 0) & 0x01));
|
|
u_pg_rca4_or2 = or_gate(((u_pg_rca4_and2 >> 0) & 0x01), ((u_pg_rca4_pg_fa2_and0 >> 0) & 0x01));
|
|
u_pg_rca4_pg_fa3_xor0 = (pg_fa(((a >> 3) & 0x01), ((b >> 3) & 0x01), ((u_pg_rca4_or2 >> 0) & 0x01)) >> 0) & 0x01;
|
|
u_pg_rca4_pg_fa3_and0 = (pg_fa(((a >> 3) & 0x01), ((b >> 3) & 0x01), ((u_pg_rca4_or2 >> 0) & 0x01)) >> 1) & 0x01;
|
|
u_pg_rca4_pg_fa3_xor1 = (pg_fa(((a >> 3) & 0x01), ((b >> 3) & 0x01), ((u_pg_rca4_or2 >> 0) & 0x01)) >> 2) & 0x01;
|
|
u_pg_rca4_and3 = and_gate(((u_pg_rca4_or2 >> 0) & 0x01), ((u_pg_rca4_pg_fa3_xor0 >> 0) & 0x01));
|
|
u_pg_rca4_or3 = or_gate(((u_pg_rca4_and3 >> 0) & 0x01), ((u_pg_rca4_pg_fa3_and0 >> 0) & 0x01));
|
|
|
|
u_pg_rca4_out |= ((u_pg_rca4_pg_fa0_xor0 >> 0) & 0x01ull) << 0;
|
|
u_pg_rca4_out |= ((u_pg_rca4_pg_fa1_xor1 >> 0) & 0x01ull) << 1;
|
|
u_pg_rca4_out |= ((u_pg_rca4_pg_fa2_xor1 >> 0) & 0x01ull) << 2;
|
|
u_pg_rca4_out |= ((u_pg_rca4_pg_fa3_xor1 >> 0) & 0x01ull) << 3;
|
|
u_pg_rca4_out |= ((u_pg_rca4_or3 >> 0) & 0x01ull) << 4;
|
|
return u_pg_rca4_out;
|
|
} |