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dissertation_thesis
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ariths-gen
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397d3bc658
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honzastor
397d3bc658
Added generation of hierarchical C code for implemented circuits.
2021-02-12 01:43:44 +01:00
Prezentace
Also uploading previously presented presentation.
2021-02-09 21:03:34 +01:00
Tests
Implemented basic tests for generated flat C code circuits.
2021-02-09 21:02:50 +01:00
.gitignore
Implemented basic tests for generated flat C code circuits.
2021-02-09 21:02:50 +01:00
arithmetic_circuits_generator.py
Added generation of hierarchical C code for implemented circuits.
2021-02-12 01:43:44 +01:00
logic_gates_generator.py
Added generation of hierarchical C code for implemented circuits.
2021-02-12 01:43:44 +01:00
README.md
Initial commit
2020-11-21 17:33:07 +01:00
wire_components.py
Added generation of hierarchical C code for implemented circuits.
2021-02-12 01:43:44 +01:00
README.md
bc_arithmetic_circuits_generator
FIT BUT bachelor's degree project
Description
Generator of arithmetic circuits (multipliers, adders) and approximate circuits
approximate-computing
blif
rtl
verilog
Readme
74
MiB
Languages
C
59.1%
Verilog
38.4%
Coq
2.2%
Python
0.3%
