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ariths-gen/generated_circuits/c_circuits/flat/u_CSAwallace_cla4.c
Honza f17e87738e Updated generated circuits folder.
2022-04-17 13:41:32 +02:00

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#include <stdio.h>
#include <stdint.h>
uint64_t u_CSAwallace_cla4(uint64_t a, uint64_t b){
uint8_t u_CSAwallace_cla4_out = 0;
uint8_t u_CSAwallace_cla4_and_0_0 = 0;
uint8_t u_CSAwallace_cla4_and_1_0 = 0;
uint8_t u_CSAwallace_cla4_and_2_0 = 0;
uint8_t u_CSAwallace_cla4_and_3_0 = 0;
uint8_t u_CSAwallace_cla4_and_0_1 = 0;
uint8_t u_CSAwallace_cla4_and_1_1 = 0;
uint8_t u_CSAwallace_cla4_and_2_1 = 0;
uint8_t u_CSAwallace_cla4_and_3_1 = 0;
uint8_t u_CSAwallace_cla4_and_0_2 = 0;
uint8_t u_CSAwallace_cla4_and_1_2 = 0;
uint8_t u_CSAwallace_cla4_and_2_2 = 0;
uint8_t u_CSAwallace_cla4_and_3_2 = 0;
uint8_t u_CSAwallace_cla4_and_0_3 = 0;
uint8_t u_CSAwallace_cla4_and_1_3 = 0;
uint8_t u_CSAwallace_cla4_and_2_3 = 0;
uint8_t u_CSAwallace_cla4_and_3_3 = 0;
uint8_t u_CSAwallace_cla4_csa0_csa_component_fa1_xor0 = 0;
uint8_t u_CSAwallace_cla4_csa0_csa_component_fa1_and0 = 0;
uint8_t u_CSAwallace_cla4_csa0_csa_component_fa2_xor0 = 0;
uint8_t u_CSAwallace_cla4_csa0_csa_component_fa2_and0 = 0;
uint8_t u_CSAwallace_cla4_csa0_csa_component_fa2_xor1 = 0;
uint8_t u_CSAwallace_cla4_csa0_csa_component_fa2_and1 = 0;
uint8_t u_CSAwallace_cla4_csa0_csa_component_fa2_or0 = 0;
uint8_t u_CSAwallace_cla4_csa0_csa_component_fa3_xor0 = 0;
uint8_t u_CSAwallace_cla4_csa0_csa_component_fa3_and0 = 0;
uint8_t u_CSAwallace_cla4_csa0_csa_component_fa3_xor1 = 0;
uint8_t u_CSAwallace_cla4_csa0_csa_component_fa3_and1 = 0;
uint8_t u_CSAwallace_cla4_csa0_csa_component_fa3_or0 = 0;
uint8_t u_CSAwallace_cla4_csa0_csa_component_fa4_xor1 = 0;
uint8_t u_CSAwallace_cla4_csa0_csa_component_fa4_and1 = 0;
uint8_t u_CSAwallace_cla4_csa1_csa_component_fa2_xor0 = 0;
uint8_t u_CSAwallace_cla4_csa1_csa_component_fa2_and0 = 0;
uint8_t u_CSAwallace_cla4_csa1_csa_component_fa3_xor0 = 0;
uint8_t u_CSAwallace_cla4_csa1_csa_component_fa3_and0 = 0;
uint8_t u_CSAwallace_cla4_csa1_csa_component_fa3_xor1 = 0;
uint8_t u_CSAwallace_cla4_csa1_csa_component_fa3_and1 = 0;
uint8_t u_CSAwallace_cla4_csa1_csa_component_fa3_or0 = 0;
uint8_t u_CSAwallace_cla4_csa1_csa_component_fa4_xor0 = 0;
uint8_t u_CSAwallace_cla4_csa1_csa_component_fa4_and0 = 0;
uint8_t u_CSAwallace_cla4_csa1_csa_component_fa4_xor1 = 0;
uint8_t u_CSAwallace_cla4_csa1_csa_component_fa4_and1 = 0;
uint8_t u_CSAwallace_cla4_csa1_csa_component_fa4_or0 = 0;
uint8_t u_CSAwallace_cla4_csa1_csa_component_fa5_xor0 = 0;
uint8_t u_CSAwallace_cla4_csa1_csa_component_fa5_and0 = 0;
uint8_t u_CSAwallace_cla4_csa1_csa_component_fa5_xor1 = 0;
uint8_t u_CSAwallace_cla4_csa1_csa_component_fa5_and1 = 0;
uint8_t u_CSAwallace_cla4_csa1_csa_component_fa5_or0 = 0;
uint8_t u_CSAwallace_cla4_u_cla8_and0 = 0;
uint8_t u_CSAwallace_cla4_u_cla8_pg_logic3_or0 = 0;
uint8_t u_CSAwallace_cla4_u_cla8_pg_logic3_and0 = 0;
uint8_t u_CSAwallace_cla4_u_cla8_pg_logic3_xor0 = 0;
uint8_t u_CSAwallace_cla4_u_cla8_and1 = 0;
uint8_t u_CSAwallace_cla4_u_cla8_and2 = 0;
uint8_t u_CSAwallace_cla4_u_cla8_pg_logic4_or0 = 0;
uint8_t u_CSAwallace_cla4_u_cla8_pg_logic4_and0 = 0;
uint8_t u_CSAwallace_cla4_u_cla8_pg_logic4_xor0 = 0;
uint8_t u_CSAwallace_cla4_u_cla8_xor4 = 0;
uint8_t u_CSAwallace_cla4_u_cla8_and3 = 0;
uint8_t u_CSAwallace_cla4_u_cla8_or0 = 0;
uint8_t u_CSAwallace_cla4_u_cla8_pg_logic5_or0 = 0;
uint8_t u_CSAwallace_cla4_u_cla8_pg_logic5_and0 = 0;
uint8_t u_CSAwallace_cla4_u_cla8_pg_logic5_xor0 = 0;
uint8_t u_CSAwallace_cla4_u_cla8_xor5 = 0;
uint8_t u_CSAwallace_cla4_u_cla8_and4 = 0;
uint8_t u_CSAwallace_cla4_u_cla8_and5 = 0;
uint8_t u_CSAwallace_cla4_u_cla8_and6 = 0;
uint8_t u_CSAwallace_cla4_u_cla8_or1 = 0;
uint8_t u_CSAwallace_cla4_u_cla8_or2 = 0;
uint8_t u_CSAwallace_cla4_u_cla8_pg_logic6_or0 = 0;
uint8_t u_CSAwallace_cla4_u_cla8_pg_logic6_and0 = 0;
uint8_t u_CSAwallace_cla4_u_cla8_pg_logic6_xor0 = 0;
uint8_t u_CSAwallace_cla4_u_cla8_xor6 = 0;
uint8_t u_CSAwallace_cla4_u_cla8_and7 = 0;
uint8_t u_CSAwallace_cla4_u_cla8_and8 = 0;
uint8_t u_CSAwallace_cla4_u_cla8_and9 = 0;
uint8_t u_CSAwallace_cla4_u_cla8_and10 = 0;
uint8_t u_CSAwallace_cla4_u_cla8_and11 = 0;
uint8_t u_CSAwallace_cla4_u_cla8_and12 = 0;
uint8_t u_CSAwallace_cla4_u_cla8_or3 = 0;
uint8_t u_CSAwallace_cla4_u_cla8_or4 = 0;
uint8_t u_CSAwallace_cla4_u_cla8_or5 = 0;
uint8_t u_CSAwallace_cla4_u_cla8_and13 = 0;
uint8_t u_CSAwallace_cla4_u_cla8_and14 = 0;
u_CSAwallace_cla4_and_0_0 = ((a >> 0) & 0x01) & ((b >> 0) & 0x01);
u_CSAwallace_cla4_and_1_0 = ((a >> 1) & 0x01) & ((b >> 0) & 0x01);
u_CSAwallace_cla4_and_2_0 = ((a >> 2) & 0x01) & ((b >> 0) & 0x01);
u_CSAwallace_cla4_and_3_0 = ((a >> 3) & 0x01) & ((b >> 0) & 0x01);
u_CSAwallace_cla4_and_0_1 = ((a >> 0) & 0x01) & ((b >> 1) & 0x01);
u_CSAwallace_cla4_and_1_1 = ((a >> 1) & 0x01) & ((b >> 1) & 0x01);
u_CSAwallace_cla4_and_2_1 = ((a >> 2) & 0x01) & ((b >> 1) & 0x01);
u_CSAwallace_cla4_and_3_1 = ((a >> 3) & 0x01) & ((b >> 1) & 0x01);
u_CSAwallace_cla4_and_0_2 = ((a >> 0) & 0x01) & ((b >> 2) & 0x01);
u_CSAwallace_cla4_and_1_2 = ((a >> 1) & 0x01) & ((b >> 2) & 0x01);
u_CSAwallace_cla4_and_2_2 = ((a >> 2) & 0x01) & ((b >> 2) & 0x01);
u_CSAwallace_cla4_and_3_2 = ((a >> 3) & 0x01) & ((b >> 2) & 0x01);
u_CSAwallace_cla4_and_0_3 = ((a >> 0) & 0x01) & ((b >> 3) & 0x01);
u_CSAwallace_cla4_and_1_3 = ((a >> 1) & 0x01) & ((b >> 3) & 0x01);
u_CSAwallace_cla4_and_2_3 = ((a >> 2) & 0x01) & ((b >> 3) & 0x01);
u_CSAwallace_cla4_and_3_3 = ((a >> 3) & 0x01) & ((b >> 3) & 0x01);
u_CSAwallace_cla4_csa0_csa_component_fa1_xor0 = ((u_CSAwallace_cla4_and_1_0 >> 0) & 0x01) ^ ((u_CSAwallace_cla4_and_0_1 >> 0) & 0x01);
u_CSAwallace_cla4_csa0_csa_component_fa1_and0 = ((u_CSAwallace_cla4_and_1_0 >> 0) & 0x01) & ((u_CSAwallace_cla4_and_0_1 >> 0) & 0x01);
u_CSAwallace_cla4_csa0_csa_component_fa2_xor0 = ((u_CSAwallace_cla4_and_2_0 >> 0) & 0x01) ^ ((u_CSAwallace_cla4_and_1_1 >> 0) & 0x01);
u_CSAwallace_cla4_csa0_csa_component_fa2_and0 = ((u_CSAwallace_cla4_and_2_0 >> 0) & 0x01) & ((u_CSAwallace_cla4_and_1_1 >> 0) & 0x01);
u_CSAwallace_cla4_csa0_csa_component_fa2_xor1 = ((u_CSAwallace_cla4_csa0_csa_component_fa2_xor0 >> 0) & 0x01) ^ ((u_CSAwallace_cla4_and_0_2 >> 0) & 0x01);
u_CSAwallace_cla4_csa0_csa_component_fa2_and1 = ((u_CSAwallace_cla4_csa0_csa_component_fa2_xor0 >> 0) & 0x01) & ((u_CSAwallace_cla4_and_0_2 >> 0) & 0x01);
u_CSAwallace_cla4_csa0_csa_component_fa2_or0 = ((u_CSAwallace_cla4_csa0_csa_component_fa2_and0 >> 0) & 0x01) | ((u_CSAwallace_cla4_csa0_csa_component_fa2_and1 >> 0) & 0x01);
u_CSAwallace_cla4_csa0_csa_component_fa3_xor0 = ((u_CSAwallace_cla4_and_3_0 >> 0) & 0x01) ^ ((u_CSAwallace_cla4_and_2_1 >> 0) & 0x01);
u_CSAwallace_cla4_csa0_csa_component_fa3_and0 = ((u_CSAwallace_cla4_and_3_0 >> 0) & 0x01) & ((u_CSAwallace_cla4_and_2_1 >> 0) & 0x01);
u_CSAwallace_cla4_csa0_csa_component_fa3_xor1 = ((u_CSAwallace_cla4_csa0_csa_component_fa3_xor0 >> 0) & 0x01) ^ ((u_CSAwallace_cla4_and_1_2 >> 0) & 0x01);
u_CSAwallace_cla4_csa0_csa_component_fa3_and1 = ((u_CSAwallace_cla4_csa0_csa_component_fa3_xor0 >> 0) & 0x01) & ((u_CSAwallace_cla4_and_1_2 >> 0) & 0x01);
u_CSAwallace_cla4_csa0_csa_component_fa3_or0 = ((u_CSAwallace_cla4_csa0_csa_component_fa3_and0 >> 0) & 0x01) | ((u_CSAwallace_cla4_csa0_csa_component_fa3_and1 >> 0) & 0x01);
u_CSAwallace_cla4_csa0_csa_component_fa4_xor1 = ((u_CSAwallace_cla4_and_3_1 >> 0) & 0x01) ^ ((u_CSAwallace_cla4_and_2_2 >> 0) & 0x01);
u_CSAwallace_cla4_csa0_csa_component_fa4_and1 = ((u_CSAwallace_cla4_and_3_1 >> 0) & 0x01) & ((u_CSAwallace_cla4_and_2_2 >> 0) & 0x01);
u_CSAwallace_cla4_csa1_csa_component_fa2_xor0 = ((u_CSAwallace_cla4_csa0_csa_component_fa2_xor1 >> 0) & 0x01) ^ ((u_CSAwallace_cla4_csa0_csa_component_fa1_and0 >> 0) & 0x01);
u_CSAwallace_cla4_csa1_csa_component_fa2_and0 = ((u_CSAwallace_cla4_csa0_csa_component_fa2_xor1 >> 0) & 0x01) & ((u_CSAwallace_cla4_csa0_csa_component_fa1_and0 >> 0) & 0x01);
u_CSAwallace_cla4_csa1_csa_component_fa3_xor0 = ((u_CSAwallace_cla4_csa0_csa_component_fa3_xor1 >> 0) & 0x01) ^ ((u_CSAwallace_cla4_csa0_csa_component_fa2_or0 >> 0) & 0x01);
u_CSAwallace_cla4_csa1_csa_component_fa3_and0 = ((u_CSAwallace_cla4_csa0_csa_component_fa3_xor1 >> 0) & 0x01) & ((u_CSAwallace_cla4_csa0_csa_component_fa2_or0 >> 0) & 0x01);
u_CSAwallace_cla4_csa1_csa_component_fa3_xor1 = ((u_CSAwallace_cla4_csa1_csa_component_fa3_xor0 >> 0) & 0x01) ^ ((u_CSAwallace_cla4_and_0_3 >> 0) & 0x01);
u_CSAwallace_cla4_csa1_csa_component_fa3_and1 = ((u_CSAwallace_cla4_csa1_csa_component_fa3_xor0 >> 0) & 0x01) & ((u_CSAwallace_cla4_and_0_3 >> 0) & 0x01);
u_CSAwallace_cla4_csa1_csa_component_fa3_or0 = ((u_CSAwallace_cla4_csa1_csa_component_fa3_and0 >> 0) & 0x01) | ((u_CSAwallace_cla4_csa1_csa_component_fa3_and1 >> 0) & 0x01);
u_CSAwallace_cla4_csa1_csa_component_fa4_xor0 = ((u_CSAwallace_cla4_csa0_csa_component_fa4_xor1 >> 0) & 0x01) ^ ((u_CSAwallace_cla4_csa0_csa_component_fa3_or0 >> 0) & 0x01);
u_CSAwallace_cla4_csa1_csa_component_fa4_and0 = ((u_CSAwallace_cla4_csa0_csa_component_fa4_xor1 >> 0) & 0x01) & ((u_CSAwallace_cla4_csa0_csa_component_fa3_or0 >> 0) & 0x01);
u_CSAwallace_cla4_csa1_csa_component_fa4_xor1 = ((u_CSAwallace_cla4_csa1_csa_component_fa4_xor0 >> 0) & 0x01) ^ ((u_CSAwallace_cla4_and_1_3 >> 0) & 0x01);
u_CSAwallace_cla4_csa1_csa_component_fa4_and1 = ((u_CSAwallace_cla4_csa1_csa_component_fa4_xor0 >> 0) & 0x01) & ((u_CSAwallace_cla4_and_1_3 >> 0) & 0x01);
u_CSAwallace_cla4_csa1_csa_component_fa4_or0 = ((u_CSAwallace_cla4_csa1_csa_component_fa4_and0 >> 0) & 0x01) | ((u_CSAwallace_cla4_csa1_csa_component_fa4_and1 >> 0) & 0x01);
u_CSAwallace_cla4_csa1_csa_component_fa5_xor0 = ((u_CSAwallace_cla4_and_3_2 >> 0) & 0x01) ^ ((u_CSAwallace_cla4_csa0_csa_component_fa4_and1 >> 0) & 0x01);
u_CSAwallace_cla4_csa1_csa_component_fa5_and0 = ((u_CSAwallace_cla4_and_3_2 >> 0) & 0x01) & ((u_CSAwallace_cla4_csa0_csa_component_fa4_and1 >> 0) & 0x01);
u_CSAwallace_cla4_csa1_csa_component_fa5_xor1 = ((u_CSAwallace_cla4_csa1_csa_component_fa5_xor0 >> 0) & 0x01) ^ ((u_CSAwallace_cla4_and_2_3 >> 0) & 0x01);
u_CSAwallace_cla4_csa1_csa_component_fa5_and1 = ((u_CSAwallace_cla4_csa1_csa_component_fa5_xor0 >> 0) & 0x01) & ((u_CSAwallace_cla4_and_2_3 >> 0) & 0x01);
u_CSAwallace_cla4_csa1_csa_component_fa5_or0 = ((u_CSAwallace_cla4_csa1_csa_component_fa5_and0 >> 0) & 0x01) | ((u_CSAwallace_cla4_csa1_csa_component_fa5_and1 >> 0) & 0x01);
u_CSAwallace_cla4_u_cla8_and0 = ((u_CSAwallace_cla4_csa1_csa_component_fa2_xor0 >> 0) & 0x01) & ((u_CSAwallace_cla4_and_0_0 >> 0) & 0x01);
u_CSAwallace_cla4_u_cla8_pg_logic3_or0 = ((u_CSAwallace_cla4_csa1_csa_component_fa3_xor1 >> 0) & 0x01) | ((u_CSAwallace_cla4_csa1_csa_component_fa2_and0 >> 0) & 0x01);
u_CSAwallace_cla4_u_cla8_pg_logic3_and0 = ((u_CSAwallace_cla4_csa1_csa_component_fa3_xor1 >> 0) & 0x01) & ((u_CSAwallace_cla4_csa1_csa_component_fa2_and0 >> 0) & 0x01);
u_CSAwallace_cla4_u_cla8_pg_logic3_xor0 = ((u_CSAwallace_cla4_csa1_csa_component_fa3_xor1 >> 0) & 0x01) ^ ((u_CSAwallace_cla4_csa1_csa_component_fa2_and0 >> 0) & 0x01);
u_CSAwallace_cla4_u_cla8_and1 = ((u_CSAwallace_cla4_u_cla8_pg_logic3_or0 >> 0) & 0x01) & ((u_CSAwallace_cla4_csa0_csa_component_fa1_xor0 >> 0) & 0x01);
u_CSAwallace_cla4_u_cla8_and2 = ((u_CSAwallace_cla4_u_cla8_pg_logic3_or0 >> 0) & 0x01) & ((u_CSAwallace_cla4_csa0_csa_component_fa1_xor0 >> 0) & 0x01);
u_CSAwallace_cla4_u_cla8_pg_logic4_or0 = ((u_CSAwallace_cla4_csa1_csa_component_fa4_xor1 >> 0) & 0x01) | ((u_CSAwallace_cla4_csa1_csa_component_fa3_or0 >> 0) & 0x01);
u_CSAwallace_cla4_u_cla8_pg_logic4_and0 = ((u_CSAwallace_cla4_csa1_csa_component_fa4_xor1 >> 0) & 0x01) & ((u_CSAwallace_cla4_csa1_csa_component_fa3_or0 >> 0) & 0x01);
u_CSAwallace_cla4_u_cla8_pg_logic4_xor0 = ((u_CSAwallace_cla4_csa1_csa_component_fa4_xor1 >> 0) & 0x01) ^ ((u_CSAwallace_cla4_csa1_csa_component_fa3_or0 >> 0) & 0x01);
u_CSAwallace_cla4_u_cla8_xor4 = ((u_CSAwallace_cla4_u_cla8_pg_logic4_xor0 >> 0) & 0x01) ^ ((u_CSAwallace_cla4_u_cla8_pg_logic3_and0 >> 0) & 0x01);
u_CSAwallace_cla4_u_cla8_and3 = ((u_CSAwallace_cla4_u_cla8_pg_logic3_and0 >> 0) & 0x01) & ((u_CSAwallace_cla4_u_cla8_pg_logic4_or0 >> 0) & 0x01);
u_CSAwallace_cla4_u_cla8_or0 = ((u_CSAwallace_cla4_u_cla8_pg_logic4_and0 >> 0) & 0x01) | ((u_CSAwallace_cla4_u_cla8_and3 >> 0) & 0x01);
u_CSAwallace_cla4_u_cla8_pg_logic5_or0 = ((u_CSAwallace_cla4_csa1_csa_component_fa5_xor1 >> 0) & 0x01) | ((u_CSAwallace_cla4_csa1_csa_component_fa4_or0 >> 0) & 0x01);
u_CSAwallace_cla4_u_cla8_pg_logic5_and0 = ((u_CSAwallace_cla4_csa1_csa_component_fa5_xor1 >> 0) & 0x01) & ((u_CSAwallace_cla4_csa1_csa_component_fa4_or0 >> 0) & 0x01);
u_CSAwallace_cla4_u_cla8_pg_logic5_xor0 = ((u_CSAwallace_cla4_csa1_csa_component_fa5_xor1 >> 0) & 0x01) ^ ((u_CSAwallace_cla4_csa1_csa_component_fa4_or0 >> 0) & 0x01);
u_CSAwallace_cla4_u_cla8_xor5 = ((u_CSAwallace_cla4_u_cla8_pg_logic5_xor0 >> 0) & 0x01) ^ ((u_CSAwallace_cla4_u_cla8_or0 >> 0) & 0x01);
u_CSAwallace_cla4_u_cla8_and4 = ((u_CSAwallace_cla4_u_cla8_pg_logic3_and0 >> 0) & 0x01) & ((u_CSAwallace_cla4_u_cla8_pg_logic5_or0 >> 0) & 0x01);
u_CSAwallace_cla4_u_cla8_and5 = ((u_CSAwallace_cla4_u_cla8_and4 >> 0) & 0x01) & ((u_CSAwallace_cla4_u_cla8_pg_logic4_or0 >> 0) & 0x01);
u_CSAwallace_cla4_u_cla8_and6 = ((u_CSAwallace_cla4_u_cla8_pg_logic4_and0 >> 0) & 0x01) & ((u_CSAwallace_cla4_u_cla8_pg_logic5_or0 >> 0) & 0x01);
u_CSAwallace_cla4_u_cla8_or1 = ((u_CSAwallace_cla4_u_cla8_and5 >> 0) & 0x01) | ((u_CSAwallace_cla4_u_cla8_and6 >> 0) & 0x01);
u_CSAwallace_cla4_u_cla8_or2 = ((u_CSAwallace_cla4_u_cla8_pg_logic5_and0 >> 0) & 0x01) | ((u_CSAwallace_cla4_u_cla8_or1 >> 0) & 0x01);
u_CSAwallace_cla4_u_cla8_pg_logic6_or0 = ((u_CSAwallace_cla4_and_3_3 >> 0) & 0x01) | ((u_CSAwallace_cla4_csa1_csa_component_fa5_or0 >> 0) & 0x01);
u_CSAwallace_cla4_u_cla8_pg_logic6_and0 = ((u_CSAwallace_cla4_and_3_3 >> 0) & 0x01) & ((u_CSAwallace_cla4_csa1_csa_component_fa5_or0 >> 0) & 0x01);
u_CSAwallace_cla4_u_cla8_pg_logic6_xor0 = ((u_CSAwallace_cla4_and_3_3 >> 0) & 0x01) ^ ((u_CSAwallace_cla4_csa1_csa_component_fa5_or0 >> 0) & 0x01);
u_CSAwallace_cla4_u_cla8_xor6 = ((u_CSAwallace_cla4_u_cla8_pg_logic6_xor0 >> 0) & 0x01) ^ ((u_CSAwallace_cla4_u_cla8_or2 >> 0) & 0x01);
u_CSAwallace_cla4_u_cla8_and7 = ((u_CSAwallace_cla4_u_cla8_pg_logic3_and0 >> 0) & 0x01) & ((u_CSAwallace_cla4_u_cla8_pg_logic5_or0 >> 0) & 0x01);
u_CSAwallace_cla4_u_cla8_and8 = ((u_CSAwallace_cla4_u_cla8_pg_logic6_or0 >> 0) & 0x01) & ((u_CSAwallace_cla4_u_cla8_pg_logic4_or0 >> 0) & 0x01);
u_CSAwallace_cla4_u_cla8_and9 = ((u_CSAwallace_cla4_u_cla8_and7 >> 0) & 0x01) & ((u_CSAwallace_cla4_u_cla8_and8 >> 0) & 0x01);
u_CSAwallace_cla4_u_cla8_and10 = ((u_CSAwallace_cla4_u_cla8_pg_logic4_and0 >> 0) & 0x01) & ((u_CSAwallace_cla4_u_cla8_pg_logic6_or0 >> 0) & 0x01);
u_CSAwallace_cla4_u_cla8_and11 = ((u_CSAwallace_cla4_u_cla8_and10 >> 0) & 0x01) & ((u_CSAwallace_cla4_u_cla8_pg_logic5_or0 >> 0) & 0x01);
u_CSAwallace_cla4_u_cla8_and12 = ((u_CSAwallace_cla4_u_cla8_pg_logic5_and0 >> 0) & 0x01) & ((u_CSAwallace_cla4_u_cla8_pg_logic6_or0 >> 0) & 0x01);
u_CSAwallace_cla4_u_cla8_or3 = ((u_CSAwallace_cla4_u_cla8_and9 >> 0) & 0x01) | ((u_CSAwallace_cla4_u_cla8_and11 >> 0) & 0x01);
u_CSAwallace_cla4_u_cla8_or4 = ((u_CSAwallace_cla4_u_cla8_or3 >> 0) & 0x01) | ((u_CSAwallace_cla4_u_cla8_and12 >> 0) & 0x01);
u_CSAwallace_cla4_u_cla8_or5 = ((u_CSAwallace_cla4_u_cla8_pg_logic6_and0 >> 0) & 0x01) | ((u_CSAwallace_cla4_u_cla8_or4 >> 0) & 0x01);
u_CSAwallace_cla4_u_cla8_and13 = ((u_CSAwallace_cla4_u_cla8_pg_logic3_and0 >> 0) & 0x01) & ((u_CSAwallace_cla4_u_cla8_pg_logic6_or0 >> 0) & 0x01);
u_CSAwallace_cla4_u_cla8_and14 = ((u_CSAwallace_cla4_u_cla8_pg_logic4_and0 >> 0) & 0x01) & ((u_CSAwallace_cla4_u_cla8_pg_logic6_or0 >> 0) & 0x01);
u_CSAwallace_cla4_out |= ((u_CSAwallace_cla4_and_0_0 >> 0) & 0x01ull) << 0;
u_CSAwallace_cla4_out |= ((u_CSAwallace_cla4_csa0_csa_component_fa1_xor0 >> 0) & 0x01ull) << 1;
u_CSAwallace_cla4_out |= ((u_CSAwallace_cla4_csa1_csa_component_fa2_xor0 >> 0) & 0x01ull) << 2;
u_CSAwallace_cla4_out |= ((u_CSAwallace_cla4_u_cla8_pg_logic3_xor0 >> 0) & 0x01ull) << 3;
u_CSAwallace_cla4_out |= ((u_CSAwallace_cla4_u_cla8_xor4 >> 0) & 0x01ull) << 4;
u_CSAwallace_cla4_out |= ((u_CSAwallace_cla4_u_cla8_xor5 >> 0) & 0x01ull) << 5;
u_CSAwallace_cla4_out |= ((u_CSAwallace_cla4_u_cla8_xor6 >> 0) & 0x01ull) << 6;
u_CSAwallace_cla4_out |= ((u_CSAwallace_cla4_u_cla8_or5 >> 0) & 0x01ull) << 7;
return u_CSAwallace_cla4_out;
}
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