Vojta 1d3c8a0753 noninteractive

2025-01-15 13:31:53 +01:00

..

adder_signed.c

Added signedness support for the output C code representation. Also modified the testing scripts and the chr2c.py converter accordingly and did some documentation changes (even made a small change in readme.md). Signedness support for the output python representation is TBD.

2021-10-09 23:45:54 +02:00

adder_unsigned.c

Automated testing, preparing the package for publishing (#1)

2021-06-18 12:38:11 +02:00

mac.c

auto test MAC

2021-09-07 08:32:52 +02:00

multiplier_signed.c

Added signedness support for the output C code representation. Also modified the testing scripts and the chr2c.py converter accordingly and did some documentation changes (even made a small change in readme.md). Signedness support for the output python representation is TBD.

2021-10-09 23:45:54 +02:00

multiplier_unsigned.c

Automated testing, preparing the package for publishing (#1)

2021-06-18 12:38:11 +02:00

subtractor_signed.c

Added ripple borrow subtractor circuit and updated automated testing.

2024-10-01 18:42:11 +02:00

subtractor_unsigned.c

Added ripple borrow subtractor circuit and updated automated testing.

2024-10-01 18:42:11 +02:00

tb_adder_signed.v

verilog finish not verbose in testbenches

2025-01-15 13:30:49 +01:00

tb_adder_unsigned.v

verilog finish not verbose in testbenches

2025-01-15 13:30:49 +01:00

tb_multiplier_signed.v

verilog finish not verbose in testbenches

2025-01-15 13:30:49 +01:00

tb_multiplier_unsigned.v

verilog finish not verbose in testbenches

2025-01-15 13:30:49 +01:00

tb_subtractor_signed.v

verilog finish not verbose in testbenches

2025-01-15 13:30:49 +01:00

tb_subtractor_unsigned.v

verilog finish not verbose in testbenches

2025-01-15 13:30:49 +01:00

test_all.py

Added ripple borrow subtractor circuit and updated automated testing.

2024-10-01 18:42:11 +02:00

test_ax.py

Big code cleanup and some fixes. Hierarchical generation for popcount seems problematic. It seems bus connections are the issue.

2024-04-13 17:04:03 +02:00

test_cgp.py

Added ripple borrow subtractor circuit and updated automated testing.

2024-10-01 18:42:11 +02:00

test_circuits_cgp.sh

Added ripple borrow subtractor circuit and updated automated testing.

2024-10-01 18:42:11 +02:00

test_circuits_verilog.sh

noninteractive

2025-01-15 13:31:53 +01:00

test_circuits.sh

Added ripple borrow subtractor circuit and updated automated testing.

2024-10-01 18:42:11 +02:00

test_cnf.py

verilog finish not verbose in testbenches

2025-01-15 13:30:49 +01:00

test_compare.py

Merge branch 'popcount' into devel

2024-04-05 09:19:04 +02:00

test_mac.sh

test all

2021-09-07 09:44:23 +02:00

test_popcnt.py

Added ripple borrow subtractor circuit and updated automated testing.

2024-10-01 18:42:11 +02:00

test_popcount_compare.py

Added ripple borrow subtractor circuit and updated automated testing.

2024-10-01 18:42:11 +02:00

test_reduce.py

Added ripple borrow subtractor circuit and updated automated testing.

2024-10-01 18:42:11 +02:00